JP2008021723A - Manufacturing method of semiconductor device - Google Patents

Manufacturing method of semiconductor device Download PDF

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JP2008021723A
JP2008021723A JP2006190386A JP2006190386A JP2008021723A JP 2008021723 A JP2008021723 A JP 2008021723A JP 2006190386 A JP2006190386 A JP 2006190386A JP 2006190386 A JP2006190386 A JP 2006190386A JP 2008021723 A JP2008021723 A JP 2008021723A
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film
platinum
semiconductor device
ptsi
silicon substrate
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Saburo Okumura
三郎 奥村
Yoshikazu Nishimura
良和 西村
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Sansha Electric Manufacturing Co Ltd
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Sansha Electric Manufacturing Co Ltd
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of diffusing platinum in a semiconductor device. <P>SOLUTION: After a platinum film is deposited on a surface of a silicon substrate, a low temperature heat treatment process are activated at 300-500°C to form a platinum silicide (PtSi) film. Thereafter, the Pt film is removed, and Pt diffusion is activated by the PtSi film at a high temperature in a range of 800-1,000°C. The Pt film is removed after the low temperature heat treatment, whereby a diffusion temperature can be raised and high-speed switching characteristics can be improved. As a Pt concentration to an oxide film or the like on the surface of the silicon substrate can be reduced compared with a conventional method, a good withstand voltage yield ratio can be achieved with good repeatability. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

本発明は、耐圧特性を安定させて安価に量産できるようにした,半導体装置の製造方法に係わり,とくに白金をシリコン基板に拡散する方法に関する。   The present invention relates to a method for manufacturing a semiconductor device, which can stabilize mass-proof characteristics and can be mass-produced at low cost, and more particularly to a method for diffusing platinum into a silicon substrate.

半導体装置に導入するライフタイムキラーとしては、白金が金にくらべて逆漏れ電流および逆回復時の電流変化のソフト性の点で優れていることが知られている。   As a lifetime killer to be introduced into a semiconductor device, it is known that platinum is superior to gold in terms of softness of reverse leakage current and current change at the time of reverse recovery.

従来の半導体装置の製造工程において白金拡散を行う方法としては、図3のように,シリコンウエーハの表面にPt蒸着膜を形成し、高温(800℃乃至1000℃)の熱処理をし、シリコンウエーハ中に十分均一に白金を拡散させていた。   As a method of performing platinum diffusion in the conventional manufacturing process of a semiconductor device, as shown in FIG. 3, a Pt vapor deposition film is formed on the surface of a silicon wafer, and heat treatment at a high temperature (800 ° C. to 1000 ° C.) is performed. The platinum was diffused sufficiently uniformly.

パワーダイオードは高周波にも使われるようになり逆回復時間を短くするように求められている。ダイオードの逆回復時間の改善に関する技術文献として特許文献1がある。   Power diodes are also used for high frequencies and are required to shorten the reverse recovery time. There is Patent Document 1 as a technical document regarding improvement of reverse recovery time of a diode.

特許文献1の(段落0004)に次の記述がある。「ダイオードの逆回復時間を改善するために重金属拡散や電子線照射などを用いた少数キャリアのライフタイム制御が広く用いられている」、「逆回復時間や逆回復電流および逆回復電荷を小さくして、逆回復損失を低減させることが出来る」と記述されている。   Patent Document 1 (paragraph 0004) has the following description. “Lifetime control of minority carriers using heavy metal diffusion and electron beam irradiation is widely used to improve reverse recovery time of diodes”, “Reverse recovery time, reverse recovery current and reverse recovery charge are reduced. Thus, reverse recovery loss can be reduced. "

少数キャリアのライフタイム制御の電子線照射は,高額の設備投資を必要とする欠点がある。   The minority carrier lifetime control electron beam irradiation has the disadvantage of requiring high capital investment.

逆回復時間が従来の3μSでは長いため、要求される50kHz以上でスイッチング出来ないという欠点があった。   Since the reverse recovery time is long in the conventional 3 μS, there is a disadvantage that switching cannot be performed at a required 50 kHz or higher.

「特開2003−163357」公報。「半導体装置およびその製造方法」Japanese Patent Laid-Open No. 2003-163357. “Semiconductor Device and Manufacturing Method Thereof”

電子線照射設備など投資を必要とする欠点があるが,コストの安価な方法で完成され提
供できる逆回復時間が短いパワーデバイスの製造方法を確立することが課題で,再現性を確認しながら試行して耐圧特性を安定化させる。量産時の耐圧特性を安定させて安価に製造でき,高速動作が可能な半導体装置とし,加えて,高速化を得る為のライフタイムキラーとしての白金をシリコン基板に拡散する工程を含む半導体装置の製造方法の発明に関する。
Although there are drawbacks that require investment such as electron beam irradiation equipment, it is a challenge to establish a power device manufacturing method with a short reverse recovery time that can be completed and provided by an inexpensive method. Thus, the breakdown voltage characteristic is stabilized. A semiconductor device that includes a step of diffusing platinum into a silicon substrate as a lifetime killer for achieving high speed, in addition to a semiconductor device that can be manufactured at low cost with stable withstand voltage characteristics during mass production. The present invention relates to a manufacturing method invention.

上記の課題を解決するために、ライフタイムキラーとして金を電子線照射して拡散させる方法に代わってシリコン表面にPtを蒸着などの方法で堆積させ900℃程度の高温で熱処理してシリコン(高濃度N型のシリコン基板上に低濃度N型シリコン層を成長させた層)内にPt拡散させていた。従来のこの方法では,シリコン表面の絶縁膜である酸化膜に高濃度のPtが拡散されてしまう為,耐圧良品率が低下する原因となっていた。Pt拡散のあと表面のPtを剥離する工程,該剥離工程のあと金属電極を形成する工程を経てデバイスを完成させていた。Pt拡散の温度を高くすると,このあとPt剥離が出来ない欠点があった。
本発明の半導体装置は次に説明する製造方法とした。白金シリサイド(PtSi)膜をシリコン表面に形成する低温熱処理工程と,白金シリサイド(PtSi)膜によってシリコン内にPt拡散する工程,この製造方法で絶縁膜である酸化膜へのPt濃度を減少させることができたので,耐圧特性の安定化が可能となった。
In order to solve the above-mentioned problem, as a lifetime killer, instead of the method of diffusing gold by electron beam irradiation, Pt is deposited on the silicon surface by vapor deposition or the like, and heat-treated at a high temperature of about 900 ° C. Pt was diffused into a layer in which a low concentration N-type silicon layer was grown on a concentration N-type silicon substrate. In this conventional method, high-concentration Pt is diffused into the oxide film, which is an insulating film on the silicon surface. After Pt diffusion, the device was completed through a process of peeling Pt on the surface and a process of forming a metal electrode after the peeling process. When the temperature of Pt diffusion was increased, there was a defect that Pt peeling could not be performed thereafter.
The semiconductor device of the present invention was manufactured as described below. A low-temperature heat treatment process for forming a platinum silicide (PtSi) film on the silicon surface, a Pt diffusion process in the silicon by the platinum silicide (PtSi) film, and a Pt concentration in the oxide film as an insulating film is reduced by this manufacturing method. As a result, the breakdown voltage characteristics can be stabilized.

請求項1に関しては,
シリコン基板表面に白金膜を堆積させる工程A,シリコン基板表面に白金シリサイド(PtSi)膜を形成する低温の熱処理工程B,該熱処理工程Bの後,シリコン基板表面に残ったPt膜を剥離する工程C,PtSi膜によってシリコン基板にPt拡散させる高温熱処理工程Dを含むことを特徴とする半導体装置の製造方法とした。
Regarding claim 1,
Step A for depositing a platinum film on the surface of the silicon substrate, Step B for forming a platinum silicide (PtSi) film on the surface of the silicon substrate, Step B for removing the Pt film remaining on the surface of the silicon substrate after the heat treatment step B The semiconductor device manufacturing method includes a high-temperature heat treatment step D in which Pt is diffused into a silicon substrate by a C, PtSi film.

請求項2に関しては,
前記,低温の熱処理工程Bの温度は300℃〜500℃であることを特徴とする半導体装置の製造方法とした。
Regarding claim 2,
The temperature of the low-temperature heat treatment step B is 300 ° C to 500 ° C.

請求項3に関しては,
前記の,高温でPt拡散する工程の温度は800〜1000℃であることを特徴とする半導体装置の製造方法とした。
Regarding claim 3,
The semiconductor device manufacturing method is characterized in that the temperature of the Pt diffusion step at a high temperature is 800 to 1000 ° C.

請求項4に関しては,
N+型の半導体基板(第1半導体層)の上面にN−型の第2半導体層を形成する工程と,第2半導体層の表面に酸化膜を形成し選択的に酸化膜を除去した部位の,第2半導体層にP層(第3半導体層)のアノード領域を不純物拡散によって形成する工程,とアノード領域の表面に第1主電極、半導体基板(第1半導体層)の下面に第2主電極の形成が行われる工程を具備し,アノード領域を形成する工程と第1主電極及び第2主電極の形成が行われる工程との中間において,半導体基板上面に白金膜を堆積し低温熱処理で白金シリサイド(PtSi)膜を形成して,残っているPt膜を除去してPtSi膜によりPtをシリコン基板に高温で拡散する工程を具備することを特徴とする半導体装置の製造方法とした。
Regarding claim 4,
A step of forming an N− type second semiconductor layer on the upper surface of the N + type semiconductor substrate (first semiconductor layer), and a portion where an oxide film is formed on the surface of the second semiconductor layer and the oxide film is selectively removed. , Forming an anode region of a P layer (third semiconductor layer) in the second semiconductor layer by impurity diffusion, a first main electrode on the surface of the anode region, and a second main on the lower surface of the semiconductor substrate (first semiconductor layer). In the middle of the step of forming the anode region and the step of forming the first main electrode and the second main electrode, a platinum film is deposited on the upper surface of the semiconductor substrate and subjected to low-temperature heat treatment. A method of manufacturing a semiconductor device is provided, which includes a step of forming a platinum silicide (PtSi) film, removing the remaining Pt film, and diffusing Pt into the silicon substrate at a high temperature by the PtSi film.

半導体基板上面に白金膜を堆積した基板は機能領域が形成されて最上部位には酸化膜(絶縁層)が形成されている。僅かのPtはこの酸化膜にも拡散するが,従来の白金シリサイド(PtSi)膜でなくて,Pt蒸着膜からPt拡散させた場合での酸化膜に拡散するPt量は極めて多いので,耐電圧特性の悪い原因を内在させていた。 A substrate in which a platinum film is deposited on an upper surface of a semiconductor substrate has a functional region, and an oxide film (insulating layer) is formed at the uppermost portion. Although a small amount of Pt diffuses into this oxide film, the amount of Pt diffused into the oxide film when Pt is diffused from a Pt vapor deposition film is extremely large, not the conventional platinum silicide (PtSi) film. The cause of bad characteristics was inherent.

設備費を要した,電子線照射によるライフタイム制御プロセスを用いないでも,デバイスの逆回復時間を従来の3μSから0.5μSへ短くすることが出来て、逆回復の速さが6倍となった。   The reverse recovery time of the device can be shortened from the conventional 3μS to 0.5μS without using the lifetime control process by electron beam irradiation, which required equipment costs, and the reverse recovery speed is 6 times faster. It was.

以上のように、本発明のパワーデバイスは、従来の逆回復時間の6倍速い性能のものをコスト高にならずに形成できた。従来のこの方法では,シリコン表面の絶縁膜である酸化膜に高濃度のPtが拡散されてしまう為,耐圧良品率が低下する原因となっていた。Pt拡散のあとの表面のPtを剥離する工程,該剥離工程のあと金属電極を形成する工程を経てデバイスを完成させていた。Pt拡散の温度を高くすると,このPt剥離が出来ない欠点があったが,この欠点を排除した。
本発明の半導体装置は次に説明する製造方法とした。白金シリサイド(PtSi)膜をシリコン表面に形成する低温熱処理工程と,白金シリサイド(PtSi)膜によってシリコン内にPt拡散する工程,この製造方法で絶縁膜である酸化膜へのPt濃度を減少させることができたので,耐圧特性の安定化が可能となった。拡散熱処理温度が低いので省資源に寄与し工業的価値が高い。
As described above, the power device of the present invention can be formed without increasing the cost with a performance that is six times faster than the conventional reverse recovery time. In this conventional method, high-concentration Pt is diffused into the oxide film, which is an insulating film on the silicon surface. The device was completed through a step of peeling Pt on the surface after Pt diffusion and a step of forming a metal electrode after the peeling step. When the temperature of Pt diffusion was raised, there was a defect that this Pt peeling was not possible, but this defect was eliminated.
The semiconductor device of the present invention was manufactured as described below. A low-temperature heat treatment process for forming a platinum silicide (PtSi) film on the silicon surface, a Pt diffusion process in the silicon by the platinum silicide (PtSi) film, and a Pt concentration in the oxide film as an insulating film is reduced by this manufacturing method. As a result, the breakdown voltage characteristics can be stabilized. Low diffusion heat treatment temperature contributes to resource saving and high industrial value.

図1に,本発明による実施例に係る半導体装置の製造工程順に示した断面図によって説明する。図3の従来の半導体装置の製造工程断面図と対比して説明する。以下の説明で、第1導電型をN型、第2導電型をP型とするが,逆であってもかまわない。先ず図3の従来の方法は,第1導電型(N型)のシリコン基板1に低濃度の第1導電型の第2半導体層2を形成し,その後にエッチング技術を用いて表面に選択的に溝を形成した後,第2導電型(P型)の第3半導体層3を形成したものに対して蒸着によって白金膜を形成した(ステップ1),次に,900℃程度の高温でPt拡散して第2半導体層に白金を注入する(ステップ2),この工程の後に,表面に残っている白金膜を剥離する(ステップ3)工程を経て,第1主電極19と第2主電極20を形成して(ステップ4)デバイスを製作していた。この工程でPt拡散して第2半導体層に白金を注入するときに,絶縁酸化膜に高濃度のPtが拡散されてしまう為,耐圧不良品が出来てしまう欠点があった。   FIG. 1 is a cross-sectional view illustrating a semiconductor device according to an embodiment of the present invention in order of manufacturing steps. This will be described in comparison with the manufacturing process sectional view of the conventional semiconductor device of FIG. In the following description, the first conductivity type is N-type and the second conductivity type is P-type, but the reverse may be possible. First, in the conventional method of FIG. 3, a low-concentration first-conductivity-type second semiconductor layer 2 is formed on a first-conductivity-type (N-type) silicon substrate 1 and then selectively etched on the surface using an etching technique. After forming the grooves, a platinum film was formed by vapor deposition on the second conductive type (P type) third semiconductor layer 3 formed (step 1), and then at a high temperature of about 900 ° C. The first main electrode 19 and the second main electrode are diffused and injected into the second semiconductor layer (step 2). After this step, the platinum film remaining on the surface is peeled off (step 3). 20 was formed (step 4). When platinum is diffused in this process and platinum is implanted into the second semiconductor layer, a high concentration of Pt is diffused in the insulating oxide film, resulting in a defect in that a withstand voltage is poor.

この欠点を排除したのが本発明による製造方法であって,図3のステップ1に対して図1の工程A+Bで蒸着等による白金膜を形成した後に300乃至500℃の低温で熱処理してシリコン表面にPtシリサイド膜を形成した。このPtシリサイド膜によってPt拡散を実施する方法を見出した結果,絶縁酸化膜に高濃度のPtが拡散されてしまうことが排除できて耐圧特性が安定した製造方法であることが判明した。Ptシリサイドで高温(800乃至1000℃)でPt拡散する,従来のようにこの処理の前にPt剥離をしたからこの後でのPt剥離をしないので,処理温度を高めて処理時間を短縮させることが出来たので工程が短縮されコストが安く出来た。 The manufacturing method according to the present invention eliminates this drawback, and forms a platinum film by vapor deposition or the like in step A + B of FIG. 1 with respect to step 1 of FIG. A Pt silicide film was formed on the surface. As a result of finding a method for carrying out Pt diffusion using this Pt silicide film, it has been found that this is a manufacturing method in which high-concentration Pt is diffused into the insulating oxide film and the breakdown voltage characteristics are stable. Pt diffuses with Pt silicide at a high temperature (800 to 1000 ° C.). Since Pt was peeled before this treatment as in the past, Pt is not peeled after this, so the treatment temperature is increased to shorten the treatment time. As a result, the process was shortened and the cost was reduced.

図4の従来の半導体装置の特性図と対比して説明すると,図2は本発明による実施例に係る半導体装置の耐圧特性図で見られるように,この横軸に示した700V付近まで縦軸の漏れ電流の増加がなく,従来の特性を示した図4の600V付近まで電圧の変化(増加)によって漏れ電流が変化(増加)していた従来は600V付近でブレークダウンしていた。これと比較して600Vまでの増加した電流変動がなく安定した耐圧特性を有することが認められた。 4 is compared with the characteristic diagram of the conventional semiconductor device of FIG. 4, FIG. 2 shows the breakdown voltage characteristic diagram of the semiconductor device according to the embodiment of the present invention. The leakage current has changed (increased) due to a change (increase) in voltage until the vicinity of 600V in FIG. 4 showing the conventional characteristics, and a conventional breakdown has occurred in the vicinity of 600V. Compared to this, it was confirmed that there was no increased current fluctuation up to 600V and stable breakdown voltage characteristics.

本発明は、特許文献1で開示された従来のライフタイム制御プロセス(電子照射)を導入する必要が無くても、逆回復時間の6倍速いデバイス製造方法を導くことに成功したので、半導体デバイスの製品コストが削減できた。半導体デバイスを製造する際の省エネルギーと省資源に寄与し,産業上の貢献度が高い。   Since the present invention has succeeded in deriving a device manufacturing method that is six times faster than the reverse recovery time without the need to introduce the conventional lifetime control process (electron irradiation) disclosed in Patent Document 1, the semiconductor device The product cost was reduced. It contributes to energy and resource saving when manufacturing semiconductor devices, and has a high industrial contribution.

本発明による実施例に係る半導体装置の製造工程断面図である。It is a manufacturing process sectional view of a semiconductor device concerning an example by the present invention. 本発明による実施例に係る半導体装置の特性図である。It is a characteristic view of the semiconductor device based on the Example by this invention. 従来の半導体装置の製造工程断面図である。It is sectional drawing of the manufacturing process of the conventional semiconductor device. 従来の半導体装置の特性図である。It is a characteristic view of the conventional semiconductor device.

符号の説明Explanation of symbols

1 (高濃度の)N形半導体層(第1の半導体層)
2 (低濃度の)N形半導体層(第2の半導体層)
3 (高濃度の)P形半導体層(第3の半導体層)
8 アノード電極(第1主電極)
9 カソード電極(第2主電極)
10 絶縁膜(酸化膜)
1 (High concentration) N-type semiconductor layer (first semiconductor layer)
2 (Low concentration) N-type semiconductor layer (second semiconductor layer)
3 (High concentration) P-type semiconductor layer (third semiconductor layer)
8 Anode electrode (first main electrode)
9 Cathode electrode (second main electrode)
10 Insulating film (oxide film)

Claims (4)

シリコン基板表面に白金膜を堆積させる工程A,シリコン基板表面に白金シリサイド(PtSi)膜を形成する低温の熱処理工程B,該熱処理工程Bの後,シリコン基板表面に残ったPt膜を除去する工程C,PtSi膜によってシリコン基板にPt拡散させる高温熱処理工程Dを含むことを特徴とする半導体装置の製造方法。   Step A for depositing a platinum film on the surface of the silicon substrate, Step B for low-temperature treatment for forming a platinum silicide (PtSi) film on the surface of the silicon substrate, Step for removing the Pt film remaining on the surface of the silicon substrate after the heat treatment step B A method for manufacturing a semiconductor device, comprising a high-temperature heat treatment step D in which Pt is diffused into a silicon substrate by a C, PtSi film. 前記の,低温の熱処理工程Bの温度は300℃〜500℃であることを特徴とする請求項1記載の半導体装置の製造方法。 2. The method of manufacturing a semiconductor device according to claim 1, wherein the temperature of the low-temperature heat treatment step B is 300 to 500.degree. 前記の,高温でPt拡散する工程の温度は800〜1000℃であることを特徴とする請求項1記載の半導体装置の製造方法。 2. The method of manufacturing a semiconductor device according to claim 1, wherein the temperature of the Pt diffusion step at a high temperature is 800 to 1000 [deg.] C. N+型の半導体基板(第1半導体層)の上面にN−型の第2半導体層を形成する工程と,第2半導体層の表面に酸化膜を形成し選択的に酸化膜を除去した部位の,第2半導体層にP層(第3半導体層)のアノード領域を不純物拡散によって形成する工程とアノード領域の表面に第1主電極、半導体基板(第1半導体層)の下面に第2主電極の形成が行われる工程を具備し,アノード領域を形成する工程と第1主電極及び第2主電極の形成が行われる工程との中間において,半導体基板上面に白金膜を堆積し低温熱処理で白金シリサイド(PtSi)膜を形成して,残っているPt膜を除去してPtSi膜によりPtをシリコン基板に高温で拡散する工程を具備することを特徴とする請求項1乃至3記載の半導体装置の製造方法。

A step of forming an N− type second semiconductor layer on the upper surface of the N + type semiconductor substrate (first semiconductor layer), and a portion where an oxide film is formed on the surface of the second semiconductor layer and the oxide film is selectively removed. , Forming a P layer (third semiconductor layer) anode region in the second semiconductor layer by impurity diffusion, a first main electrode on the surface of the anode region, and a second main electrode on the lower surface of the semiconductor substrate (first semiconductor layer). In the middle of the step of forming the anode region and the step of forming the first main electrode and the second main electrode, a platinum film is deposited on the upper surface of the semiconductor substrate, and the platinum is formed by low-temperature heat treatment. 4. The semiconductor device according to claim 1, further comprising a step of forming a silicide (PtSi) film, removing the remaining Pt film, and diffusing Pt to the silicon substrate at a high temperature by the PtSi film. Production method.

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Cited By (2)

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Publication number Priority date Publication date Assignee Title
WO2014163950A1 (en) 2013-03-13 2014-10-09 Dow Global Technologies Llc Spliced fiber-reinforced outer shell for cylindrical filtration element
CN112013982A (en) * 2020-09-08 2020-12-01 济南南知信息科技有限公司 Embedded platinum galvanic couple sensor

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JPH06342799A (en) * 1993-06-02 1994-12-13 Toyota Autom Loom Works Ltd Semiconductor device and manufacture thereof

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Publication number Priority date Publication date Assignee Title
JPH06342799A (en) * 1993-06-02 1994-12-13 Toyota Autom Loom Works Ltd Semiconductor device and manufacture thereof

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2014163950A1 (en) 2013-03-13 2014-10-09 Dow Global Technologies Llc Spliced fiber-reinforced outer shell for cylindrical filtration element
US9623379B2 (en) 2013-03-13 2017-04-18 Dow Global Technologies Llc Spliced fiber-reinforced outer shell for cylindrical filtration element
CN112013982A (en) * 2020-09-08 2020-12-01 济南南知信息科技有限公司 Embedded platinum galvanic couple sensor

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