JP2008004436A - Plasma display panel, and its manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a panel capable of being driven at a low voltage, of achieving stable writing discharge, and of achieving high-efficiency sustaining discharge, and suitable for high definition. <P>SOLUTION: This plasma display panel is provided with: a first glass substrate 2 having a plurality of pairs of display electrodes 5 each comprising a scanning electrode 3 and a sustaining electrode 4 arranged thereon; and a second glass substrate 9 arranged oppositely to the first glass substrate interposing a discharge space 14, and having a plurality of data electrodes 10 arranged thereon in a direction crossing the display electrodes. The plasma display panel is structured such that a back-side dielectric layer 11 is formed on the second glass substrate to cover the data electrodes; projecting parts 16 are formed on the back-side dielectric layer to overlap the data electrodes in a plan view; and the smallest distance between the projecting parts and the display electrodes is set smaller than that between the display electrodes and the back-side dielectric layer. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a plasma display panel used for a large-screen, thin and lightweight display device and a method for manufacturing the same.

  An AC surface discharge type plasma display panel (hereinafter also referred to as a “panel”) representative of the AC type has a configuration as shown in FIG.

  In FIG. 13, the front plate 1 is formed on the surface of the first glass substrate 2 by arranging display electrode pairs 105 including scan electrodes 103 and sustain electrodes 104 that perform surface discharge in parallel. The scan electrode 103 and the sustain electrode 104 are respectively transparent electrodes 103a and 104a formed on the surface of the first glass substrate 2, silver (Ag) formed thereon, and a glass frit material that is a binder thereof. It is comprised with the bus-bars 103b and 04b which consist of. A light absorption layer 17 is formed between the display electrode pair 105. A front-side dielectric layer 6 is formed so as to cover the display electrode pair 105, and a protective film 7 is formed thereon.

  The back plate 8 is formed by arranging data electrodes 10 in parallel on the surface of the second glass substrate 9, and the back plate 8 is covered with the back side dielectric layer 11. A partition wall 12 is formed on the back side dielectric layer 11. The barrier ribs 12 have a cross-beam shape formed by vertical barrier ribs 12a formed extending in a direction parallel to the data electrodes 10 and horizontal barrier ribs 12b formed in a direction orthogonal thereto. A red (R) phosphor layer 13r, a green (G) phosphor layer 13g, and a blue (B) phosphor layer 13b corresponding to the data electrode 10 are provided on the side surface of the barrier rib 12 and the surface of the back side dielectric layer 11. (Also collectively referred to as “phosphor layer 13”) is formed by coating.

  The front plate 1 and the back plate 8 are arranged so that the display electrode pair 105 and the data electrode 10 face each other so as to form a matrix. A discharge space 14 is formed in the gap between the front plate 1 and the back plate 8. And the outer peripheral part of the front board 1 and the back board 8 is sealed by sealing materials, such as glass frit (not shown), and the discharge gas which consists of mixed gas of neon (Ne) and xenon (Xe) is enclosed. ing. As the discharge gas, one having a Xe ratio of 6% is usually used, and sealed at a pressure of about 450 Torr (about 60 kPa). Discharge cells 15 defined by the barrier ribs 12 are formed in the discharge space 14 where the display electrode pair 105 and the data electrode 10 intersect three-dimensionally.

  In the panel having such a configuration, ultraviolet light is generated by gas discharge, and the phosphor layer 13 of each color of R, G, and B is excited by this ultraviolet light to emit light, thereby performing color display.

  In this panel, one field period is divided into a plurality of subfields (hereinafter abbreviated as “SF”), and gradation display is performed by a combination of SFs to emit light. Each SF has an initialization period, a writing period, and a sustain period. In order to display the image data, different signal waveforms are applied to the respective electrodes in the initialization period, the writing period, and the sustain period. In the initialization period, for example, a positive pulse voltage is applied to all the scan electrodes 103 and is necessary on the protective film 7 and the phosphor layer 13 on the front-side dielectric layer 6 covering the scan electrodes 103 and the sustain electrodes 104. Accumulate wall charges. In the writing period, scanning in which negative scanning pulses are sequentially applied to all the scanning electrodes 103 is performed. When there is data to be displayed, if a positive data pulse is applied to the data electrode 10 while scanning the scan electrode 103, a discharge occurs between the scan electrode 103 and the data electrode 10, and the scan electrode 103 Discharge also occurs between the sustain electrodes 104. Thus, an address discharge occurs. As a result, wall charges are formed on the surface of the protective film 7 on the scan electrode 103 and the sustain electrode 104.

  In the subsequent sustain period, a voltage sufficient to maintain the discharge is applied between the scan electrode 103 and the sustain electrode 104 for a certain period. As a result, in the discharge cell to which the data pulse is applied during the writing period, a sustain discharge is generated between the scan electrode 103 and the sustain electrode 104 and ultraviolet rays are generated. The generated ultraviolet light causes the phosphor layer 13 to emit light for a certain period. In the discharge cell 15 to which no data pulse is applied during the writing period, no sustain discharge occurs and excitation light emission of the phosphor layer 13 does not occur.

  Recently, in such a panel, efforts have been made to increase the Xe partial pressure to 10% or more for the purpose of improving efficiency. However, since the discharge start voltage increases when the Xe partial pressure is increased, a large discharge delay occurs in the discharge during the write period, and the write operation becomes unstable, or the write period is spent to stabilize the write discharge. There is a problem that it is necessary to take a long time.

In order to solve this problem, there has been proposed a panel having a configuration in which address discharge cells connected to the display discharge cells that perform display discharge are connected to the display discharge cells. Then, a raised dielectric layer is provided on the data electrode in the address discharge cell, and the interval between the scan electrode and the data electrode is substantially narrowed to easily generate the write discharge. With this configuration, priming particles (that is, a “priming agent” of discharge) are generated by address discharge that occurs quickly in the address discharge cells, and the priming particles enter the display discharge cells through the communicating portion to generate address discharge. Therefore, high efficiency can be achieved while stabilizing the write discharge. Such a prior art is described in Patent Document 1, for example.
JP 2003-31131 A

  However, in such a panel configuration, since it is necessary to provide address discharge cells in addition to the display discharge cells, there is a problem that it becomes difficult to achieve high definition or display luminance is lowered.

  Further, when the Xe partial pressure of the discharge gas in the panel is increased, the discharge start voltage of the sustain discharge rises and a large discharge current of the sustain discharge flows. For this reason, the impedance of the display electrode pair 105 and the output impedance of the panel drive circuit As a result, the voltage drop during the sustain discharge increases, the voltage applied to the discharge cells 15 decreases, and the brightness of the sustain discharge decreases. As a result, there arises a problem that a so-called loading phenomenon occurs in which the luminance changes according to the lighting rate of the display screen.

  The present invention has been made in view of the above situation, and provides a panel suitable for high definition that can be driven at a low voltage, can realize stable writing discharge, and realizes highly efficient sustain discharge. The purpose is to do.

  In order to solve the above-described problems, a plasma display panel having a first configuration according to the present invention includes a first glass substrate on which a plurality of pairs of display electrodes including scan electrodes and sustain electrodes are arranged, and the first glass substrate, A second glass substrate disposed oppositely across the discharge space and having a plurality of data electrodes arranged in a direction intersecting the display electrode, and the second glass substrate has a back surface so as to cover the data electrode A side dielectric layer is provided, and a protrusion is provided on the back side dielectric layer so as to overlap the data electrode in plan view. The shortest distance between the protrusion and the display electrode is the display electrode. And the back-side dielectric layer is configured to be shorter than the shortest distance.

  A plasma display panel having a second configuration according to the present invention is provided with a first glass substrate on which a plurality of pairs of display electrodes including scan electrodes and sustain electrodes are arranged, and opposed to the first glass substrate across a discharge space. A second glass substrate on which a plurality of data electrodes are arranged in a direction intersecting with the display electrode, and the second glass substrate is provided with a back side dielectric layer so as to cover the data electrode, A protrusion is provided on the rear-side dielectric layer so as to include a region where at least one of the scan electrode and the sustain electrode and the data electrode overlap in a plan view.

  In order to solve the above-described problem, a method of manufacturing a plasma display panel according to a first configuration of the present invention includes a step of forming a data electrode on a substrate and a back side dielectric layer so as to cover the data electrode. Forming a paste containing a low softening point glass frit and an organic binder on the back side dielectric layer in a pattern corresponding to a transverse partition; and a low softening point glass frit on the back side dielectric layer And a paste containing an organic binder in a pattern corresponding to vertical barrier ribs, and a paste containing a low softening point glass frit and an organic binder on the back-side dielectric layer in a pattern corresponding to a protrusion. And a low softening point glass frit and an organic binder formed in a pattern corresponding to each of the horizontal partition wall portion, the vertical partition wall portion, and the protruding portion. Each of the pastes is developed and fired to form a vertical barrier rib, a horizontal barrier rib, and a protrusion, and a phosphor layer is formed on the upper surface of the back-side dielectric layer and on the side surfaces of the vertical barrier rib and the horizontal barrier rib. Forming.

  A method for manufacturing a plasma display panel having a second configuration according to the present invention includes a step of forming a data electrode on a substrate, a step of forming a back side dielectric layer so as to cover the data electrode, and the back side dielectric. A step of applying a photosensitive material on the layer and exposing a pattern corresponding to the horizontal barrier rib; and applying a photosensitive material on the back-side dielectric layer and exposing a pattern corresponding to the vertical barrier rib A step, a step of applying a photosensitive material on the back-side dielectric layer, and exposing a pattern corresponding to the protrusion, and the horizontal barrier rib, the vertical barrier rib, and the protrusion, respectively. Each of the photosensitive materials exposed to the pattern is developed and baked to form vertical barrier ribs, horizontal barrier ribs, and protrusions, an upper surface of the back-side dielectric layer, the vertical barrier ribs, and the Horizontal bulkhead And forming a phosphor layer on the surface.

  According to the present invention, it is possible to provide a panel suitable for high definition that can be driven at a low voltage, can realize a stable write discharge, and realize a highly efficient sustain discharge.

  In the plasma display panel having the first or second configuration of the present invention, a partition is provided on the back dielectric layer so as to partition a plurality of discharge cells formed by the display electrode and the data electrode. The barrier ribs are a plurality of striped vertical barrier ribs formed parallel to the data electrodes with the data electrode interposed therebetween, and the striped vertical barrier ribs formed at positions corresponding to the adjacent display electrode pairs. And a transverse partition provided so as to intersect with each other.

  In the plasma display panel having the first or second configuration, a partition is provided on the back dielectric layer so as to partition a plurality of discharge cells formed by the display electrode and the data electrode. The barrier ribs intersect a plurality of stripe-shaped vertical barrier ribs formed parallel to the data electrodes with the data electrode interposed therebetween, and the stripe-shaped vertical barrier ribs formed at positions corresponding to adjacent display electrode pairs. The projecting portion may be formed so as to be connected to a side portion of the lateral partition wall.

  Preferably, the protrusion has an electron emission layer formed on a surface thereof. The electron emission layer may include at least one material selected from magnesium oxide, AlN, GaN, SiC, diamond, alkali metal, and alkaline earth metal. The material is preferably fine particles.

  In the manufacturing method of the plasma display panel of the 1st structure of this invention, it is preferable that the inorganic solid content ratio of the said paste shall be 30%-50%.

  In the method for manufacturing a plasma display panel having the second configuration of the present invention, it is preferable that after the step of forming the protruding portion, an electron emitting layer forming step of forming an electron emitting layer on the surface of the protruding portion.

  The step of forming the phosphor layer includes printing a phosphor paste in which fine particles of at least one material selected from magnesium oxide, AlN, GaN, SiC, diamond, alkali metal, and alkaline earth metal are mixed. It can be performed by coating by an ink jet method.

  Hereinafter, a plasma display panel (hereinafter abbreviated as a panel) and a manufacturing method thereof according to an embodiment of the present invention will be described with reference to the drawings. The embodiment of the present invention is not limited to this.

(Embodiment 1)
FIG. 1 is a cross-sectional perspective view showing a part of a schematic configuration of a panel according to Embodiment 1 of the present invention. FIG. 2 is a cross-sectional view of the same part, and FIG.

  As shown in FIG. 1, the front plate 1 and the back plate 8 are arranged to face each other with the discharge space 14 interposed therebetween. In the panel, the front plate 1 and the back plate 8 are sealed at their ends by a sealing frit (not shown), and a discharge gas is enclosed in a discharge space 14 formed therebetween. For example, a mixed gas of 80% neon (Ne) and 20% xenon (Xe) is sealed at a pressure of about 400 Torr (about 53.3 kPa) as a discharge gas that emits ultraviolet rays by discharge.

  On the first glass substrate 2 of the front plate 1, a plurality of pairs of display electrodes 5 in the form of stripes, which are paired with the scanning electrodes 3 and the sustaining electrodes 4, are formed in parallel with each other at a pitch V interval. . The display electrode pair 5 has a configuration in which the scan electrode 3 and the sustain electrode 4 are arranged in parallel with the discharge gap Wg interposed therebetween. The scanning electrode 3 includes a wide transparent electrode 3a and a narrow metal bus 3b made of silver (Ag) or the like formed so as to overlap the transparent electrode 3a in order to increase conductivity. Similarly, the sustain electrode 4 includes a wide transparent electrode 4a and a narrow metal bus 4b formed so as to overlap therewith.

  A band-shaped light absorption layer 17 called a black stripe is provided between adjacent display electrode pairs 5 to increase the contrast during light emission. A front-side dielectric layer 6 is formed so as to cover the display electrode pair 5, and a protective film 7 made of magnesium oxide (MgO) is formed so as to cover the front-side dielectric layer 6.

  On the other hand, the back plate 8 is formed by arranging data electrodes 10 extending in a direction perpendicular to the display electrode pair 5 (hereinafter referred to as “vertical direction”) in parallel on the surface of the second glass substrate 9. A back side dielectric layer 11 is formed so as to cover. A partition wall 12 is formed on the back side dielectric layer 11. The partition wall 12 is formed in a vertical partition wall 12a having a height d formed in a stripe shape extending in the vertical direction and in a direction perpendicular to the vertical partition wall 12a (that is, a direction parallel to the display electrode pair 5, hereinafter referred to as “horizontal direction”). The cross girder is formed by a horizontal partition wall 12b having a height e. A plurality of vertical partition walls 12a are formed in parallel with each other at a pitch H in the horizontal direction.

  Then, the protrusion 16 is formed on the back-side dielectric layer 11 so that, for example, at least a part thereof includes a region where the scan electrode 14 and / or the sustain electrode 15 and the data electrode 22 overlap in a plan view. Yes. As shown in FIG. 2, the height of the projection 16 is c, and both of them are a horizontal width a, a vertical depth f, and a distance from the boundary of the discharge cell 15 to the tip of the projection 16 b. is there. Of the protrusions 16, the side close to the scanning electrode 3 is referred to as a protrusion 16 c and the side close to the sustain electrode 4 is referred to as a protrusion 16 u.

In the panel shown in FIGS. 1 to 3, the protrusions 16c and 16u are formed to be connected to the horizontal partition wall 12b. Accordingly, the distance b is a value obtained by adding half of the width (Ws) of the horizontal partition wall 12b to the depth f. The width of the vertical barrier rib 12a is W _L.

A phosphor layer 13 is formed on the side surface of the partition wall 12 and the surface of the back side dielectric layer 11. Examples of the phosphor material include Y ₂ O ₃ : Eu or (Y, Gd) BO ₃ : Eu for the R phosphor layer 13r and Zn ₂ SiO ₄ : Mn or (Y, Gd) BO for the G phosphor layer 13g. ₃ : Tb is used, and BaMgAl ₁₀ O ₁₇ : Eu or BaSrMgAl ₁₀ O ₁₇ : Eu is used for the B phosphor layer 13b. As the phosphor material of each color, one material is used alone from two kinds of phosphor materials, or two kinds of phosphors are mixed and used.

  The front plate 1 and the back plate 8 are opposed to each other so that the display electrode pair 5 and the data electrode 10 form a matrix. In the discharge space 14 where the data electrode 10 and the display electrode pair 5 intersect, discharge cells 15 partitioned by the barrier ribs 12 are formed.

  In the panel having such a configuration, an ultraviolet ray is generated by gas discharge, and the phosphor layer 13 of each color of R, G, and B is excited by the generated ultraviolet ray to emit light, thereby performing color display.

  In FIGS. 1 and 3, the front plate 1 and the back plate 8 are drawn apart from each other for convenience of illustration of the panel configuration.

  Further, in the above-described configuration, the shape of the partition wall 12 is described as a cross-girder shape, but the present invention is not limited to this and may be a stripe-shaped partition wall. Further, when the partition wall 12 has a cross beam shape, the protrusions 16c and 16u may be formed connected to the horizontal partition wall 12b or may be separated from the horizontal partition wall 12b.

  In the first embodiment, an example in which a mixed gas of 80% neon (Ne) and 20% xenon (Xe) is sealed as a discharge gas at a pressure of about 400 Torr. The mixing pressure and the sealing pressure are not limited to the sealing pressure, and may be any mixing ratio and sealing pressure that do not cause a practical problem in driving the panel. For example, the discharge gas may be about 760 Torr (about 101.3 kPa) of Xe 100%.

  Next, an example of a method for manufacturing a panel having the above-described configuration will be described focusing on a method for forming the protrusion 16 provided on the back substrate 8 which is a feature of the above-described configuration. Therefore, description of the method for manufacturing the front substrate unit manufactured in the same manner as the conventional PDP will be omitted.

  FIG. 4 is a manufacturing process flow diagram of the back plate of the panel in the first exemplary embodiment of the present invention. A flow of each process is shown on the left side, and a cross-section at an intermediate stage of elements formed on the back substrate 21 in each process is shown on the right side.

  As shown in FIG. 4, first, a second glass substrate 9 is prepared (step S1).

  Next, the data electrode 10 is formed on the glass substrate 9 in step S2. Specifically, a silver (Ag) paste is applied to the glass substrate 9, and a silver (Ag) line having a width of 150 μm is formed by photolithography. The softening point temperature of at least one of the glass components constituting the data electrode 10 is 590 ° C. The silver (Ag) line is fired at 600 ° C. and solidified to form the data electrode 10.

Next, the back side dielectric layer 11 is formed in process S3. The material of the back side dielectric layer 11 includes ZnO—B ₂ O ₃ —SiO ₂ based mixture, PbO—B ₂ O ₃ —SiO ₂ based mixture, PbO—B ₂ O ₃ —SiO ₂ —Al ₂ O. _{A 3} system mixture, a PbO—ZnO—B ₂ O ₃ —SiO ₂ system mixture, a Bi ₂ O ₃ —B ₂ O ₃ —SiO ₂ system mixture, or the like can be used. For example, a PbO—B ₂ O ₃ —SiO ₂ -based mixture having a composition of PbO: 65 wt% to 70 wt% —B ₂ O ₃ : 5 wt% —SiO ₂ : 25 wt% to 30 wt%, and a softening point temperature of 580 Use the one at ° C. Then, the material as described above is made into a paste and applied onto the second glass substrate 9 so as to cover the data electrode 10.

  The coating method is not particularly limited, and a known coating method or printing method can be applied. For example, any one of a roll coating method, a slit die coating method, a doctor blade method, a screen printing method, and an offset printing method may be used.

  Here, the paste coating thickness of the back side dielectric layer 11 is preferably 5 μm to 40 μm. By setting the paste coating thickness of the back side dielectric layer 11 to 5 μm or more, unevenness on the surface of the back side dielectric layer 11 caused by the fired data electrode 10 can be reduced. Note that the optimum value of the paste application thickness of the back-side dielectric layer 11 varies depending on the inorganic component content in the paste.

  Next, the back side dielectric layer 11 is made by baking and solidifying the paste of the back side dielectric layer 11 at a temperature of 585 ° C. As described above, the firing temperature of the back side dielectric layer 11 is lower than the softening point temperature (590 ° C. or higher) of the data electrode 10, so that the alteration and deformation of the data electrode 10 during the firing of the back side dielectric layer 11 are suppressed. can do.

  Next, patterning of the protrusion 16 is performed in step S4. First, as a paste used for forming the protrusions 16, for example, an organic binder containing a photosensitive agent containing a filler such as alumina in order to suppress deformation during firing, based on a low softening point glass frit. Use a mixture of The photosensitive paste 30 is applied, dried and then exposed to pattern the projection 16 (as an exposure image). For reference, the shape of the protrusion 16 patterned in the paste 30 in the drawing is shown by a broken line.

  In the subsequent step S5, the horizontal partition 12b is patterned. In the present embodiment, the protrusion 16 is connected to the horizontal partition wall 12b, and both are integrally formed. However, in the process, the protrusion 16 is divided into the process S4 and the process S5. By doing so, it is possible to form the protrusions 16 and the horizontal barrier ribs 12b having different heights from the surface of the back-side dielectric layer 11.

  For the formation of the horizontal barrier ribs 12b, a paste made of the same material as that of the protrusions 16 is used. Similar to the process of forming the protrusions 16, the horizontal partition wall 12 b is patterned by applying a photosensitive paste 31, drying it, and exposing it. For reference, the shape of the horizontal barrier rib 12b patterned in the paste 31 in the figure is indicated by a broken line. When developed in the subsequent step S7, exposed portions remain as patterns of the protrusions 16 and the horizontal partition walls 12b.

Here, as the low softening point glass which is a base material of the paste used for forming the protrusions 16 and the horizontal barrier ribs 12b, a ZnO—B ₂ O ₃ —SiO ₂ based mixture, PbO—B ₂ O ₃ —SiO _{2 is used. 2} type mixture, PbO—B ₂ O ₃ —SiO ₂ —Al ₂ O ₃ type mixture, PbO—ZnO—B ₂ O ₃ —SiO ₂ type mixture, Bi ₂ O ₃ —B ₂ O ₃ —SiO ₂ type mixture Etc. can be used. For example, a PbO—B ₂ O ₃ —SiO ₂ -based mixture having a composition of PbO: 65 wt% to 70 wt% —B ₂ O ₃ : 5 wt% —SiO ₂ : 25 wt% to 30 wt%, and a softening point temperature of 580 A material having a low softening point glass of paste is used. Further, as a method for applying the paste on the protrusions 16 and the horizontal partition walls 12b, known methods such as a roll coating method, a slit die coating method, a doctor blade method, a screen printing method, and an offset printing method can be used.

  Next, in step S6, a photosensitive paste 32 is applied, dried and then exposed to pattern the vertical barrier ribs 12a. The material used for the paste 32 may be the same as the paste used for forming the protrusions 16 and the horizontal barrier ribs 12b, or the material composition may be changed. As the coating formation method, for example, a roll coating method, a slit die coating method, a doctor blade method, a screen printing method, an offset printing method, or the like can be used.

  Next, in step S7, the protrusions 16, the horizontal barrier ribs 12b, and the vertical barrier ribs 12a are developed, and these are fired in step S8.

  Further, in step S <b> 9, the phosphor layer 13 is formed on the surface of the back-side dielectric layer 11 and the side surfaces of the partition walls 12. The phosphor layer 13 is formed by applying a phosphor paste, drying and baking. In this way, the back plate 2 having a structure having the protrusions 16 is produced.

  Here, in the above process, since the photosensitive paste is used to form the protrusions 16, when the developed protrusions 16 are baked, shrinkage (shrink) occurs in the exposed shape, and as a result. As shown in the cross-sectional views in steps S8 and S9 in FIG. 3 or FIG. 4, the protrusions 16 are formed with apexes 27a whose height from the glass substrate 9 is higher than other portions. .

  This is because a photosensitive paste generally has a base material / organic binder content ratio of, for example, 50% to 50%, and the binder content is higher than that of other pastes used in, for example, printing. This is because shrinkage occurs in the developed shape when the binder burns out during firing.

  The softening point temperatures of the barrier ribs 12 and the phosphor layers 13 are 550 ° C. or lower, and therefore, the barrier ribs 12 and the phosphor layers 13 may be simultaneously fired at a firing temperature of 555 ° C., for example.

  Further, in forming the protrusions 16, the horizontal barrier ribs 12b, and the vertical barrier ribs 12a, a process of applying a photosensitive paste containing a glass component and a photosensitive organic component, drying, developing, and baking is performed as described above. Instead, the protrusions 16, the horizontal barrier ribs 12b, and the vertical barrier ribs 12a can be formed using a non-photosensitive paste containing a low softening point glass frit and an organic binder, respectively.

  In that case, first, the non-photosensitive paste is patterned and formed in the shape of the protrusions 16, and the non-photosensitive paste is patterned in the shape of the horizontal barrier ribs 12b on the layer formed by patterning in the shape of the protrusions 16. Then, a non-photosensitive paste is patterned in the shape of the vertical barrier rib 12a on the layer formed in the shape of the protrusion 16 and the horizontal barrier rib 12b.

  Next, the paste patterned in the shape of the protrusions 16, the horizontal barrier ribs 12b, and the vertical barrier ribs 12a is baked. The subsequent steps are the same as when the photosensitive paste is used.

  In addition, as the non-photosensitive paste in the above, it is possible to adjust the content ratio of the inorganic solid content in the paste so that the shrinkage (shrink) is generated to the extent that the apex portion 27a is formed in the protrusion 16 by firing. desirable. As a result of examination based on experiments, it was found that the inorganic solid content ratio is preferably in the range of 30% to 70%.

  In addition, as a method for forming the non-photosensitive paste by patterning, an embossing method, a roll coater method, a sand blast method, or the like can be used.

  Next, a method for driving the panel in the present embodiment will be described. FIG. 5 is an electrode array diagram of the panel in the present embodiment. In the row direction, n scan electrodes SCN1 to SCNn (scan electrode 3 in FIG. 1) and n sustain electrodes SUS1 to SUSn (sustain electrode 4 in FIG. 1) are alternately arranged, and m data electrodes in the column direction. D1 to Dm (data electrode 10 in FIG. 1) are arranged. A discharge cell Cij (discharge cell 15 in FIG. 1) is formed at a portion where a pair of scan electrode SCNi and sustain electrode SUSi (i = 1 to n) and one data electrode Dj (j = 1 to m) intersect. And (m × n) discharge cells 15 are formed in the discharge space 14.

  Next, a driving waveform for driving the panel and its operation will be described. In the present embodiment, one field is divided into 10 SFs (first SF, second SF,..., 10th SF), and each SF is (1, 2, 3, 6, 11, 18, 30, 44, 60, 80). In this way, the rear SF is configured such that the luminance weight is larger (the luminance is higher). However, the number of SFs and the luminance weight of each SF are not limited to the above values. Each SF has an initialization period, a writing period, and a sustain period.

  FIG. 6 is a drive waveform diagram applied to each electrode of the panel in the present embodiment, and an SF having an initialization period for performing the all-cell initialization operation (hereinafter abbreviated as “all-cell initialization SF”). FIG. 6 is a drive waveform diagram for an SF having an initialization period for performing a selective initialization operation (hereinafter abbreviated as “selective initialization SF”). FIG. 6 shows the first SF as the all-cell initialization SF and the second SF as the selection initialization SF for the sake of explanation.

  First, the drive waveform and operation of the all-cell initialization SF will be described.

  In the first half of the initialization period, sustain electrodes SUS1 to SUSn and data electrodes D1 to Dm are held at 0 (V), and voltage Vp (V) that is equal to or lower than the discharge start voltage with respect to scan electrodes SCN1 to SCNn. A ramp voltage that gradually increases toward the voltage Vr (V) exceeding the discharge start voltage is applied. Then, weak initializing discharge is generated with scan electrodes SCN1 to SCNn as anodes and sustain electrodes SUS1 to SUSn and projections 16c on the side close to the scan electrodes on data electrodes D1 to Dm as cathodes. The discharge at this time is a stable discharge because the surfaces of the sustain electrodes SUS1 to SUSn serving as the cathode are covered with the protective layer 7 having a large secondary electron emission coefficient.

  Subsequently, a weak initializing discharge is generated using scan electrodes SCN1 to SCNn as anodes and backside dielectric layer 11 on data electrodes D1 to Dm as cathodes. Since the discharge at this time occurs in a state where the priming generated by the discharge using the sustain electrodes SUS1 to SUSn as a cathode exists sufficiently, the phosphor layer 13 having a small secondary electron emission coefficient is applied. Stable discharge.

  This discharge starts between scan electrodes SCN1 to SCNn and protrusion 16c, and eventually spreads between scan electrodes SCN1 to SCNn and the back substrate on data electrodes D1 to Dm. This occurs because the distance between scan electrodes SCN1 to SCNn and protrusion 16c is shorter than the distance between scan electrodes SCN1 to SCNn and data electrodes D1 to Dm. As described above, the all-cell initializing operation generates the first weak but stable initializing discharge in all the discharge cells, accumulates negative wall voltage on the scan electrodes SCN1 to SCNn, and maintains the sustain electrode SUS1. A positive wall voltage is stored in the protrusion 16c and the back side dielectric layer 11 on SUSn and on the data electrodes D1 to Dm. Here, the wall voltage on the electrode represents a voltage generated by wall charges accumulated on the back side dielectric layer 11 or the phosphor layer 13 covering the electrode. Further, wall charges having the same polarity as that on the back-side dielectric layer 11 are also accumulated on the protrusions 16c.

  In the latter half of the initialization period, sustain electrodes SUS1 to SUSn are maintained at positive voltage Vh (V), and ramp voltage gradually decreases from voltage Vg (V) to voltage Va (V) at scan electrodes SCN1 to SCNn. Apply. Then, in all the discharge cells, a second weak initializing discharge is generated with scan electrodes SCN1 to SCNn as cathodes and sustain electrodes SUS1 to SUSn and data electrodes D1 to Dm and protrusions 16c as anodes. Then, the wall voltage on scan electrodes SCN1 to SCNn and the wall voltage on sustain electrodes SUS1 to SUSn are weakened, and the wall voltage between protrusion 16c on data electrodes D1 to Dm and back-side dielectric layer 11 is also suitable for the write operation. Adjusted to the desired value. As described above, the initialization operation of the all-cell initialization SF is an all-cell initialization operation in which initialization discharge is performed in all discharge cells.

  Next, with reference to FIGS. 7A to 7D, the behavior of the wall charges in the panel in this embodiment will be schematically described. FIG. 7A shows the state of wall charges after initialization, and FIG. 7B shows the state of wall charges after occurrence of a write discharge in the write period. 7C shows a state of wall charges after the first and subsequent positive sustain pulse voltages Vm are applied to the scan electrodes during the sustain period, and FIG. 7D similarly shows the first charge on the sustain electrodes. The state of wall charges after the subsequent sustain discharge is generated by applying the positive sustain pulse voltage Vm is shown.

  The wall charges accumulated after the initialization of the all-cell initialization SF are as shown in FIG. 7A. After the initialization, negative wall charges are accumulated on the scan electrodes 3, and positive wall charges are accumulated on the protrusions 16c on the side close to the scan electrodes 3 and on the data electrodes. And on the sustain electrode 4 (strictly speaking, in the vicinity of the region corresponding to the sustain electrode 4 on the protective film 7 covering the dielectric layer 6 covering the sustain electrode 4, this is also expressed in this manner for convenience. The same applies hereinafter.) Positive wall charges are accumulated.

  In the subsequent writing period, the scan electrode 3 is temporarily held at Vs (V), and the sustain electrode 4 is held at the positive voltage Vh2 (V). Next, a positive write pulse voltage Vw (V) is applied to the data electrode 10 of the discharge cell to be displayed in the first row of the data electrode 10, and the scan pulse voltage Vb ( V) is applied. At this time, the voltage at the intersection of the data electrode 10 and the scan electrode 3 is the magnitude of the wall voltage of the protrusion 16c on the data electrode 10 and the wall voltage on the scan electrode 3 to the externally applied voltage (Vw−Vb) (V). Is added and exceeds the discharge start voltage. Then, a trigger discharge 20 is generated between the projection 16 c on the data electrode 10 and the scanning electrode 3. A high-density electron or ion generated by the trigger discharge 20 causes a discharge 21 between the scan electrode 3 and the data electrode 10, and a main discharge 22 also occurs between the scan electrode 3 and the sustain electrode 4. It happens and an address discharge is performed.

  As a result, as shown in FIG. 7B, a positive wall voltage is accumulated on the scan electrode 3, and a negative wall voltage is accumulated on the sustain electrode 4. Negative wall charges are accumulated on the protrusions 16 c on the side close to the scan electrode 3 and on the back-side dielectric layer 11. In this way, an address operation is performed in which an address discharge is caused in the discharge cells to be displayed in the first row and a wall voltage is accumulated on each electrode. On the other hand, since the voltage at the intersection of the data electrode 10 and the scan electrode 3 to which the positive write pulse voltage Vw (V) is not applied does not exceed the discharge start voltage, no write discharge occurs. The above address operation is sequentially performed until the discharge cell in the nth row, and the address period ends.

  The discharge start voltage of the trigger discharge 20 can be made lower than the write discharge start voltage in the conventional structure without the protrusion 16c. The reason is that the distance between the scanning electrode 3 and the protrusion 16c is closer to the height C (see FIG. 3) of the protrusion 16c than the distance between the scanning electrode 3 and the back-side dielectric layer 11, correspondingly. This is because the discharge start voltage is lowered. Therefore, the set voltage of the positive write pulse voltage Vw can be lowered. In particular, when the panel is filled with a discharge gas having a high Xe partial pressure, the set voltage of the write pulse voltage Vw can be made lower than that of a panel having a conventional structure. This has the effect of suppressing an increase in the cost of the driver IC for driving.

  In the subsequent sustain period, first, sustain electrode 3 and data electrode 10 are returned to 0 (V), and positive sustain pulse voltage Vm (V) is applied to scan electrode 3. The sustain pulse voltage Vm (V) is set to a low voltage that does not generate a sustain discharge in the conventional structure panel having no protrusion 16c. At this time, in the discharge cell in which the write discharge has occurred, the voltage between scan electrode 3 and sustain electrode 4 is set to sustain pulse voltage Vm (V), which is the magnitude of the wall voltage on scan electrode 3 and sustain electrode 4. Will be added. The voltage between the scan electrode 3 and the protrusion 16c is the sustain pulse voltage Vm (V), and the write pulse voltage Vw (V) is added to the magnitude of the wall voltage on the scan electrode 3 and the protrusion 16c. It will be a thing.

  Then, by making the protrusion 16c have an appropriate structure, the trigger discharge shown in FIG. 7C is performed between the scan electrode 3 and the protrusion 16c before the discharge starts between the scan electrode 3 and the sustain electrode 4. 20 can be awakened. This is because the distance between the surface of the front-side dielectric layer 6 on the scan electrode 3 and the surface of the back-side dielectric layer 11 on the data electrode 10 is made larger than in the conventional structure due to the presence of the protrusion 16c on the data electrode 10. This is due to the close structure. A main discharge 22 occurs between the scan electrode 3 and the sustain electrode 4 due to the high-density electrons and ions generated by the trigger discharge 20 that occurs between the scan electrode 3 and the protrusion 16c.

  As a result of the sustain discharge between scan electrode 3 and sustain electrode 4, as shown in FIG. 7C, a negative wall voltage is accumulated on scan electrode 3, and a positive wall voltage is accumulated on sustain electrode 4. The At this time, a positive wall voltage is also accumulated in the protrusion 16c on the data electrode 10. In the discharge cells in which no address discharge has occurred during the address period, no sustain discharge occurs, and the wall voltage state at the end of the initialization period is maintained. Subsequently, scan electrode 3 is returned to 0 (V), and positive sustain pulse voltage Vm (V) is applied to sustain electrode 4. Then, in the discharge cell in which the sustain discharge has occurred, the voltage between the sustain electrode 4 and the protrusion 16 u exceeds the discharge start voltage by adding the magnitude of the wall voltage on the sustain electrode 4 to the sustain pulse voltage Vm (V). Thus, the trigger discharge 20 is started as shown in FIG. 7D. This occurs because priming is generated by the first sustain discharge, so that the discharge start voltage in the discharge cell decreases and the distance between the sustain electrode 4 and the protrusion 16u is short. Due to the high-density electrons and ions generated by the trigger discharge 20, the discharge spreads between the scan electrode SUSi and the sustain electrode SUSi where no discharge has occurred because the sustain pulse voltage Vm (V) is low. The main discharge 22 occurs and becomes a sustain discharge. Due to this sustain discharge, as shown in FIG. 7D, a negative wall voltage is accumulated on sustain electrode 4 and a positive wall voltage is accumulated on scan electrode 3.

  Thereafter, similarly, by applying the sustain pulse voltage Vm (V) alternately to the scan electrode 3 and the sustain electrode 4, the sustain discharge is continuously performed in the discharge cells that have caused the address discharge in the address period. At the end of the sustain period, a so-called narrow pulse is applied between the scan electrode 3 and the sustain electrode 4 so that positive wall charges are applied to the protrusions 16 c on the data electrode 10 and the back-side dielectric layer 11. While remaining, the wall voltage on the scan electrode 3 and the sustain electrode 4 is erased. Thus, the maintenance operation in the maintenance period is completed.

  Next, the drive waveform and operation of the selection initialization SF will be described again with reference to FIG.

  In the initialization period, sustain electrodes SUS1 to SUSn are held at Vh (V), data electrodes D1 to Dm are held at 0 (V), and scan electrodes SCN1 to SCNn are moved from Vq (V) to Va (V). Apply a ramp voltage that falls slowly. Then, in the discharge cell in which the sustain discharge is performed in the sustain period of the previous SF, a weak initializing discharge is generated, the wall voltage on the scan electrode SCNi and the sustain electrode SUSi is weakened, and on the protrusion 16c on the data electrode Dk. The wall voltage on the back side dielectric layer 11 is also adjusted to a value suitable for the write operation. On the other hand, the discharge cells in which the address discharge and the sustain discharge were not performed in the previous SF are not discharged, and the wall charge state at the end of the initialization period of the previous SF is maintained as it is. As described above, the initializing operation of the selective initializing SF is a selective initializing operation in which initializing discharge is performed in the discharge cells that have undergone sustain discharge in the previous SF. The state of wall charges after selective initialization is shown in FIG. 7A.

  The write period and the sustain period are the same as the write period and the sustain period of the all-cell initialization SF, and thus description thereof is omitted.

  As described above, according to the panel of the embodiment of the present invention, not only the minimum sustain pulse voltage but also the drive voltage such as the write voltage Vw and the scan pulse voltage (Vs−Vb) can be lowered. . This is because the distance between the scan electrode 3 and the protrusion 16c or the distance between the sustain electrode 4 and the protrusion 16u can be made short, so that the trigger discharge 20 is first generated between them during driving. It is thought that this is because discharge is induced elsewhere. That is, the high-density electrons and ions generated by the trigger discharge 20 reduce the starting voltage of the discharge between the scan electrode 3 and the data electrode 10 and the discharge between the scan electrode 3 and the sustain electrode 4. It is considered that the effect that the set voltage for the write discharge and the sustain discharge can be lowered can be obtained.

  Furthermore, since the sustain discharge generated between the scan electrode 3 and the sustain electrode 4 is performed at a voltage lower than that of the conventional structure panel, it is considered that the light emission efficiency can be improved. This is presumably because the sustain pulse voltage Vm decreases and the electron energy accelerated by the electric field in the discharge cell 15 decreases. When the acceleration electron energy is lowered, the ionization probability at the time of collision between the electron and the Xe atom is lowered, and on the contrary, the establishment of excitation to the ultraviolet light emission level is increased. Therefore, it is considered that a larger amount of ultraviolet light emission can be obtained with less input electric energy. Therefore, it is considered that high luminous efficiency can be obtained.

  As described above, by providing the protrusions 16c and 16u, it is possible to reduce the voltage necessary for generating the initialization discharge and the trigger discharge 20 in each of the initialization period, the writing period, and the sustain period. It becomes.

  Further, since the portion other than the protrusions 16c and 16u of the back plate 8 corresponding to the space where the main discharge 22 is generated is the phosphor layer 13 of the back side dielectric layer 11, the distance from the front side dielectric layer 6 is vertical. The partition 12a secures the discharge space sufficiently large. For this reason, electrons and ions generated in the main discharge 22 are hardly cooled on the surface of the phosphor layer 13, and the light emission efficiency of the main discharge 22 can be increased.

  Furthermore, according to the configuration of the present embodiment, the portion where the trigger discharge for determining the discharge start voltage is generated is separated from the portion where the main discharge 22 is generated. Thus, it is possible to make the distance between the phosphor layer 13 on the back-side dielectric layer 11 and the front-side dielectric layer 6 wider than in the past while maintaining the discharge start voltage low. The luminous efficiency of can be improved.

  Thus, in the present embodiment, the sustain pulse voltage can be lowered and the efficiency can be improved at the same time. For this reason, the power consumption can be reduced. Further, since no auxiliary cell is provided other than the discharge cell that performs the sustain discharge, it is suitable for high definition.

  Conventionally, when the initialization voltage is increased, discharge is performed in which the data electrode 10 side (that is, the phosphor layer 13 side) whose secondary electron emission coefficient is lower than that of the protective layer 7 is used as the cathode. The discharge starting voltage is increased, and as a result, it has not been easy to generate the discharge weakly and stably without excess or deficiency. On the other hand, according to the structure of the present embodiment, the data electrode 10 serving as the cathode The protrusion 16 is provided, which makes it possible to lower the discharge start voltage of the initializing discharge as compared with the conventional structure, and makes it possible to weaken and stabilize the discharge relatively easily. It also has the effect of becoming.

Next, the results of experiments performed using the prototype panel will be described.
(Experiment 1)
Panels of sample numbers 1 and 2 in which only two types of dimensions of the protrusions 16c and 16u of the back plate 8 were changed were manufactured. In addition, a comparative panel having a conventional structure without protrusions 16c and 16u was also prototyped. The discharge cells 15 have a horizontal pitch width H of 300 μm and a vertical pitch width V of 675 μm. Table 1 shows the dimensions of the protrusions 16c and 16u of the back plate used in the manufactured panel.

The horizontal width of the protrusions 16c and 16u is a, the vertical width is f, the height is c, the vertical partition 12a is d, and the horizontal partition 12b is e. Both the width W _L of the vertical partition 12a and the width W _S of the horizontal partition 12b are 35 μm. In sample No. 1, the width a of the protrusions 16c and 16u is 35 μm, the distance b from the discharge cell boundary to the tip of the protrusion is 90 μm, the height c is 50 μm, the height d of the vertical partition 12a is 105 μm, and the horizontal partition 12b The height e is 85 μm. In sample 2, a is 50 μm, b is 150 μm, c is 90 μm, the height d of the vertical partition 12a is 135 μm, and the height e of the horizontal partition 12b is 115 μm. The back-side dielectric layer 11 has a thickness of 12 μm for both sample numbers 1 and 2, and the data electrode has a width of 100 μm and a thickness of 3 μm. The same surface plate 1 is used for both sample numbers 1 and 2.

  The sustain electrode pair was prepared using a silver electrode. The scan electrode 3 and the sustain electrode 4 have a width of 80 μm and a thickness of 4 μm, and the distance between them, that is, the discharge gap is 90 μm. The thickness of the front-side dielectric layer 6 is 35 μm.

  The back plate 8 and the front plate 1 are opposed to each other and sealed at the periphery thereof, and then a Ne—Xe (20%) discharge gas is sealed at a pressure of about 400 Torr. 2 panels were prototyped. The panel size is 13 inches in the diagonal direction, and the number of pixels is 600 columns in the horizontal direction and 200 rows in the vertical direction.

  The prototype panel was driven using the drive waveform shown in FIG. 6 described above, and the minimum sustain voltage and the light emission efficiency were measured. Each drive voltage condition is Vp = 215-260 (V), Vr = 250 (V), Vg = 210-260 (V), Vs = 10 (V), Va = 150 (V), Vb = 140 (V ), Vw = 80 (V), Vq = 180 (V), Vh = 210 (V), Vh2 = 220 (V).

  FIG. 8 is a diagram showing the light emission efficiency when the sustain voltage Vm of the panel is changed. In FIG. 8, the triangle mark indicates the value of the panel of sample number 2, and the circle mark indicates the value of the comparison panel. When the sustain pulse voltage Vm is lowered, it does not light normally. When the lowest sustain pulse voltage that normally lights up is called the minimum sustain voltage, the minimum sustain voltage of the comparative panel is 260 (V), whereas the minimum sustain discharge voltage of the panel of sample number 2 is 215 (V). 45 (V) lower. Regarding the luminous efficiency, the luminous efficiency is 2.52 (lm / W) when the comparative panel is Vm = 320 (V), whereas the luminous efficiency of Sample 2 is luminous when Vm = 270 (V). It can be seen that the luminous efficiency is improved to 2.96 (lm / W), 17.5%.

(Embodiment 2)
The structure of the front substrate and the rear substrate of the PDP in the second embodiment of the present invention is basically the same as that in the first embodiment shown in FIGS. 1 to 3, but the implementation shown in FIGS. Compared to the first embodiment, a difference is that a so-called long gap discharge is employed in which AC driving is performed with a longer distance between the scanning electrode 3 and the sustaining electrode 4.

  The drive for performing long gap discharge in the PDP of the present embodiment will be described below. Note that the same components as those described in Embodiment 1 are described using the same reference numerals.

  Similar to a general AC type PDP, one field period is divided into a plurality of subfields having a light emission period weight based on the binary system, and gradation display is performed by a combination of subfields to emit light. Each subfield includes an initialization period, an address period, and a sustain period.

  FIG. 9 is a waveform diagram showing an example of a drive waveform for driving the PDP according to the second embodiment of the present invention. (Xi) in FIG. 9 shows a voltage waveform applied to the scan electrode 3. (Yi) indicates a voltage waveform applied to the sustain electrode 4. (Ak) indicates a voltage waveform applied to the data electrode 10. (Id) indicates a current waveform flowing by discharge. In (Xi), broken lines indicate wall voltages generated in the phosphor layer 13 on the data electrode 10 and the front-side dielectric layer 6 on the scan electrode 3 and the protective film 7. Further, in (Yi), the broken line is generated in the wall voltage generated in the back side dielectric layer 11 and the phosphor layer 13 on the data electrode 10 or in the front side dielectric layer 6 and the protective film 7 on the sustain electrode 4. Indicates wall voltage. These wall voltages are generated by wall charges accumulated on the protective film 13 or the phosphor layer 28 in accordance with the generated discharge. As shown in FIG. 9, the difference between the applied voltage (Xi) (solid line) and the wall voltage (broken line) represents the voltage applied to the discharge space between the electrodes.

  Next, an applied voltage waveform and a discharge state in each period will be described. In the first half of the initialization period, a ramp voltage that decreases with respect to the potential (Ak) of the data electrode 10 is applied as the voltages (Xi) and (Yi) of the scan electrode 3 and the sustain electrode 4. Weak discharge occurs between the electrode 10 and between the sustain electrode 4 and the data electrode 10. By this discharge, an initial charge for subsequent operation is formed between the scan electrode 3 and the sustain electrode 4 and between the sustain electrode 4 and the data electrode 10. Here, the voltage that falls with respect to the potential (Ak) of the data electrode 10 is applied to the scan electrode 3 and the sustain electrode 4 because the protective film 7 having a relatively large secondary electron emission coefficient is used as a cathode. This is to facilitate the start.

  In the middle of the initialization period, a ramp voltage having a relatively large amplitude with respect to the potential (Ak) of the data electrode 10 is applied to the scan electrode 3 and the sustain electrode 4, and the scan electrode 3 and the data electrode 10 are Discharge occurs between the sustain electrodes 4 and the data electrodes 10. As a result, negative charges are accumulated in the protective film 7 on the scan electrodes 3 and the sustain electrodes 4.

  In the latter half of the initialization period, a ramp voltage that decreases with respect to the data electrode 10 is applied to the scan electrode 3 to cause a discharge between the scan electrode 3 and the data electrode 10. As a result, the negative charge on the surface of the protective film 7 on the scan electrode 3 is adjusted.

While the ramp voltage is applied, a discharge current continuously flows, and a voltage of about the discharge sustain voltage Vs is always applied between the scan electrode 3 and the data electrode 10. Therefore, at the end of the initialization period, the difference between the applied voltage and the wall voltage is substantially equal to the discharge sustain voltage Vs of the discharge space. In FIG. 9, the voltage applied between the scan electrode 3 and the data electrode 4 at the end of the initialization period is represented as _Vsxa .

In the address period, a bias voltage Vab is applied to the scan electrode 3 so that discharge occurs only in the selected discharge cell. A discharge cell is selected by sequentially applying negative pulses to the scan electrode 3. When there is display data, a positive data pulse voltage Va is applied to the data electrode 10 while scanning the scan electrode 3. Accordingly, at time t1, the voltage Vs _xa + Va is applied between the scan electrode 3 and the data electrode 10, and discharge is started between the two electrodes. Here, since Vs _xa is substantially equal to the discharge sustain voltage between the scan electrode 3 and the data electrode 10 as described above, the discharge can be started with a relatively small voltage Va.

  In the address period, since the positive voltage is applied to the sustain electrode 4 with respect to the scan electrode 3, the discharge generated between the scan electrode 3 and the data electrode 10 extends toward the sustain electrode 4. At time t2, discharge occurs between the sustain electrode 4 and the data electrode 10. As a result, the polarity of the charge accumulated in the protective film 7 on the scan electrode 3 is opposite to the polarity of the charge accumulated in the protective film 7 on the sustain electrode 4.

  When there is no display data, no discharge is generated between the scan electrode 3 and the data electrode 10, and the charge accumulated in the protective film 7 on the scan electrode 3 and the sustain electrode 4 is substantially initialized. Retained at the end of the period.

  In the sustain period, a sustain pulse voltage having an amplitude Vsus is alternately applied to scan electrode 3 and sustain electrode 4. The sustain pulse voltage is applied at a phase such that a discharge with the sustain electrode 4 as the cathode side starts between the sustain electrode 4 and the data electrode 10 at time t3. At this time, since the positive voltage is applied to the scan electrode 3 with respect to the sustain electrode 4, the discharge generated between the sustain electrode 4 and the data electrode 10 extends in the direction of the scan electrode 3, At time t4, a discharge is also generated between the scan electrode 3 and the data electrode 10. As a result, the polarity of charges accumulated in the protective film 7 on the scan electrodes 3 and the sustain electrodes 4 is reversed.

  During the sustain period, the above operations are alternately repeated, and discharge light emission is performed a number of times according to the weight of the subfield.

  Next, the principle that the discharge started on one side between the scan electrode 3 and the data electrode 10 and between the sustain electrode 4 and the data electrode 10 extends to the other side will be described in detail with reference to FIGS. 10A to 10F. explain.

  10A to 10F are cross-sectional views schematically showing the applied voltage, wall charges, and discharge plasma during the sustain period of the PDP of the present embodiment. 10A to 10F, the discharge range in the discharge space is schematically drawn as an ellipse (or an ellipse).

  FIG. 10A shows wall charge and applied voltage at time t3 (see FIG. 9) of the sustain period. At time t3, external sustain voltage Vsus is applied to scan electrode 3, and sustain electrode 4 is grounded. In the address period, since negative wall charges are accumulated on the protective film 7 on the sustain electrode 4, a voltage having the sustain electrode 4 as a negative electrode is applied between the sustain electrode 4 and the data electrode 10, Discharge starts. Although a voltage of about Vsus is also applied between the scan electrode 3 and the data electrode 10, the discharge does not start because the polarity is such that the phosphor layer 13 is a cathode. Note that positive wall charges are accumulated on the phosphor layer 13 on the data electrode 10. This is because a large positive voltage is applied to the sustain electrode 4 in the address period, whereas the data electrode 10 having a low potential attracts positive charges.

  FIG. 10B shows a state where discharge has started between the sustain electrode 4 and the data electrode 10. When a discharge is started between the sustain electrode 4 and the data electrode 10, a large amount of positive charges and negative charges are generated and are drawn toward the sustain electrode 4 and the data electrode 10 to form wall charges. The wall voltage generated by the wall charge works to cancel the voltage applied between the sustain electrode 4 and the data electrode 10 and stop the discharge.

  Comparing the protective layer 7 and the front-side dielectric layer 6 on the sustain electrode 4 with the phosphor layer 13 on the data electrode 10, the latter has a smaller dielectric constant, so that the wall charges are accumulated in the data electrode 10. Go fast on the side. As a result, the anode end of the discharge moves in search of the phosphor layer surface into which negative charges can flow. The moving direction is the direction of the scan electrode 3 to which the positive external sustain voltage Vsus is applied.

  FIG. 10C shows a state where the anode end of the discharge is moving. The anode end of the discharge extends toward the scanning electrode 3 while canceling out the positive charge accumulated on the phosphor layer 13.

  FIG. 10D shows a state where the anode end (the right end of the ellipse) of the discharge has reached the scan electrode 3 at time t4 (see FIG. 9). At this time, a positive column discharge is formed between the scan electrode 3 and the data electrode 10 so as to connect the sustain electrode 4 and the data electrode 10, and a large amount of ultraviolet rays are emitted.

  FIG. 10E shows a state immediately before the discharge stops. The discharge forms a negative wall charge on the protective layer 7 on the scan electrode 3 and a positive wall charge on the phosphor layer 13 on the data electrode 10 between the scan electrode 3 and the data electrode 10. To do. As a result, the occurrence of the sustain discharge is stored as wall charges between the scan electrode 3 and the data electrode 10.

  FIG. 10F shows a state in which the discharge is stopped as a result of the accumulation of wall charges on the protective layer 7 and the phosphor layer 13. Negative charges are accumulated in the protective layer 7 on the scan electrode 3 to which the positive external sustain voltage Vsus is applied, and positive charges are accumulated in the protective layer 7 and the phosphor layer 13 on the sustain electrode 4. This corresponds to a case where the wall charge distribution (see FIG. 10A) at time t3 is reversed with respect to scan electrode 3 and sustain electrode 4.

  Therefore, when the positive external sustain voltage Vsus is applied to the sustain electrode 4 and the scan electrode 3 is grounded (time t5 in FIG. 9) in the state of FIG. 10F, the scan electrode 14 and the sustain electrode 15 are connected at time t3. It becomes the replaced state, and the same sustain discharge can be repeated.

  Here, the previous discharge state is stored as the wall charge of the counter discharge space on the side where the anode end of the discharge has reached. For example, if a certain discharge reaches between the sustain electrode 4 and the data electrode 10 and ends, the next discharge starts between the sustain electrode 4 and the data electrode 10, and the scan electrode 3 It is completed by reaching between the data electrodes 10. At the end of the discharge, the wall voltage in the counter discharge space on the side where the discharge has started is almost erased as shown in FIG. 10A or FIG. 10F, and the previous discharge state is not stored.

  As described above, in the AC type PDP that performs the sustain discharge by alternately repeating the discharge between the scan electrode 3 and the data electrode 10 and the discharge between the sustain electrode 4 and the data electrode 10, the scan electrode 3 It is known that the luminous efficiency increases when the distance between the electrode and the sustain electrode 4 is increased. However, on the other hand, the discharge start voltage becomes high, and a higher voltage drive pulse is required. In particular, when a discharge gas having a high xenon partial pressure is used, the address becomes unstable unless the voltage of the drive pulse for sustain discharge is increased.

  However, in the PDP according to the embodiment of the present invention, the protrusions 16 are formed, which shortens the discharge distance (spatial distance) between the scan electrode 3 and the sustain electrode 4 and the data electrode 10, and starts discharge accordingly. The voltage is lowered. Therefore, even when the distance between the scan electrode 3 and the sustain electrode 4 is increased in order to increase the light emission efficiency, the sustain discharge can be performed with the drive pulse having a relatively low voltage. This makes it possible to achieve both high efficiency and low power consumption.

  The effect of the protrusion 16 relating to the sustain period in the above-described long gap discharge PDP will be described again. That is, in the case of the long gap discharge, when the sustain pulse is applied and the discharge is maintained, the distance between the scan electrode 3 and the sustain electrode 4 is shorter than the gap between the scan electrode 3 and the sustain electrode 4. A discharge (trigger discharge) is started between the data electrode 10 or between the sustain electrode 4 and the data electrode 10, which is one of the display electrodes 5, and then discharged toward the other electrode of the display electrode 5. Therefore, the sustain discharge can be performed in a state where the applied voltage for starting the discharge is kept low, even though the gap between the scan electrode 3 and the sustain electrode 4 is large.

  In addition, the following effects can be obtained with respect to the initialization period. That is, conventionally, when the initialization voltage is increased, the discharge is performed in which the data electrode 10 side (that is, the phosphor layer 13 side) whose secondary electron emission coefficient is lower than that of the protective layer 7 is the cathode. As a result, the discharge starting voltage is increased, and as a result, it has not been easy to generate the discharge weakly and stably without excess or deficiency. On the other hand, if the protrusion 16 is provided on the data electrode 10 side serving as the cathode, the discharge start voltage of the initializing discharge can be lowered, and the discharge is weak and stabilized in the conventional structure. In comparison, it can be performed relatively easily.

  Further, the following effects can be obtained with respect to the address period. That is, if the protrusion 16 is provided on the data electrode 10 side, the address discharge start voltage can be lowered. Also in this case, the voltage can be further reduced by forming a layer of the secondary electron emission material at the tip of the protrusion 16.

  In addition, by using a discharge gas with a high xenon partial pressure and a large amount of xenon in the discharge space, it is possible to obtain high luminous efficiency. There was a case where the problem that the starting voltage would increase occurred. However, even in such a case, according to the PDP according to the embodiment of the present invention described above, since the protrusion 16 is provided on the data electrode 10 side, there is a problem that the discharge start voltage increases due to a high xenon partial pressure. Can be suppressed.

(Embodiment 3)
FIG. 11 is a cross-sectional view of a part of the panel according to Embodiment 3 of the present invention. The difference from the first and second embodiments is that the projections 16 c and 16 u are covered with the electron emission layer 51. It is preferable to use MgO as the material of the electron emission layer 51 because it has a large secondary electron emission coefficient and high resistance to ion bombardment. Thus, by forming the electron emission layer 51 on the protrusions 16c and 16u, the data electrode 10 is negatively biased with respect to the front-side dielectric layer 6 (protective layer 7) on the scan electrode 3 and the sustain electrode 4. It is possible to lower the discharge start voltage of the trigger discharge when being performed. This is because when a precursor discharge occurs between the front-side dielectric layer 6 (protective layer 7) and the protrusion 16c or 16u, and the generated positive ions move due to an electric field and collide with the electron emission layer 51, secondary electrons are generated. This is because the discharge start voltage decreases during this period.

  Further, as the material of the electron emission layer 51, the same effect can be obtained even when at least one material selected from AlN, GaN, SiC, diamond, alkali metal, and alkaline earth metal is used in addition to MgO. It was confirmed. Also in this case, the discharge start voltage of the trigger discharge when the data electrode 10 is negatively biased with respect to the front-side dielectric layer 6 (protective layer 7) on the scan electrode 3 and the sustain electrode 4 can be lowered. . In this case, electron emission by applying an electric field occurs from the surface of the electron emission layer 51, and the generation voltage of the trigger discharge can be lowered.

  With the above configuration, a weak discharge is easily generated between the scan electrode 3 and the protrusion 16c in the first half of the all-cell initializing period. For this reason, it has the effect that the abnormal discharge which arises due to the initialization discharge defect in the initialization period can be suppressed. In addition, since the trigger discharge between the scan electrode 3 and the protrusion 16c or between the sustain electrode 4 and the protrusion 16u occurs at a lower voltage in the sustain period, the minimum sustain voltage can be lowered. . Thereby, since a sustain discharge can be generated at a low voltage, the effect of improving the light emission efficiency can be obtained as described above.

  Next, the manufacturing method of the structure mentioned above is demonstrated. This is basically the same as the manufacturing method described with reference to FIG. 4, and only the differences will be described.

  That is, after the protrusion 16 is formed in step S8 of FIG. 4, for example, any one of the physical vapor deposition method or the CVD method using an electron beam vapor deposition method, an RF sputtering method, or an ion beam sputtering method is used. The electron emission layer 51 may be formed on the upper surface of the protrusion 16 by vapor-depositing at least one material selected from GaN, SiC, diamond, alkali metal, and alkaline earth metal.

  Alternatively, as another method, after forming the protrusion 16, a paste containing fine particles of at least one material selected from MgO, AlN, GaN, SiC, diamond, alkali metal, and alkaline earth metal is used. The electron emission layer 51 may be formed by applying and drying.

  After that, even if the phosphor layer 13 is applied in step S9, the protrusions 16 protrude beyond the surface of the back-side dielectric layer 11, so that the phosphor paste applied on the protrusions 16 almost flows down, and the electrons Only an extremely thin phosphor layer 13 of the size of phosphor particles remains on the emission layer 51. Therefore, the electron emission layer 51 described above appears on the surface of the phosphor layer 13. This state is maintained even after the phosphor is fired. As a result, the electron emission layer 51 can function as an electron emission.

  Moreover, the following method can be mentioned as another method. That is, at the time of applying the phosphor in forming the phosphor layer in step S9 in FIG. 4, at least one selected from MgO, AlN, GaN, SiC, diamond, alkali metal, and alkaline earth metal as the phosphor paste. A phosphor paste in which fine particles of two materials are mixed is used. When the phosphor layer is applied using such a phosphor paste, most of the phosphor paste applied on the protrusions 16 flows down, and an ultrathin fluorescence of the size of the phosphor particles is formed on the electron emission layer 51. Only the body layer remains. Then, the fine particles of the above-mentioned material contained in the phosphor layer remaining on the protrusion 16 appear on the surface of the phosphor layer (ultra thin) to form the electron emission layer 51.

(Embodiment 4)
FIG. 12 is a cross-sectional view of a part of the panel according to Embodiment 4 of the present invention. The difference from the first embodiment is that the protrusions 16c and 16u are separated from the horizontal partition wall 12b. In FIG. 12, the protrusions 16 c and 16 u are arranged at positions facing the scan electrode 3 and the sustain electrode 4, respectively. With this configuration, the distance between the protrusion 16c and the scanning electrode 3 and the distance between the protrusion 16u and the sustain electrode 4 are reduced without increasing the height c of the protrusion, that is, the trigger discharge voltage is lowered. be able to.

  Further, as a manufacturing method of this configuration, it is only necessary to change a mask for forming a pattern, a screen plate and the like with respect to the method described in the first embodiment.

  Similarly, in the panel according to the present embodiment, the sustain pulse voltage can be lowered and the efficiency can be improved at the same time. For this reason, there is an effect that power consumption can be reduced. Further, since no auxiliary cell is provided other than the discharge cell that performs the sustain discharge, it is suitable for high definition.

  In the above first to fourth embodiments, the protrusion 16 is provided on the back-side dielectric layer 11 so as to overlap the data electrode 10 in plan view, and the protrusion 16 and the display electrode pair 5 Is configured to be shorter than the shortest distance between the display electrode pair 5 and the back-side dielectric layer 11. That is, the shortest distance between the display electrode 3 and the protrusion 16c is configured to be shorter than the shortest distance between the display electrode 3 and the back-side dielectric layer 11, and the shortest distance between the sustain electrode 4 and the protrusion 16u. Is configured to be shorter than the shortest distance between the sustain electrode 4 and the back-side dielectric layer 11, and as an example of a specific configuration thereof, at least one of the scan electrode 3 and the sustain electrode 4 in plan view. In this configuration, the protrusion 16 is provided so as to include a region where the data electrode 10 and the data electrode 10 overlap.

  However, the effect of the present invention is not limited to the above-described configuration. As described above, a projection is provided so as to overlap the data electrode in a plan view, and the shortest distance between the projection and the display electrode pair is It is obvious that the same structure can be obtained as long as it is configured to be shorter than the shortest distance between the display electrode pair and the back-side dielectric layer.

  The plasma display panel of the present invention is useful for realizing a plasma display panel that can be driven with high efficiency and can be driven at a low voltage, and can achieve low power consumption.

Sectional perspective view which shows a part of schematic structure of the plasma display panel by Embodiment 1 of this invention The top view which shows a part of schematic structure of the plasma display panel Sectional drawing which shows a part of schematic structure of the plasma display panel Flow chart showing the manufacturing process of the back plate of the plasma display panel Electrode arrangement of the plasma display panel Waveform diagram showing an example of a driving waveform applied to each electrode of the plasma display panel Sectional view schematically showing the behavior of wall charges in the plasma display panel Sectional drawing which shows typically the other state of the behavior of the wall charge in the plasma display panel Sectional drawing which shows typically another state of the behavior of the wall charge in the plasma display panel Sectional drawing which shows typically another state of the behavior of the wall charge in the plasma display panel The figure which shows luminous efficiency when maintaining voltage Vm of the same plasma display panel is changed Waveform diagram showing an example of a driving waveform for driving the plasma display panel according to the second embodiment of the present invention The figure which shows typically the behavior of the wall charge in the plasma display panel by Embodiment 2 of this invention. The figure which shows typically the other state of the behavior of the wall charge in the same plasma display panel The figure which shows typically the other state of the behavior of the wall charge in the plasma display panel The figure which shows typically the other state of the behavior of the wall charge in the plasma display panel The figure which shows typically the other state of the behavior of the wall charge in the plasma display panel The figure which shows typically the other state of the behavior of the wall charge in the plasma display panel Sectional drawing which shows a part of schematic structure of the plasma display panel by Embodiment 3 of this invention Sectional drawing which shows a part of schematic structure of the plasma display panel by Embodiment 4 of this invention Sectional perspective view showing a part of a schematic configuration of a conventional plasma display panel

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Front plate 2 1st glass substrate 3 Scan electrode 3a Transparent electrode 3b Metal bus 4 Maintenance electrode 4a Transparent electrode 4b Metal bus 5 Display electrode pair 6 Front side dielectric layer 7 Protective film 8 Back plate 9 2nd glass substrate 10 Data electrode 11 Back side dielectric layer 12 Partition 12a Vertical partition 12b Horizontal partition 13, 13r, 13g, 13b Phosphor layer 14 Discharge space 15 Discharge cell 16, 16c, 16u Protrusion 17 Light absorption layer 51 Electron emission layer

Claims (12)

A first glass substrate on which a plurality of pairs of display electrodes including scan electrodes and sustain electrodes are arranged;
A second glass substrate disposed opposite to the first glass substrate with a discharge space interposed therebetween, and a plurality of data electrodes disposed in a direction intersecting the display electrode,
The second glass substrate is provided with a back side dielectric layer so as to cover the data electrode,
On the back side dielectric layer, a projection is provided so as to overlap the data electrode in plan view,
The plasma display panel characterized in that the shortest distance between the projection and the display electrode is shorter than the shortest distance between the display electrode and the back-side dielectric layer. A first glass substrate on which a plurality of pairs of display electrodes including scan electrodes and sustain electrodes are arranged;
A second glass substrate disposed opposite to the first glass substrate with a discharge space interposed therebetween, and a plurality of data electrodes disposed in a direction intersecting the display electrode,
The second glass substrate is provided with a back side dielectric layer so as to cover the data electrode,
A plasma display panel, wherein a protrusion is provided on the back-side dielectric layer so as to include a region where at least one of the scan electrode and the sustain electrode and the data electrode overlap in a plan view. On the back side dielectric layer, a partition is provided so as to partition a plurality of discharge cells formed by the display electrode and the data electrode,
The barrier ribs intersect a plurality of striped vertical barrier ribs formed parallel to the data electrodes with the data electrode interposed therebetween, and the striped vertical barrier ribs formed at positions corresponding to adjacent display electrode pairs. The plasma display panel according to claim 1, further comprising a horizontal barrier rib provided so as to perform. On the back side dielectric layer, a partition is provided so as to partition a plurality of discharge cells formed by the display electrode and the data electrode,
The barrier ribs intersect a plurality of stripe-shaped vertical barrier ribs formed parallel to the data electrodes with the data electrode interposed therebetween, and the stripe-shaped vertical barrier ribs formed at positions corresponding to adjacent display electrode pairs. A transverse partition provided as
The plasma display panel according to claim 1, wherein the protrusion is formed to be connected to a side portion of the horizontal barrier rib.   The plasma display panel according to claim 1, wherein an electron emission layer is formed on a surface of the protrusion.   The plasma display panel according to claim 5, wherein the electron emission layer includes at least one material selected from magnesium oxide, AlN, GaN, SiC, diamond, alkali metal, and alkaline earth metal.   The plasma display panel according to claim 6, wherein the material is fine particles. Forming a data electrode on the substrate;
Forming a backside dielectric layer to cover the data electrode;
Forming a paste containing a low softening point glass frit and an organic binder on the back-side dielectric layer in a pattern corresponding to a transverse partition;
Forming a paste containing a low softening point glass frit and an organic binder on the back side dielectric layer in a pattern corresponding to a vertical partition;
Forming a paste containing a low softening point glass frit and an organic binder on the back-side dielectric layer in a pattern corresponding to the protrusions;
By developing and baking each paste including a low softening point glass frit and an organic binder formed in a pattern corresponding to each of the horizontal barrier ribs, the vertical barrier ribs, and the protrusions, the vertical barrier ribs and the horizontal barrier ribs are developed. And forming the protrusions;
A method of manufacturing a plasma display panel, comprising: forming a phosphor layer on an upper surface of the back-side dielectric layer and side surfaces of the vertical barrier rib and the horizontal barrier rib.   The method for manufacturing a plasma display panel according to claim 8, wherein an inorganic solid content ratio of the paste is 30% to 50%. Forming a data electrode on the substrate;
Forming a back side dielectric layer so as to cover the data electrode;
Applying a photosensitive material on the back-side dielectric layer and exposing a pattern corresponding to the transverse barrier ribs;
Applying a photosensitive material on the back-side dielectric layer and exposing a pattern corresponding to the vertical partition;
Applying a photosensitive material on the back side dielectric layer and exposing a pattern corresponding to the protrusion; and
The vertical barrier ribs, the horizontal barrier ribs, and the protrusions are formed by developing and baking the respective photosensitive materials exposed to the patterns corresponding to the horizontal barrier ribs, the vertical barrier ribs, and the protrusions. Process,
A method of manufacturing a plasma display panel, comprising: forming a phosphor layer on an upper surface of the back-side dielectric layer and side surfaces of the vertical barrier rib and the horizontal barrier rib.   The method for manufacturing a plasma display panel according to claim 8, further comprising an electron emission layer forming step of forming an electron emission layer on a surface of the protrusion after the step of forming the protrusion.   The step of forming the phosphor layer includes printing a phosphor paste in which fine particles of at least one material selected from magnesium oxide, AlN, GaN, SiC, diamond, alkali metal, and alkaline earth metal are mixed. The manufacturing method of the plasma display panel of Claim 11 performed by apply | coating by the inkjet method.

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