JP2007305911A - Semiconductor package and semiconductor module - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor package that prevents damage, thus improving the reliability of a component. <P>SOLUTION: On a semiconductor package 10A, there are arranged a semiconductor element 20 formed into a plate shape. The semiconductor element 20 has a first power terminal 22 and a control terminal 23 on its principal surface 21a, and a second power terminal 25 on its back surface 21b facing the first surface 21a; a first electrode plate 30 so arranged that it faces the principal surface 21a of the semiconductor element 20 which has a first power electrode 32 projecting to the principal surface 21a and joined with the first power terminal 22; a second electrode plate 40 so arranged that it faces the back surface 21b of the semiconductor 20 which has a second power electrode 41a joined with a second power terminal 25; and an insulating substrate 50 arranged between the semiconductor element 20 and the first electrode plate 30 which has an opening 52 that the first power electrode 32 passes through and a control electrode 53 joined with the control electrode 23. The first power electrode 32 is formed so that it surrounds the planar-directional ambience of the control electrode 53. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a semiconductor package and a semiconductor module, and more particularly to a semiconductor package including a power semiconductor element and constructing a power control device such as an inverter and a converter, and a semiconductor module including a plurality of the semiconductor packages.

  As power semiconductor elements, semiconductor elements such as IGBTs (Insulated Gate Bipolar Transistors), IEGTs (Injection Enhanced Gate Transistors), and MOS-FETs are frequently used. Usually, the power semiconductor element is formed in a plate shape, has a front surface side power terminal and a control terminal on the front surface, and has a back surface side power terminal on the back surface. When the power semiconductor element is an IBGT element, the front-side power terminal is called an emitter electrode, the back-side power terminal is called a collector electrode, and the control terminal is called a gate electrode.

  When such a power semiconductor element is mounted on a substrate and packaged, the power terminal on the back surface side of the semiconductor element is connected to the electrode on the surface side of the substrate by solder bonding, and the power terminal and control terminal on the front surface side of the semiconductor element. Is connected to the electrode on the substrate surface side by wire bonding using an aluminum wire (see, for example, Patent Document 1 and Patent Document 2). However, in wire bonding, the wires are bonded one by one, so the bonding time is long, the wire is drawn in a loop shape, the wire length is long and the wiring inductance is increased, and it is susceptible to vibration, and cutting and short-circuiting between adjacent parts can occur. Technical issues such as high performance remain.

  For this reason, there is a tendency to employ a method of bonding an aluminum thin plate instead of a wire to the surface side power terminal of the semiconductor element, or a method of soldering a flat plate or a lead and pulling it out as an electrode. In particular, a method of selecting a material that can be solder-bonded to the surface-side power terminal of the semiconductor element, and connecting a flat plate or a lead to the surface-side electrode terminal by solder-bonding is a recently attracting attention. However, a wire bonded by wire bonding is used for the lead-out wiring from the control terminal.

In a semiconductor module including a plurality of such semiconductor packages, the plurality of semiconductor packages are arranged in a line on a base substrate which is a heat sink. At this time, the back surface of the substrate of the semiconductor package is bonded onto the base substrate. This semiconductor module is mounted on a power control device such as an inverter or a converter.
JP 2003-110064 A JP 2002-164485 A

  However, in the above-described semiconductor module, only one surface of each semiconductor package is in contact with the base substrate, and heat dissipation is not sufficient. In addition, since the back surface of each semiconductor package is bonded to the base substrate, the installation area of the semiconductor package with respect to the base substrate is increased, and the semiconductor module is increased in size. In order to prevent these, the respective semiconductor packages are provided in a line, and the semiconductor packages may be sandwiched between a pair of conductive members such as bus bars from the front and back surfaces and provided on the base substrate.

  However, the pair of conductive members has thermal conductivity and functions also as a heat radiating member, so that it expands and contracts in response to current supply. In addition, since the end on the base substrate side of the conductive member is a fixed end and the opposite end is a free end, the behavior according to the thermal expansion and contraction of the free end of the conductive member is It becomes larger than the behavior corresponding to the thermal expansion and contraction of the fixed end. Due to the thermal expansion and contraction of the pair of conductive members, an external force is applied to the semiconductor package, and the semiconductor package may be damaged. In particular, the connection portion of each terminal of the power semiconductor element is damaged.

  Here, it is possible to suppress damage to the semiconductor package to some extent by designing the semiconductor module in consideration of thermal expansion and contraction of each conductive member. However, in the initial stage where current starts to flow through the pair of conductive members, a temperature difference is generated in each conductive member, so that each conductive member partially expands thermally. It is difficult to design a semiconductor module in consideration of this thermal expansion.

  In addition, since the semiconductor packages are provided in a line, the length of the semiconductor packages in the alignment direction is increased. Accordingly, the length of the pair of conductive members is increased and the base substrate is also increased, so that the semiconductor module is increased in size. Therefore, it is difficult to reduce the size of the semiconductor module while improving heat dissipation.

  The present invention has been made to solve the above-described problems, and an object of the present invention is to provide a semiconductor package and a semiconductor module that can prevent damage and improve component reliability. Another object is to provide a semiconductor package and a semiconductor module that can be miniaturized while improving heat dissipation.

  A first feature according to an embodiment of the present invention is that a semiconductor package is formed in a plate shape, and has a first power terminal and a control terminal provided on the main surface, and provided on the back surface facing the main surface. A semiconductor element having a second power terminal, and a first power electrode provided facing the main surface of the semiconductor element, projecting toward the main surface of the semiconductor element, and joined to the first power terminal. A first electrode plate, a second electrode plate provided opposite to the back surface of the semiconductor element and having a second power electrode joined to a second power terminal; and provided between the semiconductor element and the first electrode plate; And an insulating substrate having a control electrode joined to a control terminal. The first power electrode is formed so as to surround the periphery of the control electrode in the planar direction. That is.

  A second feature according to the embodiment of the present invention is that a semiconductor package is formed in a plate shape, has a first power terminal and a control terminal provided on the main surface, and is provided on the back surface facing the main surface. A semiconductor element having a second power terminal, and a first power electrode provided facing the main surface of the semiconductor element, projecting toward the main surface of the semiconductor element, and joined to the first power terminal. A first electrode plate, a second power electrode provided facing the back surface of the semiconductor element and joined to the second power terminal; a first protrusion formed to protrude in one direction in the plane direction; A first electrode plate provided between the semiconductor element and the first electrode plate, the second electrode plate having a first lead-in portion formed in a shape fitted to the first protrusion and provided at a position facing the protrusion; Control that has an opening through which the power electrode passes and is joined to the control terminal A pole, a second protrusion that is positioned on the same straight line as the first protrusion and is formed in the same shape as the first protrusion, and a shape that is provided at a position facing the second protrusion and that fits with the second protrusion An insulating substrate having a second lead-in portion formed between the first protruding portion and the second protruding portion, and a first separation distance between the second electrode plate and the insulating substrate is kept constant. The spacer is provided between the second electrode plate and the insulating substrate so as to sandwich the second lead-in part of the second electrode plate, and the separation distance between the second electrode plate and the insulating substrate is kept constant. A second spacer and a third spacer.

  A third feature according to the embodiment of the present invention is provided in the semiconductor module so as to sandwich the plurality of semiconductor packages according to the first feature or the second feature described above and the plurality of semiconductor packages, respectively. A first conductive member and a second conductive member.

  According to the present invention, damage can be prevented and component reliability can be improved. Further, it is possible to reduce the size while improving the heat dissipation.

(First embodiment)
A first embodiment of the present invention will be described with reference to FIGS.

  As shown in FIGS. 1 to 3, the semiconductor package 10 </ b> A according to the first embodiment of the present invention includes a power semiconductor element 20 such as an IGBT element and a main surface 21 a side that is the surface of the semiconductor element 20. Provided between the first electrode plate 30 provided, the second electrode plate 40 provided on the back surface 21 b side facing the main surface 21 a of the semiconductor element 20, and the first electrode plate 30 and the semiconductor element 20. The insulating substrate 50 is laminated.

  The semiconductor element 20 is an IGBT element in which an IGBT is mounted on a semiconductor chip 21 that is a plate-shaped piece. The semiconductor element 20 is formed such that its outer peripheral edge is inside the outer peripheral edges of the first electrode plate 30, the second electrode plate 40, and the insulating substrate 50. The main surface 21a of the semiconductor element 20 is provided with a first power terminal 22 that is an emitter electrode and a control terminal 23 that is a gate electrode. The first power terminal 22 is provided so as to surround, for example, only three sides of the control terminal 23 so as to surround the periphery of the control terminal 23 in the planar direction. Around the control terminal 23, a solder resist film 24 for preventing a short circuit due to a solder flow is formed by printing. A second power terminal 25 that is a collector electrode is provided on the back surface 21 b of the semiconductor chip 21.

  Here, the opening shape of the solder resist film 24 is determined according to the amount of solder used for solder bonding and the type of solder (the shape of a solder ball or the shape of a solder sheet). When a solder ball is used for solder joining, the opening shape of the solder resist film 24 is set to, for example, a circle.

  The first electrode plate 30 includes a substrate body 31 formed in a plate shape with a conductive material such as a copper material. A copper material is used because it is excellent in terms of price, electrical conductivity, and thermal conductivity, but is not limited to this (other conductive materials will be described later). A first power electrode 32 that protrudes toward the main surface 21 a of the semiconductor element 20 and is joined to the first power terminal 22 of the semiconductor element 20 is formed on the surface 31 a of the substrate body 31 on the semiconductor element 20 side. (See FIG. 3). The first power electrode 32 is formed so as to surround the periphery of the control terminal 23 in the planar direction in substantially the same manner as the shape of the first power terminal 22. The first power electrode 32 has a recess 33 provided at a position facing the control terminal 23.

  The second electrode plate 40 includes a substrate body 41 formed in a plate shape by a conductive material such as a copper material. The second power electrode 41a, which is the surface of the substrate body 41 on the semiconductor element 20 side, is joined to the second power terminal 25 of the semiconductor element 20, and the second electrode plate 40 is electrically connected to the second power terminal 25. Yes. The material of the substrate body 41 may be the same material as the substrate body 31 or a different material.

  The insulating substrate 50 includes a substrate body 51 formed in a plate shape from glass epoxy resin, polyimide resin, or the like. The substrate body 51 is provided with an opening 52 through which the first power electrode 32 of the first electrode plate 30 passes. The opening 52 is a through-opening formed in the same planar shape as the first power electrode 32 and a slightly larger similar shape, and the first power electrode 32 of the first electrode plate 30 is fitted into the opening 52. By the opening 52 having such a shape, a wiring portion 51 a that protrudes toward the center of the opening 52 is formed in the substrate body 51.

  The substrate body 51 is formed with a lead portion 51 b that protrudes outward from the outer peripheral edges of the first electrode plate 30 and the second electrode plate 40. A fixing pad 51c for fixing the first electrode plate 30 is provided on the surface of the substrate body 51 on the first electrode plate 30 side (see FIG. 2). For example, four fixing pads 51 c are provided, and these fixing pads 51 c are positioned at, for example, four corners of the substrate body 51. On the other hand, a bonding pad 51d is provided on the surface of the substrate body 51 on the second electrode plate 40 side (see FIG. 3). For example, four bonding pads 51 d are provided, and these bonding pads 51 d are positioned outside the outer peripheral edge of the semiconductor element 20, for example, at four corners of the substrate body 51.

  In addition, a control electrode 53 such as a connection pad is provided on the surface of the substrate body 51 on the second electrode plate 40 side so as to face the control terminal 23 of the semiconductor element 20. In addition, wiring 54 connected to the control electrode 53 is provided on the surface of the substrate body 51 on the second electrode plate 40 side. Note that the control electrode 53 and the wiring 54 are disposed on the wiring portion 51a. Further, the external connection terminal 55 connected to the wiring 54 is positioned and provided in the lead portion 51b.

  Here, portions other than the connection portions of the bonding pad 51d, the control electrode 53, and the external connection terminal 55 are covered with a solder resist film (not shown) in order to prevent solder flow. The material and type of the resist are not particularly limited. The opening shape of the solder resist film is determined according to the amount of solder used for solder bonding and the type of solder (the shape of a solder ball or the shape of a solder sheet). When a solder ball is used for solder joining, the opening shape of the solder resist film is set to, for example, a circle.

  Next, the first power electrode 32 of the first electrode plate 30 will be described in detail.

  As shown in FIGS. 3 and 4, the first power electrode 32 is a protrusion that protrudes toward the main surface 21 a of the semiconductor element 20. A concave portion 33 is formed in the approximate center of the first electrode electrode 32. The recess 33 is a housing portion that houses the control electrode 53, and also houses the wiring portion 51 a together with the control electrode 53. Moreover, the recessed part 33 has the through-hole 33b formed in the bottom face 33a. The through-holes 33b are holes for discharging the cleaning liquid that has entered the recesses 33. For example, two through-holes 33b are provided. As a result, the cleaning liquid that has entered the recess 33 in the cleaning step (for example, ultrasonic cleaning or the like) after soldering is discharged from each through hole 33b.

  Next, an electrical connection structure and a junction structure among the semiconductor element 20, the first electrode plate 30, the second electrode plate 40, and the insulating substrate 50 will be described.

  The first power terminal 22 of the semiconductor element 20 and the first power electrode 32 of the first electrode plate 30 are joined by solder joint. Further, the control terminal 23 of the semiconductor element 20 and the control electrode 53 on the insulating substrate 50 are joined by solder joining using a solder ball 60 (see FIG. 2). Furthermore, the second power terminal 25 of the semiconductor element 20 and the second power electrode 41a of the second electrode plate 40 are joined by solder joint. As the solder joint, for example, solder joint using a solder ball or a solder sheet is used.

  The first electrode plate 30 and the fixed pad 51 c of the insulating substrate 50 are joined by solder bonding, and the first electrode plate 30 is fixed to the insulating substrate 50. Further, the fixed pad 51c is formed of a material having high wettability with respect to the solder, and is manufactured in the same manufacturing process by using the same material as that of the control electrode 53 in order not to increase the manufacturing process of the insulating substrate 50.

  A spacer 61 is provided between the second electrode plate 40 and the insulating substrate 50 to maintain a constant distance between them. For example, four spacers 61 are provided, and these spacers 61 are positioned outside the outer peripheral edge of the semiconductor element 20, for example, at four corners of the substrate body 51 so as to face the bonding pads 51 d. . Each spacer 61 is fixed on each bonding pad 51d by solder bonding or an adhesive. In addition, when using an adhesive agent, it is not necessary to provide each bonding pad 51d. As the spacer 61, for example, a surface mounting component (chip component), a solder-coated ball, a metal piece, or the like is used. The surface-mounted component is formed in a prismatic shape, for example, and is a component such as a conductive resistor or capacitor. The solder-coated balls are formed by coating solder on the surface of a metal core material or the surface of a non-metal core material such as plastic coated with a metal material. The metal piece is, for example, a member in which a metal is formed in a disc shape or a prism shape.

  As described above, according to the semiconductor package 10A according to the first embodiment, the first power electrode 32 of the first electrode plate 30 is formed so as to surround the periphery of the control electrode 53 of the insulating substrate 50 in the planar direction. By doing so, the connection portion between the control electrode 53 of the insulating substrate 50 and the control terminal 23 of the semiconductor element 10A is surrounded by the first power electrode 32, and the mechanical strength of the peripheral portion of the connection portion increases. The semiconductor element 10A can be prevented from being damaged by an external force from the connection portion, and as a result, the component reliability of the semiconductor package 10A can be improved. In particular, even when a plurality of semiconductor packages 10A are arranged in a line, the semiconductor packages 10A are sandwiched by a pair of conductive members such as bus bars from the front and back surfaces, and each conductive member is provided on a base substrate that is a heat sink. It is possible to prevent the semiconductor element 10A from being damaged by an external force applied according to the thermal expansion and contraction.

  In addition, since the first power electrode 32 has the recess 33 for accommodating the control electrode 53, the first power electrode 32 can easily surround the periphery of the control electrode 53 in the planar direction. The recess 33 can be easily formed in the first power electrode 32 by this processing technique.

  Furthermore, since the concave portion 33 has a through hole 33b formed in the bottom surface 33a, when flux is used for soldering, the concave portion 33 is subjected to a cleaning process after soldering (for example, ultrasonic cleaning). Since the invading cleaning liquid is easily discharged from the through-hole 33b, it is possible to prevent various defects such as a breakdown voltage due to the residual cleaning liquid.

  Further, by providing the control terminal 23 of the semiconductor element 20 and the control electrode 53 of the insulating substrate 50 at positions facing each other, it becomes possible to connect them by solder bonding, and bonding by wire bonding becomes unnecessary. As a result, it is not necessary to secure a bonding space for wire bonding, and further, it is not necessary to secure a separation distance for preventing a short circuit by the bonding wire, so that the semiconductor package 10A can be reduced in size. In addition, since a wire bonder facility for performing wire bonding is not required, it is possible to reduce manufacturing facility investment and production facility space.

  Furthermore, the insulating substrate 50 is provided on the lead portion 51 b connected to the control electrode 53 and the lead portion 51 b that projects outward from the outer peripheral edges of the semiconductor element 20, the first electrode plate 30, and the second electrode plate 40. Since the external connection terminal 55 is provided, the control wiring can be drawn out of the package without using wire bonding.

  Further, by providing a spacer 61 between the second electrode plate 40 and the insulating substrate 50 so as to be positioned outside the outer peripheral edge of the semiconductor element 20, the space between the second electrode plate 40 and the insulating substrate 50 is kept constant. Therefore, damage to the semiconductor element 20 due to external force can be surely prevented, and as a result, component reliability of the semiconductor package 10A can be improved. In addition, even when an external force is applied in the manufacturing process of the semiconductor package 10A and the manufacturing process of the semiconductor module, the semiconductor element 20 can be prevented from being damaged by the external force. As a result, it is possible to suppress a decrease in manufacturing yield when manufacturing the semiconductor package 10A and the semiconductor module.

(Second Embodiment)
A second embodiment of the present invention will be described with reference to FIGS. In the second embodiment of the present invention, an example of a semiconductor module 11A including the semiconductor package 10A according to the first embodiment will be described. Note that in the second embodiment, the same parts as those described in the first embodiment are denoted by the same reference numerals, and description thereof is omitted (the same applies to other embodiments).

  As shown in FIGS. 5 and 6, the semiconductor module 11A according to the second embodiment of the present invention includes a plurality of power semiconductor packages 10A and a plurality of rectifying semiconductor packages 12A according to the first embodiment. The first conductive member 71 and the second conductive member 72 provided so as to sandwich the semiconductor packages 10A and 12A, and the first conductive member 71 and the second conductive member 72 are made of an insulating sheet, an insulating plate, or the like. And a heat sink 74 provided via an insulator 73.

  The semiconductor packages 10A and 12A are alternately arranged on the same straight line. These semiconductor packages 10A and 12A are bonded to the first conductive member 71 and the second conductive member 72 by solder bonding. For example, diffusion bonding is used as the solder bonding.

  The semiconductor package 12A includes a rectifying semiconductor element 12a such as a diode element, a first electrode plate 12b and a second electrode plate 12c provided so as to sandwich the rectifying semiconductor element 12a, a first electrode plate 12b, And a spacer 62 for maintaining a constant distance from the two-electrode plate 12c. For example, four spacers 62 are provided, and these spacers 62 are positioned outside the outer peripheral edge of the rectifying semiconductor element 12a, for example, at four corners of the first electrode plate 12b.

  The first conductive member 71 and the second conductive member 72 have conductivity, function as common electrode members of the semiconductor packages 10A and 12A, respectively, and have thermal conductivity, and a heat dissipation member Each function as well. Here, the first conductive member 71 is connected to the first electrode plate 30 (see FIG. 1) of the semiconductor package 10A and functions as an emitter electrode block. The second conductive member 72 is connected to the second electrode plate 40 (see FIG. 1) of the semiconductor package 10A and functions as a collector electrode block.

  As described above, according to the semiconductor module 11 </ b> A according to the second embodiment, the same effects as those of the first embodiment can be obtained. In particular, by using the semiconductor package 10A having high mechanical strength, the component reliability of the semiconductor module 11A can be improved. In addition, the heat dissipation can be improved by sandwiching the semiconductor package 10 </ b> A by the first conductive member 71 and the second conductive member 72.

  Further, by joining the semiconductor package 10A and the conductive members 71 and 72 by diffusion bonding using solder, melting of the solder is prevented, and the semiconductor package 10A is damaged due to solidification shrinkage when using fusion bonding using solder. In particular, damage to the semiconductor element 20 can be prevented. As a result, it is possible to suppress a decrease in manufacturing yield when manufacturing the semiconductor module 11A.

(Third embodiment)
A third embodiment of the present invention will be described with reference to FIGS.

  The third embodiment of the present invention is basically the same as the first embodiment. In the third embodiment, parts different from the first embodiment will be described.

  As shown in FIGS. 7 and 8, in the semiconductor package 10B according to the third embodiment of the present invention, the substrate body 41 of the second electrode plate 40 is formed so as to protrude in one direction in the plane direction. The first projecting portion 81a and the first retracting portion (retracting portion) 82a formed to fit with the first projecting portion 81a are provided. The first lead-in part 82a is provided at a position facing the first projecting part 81a. The first projecting portion 81a and the first drawing-in portion 82a are respectively provided on two sides of the substrate body 41 that intersect one side where the drawing portion 51b of the substrate body 51 is located.

  Further, the substrate main body 51 of the insulating substrate 50 has a second protrusion 81b formed in the same shape as the first protrusion 81a and a second lead-in part 82b formed in a shape that fits the second protrusion 81b. Is provided. The second protrusion 81b is positioned on the same straight line as the first protrusion 81a. The 2nd drawing-in part 82b is located on the same straight line as the 1st drawing-in part 82a, and is provided in the position facing the 2nd projection part 81b. The 2nd protrusion part 81b and the 2nd drawing-in part 82b are each provided in two sides which cross | intersect 1 side in which the drawer | drawing-out part 51b in the board | substrate body 51 is located.

  The substrate body 31 of the first electrode plate 30 has a third protrusion 81c formed in the same shape as the first protrusion 81a and a third lead-in formed in a shape that fits the third protrusion 81c. A portion 82c is provided. The third protrusion 81c is positioned on the same straight line as the second protrusion 81b. The 3rd drawing-in part 82c is located on the same straight line as the 2nd drawing-in part 82b, and is provided in the position which counters the 3rd projection part 81c. The 3rd protrusion part 81c and the 3rd drawing-in part 82c are each provided in two sides of the board | substrate body 31 which cross | intersects one side in which the drawer | drawing-out part 51b of the board | substrate body 51 is located.

  The spacer 61 is provided between the second electrode plate 40 and the insulating substrate 50 as the first spacer 61a, the second spacer 61b, and the third spacer 61c. The first spacer 61 a, the second spacer 61 b, and the third spacer 61 c are positioned outside the outer peripheral edge of the semiconductor element 20 and are provided to avoid the wiring 54 on the insulating substrate 50. That is, the first spacer 61 a is provided between the first protrusion 81 a of the second electrode plate 40 and the second protrusion 81 b of the insulating substrate 50. In addition, the second spacer 61b and the third spacer 61c are positioned and provided so as to sandwich the first lead-in portion 82a of the second electrode plate 40, respectively.

  The first spacer 61a, the second spacer 61b, and the third spacer 61c are formed in a prismatic shape. As the first spacer 61a, the second spacer 61b, and the third spacer 61c, for example, a surface-mounted component (chip component), a metal piece formed in a disk shape or a prism shape, or the like is used. The surface mount component is a component such as a conductive resistor or capacitor.

  As described above, according to the semiconductor package 10B according to the third embodiment, the same effect as that of the first embodiment can be obtained. In addition, even when a plurality of semiconductor packages 10B are provided in a line, the semiconductor packages 10B are sandwiched by a pair of conductive members such as bus bars from the front and back surfaces, and provided on a base substrate that is a heat sink, they are adjacent to each other. Since each protrusion part 81a, 81b, 81c of semiconductor package 10B and drawing-in part 82a, 82b, 82c fit, compared with the case where a plurality of semiconductor packages 10A concerning a 1st embodiment are arranged in a line. The length of each semiconductor package 10B in the alignment direction is shortened. As a result, the length of each conductive member can be shortened, and the installation area of each conductive member with respect to the base plate can be reduced, so that the base plate can be reduced. As a result, the semiconductor module can be downsized. Can be realized.

  Furthermore, by providing three spacers 61 as the first spacer 61a, the second spacer 61b, and the third spacer 61c, the insulating substrate 50 is supported at three points, so that the insulating substrate 50 and each of the spacers 61a, 61b, 61c are supported. The uniformity of the thickness of the solder layer or the thickness of the adhesive layer can be improved.

  In addition, since the first spacer 61a, the second spacer 61b, and the third spacer 61c are elements for surface mounting formed in a prismatic shape, the first spacer is disposed on at least one of the second electrode plate 40 and the insulating substrate 50. The first spacer 61a, the second spacer 61b, and the third spacer 61c may be mounted, and the first spacer 61a, the second spacer 61b, and the third spacer 61c can be easily provided at desired positions.

(Fourth embodiment)
A fourth embodiment of the present invention will be described with reference to FIG.

  The fourth embodiment of the present invention is basically the same as the second embodiment. In the fourth embodiment, parts different from the second embodiment will be described.

  As shown in FIG. 9, in the semiconductor module 11B according to the fourth embodiment of the present invention, the semiconductor package 10B according to the third embodiment is provided in place of the semiconductor package 10A, and the semiconductor package 12B is provided. Is provided in place of the semiconductor package 12A.

  The first electrode plate 12b of the semiconductor package 12B has a fourth protrusion 81d formed so as to protrude in one direction in the plane direction and a fourth lead-in part formed in a shape that fits the fourth protrusion 81d. 82d is provided. The fourth lead-in part 82d is provided at a position facing the fourth projecting part 81d.

  The second electrode plate 12c of the semiconductor package 12B has a fifth protrusion 81e formed in the same shape as the fourth protrusion 81d and a fifth lead-in part 82e formed in a shape that fits the fifth protrusion 81e. Is provided. The fifth protrusion 81e is positioned on the same straight line as the fourth protrusion 81d. The fifth lead-in part 82e is positioned on the same straight line as the fourth lead-in part 82d, and is provided at a position facing the fifth projecting part 81e.

  The spacer 62 of the semiconductor package 12B is provided between the first electrode plate 12b and the second electrode plate 12c as the first spacer 62a, the second spacer 62b, and the third spacer 62c. The first spacer 62a, the second spacer 62b, and the third spacer 62c are provided outside the outer peripheral edge of the rectifying semiconductor element 12a. That is, the first spacer 62a is positioned between the fourth protrusion 81d of the first electrode plate 12b and the fifth protrusion 81e of the second electrode plate 12c. Further, the second spacer 62b and the third spacer 62c are respectively positioned and provided so as to sandwich the fourth drawing portion 82d of the first electrode plate 12b.

  As described above, according to the semiconductor module 11B according to the fourth embodiment, the same effects as those of the second embodiment can be obtained. In particular, by using the semiconductor package 10B having high mechanical strength, the component reliability of the semiconductor module 11B can be improved. In addition, the heat dissipation can be improved by sandwiching the semiconductor package 10 </ b> B between the first conductive member 71 and the second conductive member 72.

  Furthermore, by using the semiconductor package 10B for the semiconductor module 11B, the protrusions 81a, 81b, 81c of the adjacent semiconductor package 10B and the lead-in portions 82d, 82e of the semiconductor package 12B are fitted, so that the second embodiment Compared to the semiconductor module 11A according to (see FIG. 6), the length of the semiconductor packages 10B and 12B in the alignment direction is shortened. As a result, the length of each conductive member 71, 72 can be shortened, and the installation area of each conductive member 71, 72 with respect to the heat sink 74 can be reduced, so the heat sink 74 can also be reduced, As a result, it is possible to reduce the size of the semiconductor module 11B.

(Other embodiments)
The present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the scope of the invention.

  For example, in the first and third embodiments described above, the material of the first electrode plate 30 and the second electrode plate 40 is a copper material, but the material is not limited to this, and any conductive material may be used. From the viewpoints of formability, specific gravity, thermal expansion coefficient, and the like, aluminum, molybdenum, copper molybdenum alloy, copper tungsten alloy, and the like may be used. Furthermore, the material of the first electrode plate 30 and the second electrode plate 40 may be a clad material of various materials, and the surface may be plated with another material in order to improve the wettability of the solder joint.

  In the first and third embodiments described above, the first power electrode 32 of the first electrode plate 30 is formed by press coining. However, the present invention is not limited to this. For example, the first electrode When a sintered material is used as the material of the plate 30, that is, the material of the first power electrode 32, it may be formed by sintering. Alternatively, the first electrode plate 30 may be formed by assembling a projection (projection) made of the same or different material and a flat plate by brazing or the like.

  In the first and third embodiments described above, the solder material used for solder bonding is any solder material such as ordinary Sn-Pb eutectic solder, lead-free solder, Pb-rich high-temperature solder, and the like. May be. In addition, the solder supplied between the second power terminal 25 and the second electrode plate 40 and between the first power terminal 22 and the first electrode plate 30 may be a solder sheet cut to a predetermined size or by a printing method. A printed solder paste, solder formed by plating or vapor deposition, or the like can be used. Further, as the solder supplied between the control terminal 23 and the control electrode 53, a solder ball, a solder paste printed by a printing method, a solder paste supplied by dispensing, or the like can be used. Is most convenient and preferred.

  Further, in the first and third embodiments described above, when the fixing to the first electrode plate 30 is performed by solder bonding, a double-sided plate is used as the insulating substrate 50. However, the present invention is not limited to this. For example, in the case where the first electrode plate 30 is fixed only by bonding or mechanical fixing, a single-sided plate may be used as the insulating substrate 50. Further, as the insulating substrate 50, a flexible substrate, a bendable substrate, or the like can be used. In particular, when heat resistance is required, a BT resin / polyimide / Teflon (registered trademark) substrate or the like can be used. Is possible.

  In the first and third embodiments described above, the through hole is provided as the opening 52 in the insulating substrate 50. However, the present invention is not limited to this. For example, a notch is provided as the opening 52. It may be.

  In the first and third embodiments described above, melt bonding is used as the solder bonding, but the present invention is not limited to this, and for example, diffusion bonding may be used. In this case, the melting of the solder can be prevented and the thickness of the solder layer can be controlled. Therefore, the parallelism between the first electrode plate 30 and the second electrode plate 40 included in the semiconductor packages 10A and 10B can be increased. Further, the thickness of the semiconductor packages 10A and 10B can be made constant. As a result, even when a plurality of semiconductor packages 10A and 10B are combined to form a module, the parallelism between the first electrode plate 30 and the second electrode plate 40 included in each of the semiconductor packages 10A and 10B and the semiconductors are not uniform. The semiconductor module can be manufactured without causing a problem depending on the non-uniformity of the thickness of the packages 10A and 10B.

  In the third embodiment described above, the first electrode plate 30 is provided with the third projecting portion 81c and the third drawing-in portion 82c. However, the present invention is not limited to this. The outer peripheral edge may be formed so as to be the same as the inner peripheral edge of the insulating substrate 50 or inside the outer peripheral edge. For example, the first electrode plate 30 is provided with a third protrusion 81c and a third lead-in part 82c. Instead, the first electrode plate 30 may be formed in a rectangular shape.

  Finally, in the above-described second and fourth embodiments, diffusion bonding is used as solder bonding, but the present invention is not limited to this, and for example, fusion bonding may be used.

1 is a perspective view showing a semiconductor package according to a first embodiment of the present invention. It is a disassembled perspective view which shows the semiconductor package shown in FIG. FIG. 2 is an exploded perspective view showing an insulating substrate and a first electrode plate included in the semiconductor package shown in FIG. 1. FIG. 4 is a perspective view showing an insulating substrate and a first electrode plate shown in FIG. 3. It is a side view which shows the semiconductor module which concerns on the 2nd Embodiment of this invention. FIG. 6 is a front view showing the semiconductor module shown in FIG. 5. It is a perspective view which shows the semiconductor package which concerns on the 3rd Embodiment of this invention. FIG. 8 is an exploded perspective view showing the semiconductor package shown in FIG. 7. It is a front view which shows the semiconductor module which concerns on the 4th Embodiment of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10A, 10B ... Semiconductor package, 11A, 11B ... Semiconductor module, 20 ... Semiconductor element, 21a ... Main surface, 21b ... Back surface, 22 ... First power terminal, 23 ... Control terminal, 25 ... Second power terminal, 30 ... First DESCRIPTION OF SYMBOLS 1 electrode plate, 32 ... 1st power electrode, 33 ... Recess, 33a ... Bottom surface, 33b ... Through-hole, 40 ... 2nd electrode plate, 41a ... 2nd power electrode, 50 ... Insulating substrate, 51b ... Lead-out part, 52 ... Opening 53, control electrode, 55 ... external connection terminal, 61a ... first spacer, 61b ... second spacer, 61c ... third spacer, 71 ... first conductive member, 72 ... second conductive member, 81a ... first Projection, 81b ... second projection, 82a ... first retractor, 82b ... second retractor

Claims (7)

A semiconductor element having a first power terminal and a control terminal formed in a plate shape and provided on the main surface, and a second power terminal provided on the back surface facing the main surface;
A first electrode plate having a first power electrode provided facing the main surface of the semiconductor element, protruding toward the main surface of the semiconductor element and joined to the first power terminal;
A second electrode plate provided opposite to the back surface of the semiconductor element and having a second power electrode joined to the second power terminal;
An insulating substrate provided between the semiconductor element and the first electrode plate, having an opening through which the first power electrode passes, and having a control electrode joined to the control terminal;
With
The first power electrode is formed so as to surround a periphery of the control electrode in a planar direction.   The semiconductor package according to claim 1, wherein the first power electrode has a recess for accommodating the control electrode.   The semiconductor package according to claim 2, wherein the recess has a through hole formed in a bottom surface thereof. A semiconductor element having a first power terminal and a control terminal formed in a plate shape and provided on the main surface, and a second power terminal provided on the back surface facing the main surface;
A first electrode plate having a first power electrode provided facing the main surface of the semiconductor element, protruding toward the main surface of the semiconductor element and joined to the first power terminal;
A second power electrode provided opposite to the back surface of the semiconductor element and joined to the second power terminal; a first protrusion formed to protrude in one direction in a planar direction; and the first protrusion A second electrode plate having a first lead-in portion formed in a shape fitted to the first protrusion and provided at a position opposite to the first projection,
A control electrode provided between the semiconductor element and the first electrode plate and having an opening through which the first power electrode passes, and on the same straight line as the first protrusion, the control electrode joined to the control terminal A second projecting portion that is positioned and formed in the same shape as the first projecting portion, and a second lead-in portion that is provided at a position facing the second projecting portion and is formed in a shape that fits with the second projecting portion. Having an insulating substrate;
A first spacer that is provided between the first protrusion and the second protrusion, and that maintains a constant distance between the second electrode plate and the insulating substrate;
The second electrode plate is provided between the second electrode plate and the insulating substrate so as to sandwich the first lead-in portion of the second electrode plate, and the separation distance between the second electrode plate and the insulating substrate is constant. A second spacer and a third spacer to hold;
A semiconductor package comprising:   5. The semiconductor package according to claim 4, wherein the first spacer, the second spacer, and the third spacer are elements for surface mounting formed in a prism shape. The insulating substrate is
A lead-out portion protruding outward from each outer peripheral edge of the semiconductor element, the first electrode plate, and the second electrode plate;
An external connection terminal connected to the control terminal and provided on the drawer portion;
The semiconductor package according to claim 1, further comprising: A plurality of semiconductor packages according to any one of claims 1 to 6;
A first conductive member and a second conductive member respectively provided to sandwich the plurality of semiconductor packages;
A semiconductor module comprising:

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