JP2007300055A - Package structure of surface-mounting module - Google Patents

Package structure of surface-mounting module Download PDF

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Publication number
JP2007300055A
JP2007300055A JP2006302312A JP2006302312A JP2007300055A JP 2007300055 A JP2007300055 A JP 2007300055A JP 2006302312 A JP2006302312 A JP 2006302312A JP 2006302312 A JP2006302312 A JP 2006302312A JP 2007300055 A JP2007300055 A JP 2007300055A
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region
fold line
holder
cover
cover region
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Chin-Chia Hsu
晉嘉・許
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Everlight Electronics Co Ltd
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Everlight Electronics Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48135Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate

Abstract

<P>PROBLEM TO BE SOLVED: To reduce the cost of a surface-mounting module, and simplify its manufacturing process. <P>SOLUTION: An integrated circuit 210 and an optical semiconductor chip 209 are mounted on the circuit pattern 208 of a holder 200. This holder is provided with: a functional region 201 having the circuit pattern and a plurality of open parts 205, a first cover region 202, and a second cover region 203. Moreover, the functional region and the first cover region are partitioned by a first fold line 206. The first cover region and the second cover region are partitioned by a second fold line 207. Then, a sealing resin is pressure-molded in the functional region to seal the optical semiconductor chip and the integrated circuit as one resin body. Finally, this holder is folded at the first fold line and the second fold line; and thereby this resin body is covered with the functional region, the first cover region, and the second cover region. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

本発明は表面実装モジュールのパッケージ構造に関し、特に赤外線受光モジュールのパッケージ構造に関する。   The present invention relates to a package structure of a surface mount module, and more particularly to a package structure of an infrared light receiving module.

電子産業の日進月歩の発展に伴い、さまざまな電子製品に赤外線受光モジュールが普遍的に応用されるようになってきているが、電子製品のサイズは絶えず小型化されていることから(例えば、MP3プレイヤー、PDAなど)、これら電子製品に内蔵される赤外線受光モジュールも相対的に小さく製造することが求められている。そのため、表面実装型(Surface Mounting Device,SMD)の赤外線受光モジュールが小型化されている。図1に示すのは、従来技術における表面実装型赤外線受光モジュールの構造の概略図である。この表面実装型赤外線受光モジュール100は光半導体チップ106および信号処理素子108をダイボンド(Die Bond)、ワイヤボンド(Wire Bond)によりプリント回路基板102に実装する。次に加圧成形を行い、光半導体チップ106および信号処理素子108を樹脂110で封止する。最後に、金属製アウタカバー112を取り付けて、外部光源(上方または側面からの)および電磁波の干渉を遮断する。   With the progress of the electronics industry, infrared light receiving modules have been universally applied to various electronic products. However, the size of electronic products is constantly being reduced (for example, MP3 players). , PDA, etc.), and infrared receiving modules built into these electronic products are also required to be relatively small. Therefore, the surface mounting type (Surface Mounting Device, SMD) infrared light receiving module is miniaturized. FIG. 1 is a schematic view of the structure of a surface-mount type infrared light receiving module in the prior art. In the surface-mounted infrared light receiving module 100, an optical semiconductor chip 106 and a signal processing element 108 are mounted on a printed circuit board 102 by die bonding or wire bonding. Next, pressure molding is performed, and the optical semiconductor chip 106 and the signal processing element 108 are sealed with a resin 110. Finally, a metal outer cover 112 is attached to block interference from external light sources (from above or from the side) and electromagnetic waves.

したがって、上記工程により行われる製造工程は、モジュールの組立には本体と鉄製ハウジングの結合方式が必要となり、必要とするコストが嵩む。よって、コストを節減しつつ製造工程を簡素化する方法が切望されていた。   Therefore, the manufacturing process performed by the above process requires a coupling method of the main body and the iron housing for assembling the module, and the necessary cost increases. Therefore, a method for simplifying the manufacturing process while reducing cost has been desired.

よって、本発明の目的は、ホルダと樹脂本体とを備えた表面実装モジュールのパッケージ構造を提供するものである。このホルダは、機能領域と、第1のカバー領域と、第2のカバー領域とを備えている。機能領域は回路パターン部と複数の開放部とを有しており、そして機能領域と第1のカバー領域とは第1の折り線で仕切られ、かつ第1のカバー領域と第2のカバー領域とは第2の折り線で仕切られている。ホルダが第1の折り線および第2の折り線にて折り畳まれた際に、機能領域、第1のカバー領域および第2のカバー領域が、集積回路および光半導体チップを回路パターン部上に実装するための収容空間を形成する。樹脂本体は、この収容空間に充されるとともに、集積回路および光半導体チップをその中に封止する。   Accordingly, an object of the present invention is to provide a package structure of a surface mount module provided with a holder and a resin main body. The holder includes a functional area, a first cover area, and a second cover area. The functional region has a circuit pattern portion and a plurality of open portions, and the functional region and the first cover region are partitioned by a first fold line, and the first cover region and the second cover region Is partitioned by a second fold line. When the holder is folded at the first fold line and the second fold line, the functional area, the first cover area, and the second cover area mount the integrated circuit and the optical semiconductor chip on the circuit pattern portion. An accommodation space is formed. The resin body fills this accommodation space and seals the integrated circuit and the optical semiconductor chip therein.

本発明の他の目的は、ホルダと、集積回路と、光半導体チップと、樹脂本体とを備えた赤外線受光モジュールを提供するものである。このうち、このホルダは、機能領域と、第1のカバー領域と、第2のカバー領域とを備えている。機能領域は回路パターン部と複数の開放部とを有しており、そして集積回路および光半導体チップは回路パターン部上に取り付けられ、かつ機能領域と第1のカバー領域とは第1の折り線で仕切られ、かつ第1のカバー領域と第2のカバー領域とは第2の折り線で仕切られている。ホルダが第1の折り線および第2の折り線にて折り畳まれた際に、機能領域、第1のカバー領域および第2のカバー領域が収容空間を形成する。そして、第1の折り線および第2の折り線にてこのホルダを折り曲げることで、機能領域、第1のカバー領域および第2のカバー領域で、樹脂本体が充たされたこの収容空間を覆う。   Another object of the present invention is to provide an infrared light receiving module including a holder, an integrated circuit, an optical semiconductor chip, and a resin body. Of these, the holder includes a functional area, a first cover area, and a second cover area. The functional region has a circuit pattern portion and a plurality of open portions, and the integrated circuit and the optical semiconductor chip are mounted on the circuit pattern portion, and the functional region and the first cover region are the first folding line. And the first cover area and the second cover area are separated by a second fold line. When the holder is folded at the first fold line and the second fold line, the functional area, the first cover area, and the second cover area form an accommodation space. Then, by folding the holder at the first fold line and the second fold line, the functional area, the first cover area, and the second cover area cover the accommodation space filled with the resin main body. .

また、集積回路および光半導体チップのいずれもが、収容空間内に配設され、回路パターン部上に実装される。そして樹脂本体が収容空間内に充されるとともに、集積回路および光半導体チップを封止する。   In addition, both the integrated circuit and the optical semiconductor chip are disposed in the accommodation space and mounted on the circuit pattern portion. The resin body is filled in the accommodation space, and the integrated circuit and the optical semiconductor chip are sealed.

本発明の更に他の目的は、表面実装モジュールのパッケージ方法を提供するものであり、その工程には下記の工程を含む。まず、ホルダに集積回路および光半導体チップを実装する。このホルダは、回路パターン部と複数の開放部とを有する機能領域と、第1のカバー領域と、第2のカバー領域とを備える。また、機能領域と第1のカバー領域とは第1の折り線で仕切られ、第1のカバー領域と第2のカバー領域とは第2の折り線で仕切られている。   Still another object of the present invention is to provide a surface mounting module packaging method, which includes the following steps. First, an integrated circuit and an optical semiconductor chip are mounted on the holder. The holder includes a functional region having a circuit pattern portion and a plurality of open portions, a first cover region, and a second cover region. Further, the functional area and the first cover area are partitioned by a first fold line, and the first cover area and the second cover area are partitioned by a second fold line.

本発明では、ホルダ上の機能領域が回路パターン部を有して、光半導体チップおよび電子部品などを実装しているので、プリント回路基板を必要とすることなく、コストを削減することができる。また、金型の型開きで回路パターン部を製作するときに、回路パターン部にコンタクトピンを設計できるので、一回の型開きのみで製造工程を簡素化する目的を達成することができる。   In the present invention, since the functional region on the holder has a circuit pattern portion and an optical semiconductor chip and an electronic component are mounted, the cost can be reduced without requiring a printed circuit board. Further, when the circuit pattern portion is manufactured by opening the mold, the contact pin can be designed in the circuit pattern portion. Therefore, the object of simplifying the manufacturing process can be achieved by only one opening of the mold.

図2、図3および図6を同時に参照されたい。それぞれ本発明に係る好ましい一実施例における表面実装モジュールのパッケージ構造の平面図、背面図(図2の奥側から見た側面の図)および展開図を示す。   Please refer to FIGS. 2, 3 and 6 simultaneously. A plan view, a rear view (a side view seen from the back side in FIG. 2), and a development view of a package structure of a surface mount module according to a preferred embodiment of the present invention are shown.

表面実装モジュールのパッケージ構造(赤外線受光モジュールでもよい)において、ホルダ200は機能領域201(最下層)と、第1のカバー領域202(手前側の側面)と、第2のカバー領域203(最上層)とを備える。なお、図2において、機能領域201は第2のカバー領域203の下方に存在するため、本来は破線で図示すべきであるが、分かり易いように実線で図示されている。そして機能領域201は回路パターン部208と複数の開放部(オープニング)205とを有しており、そしてこの回路パターン部208にはコンタクトピン211が更に設けられている。機能領域201と第1のカバー領域202とは第1の折り線206で仕切られ、第1のカバー領域202と第2のカバー領域203とは第2の折り線207で仕切られている。   In the surface mount module package structure (which may be an infrared light receiving module), the holder 200 includes a functional area 201 (lowermost layer), a first cover area 202 (front side surface), and a second cover area 203 (uppermost layer). ). In FIG. 2, since the functional area 201 exists below the second cover area 203, it should be illustrated with a broken line, but is illustrated with a solid line for easy understanding. The functional area 201 has a circuit pattern portion 208 and a plurality of open portions (openings) 205, and the circuit pattern portion 208 is further provided with contact pins 211. The functional area 201 and the first cover area 202 are partitioned by a first fold line 206, and the first cover area 202 and the second cover area 203 are partitioned by a second fold line 207.

ホルダ200が第1の折り線206および第2の折り線207にて折り畳まれるとき、機能領域201、第1のカバー領域202および第2のカバー領域203が、集積回路(図示せず)および光半導体チップ(図示せず)を回路パターン部208上に実装するための収容空間300(図3に示すとおり)を形成する。この収容空間300中に、集積回路および光半導体チップを封止すべく樹脂が充たされて、樹脂本体301が形成される。   When the holder 200 is folded at the first fold line 206 and the second fold line 207, the functional area 201, the first cover area 202, and the second cover area 203 are integrated into an integrated circuit (not shown) and light. An accommodation space 300 (as shown in FIG. 3) for mounting a semiconductor chip (not shown) on the circuit pattern portion 208 is formed. The housing space 300 is filled with resin so as to seal the integrated circuit and the optical semiconductor chip, and the resin main body 301 is formed.

図4に示すものは、この表面実装モジュールのパッケージ方法の工程フローチャートである。全体の流れについては、図5ないし図7を用いて、表面実装モジュールのパッケージ方法の各段階を示す。図5ないし図7は順に本発明に係る好ましい一実施例の異なる段階における表面実装モジュールのパッケージ構造の概略図を示す。   FIG. 4 is a process flowchart of the surface mounting module packaging method. About the whole flow, each step of the surface mounting module packaging method will be described with reference to FIGS. 5 to 7 show schematic views of the package structure of the surface mount module at different stages of a preferred embodiment according to the present invention.

図5に示すように、これは複数のホルダが直列接続されているもののうちの一つのホルダ200であり、このホルダ200の上下両側は各々接続部204でその他のホルダと直列接続されている。このホルダ200は機能領域201と、第1のカバー領域202と、第2のカバー領域203とを備える。機能領域201は回路パターン部208と複数の開放部205とを有している。そして機能領域201と第1のカバー領域202とは第1の折り線206で仕切られ、第1のカバー領域202と第2のカバー領域203とは第2の折り線207で仕切られている。   As shown in FIG. 5, this is one holder 200 among a plurality of holders connected in series, and the upper and lower sides of the holder 200 are connected in series with other holders at connecting portions 204. The holder 200 includes a functional area 201, a first cover area 202, and a second cover area 203. The functional area 201 has a circuit pattern portion 208 and a plurality of open portions 205. The functional area 201 and the first cover area 202 are partitioned by a first fold line 206, and the first cover area 202 and the second cover area 203 are partitioned by a second fold line 207.

上下両側が各々接続部204で接続されたホルダを準備した後、次に、図4、図5および図6を同時に参照されたい。図6に示すように、ダイボンドまたはワイヤボンド法により集積回路210および光半導体チップ209を回路パターン部208上に実装する(工程401)。そして、光半導体チップ209および集積回路210を封止するために、樹脂を機能領域201上に加圧成形して樹脂本体301とする(工程403)。その後、図5における接続部204を切断して、図6におけるユニットごとのホルダ200を作製し、そして機能領域201の回路パターン部208はコンタクトピン211を有することになる。   After preparing the holder in which the upper and lower sides are respectively connected by the connecting portion 204, refer to FIGS. 4, 5 and 6 simultaneously. As shown in FIG. 6, the integrated circuit 210 and the optical semiconductor chip 209 are mounted on the circuit pattern portion 208 by a die bond or wire bond method (step 401). Then, in order to seal the optical semiconductor chip 209 and the integrated circuit 210, a resin is pressure-molded on the functional region 201 to form a resin body 301 (step 403). Thereafter, the connection portion 204 in FIG. 5 is cut to produce the holder 200 for each unit in FIG. 6, and the circuit pattern portion 208 in the functional region 201 has the contact pins 211.

更に、ホルダ200が第1の折り線206および第2の折り線207にて折り畳まれるとき、機能領域201、第1のカバー領域202および第2のカバー領域203で樹脂本体301を覆う(工程405)。その封止後の表面実装モジュールの平面図は図7に示し、側面図は図8に示すとおりである。   Further, when the holder 200 is folded at the first fold line 206 and the second fold line 207, the resin main body 301 is covered with the functional area 201, the first cover area 202, and the second cover area 203 (step 405). ). A plan view of the surface-mounted module after the sealing is shown in FIG. 7, and a side view thereof is as shown in FIG.

また、もし表面実装モジュール底部にある樹脂体の厚みが薄い場合に、表面実装モジュールのコンタクトピンとその他電子素子とを組付けるときには、電子素子を直接接合させることができる。これにより、製造工程の過程を簡素化できるだけでなく、表面実装モジュールとその他電子素子との組付けにおける多様性が広がる。   Also, if the resin body at the bottom of the surface mount module is thin, when assembling the contact pins of the surface mount module and other electronic elements, the electronic elements can be directly joined. This not only simplifies the process of the manufacturing process, but also expands the diversity in assembling the surface mount module and other electronic elements.

以上から分かるように、金属ホルダの封止方式により、これまでのPCBおよび外部金属ケース材料に代えて実施することができ、コストを大幅に削減することが可能となる。   As can be seen from the above, the metal holder sealing method can be carried out in place of the conventional PCB and external metal case material, and the cost can be greatly reduced.

確かに本発明では好ましい一実施例を上記のように開示したが、これは本発明を限定するためのものではなく、当業者であれば、本発明の主旨および範囲を逸脱することなく、各種の変更および修正を行うことができるので、本発明の保護範囲は別紙の特許請求の範囲による限定を基準と見なす。   Certainly, the preferred embodiment of the present invention has been disclosed as described above. However, this is not intended to limit the present invention, and those skilled in the art will recognize various embodiments without departing from the spirit and scope of the present invention. Accordingly, the scope of protection of the present invention shall be regarded as limited by the scope of the appended claims.

本発明の上記およびその他目的、特徴、長所および実施例をより明確に理解できるよう、添付の図面の詳細な説明を下記のとおり行う。
従来技術のうちのある表面実装型赤外線受光モジュールの構造を示す概略図である。 本発明に係る好ましい一実施例における表面実装モジュールのパッケージ構造を示す透視図である。 本発明に係る好ましい一実施例における表面実装モジュールのパッケージ構造を示す背面図である。 本発明に係る好ましい一実施例における表面実装モジュールのパッケージ方法を示す工程のフローチャートである。 図6とともに、順に本発明に係る実施例の異なる段階における表面実装モジュールのパッケージ構造を示す概略図である。 図5とともに順に本発明に係る実施例の異なる段階における表面実装モジュールのパッケージ構造を示す概略図である。 本発明に係る好ましい一実施例における表面実装モジュールのパッケージ構造を示す平面図である。 本発明に係る好ましい一実施例における表面実装モジュールのパッケージ構造を示す側面図である。
In order that the above and other objects, features, advantages and embodiments of the present invention may be more clearly understood, the following detailed description of the accompanying drawings is presented as follows.
It is the schematic which shows the structure of a certain surface mount type infrared rays light receiving module among prior arts. 1 is a perspective view showing a package structure of a surface mount module in a preferred embodiment according to the present invention. It is a rear view which shows the package structure of the surface mount module in preferable one Example which concerns on this invention. 4 is a flowchart of a process showing a surface mounting module packaging method in a preferred embodiment according to the present invention. It is the schematic which shows the package structure of the surface mount module in the different stage of the Example which concerns on this invention in order with FIG. It is the schematic which shows the package structure of the surface mount module in the different step of the Example which concerns on this invention in order with FIG. It is a top view which shows the package structure of the surface mount module in one preferable Example which concerns on this invention. It is a side view which shows the package structure of the surface mount module in preferable one Example which concerns on this invention.

符号の説明Explanation of symbols

100 赤外線受光モジュール、102 プリント回路基板、106 光半導体チップ、108 信号処理素子、110 樹脂、112 金属製アウタカバー、200 ホルダ、201 機能領域、202 第1のカバー領域、203 第2のカバー領域、204 接続部、205 開放部、206 第1の折り線、207 第2の折り線、208 回路パターン部、209 光半導体チップ、210 集積回路、211 コンタクトピン、300 収容空間、301 樹脂本体、401、403、405 工程 100 Infrared light receiving module, 102 printed circuit board, 106 optical semiconductor chip, 108 signal processing element, 110 resin, 112 metal outer cover, 200 holder, 201 functional area, 202 first cover area, 203 second cover area, 204 Connection part, 205 Open part, 206 First fold line, 207 Second fold line, 208 Circuit pattern part, 209 Optical semiconductor chip, 210 Integrated circuit, 211 Contact pin, 300 Housing space, 301 Resin body, 401, 403 405 process

Claims (4)

表面実装モジュールのパッケージ構造であって、
機能領域と、第1のカバー領域と、第2のカバー領域とを備えたホルダであり、前記機能領域は回路パターン部と複数の開放部とを有しており、かつ前記機能領域と前記第1のカバー領域とは第1の折り線で仕切られ、前記第1のカバー領域と前記第2のカバー領域とは第2の折り線で仕切られており、前記ホルダが前記第1の折り線および前記第2の折り線にて折り畳まれた際に、前記機能領域、前記第1のカバー領域および前記第2のカバー領域が、集積回路および光半導体チップを前記回路パターン部上に実装するための収容空間を形成するホルダと、
前記収容空間内に充されるとともに、前記集積回路および前記光半導体チップを封止する樹脂本体と、を備えたことを特徴とする、表面実装モジュールのパッケージ構造。
A surface mount module package structure,
A holder having a functional region, a first cover region, and a second cover region, the functional region having a circuit pattern portion and a plurality of open portions, and the functional region and the first cover region The first cover region is partitioned by a first fold line, the first cover region and the second cover region are partitioned by a second fold line, and the holder is the first fold line. And the functional region, the first cover region, and the second cover region for mounting the integrated circuit and the optical semiconductor chip on the circuit pattern portion when folded along the second fold line. A holder that forms a housing space of
A package structure of a surface mount module, comprising: a resin body that fills the housing space and seals the integrated circuit and the optical semiconductor chip.
前記ホルダは金属材質の板であることを特徴とする、請求項1に記載の表面実装モジュールのパッケージ構造。   2. The package structure of a surface mount module according to claim 1, wherein the holder is a metal plate. 前記回路パターン部は複数のコンタクトピンを備えていることを特徴とする、請求項1に記載の表面実装モジュールのパッケージ構造。   2. The surface mount module package structure according to claim 1, wherein the circuit pattern portion includes a plurality of contact pins. 前記光半導体チップおよび前記集積回路はダイボンドまたはワイヤボンドにより前記回路パターン部上に実装されていることを特徴とする、請求項1に記載の表面実装モジュールのパッケージ構造。   2. The surface mount module package structure according to claim 1, wherein the optical semiconductor chip and the integrated circuit are mounted on the circuit pattern portion by die bonding or wire bonding.
JP2006302312A 2006-05-02 2006-11-08 Package structure of surface-mounting module Pending JP2007300055A (en)

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Citations (7)

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JPH02133038U (en) * 1989-04-12 1990-11-05
JPH07288332A (en) * 1994-02-25 1995-10-31 Fujitsu Ltd Light element assembly and manufacture thereof
JPH1074962A (en) * 1996-08-30 1998-03-17 Sharp Corp Infrared remote control light-receiving unit and its manufacture
JP2002231973A (en) * 2001-01-18 2002-08-16 Vishay Semiconductor Gmbh Photoelectric element with electrically conductive strip structure
JP2002359379A (en) * 1991-03-07 2002-12-13 Sanyo Electric Co Ltd Photodetection module
JP2004319940A (en) * 2003-02-27 2004-11-11 Sanyo Electric Co Ltd Lead frame and receiving module equipped with it
JP2006173393A (en) * 2004-12-16 2006-06-29 Sharp Corp Semiconductor device for optical communication

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02133038U (en) * 1989-04-12 1990-11-05
JP2002359379A (en) * 1991-03-07 2002-12-13 Sanyo Electric Co Ltd Photodetection module
JPH07288332A (en) * 1994-02-25 1995-10-31 Fujitsu Ltd Light element assembly and manufacture thereof
JPH1074962A (en) * 1996-08-30 1998-03-17 Sharp Corp Infrared remote control light-receiving unit and its manufacture
JP2002231973A (en) * 2001-01-18 2002-08-16 Vishay Semiconductor Gmbh Photoelectric element with electrically conductive strip structure
JP2004319940A (en) * 2003-02-27 2004-11-11 Sanyo Electric Co Ltd Lead frame and receiving module equipped with it
JP2006173393A (en) * 2004-12-16 2006-06-29 Sharp Corp Semiconductor device for optical communication

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