JP2007116071A - Package for electronic part - Google Patents

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Publication number
JP2007116071A
JP2007116071A JP2005333355A JP2005333355A JP2007116071A JP 2007116071 A JP2007116071 A JP 2007116071A JP 2005333355 A JP2005333355 A JP 2005333355A JP 2005333355 A JP2005333355 A JP 2005333355A JP 2007116071 A JP2007116071 A JP 2007116071A
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metal plate
recess
circuit
package
layer
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JP5062583B2 (en
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Takatsugu Komatsu
隆次 小松
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Nihon Micron Co Ltd
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Nihon Micron Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched

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  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a package for an electronic part excellent in reliability in insulation and connection at a low cost, because cavity processing is performed after parts such as semiconductor device are mounted on a circuit that is formed at the bottom of a cavity section formed on a metal plate, and lamination is performed in batch while securing high thermal conductivity and electrical characteristics in a metal substrate. <P>SOLUTION: After a recess that is to be a clearance for insulation is formed on a metal plate with etching or the like using a thick metal plate (0.2 mm to 4.0 mm), electrically insulated layers are laminated and coated on one surface or both surfaces of the metal plate. Thereafter, a single layer or a multilayered layer circuit is formed on a surface layer, and further, required portions are connected to the metal plate using a laser via or the like. After a certain time lapses, a reverse surface on which the recess of the metal plate is formed is cut and removed exceeding the bottom of the recess using a hand reeling machine or the like to form the cavity section with a part of the thick portion of the metal plate left, and the left metal portion is used as the circuit. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

産業上の利用分野Industrial application fields

本発明は、金属板をパッケージの基板に使用した電子部品用パッケージ及びその製造方法に関する。  The present invention relates to an electronic component package using a metal plate as a package substrate and a method for manufacturing the same.

金属板を基板に使用した電子部品用パッケージでは、素子の放熱のために素子実装面の逆面に放熱の為のヒートシンクを貼り付けたり、金属板を貼り付けた基板に金属板まで開口したキャビティを設けて、露出した金属板に素子を搭載し放熱を行っていた。  In a package for electronic parts that uses a metal plate as a substrate, a heat sink for heat dissipation is attached to the reverse side of the device mounting surface for heat dissipation of the device, or a cavity that opens to the metal plate on the substrate on which the metal plate is attached The element was mounted on the exposed metal plate to dissipate heat.

発明が解決しようとする課題Problems to be solved by the invention

半導体集積回路において、回路部品をチップ内に取り込み、また高速化が進んだ事により、使用電流が大きくなり、単位面積あたりの発熱量も増大した為、回路の破損を防ぐ為に、効率的な放熱を行う事が重要な課題となっている。
しかしながら、基板に回路形成を行い実装面の逆面に金属板を貼り付け実装した場合には、基板の絶縁層に熱の伝導が妨げられてしまい金属板への放熱量を確保する事が難しい。また、金属板を貼り付けた基板に金属板まで開口したキャビティを設けて、露出した金属板に素子を搭載し放熱を行う場合には、形成したキャビティの底面及び逆面は金属板を使用している為、配線の形成エリアとして使用する事が難しく、パッケージの小型化を阻害する要因となってしまう。
本発明はこのような問題点を鑑みてなされ、半導体素子等の部品を搭載するキャビティ部底面に回路が形成され、形成された回路の一部をキャビティ部周辺の残された金属板に直接接続する事により高い熱伝導性を実現し、素子搭載面に作成したキャビティ周辺は金属板である事から、十分な容積をもって熱を吸収する。また、キャビティの底面には回路が形成され、レーザー等の一般的な接続孔形成方法をもって形成されたスルーホールを通じて裏面の回路へと導通が取られ、裏面の配線から外部への接続を可能としている事から、パッケージの小型化を阻害しない事を特徴とする。In semiconductor integrated circuits, circuit components are incorporated into the chip, and the increase in speed has led to increased current consumption and increased heat generation per unit area. Dissipating heat is an important issue.
However, when a circuit is formed on the substrate and a metal plate is attached to the opposite side of the mounting surface and mounted, heat conduction is hindered by the insulating layer of the substrate, making it difficult to ensure the amount of heat released to the metal plate. . In addition, when a cavity that is open to the metal plate is provided on the substrate to which the metal plate is attached and the element is mounted on the exposed metal plate for heat dissipation, a metal plate is used for the bottom and opposite surfaces of the formed cavity. For this reason, it is difficult to use as a wiring formation area, which becomes a factor that hinders downsizing of the package.
The present invention has been made in view of such problems, and a circuit is formed on the bottom surface of the cavity portion on which components such as semiconductor elements are mounted, and a part of the formed circuit is directly connected to the remaining metal plate around the cavity portion. By doing so, high thermal conductivity is realized, and the cavity around the element mounting surface is a metal plate, so it absorbs heat with a sufficient volume. In addition, a circuit is formed on the bottom surface of the cavity, and conduction is taken to the circuit on the back surface through a through hole formed by a general method of forming a connection hole such as a laser, so that the wiring on the back surface can be connected to the outside. Therefore, it is characterized by not hindering the downsizing of the package.

課題を解決するための手段Means for solving the problem

上記の目的を達成するために、本発明のパッケージは次の構成を備える。
すなわち、厚い金属板（０．２ｍｍ〜４．０ｍｍ）を用い、この金属板にエッチング等を用いて絶縁間隔となる凹みを形成した後に、前記金属板の片面もしくは両面に電気的絶縁層を積層被着させ、その後絶縁層の表層に単層または複数層の回路を形成し、さらに必要箇所はレーザービア等を用いて前記金属板と接続させる。
しかる後に金属板の凹みを形成した逆面より、ザグリ等を用いて前記凹の底面より多く削り込み、前記金属板の一部厚さ部分を残してキャビティ部を形成し、この残された金属部分を回路として用いる事を特徴とする。In order to achieve the above object, the package of the present invention has the following configuration.
That is, a thick metal plate (0.2 mm to 4.0 mm) is used, and after forming a recess that becomes an insulation interval by etching or the like on this metal plate, an electrical insulating layer is laminated on one side or both sides of the metal plate. Then, a single-layer or multi-layer circuit is formed on the surface layer of the insulating layer, and necessary portions are connected to the metal plate using laser vias or the like.
After that, more than the bottom surface of the recess is scraped from the opposite surface where the recess of the metal plate is formed using a counterbore, etc., and a cavity portion is formed leaving a part of the thickness of the metal plate. The part is used as a circuit.

作用Action

本発明によれば、金属板の片面もしくは両面に電気的絶縁層を被着形成して成る電子部品用パッケージにおいて、電気的絶縁層には通常のプリント配線基板にて用いられる材料を用いる事が可能である。厚い金属板（０．２ｍｍ〜４．０ｍｍ）を用い、この金属板にエッチング等を用いて絶縁間隔となる凹みを形成した後に、前記金属板の片面もしくは両面に電気的絶縁層を積層被着させ、その後絶縁層の表層に単層または複数層の回路を形成し、さらに必要箇所はレーザービア等を用いて前記金属板と接続させる。
しかる後に金属板の凹みを形成した逆面より、ザグリ等を用いて前記凹の底面より多く削り込み、前記金属板の一部厚さ部分を残してキャビティ部を形成する事により、半導体素子等の部品を搭載するキャビティ部底面に回路が形成され、一部の回路は周辺の金属板へと直接接続している。熱は回路を通じて周辺のさらに厚い金属板へ伝導し、厚い金属板の全体に伝わった熱は金属板から直接他の放熱体に熱を伝える事が可能である。また、薄い絶縁層を通して広い面積から表層回路に熱伝導させたり、必要箇所に多数のレーザービアを設けて表層回路に熱を伝導し、そこから他の放熱体に熱を伝える事も可能である。本発明では素子のダイボンド箇所からでなく、金属板や表層回路の広い面積からビアや絶縁層を通して熱伝導する事が出来、金属板の有する高い熱伝導性、電気特性を確保する事が可能である。また、一括の積層を行った後にキャビティ加工を行う事から絶縁の信頼性および接続の信頼性に優れている。また、本発明をＬＥＤや光センサー等に使用する場合には、キャビティ部側面を斜めに加工し反射板の作用を持たすことも可能である事から、組み立て時に反射板を取り付ける工数を減らすことが可能な電子部品用パッケージを、低コストにて提供することを可能とする。According to the present invention, in an electronic component package formed by depositing an electrical insulating layer on one side or both sides of a metal plate, the electrical insulating layer may be made of a material used in a normal printed wiring board. Is possible. A thick metal plate (0.2 mm to 4.0 mm) is used, and after forming a recess that becomes an insulation interval by etching or the like on this metal plate, an electrical insulating layer is laminated on one or both sides of the metal plate. Then, a single layer or a plurality of layers of circuits are formed on the surface layer of the insulating layer, and further necessary portions are connected to the metal plate using laser vias or the like.
After that, by shaving more than the bottom surface of the recess using a counterbore or the like from the reverse surface where the recess of the metal plate is formed, and forming a cavity portion leaving a part of the thickness of the metal plate, a semiconductor element or the like A circuit is formed on the bottom surface of the cavity where the parts are mounted, and a part of the circuit is directly connected to a peripheral metal plate. Heat is conducted through the circuit to the surrounding thicker metal plate, and the heat transmitted to the entire thick metal plate can be directly transferred from the metal plate to another heat radiating body. It is also possible to conduct heat from a large area to the surface layer circuit through a thin insulating layer, or to provide heat to the surface layer circuit by providing a number of laser vias where necessary, and to transfer heat from there to other radiators . In the present invention, it is possible to conduct heat through a via or an insulating layer from a large area of a metal plate or surface layer circuit, not from a die-bonding portion of the element, and it is possible to ensure high thermal conductivity and electrical characteristics of the metal plate. is there. In addition, since the cavity processing is performed after batch stacking, the insulation reliability and the connection reliability are excellent. In addition, when the present invention is used for an LED, an optical sensor, or the like, it is possible to process the cavity side surface obliquely and have the function of a reflector, thereby reducing the number of steps for attaching the reflector during assembly. It is possible to provide a package for possible electronic components at a low cost.

以下、本発明の好適な実施例について説明する。
図１は、本発明に係る金属板の片面にのみ配線パターンを形成した電子部品用パッケージの実施例上面よりの状態を示した説明図である。素子１０は金属板と直接繋がっている配線にダイボンドされ、熱は金属板へ伝導される。さらに厚い金属板の全体に伝わった熱は、金属板から直接他の放熱体に熱を伝える事が可能である。また、薄い絶縁層を通して広い面積から表層回路に熱伝導させたり、必要箇所に多数のレーザービアを設けて表層回路に熱を伝導し、そこから他の放熱体に熱を伝える事も可能である。
図２は、図１のＡ−Ａ’部分の断面を示す説明図である。キャビティ内の独立した配線はブラインドビア２５によって素子搭載面の逆面に引き出されている。
図３は、図１のＢ−Ｂ’部分の断面を示す説明図である。本説明図では金属板のした面にブラインドビアを多数形成し、素子搭載面の逆面にも熱を伝導することを可能にしている。スルーホールはレーザービア以外にも、導電性の樹脂によって接続をしたり、フィルドビア、金属バンプを使用する等の方法がある。本実施例ではボンディングワイヤー２０によって接続を行っているが、フリップチップ接続等の他の接続でも本発明の特徴を生かす事は可能であり、本発明をワイヤーボンディングに限定する物ではない。また、スルーホール等の構成もそれに限定するものではない。
図４からは製造工程を追って説明する。
図４はパッケージの基板として使用する金属板３０を示す。金属板はエッチング等の方法により、キャビティ底面に形成する配線の配線間隔となる部分４０を凹ませた形に形成する。金属板３０は、電気的絶縁層との密着性を向上させるため、電気的絶縁層を形成する面に化学処理等の下地処理４５を施しても良い。
図５は金属板３０に電気的絶縁層５０を被着形成した状態を示す。電気的絶縁層５０を被着形成する際には配線パターンを形成するための銅箔６０も同時に形成する。本説明図ではビルドアップ工法での絶縁層形成を便宜的に説明しているが、配線が形成されたコア材を貼り付けるなどの一般的な基板の製造方法が適用可能である。また、絶縁層に熱伝導の良いものを使用すれば、本パッケージの構成を好適に利用可能である。
図６は電気的絶縁層５０の所要の部位に接続孔７０形成のためのレーザー加工を行った状態を示している。接続孔７０形成はレーザーに限定するものではなく、ドリル穴明等の、通常の基板製造と同様の工法が使用可能である。
図７は、図６で形成した接続孔７０にスルーホールめっき８０を形成した状態を示す。
図８は所要の配線パターン９０を形成した状態を示す。銅箔６０及びスルーホールめっき８０をあわせた層をエッチングして配線パターン９０を形成した。
図９は本発明の最も特徴的な工程であり、図４で金属板に形成した凹部分４０の逆面から、凹部分４０の底面より多くを精度良くザグリ加工する事により、前記金属板の一部厚さ部分を残し、所定のパターン形状をキャビティ１００の底面に形成する事ができる。配線は独立させる事も可能であり、ザグリ周辺部に残した金属板との直接接続をする事も可能である。よって熱容量を持った金属板に直接接続された部分に素子を実装する事で高い熱伝導性を実現する。本基板をＬＥＤや光センサー等に使用する際には、ザグリを行った金属板壁面１１０を反射板として使用する事もでき、効率的に光を外に出すことが可能であり、反射板に当たる光の熱や樹脂等に光が当たる事により発生する熱も金属板に吸収させることが可能である。
図１０は、配線パターンの所要の部位に表面処理めっき１２０を施した、電子部品用パッケージの断面図である。表面処理めっき１２０は一般的な基板のめっきを適用する事が可能であり、ＬＥＤとして使用する場合には銀めっき等のより高輝度なめっきを使用する事により、光の利用効率を高めることが出来る。また、表裏に貫通する穴がめっき時に影響を及ぼす場所に開いていない場合には、表面のめっきと裏面のめっき種類を変える事が可能であり、面ごとの実装方法に合わせためっき処理を行う事が可能である。Hereinafter, preferred embodiments of the present invention will be described.
FIG. 1 is an explanatory view showing a state from the upper surface of an embodiment of an electronic component package in which a wiring pattern is formed only on one side of a metal plate according to the present invention. The element 10 is die-bonded to a wiring directly connected to the metal plate, and heat is conducted to the metal plate. Furthermore, the heat transferred to the entire thick metal plate can be transferred directly from the metal plate to another heat radiating body. It is also possible to conduct heat from a large area to the surface layer circuit through a thin insulating layer, or to provide heat to the surface layer circuit by providing a number of laser vias where necessary, and to transfer heat from there to other radiators .
FIG. 2 is an explanatory view showing a cross section of the AA ′ portion of FIG. 1. Independent wiring in the cavity is drawn out to the reverse side of the element mounting surface by the blind via 25.
FIG. 3 is an explanatory view showing a cross section of the BB ′ portion of FIG. 1. In this explanatory view, a large number of blind vias are formed on the surface of the metal plate, and heat can be conducted to the reverse side of the element mounting surface. In addition to laser vias, through-holes can be connected by a conductive resin, filled vias, and metal bumps. In this embodiment, the connection is made by the bonding wire 20, but other connection such as flip-chip connection can make use of the characteristics of the present invention, and the present invention is not limited to wire bonding. Further, the configuration of the through hole or the like is not limited thereto.
The manufacturing process will be described with reference to FIG.
FIG. 4 shows a metal plate 30 used as a substrate for the package. The metal plate is formed in a shape in which a portion 40 serving as a wiring interval of the wiring formed on the bottom surface of the cavity is recessed by a method such as etching. The metal plate 30 may be subjected to a base treatment 45 such as a chemical treatment on the surface on which the electrical insulating layer is formed in order to improve adhesion with the electrical insulating layer.
FIG. 5 shows a state in which an electrical insulating layer 50 is formed on the metal plate 30. When the electrically insulating layer 50 is deposited, a copper foil 60 for forming a wiring pattern is also formed at the same time. In this explanatory diagram, the formation of the insulating layer in the build-up method is described for convenience, but a general substrate manufacturing method such as attaching a core material on which wiring is formed can be applied. In addition, if an insulating layer having good thermal conductivity is used, the configuration of this package can be suitably used.
FIG. 6 shows a state in which laser processing for forming the connection hole 70 is performed on a required portion of the electrical insulating layer 50. The formation of the connection hole 70 is not limited to the laser, and a method similar to that for normal substrate manufacturing, such as drilling, can be used.
FIG. 7 shows a state in which through-hole plating 80 is formed in the connection hole 70 formed in FIG.
FIG. 8 shows a state in which a required wiring pattern 90 is formed. The wiring pattern 90 was formed by etching the combined layer of the copper foil 60 and the through-hole plating 80.
FIG. 9 shows the most characteristic process of the present invention. By machining a larger amount than the bottom surface of the concave portion 40 from the reverse surface of the concave portion 40 formed on the metal plate in FIG. A predetermined pattern shape can be formed on the bottom surface of the cavity 100 while leaving a part of the thickness. The wiring can be made independent and can be directly connected to the metal plate left in the counterbore periphery. Therefore, high thermal conductivity is realized by mounting an element on a portion directly connected to a metal plate having a heat capacity. When this substrate is used for an LED, an optical sensor, or the like, the countersunk metal plate wall surface 110 can be used as a reflection plate, and light can be efficiently emitted to the outside. The metal plate can also absorb the heat generated when light hits light or resin.
FIG. 10 is a cross-sectional view of an electronic component package in which a surface treatment plating 120 is applied to a required portion of a wiring pattern. The surface treatment plating 120 can be applied to general substrate plating, and when used as an LED, by using a brighter plating such as silver plating, the use efficiency of light can be increased. I can do it. Also, if the holes that penetrate through the front and back are not open in the place that affects the plating, it is possible to change the type of plating on the front side and the back side, and perform the plating process according to the mounting method for each side Things are possible.

図１１は、本発明の多層配線パターンを形成する他の実施例を示す説明図である。図１１では、凹みが形成された金属板に電気的絶縁層を被着形成し、図８にて示された配線層を形成した後に、同様の工法にて配線層を追加形成し、前記金属板に形成した凹みの底面より多くを金属板の凹みを形成した逆面より精度良く削り出し露出させる事により、半導体素子等の部品を搭載するキャビティ部底面に回路が形成されている。この様な方法で通常の基板製造方法と同様なビルドアップ工法を本基板に適用する事も可能である。また、本実施例では便宜的に２層に電気的絶縁層を介した配線を重ねているが、それに限定する物ではない。
実施例では、金属板の片面に電気的絶縁層及び配線層を単層または複数層被着形成し、片面にのみキャビティを形成した形状を示しているが、片面に限定する物ではなく、配線層を両面に形成する事も可能である。FIG. 11 is an explanatory view showing another embodiment for forming a multilayer wiring pattern of the present invention. In FIG. 11, an electrically insulating layer is deposited on a metal plate having a recess, and after the wiring layer shown in FIG. 8 is formed, a wiring layer is additionally formed by the same method, and the metal A circuit is formed on the bottom surface of the cavity portion on which a component such as a semiconductor element is mounted by accurately cutting and exposing more than the bottom surface of the recess formed on the plate than the opposite surface on which the metal plate recess is formed. In this way, it is possible to apply a build-up method similar to a normal substrate manufacturing method to the substrate. Further, in this embodiment, the wiring via the electrical insulating layer is overlapped on the two layers for convenience, but it is not limited to this.
In the examples, a single layer or multiple layers of an electrical insulating layer and a wiring layer are formed on one side of a metal plate, and a cavity is formed only on one side. However, the shape is not limited to one side. It is also possible to form layers on both sides.

発明の効果The invention's effect

本発明に係る電子部品用パッケージよれば、厚い金属板（０．２ｍｍ〜４．０ｍｍ）を用い、この金属板にエッチング等を用いて絶縁間隔となる凹みを形成した後に、前記金属板の片面もしくは両面に電気的絶縁層を積層被着させ、その後絶縁層の表層に単層または複数層の回路を形成し、さらに必要箇所はレーザービア等を用いて前記金属板と接続させる。
しかる後に金属板の凹みを形成した逆面より、ザグリ等を用いて前記凹の底面より多く削り込み、前記金属板の一部厚さ部分を残してキャビティ部を形成する事により、半導体素子等の部品を搭載するキャビティ部底面に回路が形成される。形成された回路の一部がキャビティ部周辺の残された金属板に接続している事により、金属基板の有する高い熱伝導性、電気特性を確保して、絶縁の信頼性および接続の信頼性に優れた電子部品用パッケージを、低コストにて提供することができる。
本発明が、ＬＥＤ用基板、光センサ用基板、放熱性の求められる用途の基板に広く応用することができることは勿論である。According to the electronic component package of the present invention, a thick metal plate (0.2 mm to 4.0 mm) is used, and after forming a recess that becomes an insulating interval using etching or the like on this metal plate, one side of the metal plate Alternatively, electrical insulating layers are laminated and deposited on both surfaces, and then a single-layer or multiple-layer circuit is formed on the surface layer of the insulating layer, and further necessary portions are connected to the metal plate using laser vias or the like.
After that, by shaving more than the bottom surface of the recess using a counterbore or the like from the reverse surface where the recess of the metal plate is formed, and forming a cavity portion leaving a part of the thickness of the metal plate, a semiconductor element or the like A circuit is formed on the bottom surface of the cavity where the parts are mounted. Part of the formed circuit is connected to the remaining metal plate around the cavity, ensuring high thermal conductivity and electrical characteristics of the metal substrate, and insulation reliability and connection reliability It is possible to provide a package for an electronic component that is excellent in manufacturing at low cost.
Needless to say, the present invention can be widely applied to LED substrates, optical sensor substrates, and substrates for applications requiring heat dissipation.

本発明に係る電子部品用パッケージの配線パターンの実装例を示す上面より示した説明図。Explanatory drawing shown from the upper surface which shows the example of mounting of the wiring pattern of the package for electronic components which concerns on this invention. 図１のＡ−Ａ’の断面を示した説明図。Explanatory drawing which showed the cross section of A-A 'of FIG. 図１のＢ−Ｂ’の断面を示した説明図。Explanatory drawing which showed the cross section of B-B 'of FIG. 本発明に係る電子部品用パッケージの金属板にエッチングを用い凹みを形成した例を示す断面図。Sectional drawing which shows the example which formed the dent using the etching in the metal plate of the package for electronic components which concerns on this invention. 本発明に係る電子部品用パッケージの金属板の片面に絶縁層を貼り付けた例を示す断面図。Sectional drawing which shows the example which affixed the insulating layer on the single side | surface of the metal plate of the package for electronic components which concerns on this invention. 本発明に係る電子部品用パッケージの絶縁層に接続孔を形成した例を示す断面図。Sectional drawing which shows the example which formed the connection hole in the insulating layer of the package for electronic components which concerns on this invention. 本発明に係る電子部品用パッケージの絶縁層に形成された接続孔を経由して電気的に銅通させるためのスルーホールめっきを行った例を示す断面図。Sectional drawing which shows the example which performed through-hole plating for making copper pass electrically through the connection hole formed in the insulating layer of the package for electronic components which concerns on this invention. 本発明に係る電子部品用パッケージの所要のパターンを形成した例を示す断面図。Sectional drawing which shows the example which formed the required pattern of the package for electronic components which concerns on this invention. 本発明に係る電子部品用パッケージのキャビティを形成した例を示す断面図。Sectional drawing which shows the example which formed the cavity of the package for electronic components which concerns on this invention. 本発明に係る電子部品用パッケージの表面処理めっきを行った例を示す断面図。Sectional drawing which shows the example which performed surface treatment plating of the package for electronic components which concerns on this invention. 本発明に係る電子部品用パッケージの多層配線パターンの実施例の１例を示す断面図。Sectional drawing which shows one example of the Example of the multilayer wiring pattern of the package for electronic components which concerns on this invention.

符号の説明Explanation of symbols

１０ 半導体素子等の部品
２０ ボンディングワイヤー
２５ ブラインドビア
３０ 金属板
４０ 配線間隔部
４５ 下地処理
５０ 電気的絶縁層
６０ 銅箔
７０ 接続孔
８０ スルーホールめっき
９０ 配線パターン
１００ キャビティ
１１０ 金属板壁面
１２０ 表面処理めっきDESCRIPTION OF SYMBOLS 10 Parts, such as a semiconductor element 20 Bonding wire 25 Blind via 30 Metal plate 40 Wiring space | interval part 45 Ground treatment 50 Electrical insulation layer 60 Copper foil 70 Connection hole 80 Through-hole plating 90 Wiring pattern 100 Cavity 110 Metal plate wall surface 120 Surface treatment plating

Claims (1)

厚い金属板（０．２ｍｍ〜４．０ｍｍ）を用い、この金属板にエッチング等を用いて絶縁間隔となる凹みを形成した後に、前記金属板の片面もしくは両面に電気的絶縁層を積層被着させ、その後絶縁層の表層に単層または複数層の回路を形成し、さらに必要箇所はレーザービア等を用いて前記金属板と接続させる。
しかる後に金属板の凹みを形成した逆面より、ザグリ等を用いて前記凹の底面より多く削り込み、前記金属板の一部厚さ部分を残してキャビティ部を形成し、この残された金属部分を回路として用いる事を特徴とした電子部品用パッケージ。A thick metal plate (0.2 mm to 4.0 mm) is used, and after forming a recess that becomes an insulation interval by etching or the like on this metal plate, an electrical insulating layer is laminated on one or both sides of the metal plate. Then, a single layer or a plurality of layers of circuits are formed on the surface layer of the insulating layer, and further necessary portions are connected to the metal plate using laser vias or the like.
After that, more than the bottom surface of the recess is scraped from the reverse surface where the recess of the metal plate is formed using a counterbore, etc., and a cavity portion is formed leaving a part of the thickness of the metal plate. A package for electronic components, characterized in that the part is used as a circuit.
JP2005333355A 2005-10-20 2005-10-20 Package for electronic components Expired - Fee Related JP5062583B2 (en)

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WO2009017271A2 (en) * 2007-07-31 2009-02-05 Wavenics, Inc Metal-based package substrate, three-dimensional multi-layered package module using the same, and manufacturing method thereof
JP2013106033A (en) * 2011-11-10 2013-05-30 Samsung Electro-Mechanics Co Ltd Semiconductor package and method of manufacturing the same

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KR101942971B1 (en) 2012-12-03 2019-01-28 삼성전자주식회사 Electrowetting display apparatus having low power consumption and method of driving the same

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WO1990000813A1 (en) * 1988-07-08 1990-01-25 Oki Electric Industry Co., Ltd. Semiconductor device
JP2004140160A (en) * 2002-10-17 2004-05-13 Hitachi Cable Ltd Wiring board, method for manufacturing the same and semiconductor device
JP2004172187A (en) * 2002-11-18 2004-06-17 Nec Compound Semiconductor Devices Ltd Electronic component device and its manufacturing method

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WO1990000813A1 (en) * 1988-07-08 1990-01-25 Oki Electric Industry Co., Ltd. Semiconductor device
JP2004140160A (en) * 2002-10-17 2004-05-13 Hitachi Cable Ltd Wiring board, method for manufacturing the same and semiconductor device
JP2004172187A (en) * 2002-11-18 2004-06-17 Nec Compound Semiconductor Devices Ltd Electronic component device and its manufacturing method

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2009017271A2 (en) * 2007-07-31 2009-02-05 Wavenics, Inc Metal-based package substrate, three-dimensional multi-layered package module using the same, and manufacturing method thereof
WO2009017271A3 (en) * 2007-07-31 2009-09-24 Wavenics, Inc Metal-based package substrate, three-dimensional multi-layered package module using the same, and manufacturing method thereof
JP2013106033A (en) * 2011-11-10 2013-05-30 Samsung Electro-Mechanics Co Ltd Semiconductor package and method of manufacturing the same

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