JP2007115840A - Wiring board and manufacturing method thereof - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a wiring board and a method of manufacturing the wiring board wherein, in a board formed by covering a cloth with a resin made of a resin material, an insulating reliability of an adjacent hole is excellent. <P>SOLUTION: An inner peripheral face 9 of a via hole 10 formed in a wiring board 1 is covered with an inner insulating layer 8 made of an insulating sealer. When the via hole 10 is formed on the wiring board 1 thereby, due to a residual stress of an interface between a fiber 4 of the cloth and an insulating layer 2, the interface is separated and an opening gap 7 is formed. Even if it is formed, the opening gap 7 can be covered with the inner insulating layer 8, and a via hole conductor 6 adhered to the inner insulating layer 8 can be prevented from being conducted unintentionally through the opening gap 7. Even when the via hole 10 is formed at an adjacent portion, insulating properties of the adjacent via holes can be ensured. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a wiring board in which an insulating layer is made of a composite material of a resin portion and a woven fabric, and a bi-conductor is formed on the insulating layer, and a method for manufacturing the same.

  The multilayer wiring board is configured by laminating a plurality of wiring boards. Each wiring board forms a via hole, which is a through hole penetrating in the thickness direction, on a board in which a copper foil is formed on both sides of an insulating board made of a composite material of a glass woven fabric and a thermosetting resin, and a copper hole is formed in the via hole. Is plated to form a via-hole conductor. By laminating the wiring board on which the via-hole conductor is formed, it can be electrically connected to the adjacent wiring board via the via-hole conductor. Such a multilayer wiring board is used, for example, in a package that houses a semiconductor element.

  As the processing speed of semiconductor elements increases, it is required to lower the dielectric constant of the insulating material that constitutes the semiconductor elements. Since a low dielectric constant material has a high propagation speed of an electric signal, signal delay in the semiconductor element is reduced, and the processing speed of the semiconductor element can be increased. Such a low dielectric constant material is difficult to reduce the dielectric constant due to the molecular structure of a resin that is normally used, but there is a technology that contains bubbles in the material in order to lower the dielectric constant of the material. . The dielectric constant of the insulating material decreases due to the inclusion of bubbles, but the strength of the wiring board made of the insulating material decreases to one third or less due to the bubbles. When the strength of the wiring board made of the insulating material is lowered as described above, there is a problem that the semiconductor element is damaged due to a difference in thermal expansion coefficient between the wiring board and the semiconductor element.

  Further, while the number of I / O (input / output) of the semiconductor element increases, the semiconductor element itself has been miniaturized due to the increase in the density of the semiconductor element. With the miniaturization of the semiconductor element, the semiconductor element and wiring board The bumps that connect the two are miniaturized. When the bump becomes small, the connection strength of the electrode by the bump decreases, and there is a problem that the bump is broken even by a slight stress. The cause of the stress that destroys the bumps is due to a mismatch in the thermal expansion coefficient between the semiconductor element and the wiring board. Therefore, the wiring board is required to have a thermal expansion coefficient equivalent to that of the semiconductor element.

  A wiring board on which a semiconductor element is mounted is conventionally 17 ppm / ° C. equivalent to copper. Due to the above situation, it is necessary to reduce the mismatch of the thermal expansion coefficient between the semiconductor element and the wiring board. Accordingly, attempts have been made to reduce the thermal expansion coefficient of the wiring board to the same level as that of the semiconductor element, and use a resin fiber having a thermal expansion coefficient of 0 or minus and a high Young's modulus and a thermosetting resin. By using an insulating material for a wiring board, a wiring board having a thermal expansion coefficient close to that of a semiconductor element has been proposed (see, for example, Patent Document 1 and Patent Document 2).

Japanese Examined Patent Publication No. 2-59637 Japanese Patent Laid-Open No. 5-254048

  In the above-described conventional technology, a wiring board is manufactured using a resin fiber having a coefficient of thermal expansion of 0 or minus and a high Young's modulus, but at the interface between the resin fiber and the insulating resin covering the resin fiber, Residual stress is generated due to mismatch in thermal expansion coefficient between the resin fiber and the insulating resin. Since resin fibers are difficult to produce thin fibers such as glass fibers, the contact area between the insulating resin and the resin fibers is reduced. Therefore, the residual stress is further increased.

  As described above, in a substrate in which a resin fiber and an insulating resin are combined, high stress remains essentially at the interface between the fiber surface and the insulating resin. The resin fiber and the insulating resin may be peeled off at the inner peripheral surface portion. The hole portion is plated on the inner peripheral surface portion to form a via-hole conductor, but when peeling occurs in this hole portion, the plating solution infiltrate into the peeling portion, and copper is deposited on that portion, There is a problem that the insulation between adjacent via-hole conductors is significantly reduced.

  Accordingly, an object of the present invention is to provide a wiring board excellent in insulation reliability of adjacent holes and a method of manufacturing the wiring board in a board formed by covering a cloth with a resin part made of a resin material. .

The present invention provides a wiring board provided with a wiring conductor on a board formed by covering a cloth with a resin portion made of a resin material.
The substrate on which the hole is formed;
An insulating layer made of an insulating sealing material covering at least the cloth vicinity of the inner peripheral surface portion of the hole portion;
A wiring board having an inner conductor that is attached to the insulating layer and electrically and mechanically connected to the wiring conductor.

  In the invention, it is preferable that the insulating sealing material is made of a resin similar to the resin material of the resin portion.

  Furthermore, the invention is characterized in that the cloth is made of polybenzoxazole, wholly aromatic polyamide or wholly aromatic polyester.

Furthermore, the present invention provides a hole forming step of forming a hole in a substrate formed by coating a cloth with a resin material;
A base layer forming step of forming a base layer by applying a liquid sealing material to the inner peripheral surface portion of the hole formed in the hole forming step;
An insulating layer forming step of drying the underlayer formed in the underlayer forming step to form an insulating layer;
After the said insulating layer formation process, it is the manufacturing method of the wiring board characterized by including the internal conductor layer deposition process which adheres the internal conductor layer which has electroconductivity to the said insulating layer.

  Furthermore, the present invention is characterized in that the liquid sealing material has a contact angle with respect to the cloth of 0 degree or more and 45 degrees or less.

  Furthermore, the present invention is characterized in that the liquid sealing material has a viscosity of 1 Poise or more and 50 Poise or less.

  Further, in the present invention, the liquid sealing material includes a bisphenol A type epoxy resin, a bisphenol F type epoxy resin, an alicyclic epoxy resin, an amine type epoxy resin, and a liquid epoxy resin containing glycidyl esterified epoxy resin, and triallyl It is at least one selected from the group of isocyanurate resins.

  Furthermore, the invention is characterized in that the liquid sealing material contains a silane coupling agent.

Furthermore, in the present invention, the underlayer forming step includes
An application step of applying a liquid sealing material to the inner peripheral surface of the hole;
And a pressure adjusting step of adjusting the pressure of the space in which the wiring board is disposed.

  Furthermore, the present invention is characterized in that the pressure adjusting step includes a step of reducing the pressure and returning the reduced pressure to atmospheric pressure.

  Further, the present invention is characterized in that the pressure adjusting step includes a step of pressurizing the substrate in the stacking direction after reducing the pressure.

  Furthermore, the present invention is characterized in that, in the hole forming step, a plurality of holes are formed, and an interval between adjacent holes is 500 μm or less.

  Furthermore, the present invention is characterized in that in the hole forming step, the hole is formed by at least one of laser processing, drilling, and router processing.

  According to the present invention, the inner peripheral surface portion of the hole formed in the substrate is covered with the insulating layer made of the insulating sealing material covering at least the vicinity of the cloth. Thus, when the hole is formed in the substrate, even if the interface peels off and a gap is formed near the cloth due to the residual stress at the interface between the fabric fiber and the resin part, the gap is formed by the insulating layer. Can be covered. As a result, the internal conductor deposited on the insulating layer can be prevented from conducting undesirably through the gap. Therefore, even when a hole is formed at an adjacent location, insulation with the adjacent hole can be ensured. As a result, a wiring board suitable for miniaturization of the semiconductor element can be realized.

  According to the invention, since the insulating sealing material is made of a resin similar to the resin material of the resin portion, it is easy to adhere to the resin portion, so that there is an undesired gap in the inner peripheral surface portion of the hole portion. Even in this case, the inner peripheral surface of the hole can be reliably covered.

  Further in accordance with the present invention, the fabric comprises polybenzoxazole, wholly aromatic polyamide or wholly aromatic polyester. If the material has a low coefficient of thermal expansion, such as polybenzoxazole, wholly aromatic polyamide, or wholly aromatic polyester, there is a risk of peeling at the interface as described in the prior art, but such peeling occurs. Even if it is an easy material, the function as a wiring board is realizable by the insulating layer which covers the internal peripheral surface part of a hole.

  Furthermore, according to this invention, a liquid sealing material is apply | coated to the internal peripheral surface part of the hole formed at a hole formation process, a base layer is formed, and this base layer is dried, and an insulating layer is formed. As a result, when the hole is formed in the substrate, even if the interface is peeled off and a void is formed due to the residual stress at the interface between the fabric fiber and the resin portion, the void is covered by the base layer. The underlayer can be covered with an insulating layer that has been dried and cured. As a result, the internal conductor deposited on the insulating layer can be prevented from conducting undesirably through the gap. Therefore, even when a hole is formed at an adjacent location, insulation with the adjacent hole can be ensured. As a result, a wiring board suitable for miniaturization of the semiconductor element can be realized.

  Furthermore, according to the present invention, the liquid sealing material has a contact angle with respect to the cloth of 0 degree or more and 45 degrees or less. Accordingly, even if the gap is fine, the liquid sealing material can easily enter the gap, and the gap can be reliably covered.

  Furthermore, according to this invention, the viscosity of a liquid sealing material is 1 Poise or more and 50 Poise or less. Accordingly, even if the gap is fine, the liquid sealing material can easily enter the gap, and the gap can be reliably covered.

  Furthermore, according to the present invention, the liquid sealing material includes a bisphenol A type epoxy resin, a bisphenol F type epoxy resin, an alicyclic epoxy resin, an amine type epoxy resin, and a liquid epoxy resin containing a glycidyl esterified epoxy resin, and It is at least one selected from the group of triallyl isocyanurate resins. As a result, a liquid sealing material that can reliably cover the gap can be realized.

  Furthermore, according to the present invention, the liquid sealing material contains a silane coupling agent. As a result, the wettability of the liquid sealing material to the resin part and the cloth is improved, and even if the gap is fine, the liquid sealing material can easily enter the gap and the gap can be reliably covered.

  Furthermore, according to the present invention, since the pressure in the arrangement space of the wiring board is adjusted, even if the gap is fine, the liquid sealing material can promote the penetration into the gap. Further, the thickness dimension of the insulating layer formed by controlling the pressure can be controlled with high accuracy. Therefore, the thickness dimension of the insulating layer can be controlled to a desired value.

  Furthermore, according to the present invention, the pressure is reduced and the reduced pressure is returned to the atmospheric pressure, so that the liquid sealing material can be further promoted to enter the gap.

  Furthermore, according to the present invention, since the substrate is pressed in the stacking direction after the pressure is reduced, the gap volume can be reduced by narrowing the gap interval, and the gap can be covered more reliably.

  Furthermore, according to the present invention, a plurality of holes are formed, and the interval between adjacent holes is 500 μm or less. Since insulation between adjacent holes is ensured by the insulating layer, it can be applied to a wiring board of 500 μm or less. Therefore, it is possible to realize a wiring board suitable for miniaturization of semiconductor elements.

  Furthermore, according to the present invention, since the hole is formed by at least one of laser processing, drilling, and router processing, holes having a desired shape can be formed at a desired interval.

  FIG. 1 is a cross-sectional view schematically showing a wiring board 1 constituting a multilayer wiring board according to an embodiment of the present invention, and a part thereof is enlarged. FIG. 1 shows a single-layer wiring board 1 for easy understanding. The multilayer wiring board is configured by laminating a plurality of wiring boards 1 including the insulating layer 2 and the conductive layer 3 in the thickness direction. The insulating layer 2 is formed by covering a woven fabric made of fibers 4, a non-woven fabric made of fibers 4 or a fiber 4 arranged in one direction (hereinafter referred to as “UD material”) with a resin portion 5 made of a resin material. The substrate to be processed.

  In the multilayer wiring board, an insulating substrate in which a plurality of insulating layers 2 are laminated, a conductive layer 3 that is a wiring conductor is formed between the surface of the insulating substrate and an interlayer between the insulating layers 2, and the conductive layer 3 is formed in multiple layers. Yes. The conductive layers 3 having different layers are electrically connected by via-hole conductors 6 which are internal conductors formed through the insulating layer 2 in the thickness direction.

  The wiring substrate 1 is realized by, for example, a double-sided copper-clad substrate 1 in which a woven fabric made of glass fiber 4 is impregnated with a thermosetting resin, which is a resin material, and a copper foil is superimposed on the front and back, and then cured. Non-woven fabric, woven fabric, or UD material (hereinafter sometimes referred to simply as “fabric”) made of fiber 4 made of oxazole, wholly aromatic polyamide or wholly aromatic polyester, and impregnated with copper on both sides This is realized by the double-sided copper-clad substrate 1 that is cured after the foils are stacked.

  As the thermosetting resin, for example, at least one selected from the group of epoxy resins, triazine resins, polybutadiene resins, phenol resins, fluorine resins, diallyl phthalate resins, polyimide resins, etc. Any resin can be used.

  In the insulating layer 2 made of a composite material of a woven fabric of heat-resistant fibers 4 and a thermosetting resin, voids 7 are formed between the fibers 4, in other words, inside the woven fabric. The voids 7 in the woven fabric are thermosetting to the fabric of glass fibers, particularly glass fibers having a low coefficient of thermal expansion such as S glass and T glass, fibers 4 having a negative coefficient of thermal expansion such as aramid fiber and polybenzoxazole fiber. When the resin is impregnated and cured, or when machining such as drilling is performed on a substrate using these, it is inevitably generated when viewed microscopically. In FIG. 1, the gap 7 is exaggerated for easy understanding, but in reality, the large gap 7 as shown in FIG. 1 is not formed, and the fiber 4 and the resin portion 5 are simply formed. Is peeled off and in contact.

  The gap 7 is more likely to be generated as the difference between the thermal expansion coefficient of the woven fabric and the thermal expansion coefficient of the resin portion 5 made of the thermosetting resin impregnated therein is larger. The thermal expansion coefficient of each glass is, for example, 12 ppm / ° C. for E glass, 3 ppm / ° C. for S glass, and 5 ppm / ° C. for T glass. Glass fibers made of such low thermal expansion glass have been developed. Yes. In addition, there are organic fibers having a negative coefficient of thermal expansion such as aramid fiber and polybenzoxazole fiber, and voids 7 are likely to be generated when a cloth composed of fibers 4 having a low coefficient of thermal expansion is used. Further, when the via hole 10 is formed, the gap 7 may be generated between the fibers 4 due to, for example, stress acting on the fibers 4 or may be generated due to defects generated in the fibers themselves.

  The wiring board 1 according to the present invention is characterized in that an internal insulating layer 8 that covers the vicinity of the cloth on the inner peripheral surface portion 9 of the via hole 10 is formed inside the void 7 by impregnating and curing an insulating sealing material. is there. The vicinity of the cloth of the inner peripheral surface portion 9 is a portion close to the cloth of the inner peripheral surface portion 9 and includes a portion between the cloth fibers 4 and the resin portion 5 when viewed from the via hole 10. As the liquid sealing material, which is an uncured resin impregnated and cured in the gap 7, a resin similar to the resin material of the resin portion 5 is preferably used. Examples of the liquid sealing material include bisphenol A type epoxy resin, bisphenol F type epoxy resin, alicyclic epoxy resin, amine type epoxy resin, and liquid epoxy resin containing glycidyl esterified epoxy resin, and triallyl isocyanurate resin group Is at least one selected from The liquid sealing material preferably contains 0.1 to 10 parts by weight of a curing agent with respect to 100 parts by weight of the uncured resin. Thereby, the sclerosis | hardenability of a liquid sealing material improves and the space | gap 7 can be covered reliably.

  Desirably, 0.1 to 5 parts by weight of the silane coupling agent is contained with respect to 100 parts by weight of the uncured resin. Thereby, the wettability with respect to the resin part and cloth of a liquid sealing material improves, and the space | gap 7 can be covered reliably.

  It is desirable to use the liquid sealing material, which is an uncured resin, by dissolving it in a solvent. As the solvent, acetone, toluene, methyl ethyl ketone, cyclohexanone, butyl cellosolve, isobutyl alcohol, terpineol, 2-octanol, and butyl carbitol acetate are preferably used. The amount of the liquid sealing material added to these solvents can be adjusted according to the thickness of the internal insulating layer 8 necessary for peeling and dent sealing as the gap 7, and the thickness needs to be 8 μm or more and 10 μm or less. In this case, the content is preferably 10% by weight or more and 30% by weight or less.

  As the curing agent for the liquid sealing material, known additives such as peroxides can be used. Even when no curing agent is added to the liquid sealing material, the curing proceeds due to the influence of the curing agent originally contained in the resin part 5, and there may be no practical problem. By adding, the quality can be stabilized. Further, the silane coupling agent has an effect of improving wettability between the woven fabric and the liquid sealing material. When the wettability is improved, the liquid sealing material can easily enter the fine gaps of the woven fabric, and the impregnation of the liquid sealing material is improved.

  In addition, the liquid sealing material preferably has a contact angle with respect to the cloth of 0 ° to 45 ° in consideration of the impregnation property into the void 7, and the viscosity is preferably 1 Poise to 50 Poise. .

  Next, the manufacturing method of the wiring board 1 of this invention is demonstrated. FIG. 2 is a cross-sectional view showing a part of the manufacturing process of the wiring board 1 step by step. In FIG. 2, a single-layer wiring board 1 is shown for easy understanding. FIG. 3 is a flowchart showing a method for manufacturing the wiring board 1. FIG. 4 is a flowchart showing a method for manufacturing the liquid sealing material. In step a1, as shown in FIG. 2 (a), as the insulating layer 2, a substrate 1 with double-sided copper foil, which is a wiring substrate 1 in which a woven fabric of polybenzoxazole fibers 4 is impregnated with a thermosetting resin, is prepared. The process proceeds to step a2. The woven fabric in the double-sided copper foil-attached substrate 1 is preferably subjected to a flattening process in order to improve the processing accuracy of the via hole 10 by laser. By this flattening process, the occurrence of variations in via hole diameter due to the density of the woven fabric is suppressed, and the via hole 10 having a uniform hole diameter can be formed.

  Step a2 is a hole forming step. As shown in FIG. 2B, a via hole 10 as a hole is formed in the double-sided copper foil-coated substrate 1, and the process proceeds to step a3. The via hole 10 is formed by at least one of laser processing, drill processing, and router processing, for example. For the formation of the via hole 10, a known method such as processing by irradiation with a carbon dioxide laser, a YAG laser, an excimer laser, or the like is employed in laser processing. When the via hole processing is performed, the protective film for protecting the surface portion can be adhered to the front and back of the substrate 1 with the double-sided copper foil. A plurality of via holes 10 are formed in the double-sided copper foil-coated substrate 1, and a via hole pitch that is an interval between adjacent via holes 10 is 500 μm or less. In the present embodiment, the via hole pitch is 250 μm or less, particularly 175 μm or less. The via hole 10 is formed.

  In step a3, the substrate with double-sided copper foil 1 in which the via hole 10 is formed is cleaned, and the process proceeds to step a4. In step a4, a liquid sealing material is applied to the inner peripheral surface portion 9 of the via hole 10, and the process proceeds to step a5. Specifically, the substrate 1 with double-sided copper foil is placed on a sheet that does not transmit a liquid sealing material such as a plastic film, and the liquid sealing material is filled into the via holes 10 of the via hole dense portion where the via hole pitch is 500 μm or less. In other words, the board 1 with double-sided copper foil is immersed in a container containing a liquid sealing material. In particular, the liquid sealing material is impregnated in the via holes 10 formed close to the via hole pitch of 250 μm or less. In order to impregnate the void 7 with uncured resin, which is a liquid sealing material, the liquid sealing material is attached to at least the inner peripheral surface portion 9 of the via hole 10 and left for a predetermined time, so that the void 7 is impregnated by capillary action. be able to.

  Step a5 is a pressure adjustment step, in which the pressure in the arrangement space of the wiring board 1 is adjusted, and the process proceeds to step a6. The pressure is adjusted, for example, by reducing the pressure and returning the reduced pressure to atmospheric pressure. Specifically, the space between the inner peripheral surface portion 9 of the via hole 10 and the fibers 4 of the woven fabric is reduced by reducing the atmosphere of the arrangement space to 200 torr or less, and repeating the reduced pressure and the atmospheric pressure or pressurizing the atmosphere as desired. The impregnation of the liquid sealing material into 7 can be promoted. Specifically, the double-sided copper foil-attached substrate 1 is held for 30 seconds in a reduced-pressure atmosphere of 10 torr, for example. In this way, in step a4 and step a5, the liquid sealing material is applied so as to cover the vicinity of the cloth of the inner peripheral surface portion 9 of the via hole 10, in other words, to fill the gap 7 in the vicinity of the cloth, and the internal insulation is performed. An underlayer (not shown) that is a precursor of the layer 8 is formed.

  Desirably, after reducing the pressure, the substrate 1 is pressed in the stacking direction, which is the thickness direction of the substrate 1. Thereby, the space | interval of the space | gap 7 becomes narrow, the volume of the space | gap 7 can be reduced and the space | gap 7 can be covered more reliably.

  Referring to FIG. 4, the liquid sealing material used in step a4 is bisphenol A type epoxy resin, bisphenol F type epoxy resin, alicyclic epoxy resin, amine type epoxy as described above in step b1. Resin, a liquid epoxy resin such as a glycidyl esterified epoxy resin, and 100 parts by weight of at least one uncured resin selected from the group of triallyl isocyanurate resins, 0 to 10 parts by weight of a curing agent; 0 to 5 parts by weight of silane coupling agent is prepared, and the process proceeds to step b2. In step b2, these three kinds of materials are mixed to complete the production of the liquid sealing material, and the process proceeds to step b3. In step b3, the viscosity of the liquid sealing material is measured, and this flow is finished. The viscosity of the liquid sealing material is desirably 20 Pa · s or less at a shear rate of 100 / s in consideration of the impregnation property into the void 7.

  Referring to FIGS. 2 and 3 again, in step a6, the double-sided copper foil-attached substrate 1 is taken out of the container filled with the liquid sealing material, and the excess liquid sealing material adhering to the surface is removed with a squeeze roll. After that, the excess liquid sealing material in the via hole 10 is blown off by blowing compressed air, and the process proceeds to step a7. In step a7, as shown in FIG.2 (c), the board | substrate 1 with a double-sided copper foil is dried, it hold | maintains at 120-250 degreeC for 10 minutes-120 minutes, a base layer is hardened, and the internal insulating layer 8 is formed. The process proceeds to step a8. The substrate with double-sided copper foil 1 is held, for example, at 120 ° C. for 30 minutes in an explosion-proof oven, the solvent is dried, and further held at 180 ° C. for 60 minutes, the base layer is cured, and the internal insulating layer 8 is formed.

  In step a8, the double-sided copper foil-attached substrate 1 is immersed in a permanganate solution, the inner peripheral surface portion 9 of the via hole 10 is swollen, a palladium catalyst is adhered to the surface, and the process proceeds to step a9. For some substrates, this step can be omitted. In step a9, copper is plated on the double-sided copper foil-equipped substrate 1 by electroless plating, for example, to a thickness of 1 μm, and the process proceeds to step a10. In step a10, copper electroplating is performed on the substrate 1 with double-sided copper foil, and a total of, for example, 18 μm of copper is plated with electroless plating to form the via-hole conductor 6 as an internal conductor, and the process proceeds to step a11. Thus, by electroless plating and electrolytic plating, as shown in FIG. 2D, plating is formed in the via hole 10, and the via hole conductor 6 is formed.

  In step a11, a photosensitive resist is stuck on the double-sided copper foil-attached substrate 1, and the process proceeds to step a12. In step a12, the resist is exposed to a predetermined pattern, developed, a circuit is formed by etching, the resist is removed, and the process proceeds to step a14. The conductive layer 3 is formed on the surface of the substrate 1 with the double-sided copper foil on which the via-hole conductor 6 is formed in this way. As a method for forming the conductive layer 3, for example, a pattern plating method is employed as described above. Thus, the via-hole conductor 6 is deposited on the inner insulating layer 8 and is electrically and mechanically connected to the conductive layer 3. By this via-hole conductor 6, the conductive layer 3 disposed opposite to both end surfaces in the thickness direction of the insulating layer 2 can be conducted.

  In step a14, the double-sided copper foil-coated substrate 1 is washed and dried, and the process proceeds to step a15. In step a15, a desired number of the double-sided copper foil-coated substrates 1 manufactured in step a14 are stacked to form a multilayer wiring board, and the process proceeds to step a16. In step a16, a finishing process is performed, and this flow is finished.

  Tables 1 and 2 show examples of data relating to the material of the wiring board 1 manufactured by the manufacturing method of the present embodiment. Table 3 shows an example of data relating to the material of the wiring board manufactured by the conventional manufacturing method without using the liquid sealing material. In Tables 1 to 3, the unit of the addition amount of the curing agent and the resin concentration is% by weight, and the unit of the particle diameter of the other additives is μm. As shown in Tables 1 to 3, numbers 1 to 40 are wiring boards 1 manufactured by the manufacturing method of the present embodiment, and numbers 41 to 47 are wiring boards manufactured by a conventional manufacturing method. is there. Tables 4 to 6 show the insulation resistance after performing the following PCT test and HAST test on the distance (three types) between two adjacent via-hole conductors 6 in the wiring board 1 of Tables 1 to 3 As a measurement result, when the insulation resistance exceeds 10 9 Ω, it is expressed as “◯”, and when it is 10 9 or less, it is expressed as “X”.

PCT condition: 130 ° C., humidity 85%, 2.3 atmospheres, maximum 200 hours treatment HAST condition: 130 ° C., humidity 85%, DC voltage 5.5 V applied, maximum 200 hours treatment formed on each wiring board 1 Via holes 10 were irradiated and scanned with a YAG laser beam having a beam diameter of 15 μm, and 300 × 10 three types with a diameter of 25 μm and via pitches of 125 μm, 175 μm, and 225 μm were formed.

  As shown in Table 4 and Table 5, all the wiring boards 1 manufactured in the present embodiment are “◯” at 225 μm. On the other hand, as shown in Table 6, all the wiring boards manufactured by the conventional technique are “x”. Therefore, it is recognized that the direction in which the gap 7 is covered with the liquid sealing material is surely insulated from the via hole conductor 6 provided in the adjacent via hole 10.

  As shown in Table 4 and Table 5, in the wiring board 1 of No. 1, No. 21, No. 31, No. 36, and No. 39, the viscosity is larger than 50 poise, so that the via hole intervals are “x” at 125 μm and 175 μm. Accordingly, when the viscosity is larger than 50 poise, it is recognized that the liquid sealing material cannot enter the gap 7 and it is difficult to suitably obtain the effects of the present invention.

  As described above, according to the wiring board 1 and the method of manufacturing the same of the present embodiment, the vicinity of the cloth of the inner peripheral surface portion 9 of the via hole 10 formed in the wiring board 1 is an internal insulation made of an insulating sealing material. Covered by layer 8. As a result, when the via hole 10 is formed in the wiring board 1, even if the interface is peeled off and the void 7 is formed due to the residual stress at the interface between the fabric fiber 4 and the insulating layer 2, the void 7 It can be covered by the inner insulating layer 8. Further, the gap 7 formed between the fibers 4 of the cloth and the gap 7 formed due to the defect of the fibers 4 can be covered with the internal insulating layer 8. As a result, the via-hole conductor 6 deposited on the inner insulating layer 8 can be prevented from conducting undesirably through the gap 7 formed in the vicinity of the cloth. Therefore, even when the via hole 10 is formed at an adjacent location, insulation with the adjacent via hole 10 can be ensured. As a result, it is possible to realize a wiring board 1 suitable for miniaturization of a semiconductor element.

  In other words, these voids 7 can be substantially eliminated by impregnating and curing the liquid sealing material in the voids 7. As a result, even when via hole conductors 6 having very close via pitches of 250 μm or less are formed, no insulation failure occurs between the via hole conductors 6 and the reliability of the circuit can be improved. In addition, the impregnation with the liquid sealing material prevents moisture from entering from the outside to cause migration, and prevents the substrate from being damaged by the expansion of the gap when the substrate temperature rises.

  In this embodiment, since the insulating sealing material is made of a resin similar to the resin material of the resin portion 5, it easily adheres to the insulating substrate. Even when there is 7, the inner peripheral surface portion 9 of the via hole 10 can be reliably covered.

  In the present embodiment, the cloth that is a woven or non-woven fabric is made of polybenzoxazole, wholly aromatic polyamide, or wholly aromatic polyester. If the material has a low coefficient of thermal expansion, such as polybenzoxazole, wholly aromatic polyamide, or wholly aromatic polyester, there is a risk of peeling at the interface as described in the prior art, but such peeling occurs. Even if it is an easy material, the function as the wiring board 1 can be realized by the internal insulating layer 8 covering the inner peripheral surface portion 9 of the via hole 10.

  Furthermore, in this embodiment, since the pressure in the space in which the wiring substrate 1 is disposed is adjusted, the liquid sealing material can promote the penetration into the gap 7 even if the gap 7 is fine. Further, the thickness dimension of the inner insulating layer 8 formed by controlling the pressure can be controlled with high accuracy. Therefore, the thickness dimension of the insulating layer 2 can be controlled to a desired value.

  Further, in the present embodiment, the pressure is reduced and the reduced pressure is returned to the atmospheric pressure, so that the liquid sealing material can be further promoted to enter the gap 7.

  Moreover, the silane coupling agent contained in the liquid sealing material has an effect of improving the wettability between the woven fabric and the liquid sealing material. When the wettability is improved, the liquid sealing material can easily enter the fine gaps of the woven fabric, and the impregnation of the liquid sealing material is improved. This improves the insulation reliability. In addition, the adhesion strength between the cured internal insulating layer 8 and the woven fabric is improved.

  In the above-described embodiment, the entire substrate 1 with double-sided copper foil is immersed in an uncured resin. However, the present invention is not limited to this, and the liquid sealing material may be dropped only on the dense portion of the via hole 10.

  FIG. 5 is a cross-sectional view showing another example of the wiring board 1 in a simplified manner, and a part thereof is enlarged. As described with reference to FIG. 1, in the above-described wiring board 1, the internal insulating layer 8 is configured to cover only the cloth vicinity of the inner peripheral surface portion 9, but the present invention is not limited to this. For example, as shown in FIG. 5, the inner insulating layer 8 may be configured to cover the entire inner peripheral surface portion 9 so as to cover at least the cloth vicinity of the inner peripheral surface portion 9. As a result, the gap 7 in the inner peripheral surface portion 9 can be reliably filled with the inner insulating layer 8.

  As shown in Table 2 and Table 5, a liquid sealing material to which palladium is added can also be suitably used. Since palladium acts as a catalyst for electroless plating, the step of attaching the palladium catalyst to the surface of the inner insulating layer 8 in step a8 in FIG. 3 can be eliminated. Therefore, in the present embodiment, a process is newly added to eliminate the void 7 as compared with the conventional technique. However, since the process of applying a catalyst can be reduced, the present invention is implemented without impairing the production efficiency. can do. In order to achieve such an effect, when adding palladium, it is preferable to form the internal insulating layer 8 so that the liquid sealing material covers the entire inner peripheral surface portion 9 of the via hole 10. Moreover, in order to achieve the said effect, the additive added to a liquid sealing material is not restricted to palladium, A palladium compound may be sufficient.

BRIEF DESCRIPTION OF THE DRAWINGS It is sectional drawing which simplifies and shows the wiring board 1 which comprises the multilayer wiring board of one Embodiment of this invention, Comprising: One part is expanded and shown. 5 is a cross-sectional view showing a part of the manufacturing process of the wiring board 1 in stages. FIG. 3 is a flowchart showing a method for manufacturing the wiring board 1. It is a flowchart which shows the manufacturing method of a liquid sealing material. It is sectional drawing which simplifies and shows the other example of the wiring board 1, Comprising: A part is expanded and shown.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Wiring board 2 Insulating layer 3 Conductive layer 4 Fiber 5 Resin part 6 Via-hole conductor 7 Void 8 Internal insulating layer 9 Inner peripheral surface part 10 Via hole

Claims (13)

In a wiring board provided with a wiring conductor on a board formed by covering a cloth with a resin part made of a resin material,
The substrate on which the hole is formed;
An insulating layer made of an insulating sealing material covering at least the cloth vicinity of the inner peripheral surface portion of the hole portion;
A wiring board having an inner conductor that is attached to the insulating layer and electrically and mechanically connected to the wiring conductor.   The wiring board according to claim 1, wherein the insulating sealing material is made of a resin similar to the resin material of the resin portion.   The wiring board according to claim 1, wherein the cloth is made of polybenzoxazole, wholly aromatic polyamide, or wholly aromatic polyester. A hole forming step of forming a hole in a substrate formed by coating a cloth with a resin material;
A base layer forming step of forming a base layer by applying a liquid sealing material to the inner peripheral surface portion of the hole formed in the hole forming step;
An insulating layer forming step of drying the underlayer formed in the underlayer forming step to form an insulating layer;
After the said insulating layer formation process, the manufacturing method of the wiring board characterized by including the internal conductor layer deposition process which adheres the internal conductor layer which has electroconductivity to the said insulating layer.   The method for manufacturing a wiring board according to claim 4, wherein the liquid sealing material has a contact angle with respect to the cloth of 0 ° to 45 °.   6. The method for manufacturing a wiring board according to claim 4, wherein the liquid encapsulant has a viscosity of 1 Poise or more and 50 Poise or less.   The liquid sealing material is a group of bisphenol A type epoxy resin, bisphenol F type epoxy resin, alicyclic epoxy resin, amine type epoxy resin, and liquid epoxy resin containing glycidyl esterified epoxy resin, and triallyl isocyanurate resin The method for manufacturing a wiring board according to claim 4, wherein the wiring board is at least one selected from the group consisting of:   The said liquid sealing material contains a silane coupling agent, The manufacturing method of the wiring board of any one of Claims 4-7 characterized by the above-mentioned. The underlayer forming step includes
An application step of applying a liquid sealing material to the inner peripheral surface of the hole;
The method for manufacturing a wiring board according to any one of claims 4 to 8, further comprising a pressure adjustment step of adjusting a pressure in an arrangement space of the wiring board.   10. The method for manufacturing a wiring board according to claim 9, wherein the pressure adjusting step includes a step of reducing the pressure and returning the reduced pressure to atmospheric pressure.   The method of manufacturing a wiring board according to claim 9, wherein the pressure adjusting step includes a step of pressurizing the substrate in a stacking direction after reducing the pressure.   The method for manufacturing a wiring board according to claim 4, wherein in the hole forming step, a plurality of holes are formed, and an interval between adjacent holes is 500 μm or less.   The method for manufacturing a wiring board according to claim 4, wherein in the hole forming step, the hole is formed by at least one of laser processing, drilling, and router processing.

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