JP2007088030A - Semiconductor device - Google Patents

Semiconductor device Download PDF

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JP2007088030A
JP2007088030A JP2005271987A JP2005271987A JP2007088030A JP 2007088030 A JP2007088030 A JP 2007088030A JP 2005271987 A JP2005271987 A JP 2005271987A JP 2005271987 A JP2005271987 A JP 2005271987A JP 2007088030 A JP2007088030 A JP 2007088030A
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heat spreader
semiconductor device
metal
semiconductor chip
lead
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Yuji Iizuka
祐二 飯塚
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Fuji Electric Co Ltd
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Fuji Electric Holdings Ltd
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    • H01L24/34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L24/39Structure, shape, material or disposition of the strap connectors after the connecting process
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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
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Abstract

<P>PROBLEM TO BE SOLVED: To improve the connection reliability of a module solder bonding a heat spreader on the main electrode surface of a semiconductor chip, and connecting a lead via the heat spreader. <P>SOLUTION: The semiconductor device has such a structure that the heat spreader 7 which also serves for an electrode plate is brazed (soldered) to the upper-side main electrode surface of the semiconductor chip 3 mounted on an insulation substrate 2 and the wiring lead 4 is connected to the top face of the heat spreader. The heat spreader consists of a metal base material 7a (copper or aluminum), and a different species metal film 7b (Ni, Ni-P, Ni-P/Au plating film, etc.) is formed on one surface of the metal base material 7a to increase the adhesion with a brazing material (solder). The surface of the heat spreader which is formed with the different species metal film 7b is brazed to the semiconductor chip, and the wiring lead 4 made of the same kind of metal as the base material of the heat spreader is directly bonded (for example, by ultrasonic bonding) to the other surface of the heat spreader as a lead member. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

本発明は、パワー半導体モジュール,スイッチングICなどを対象とする半導体装置に関し、詳しくは半導体チップの実装回路構造に係わる。   The present invention relates to a semiconductor device intended for a power semiconductor module, a switching IC and the like, and more particularly to a semiconductor chip mounting circuit structure.

昨今ではパワー半導体モジュールの小型,大容量化が進み、これに伴いパワー半導体モジュールに搭載するパワー半導体チップ(例えば、IGBT(Insulated Gate Bipolar Transistor))等は高い電流密度で通電使用されることから、その放熱対策が重要課題となっている。
すなわち、IGBTなどのパワー半導体デバイスでは、半導体チップの接合部温度Tjに上限保証温度(例えば125℃)が規定されているのに対して、放熱用ベース(銅ベース板)に絶縁基板を介して半導体チップをマウントした片面冷却方式では、半導体チップの上面側がパッケージ内に充填した封止樹脂で封止されているのでチップ上面側からの放熱は殆ど期待できない。このために半導体チップの小型,大電流化に伴い発熱密度が増大すると、半導体チップの上面電極に接続する配線リードとしてアルミワイヤをボンディングした在来の配線構造では、チップの接合部温度を上限保証温度以下に抑えることが困難であるばかりか、アルミワイヤのジュール発熱も加わってワイヤ溶断のおそれもあってパワーサイクル耐量の低下が懸念される。
In recent years, power semiconductor modules have become smaller and larger in capacity, and accordingly, power semiconductor chips (for example, IGBT (Insulated Gate Bipolar Transistor)) mounted on the power semiconductor modules are energized and used at a high current density. The heat dissipation countermeasure has become an important issue.
That is, in a power semiconductor device such as an IGBT, an upper limit guaranteed temperature (for example, 125 ° C.) is defined for the junction temperature Tj of the semiconductor chip, whereas the heat dissipation base (copper base plate) is interposed via an insulating substrate. In the single-sided cooling method in which the semiconductor chip is mounted, the upper surface side of the semiconductor chip is sealed with the sealing resin filled in the package, so that heat radiation from the upper surface side of the chip can hardly be expected. For this reason, when the heat generation density increases as the semiconductor chip becomes smaller and the current increases, the upper limit of the chip junction temperature is guaranteed in the conventional wiring structure in which an aluminum wire is bonded as the wiring lead connected to the upper electrode of the semiconductor chip. Not only is it difficult to keep it below the temperature, but there is also a concern that the power cycle resistance may be lowered due to the possibility of wire fusing due to the Joule heat generation of the aluminum wire.

一方、半導体チップの上面からの放熱性を高めるための手段として、前記のアルミワイヤに代えてストラップ状の金属箔,あるいはリードフレームの配線リードを半導体チップの上面主電極にろう付け(通常ははんだ付け)し、この金属箔,リードフレームを伝熱経路として半導体チップの発生熱をチップ上面側から絶縁基板に放熱させるようにした構成が知られている(例えば、特許文献1,特許文献2参照)。
次に、パワー半導体モジュールを例に、特許文献2に開示されているモジュールの組立構造を図4に示す。図において、1は放熱用銅ベース、2はセラミックス基板2aの表,裏両面に導体パターン2b,2cを形成して銅ベース1の上に搭載した絶縁基板(例えば、Direct Copper Bonding基板)、3は絶縁基板2の導体パターン2bにマウントした半導体チップ(IGBT)、4は半導体チップ3の上面電極(エミッタ電極)と絶縁基板2の導体パターン2aとの間にまたがって両端をはんだ接合したリードフレーム(銅またはアルミ製の配線リード)、5は外囲樹脂ケース、6は銅ベース1に伝熱結合した放熱フィン(ヒートシンク)である。
On the other hand, as means for improving the heat dissipation from the upper surface of the semiconductor chip, brazing the strap-shaped metal foil or the lead wire of the lead frame to the upper main electrode of the semiconductor chip instead of the aluminum wire (usually soldering) In addition, a configuration is known in which heat generated by the semiconductor chip is radiated from the upper surface side of the chip to the insulating substrate using the metal foil and the lead frame as a heat transfer path (see, for example, Patent Document 1 and Patent Document 2). ).
Next, the assembly structure of the module disclosed in Patent Document 2 is shown in FIG. In the figure, 1 is a copper base for heat dissipation, 2 is an insulating substrate (for example, a Direct Copper Bonding substrate) mounted on the copper base 1 with conductor patterns 2b and 2c formed on the front and back surfaces of the ceramic substrate 2a, 3 Is a semiconductor chip (IGBT) mounted on the conductor pattern 2b of the insulating substrate 2, and 4 is a lead frame having both ends soldered between the upper surface electrode (emitter electrode) of the semiconductor chip 3 and the conductor pattern 2a of the insulating substrate 2. (Wiring lead made of copper or aluminum) 5 is an enclosing resin case, and 6 is a heat radiating fin (heat sink) thermally coupled to the copper base 1.

また、前記とは別に、半導体チップの放熱性向上と併せて発熱密度の集中緩和を図る手段として、半導体チップの上面側主面に熱拡散部材として銅,アルミなどの高熱伝導性金属ブロックで作られたヒートスプレッダを伝熱的に固着し、このヒートスプレッダを吸熱,伝熱経路として半導体チップの中央部分に集中する発熱を拡散させてチップの温度分布を均温化させるようにした構成のものが知られている(例えば特許文献3参照)。
さらに、半導体チップの上面側主電極面にはんだ接合した前記ヒートスプレッダ自身を電極板としてその上面にリード部材として銅,アルミ箔などで作られた配線リードを接合(超音波接合)した構成のモジュール組立構造が本発明と同一出願人より特願2004−293662号として先に提案されている。
ところで、前記のように半導体チップ3の主面にリードフレーム4の接合端面を重ね合わせて両者の間をはんだ付け(面接合)した実装回路では、半導体チップ3とリードフレーム4との線膨張係数差から、温度サイクルによりはんだ接合層に発生する熱応力がその接合面方向に剪断応力として繰り返し作用し、この応力による疲労ではんだ層にクラックが発生するなどして接続信頼性が低下する問題がある。
特開2001−332664号公報 特開2005−64441号公報 特開2000−307058号公報
In addition to the above, as a means for reducing the concentration of heat generation in addition to improving the heat dissipation of the semiconductor chip, the upper main surface of the semiconductor chip is made of a high heat conductive metal block such as copper or aluminum as a heat diffusion member. It is known that the heat spreader is fixed in a heat transfer manner, and the heat spreader absorbs heat and diffuses the heat generated at the center of the semiconductor chip as a heat transfer path to equalize the temperature distribution of the chip. (See, for example, Patent Document 3).
Further, a module assembly having a structure in which the heat spreader itself soldered to the upper main electrode surface of the semiconductor chip is used as an electrode plate and a wiring lead made of copper, aluminum foil or the like as a lead member is joined to the upper surface (ultrasonic bonding). The structure was previously proposed as Japanese Patent Application No. 2004-29362 by the same applicant as the present invention.
By the way, in the mounting circuit in which the joining end face of the lead frame 4 is superposed on the main surface of the semiconductor chip 3 and soldered between the two (surface joining) as described above, the linear expansion coefficient between the semiconductor chip 3 and the lead frame 4 is obtained. Due to the difference, the thermal stress generated in the solder joint layer due to the temperature cycle repeatedly acts as a shear stress in the direction of the joint surface, and the fatigue of this stress causes cracks in the solder layer. is there.
JP 2001-332664 A JP 2005-64441 A JP 2000-307058 A

ところで、前記半導体モジュールのように、半導体チップの上面側主面に銅,アルミなどで作られたヒートスプレッダをろう付け(はんだ接合)した上で、該ヒートスプレッダを介してその上面にリード部材(銅,アルミなどのリード箔,リードフレーム)を接続した従来構造では、半導体チップとヒートスプレッダとの線膨張係数差から、熱サイクルにより両者の間を接合したはんだ層(ろう付け層)に生じる熱ストレスが剪断応力として繰り返し作用し、この繰り返しストレスによりはんだ組織が粗大化してはんだ層にクラックが発生し、接合信頼性が低下する問題がある。
さらに、昨今では環境問題から鉛フリーはんだが採用されるようになっているが、鉛フリーはんだはSn−Pb共晶はんだに較べてはんだ濡れ性が劣ることに加え、はんだ/母材の組合せによっては母材金属のはんだへの溶解,接合界面に生じる腐食反応,金属間化合物の形成などによる接合強度低下,抵抗増加の問題もある。
By the way, after the heat spreader made of copper, aluminum or the like is brazed (soldered) to the upper surface side main surface of the semiconductor chip like the semiconductor module, a lead member (copper, In the conventional structure in which lead foils (lead frames such as aluminum) are connected, the thermal stress generated in the solder layer (brazing layer) joined between the two due to the thermal cycle is sheared due to the difference in linear expansion coefficient between the semiconductor chip and the heat spreader. There is a problem that it repeatedly acts as stress, the solder structure becomes coarse due to the repeated stress, cracks are generated in the solder layer, and joint reliability is lowered.
In addition, lead-free solder is now being adopted due to environmental problems, but lead-free solder is inferior in solder wettability compared to Sn-Pb eutectic solder, and depending on the combination of solder / matrix. There are also problems such as dissolution of the base metal in solder, corrosion reaction occurring at the joint interface, joint strength reduction due to formation of intermetallic compounds, and resistance increase.

本発明は上記の点に鑑みなされたものであり、半導体チップの主電極面にヒートスプレッダをはんだ接合した上で、該ヒートスプレッダを介してリード部材を接続した構成のモジュールを対象に、その接合信頼性の向上を図り、併せてはんだ接合層に作用する熱ストレスを緩和するようヒートスプレッダの構造を改良した半導体装置を提供することを目的とする   The present invention has been made in view of the above points, and is intended for a module having a configuration in which a heat spreader is soldered to a main electrode surface of a semiconductor chip and a lead member is connected via the heat spreader. An object of the present invention is to provide a semiconductor device having an improved heat spreader structure so as to alleviate thermal stress acting on the solder joint layer.

上記目的を達成するために、本発明によれば、半導体チップの主電極面に重ねて電極板兼用のヒートスプレッダをろう付けした上で、該ヒートスプレッダにリード部材を接続した半導体装置において、
前記ヒートスプレッダの金属基材の片面にろう材(はんだ)との接合性を高める異種金属膜を成膜した上で、該面を半導体チップにろう付けし、他方の面にヒートスプレッダの基材と同種金属のリード部材を直接接合するものとし(請求項1)、具体的には次記のような態様で構成する。
(1)前記ヒートスプレッダの金属基材がアルミ,アルミ合金もしくは銅,銅合金で、該金属基材の片面に成膜した異種金属膜がNi,Ni-P,Ni-P/Auめっき膜のいずれかである(請求項2)。
(2)前記ヒートスプレッダの金属基材が、低線膨張係数の基材に高導電性のポスト電極を分散形成し、さらに配線リードとの接合面側に前記ポスト電極と連なる電極層を成層した複合材で構成する(請求項3)。
(3)前項(2)において、低線膨張係数の導電板がモリブデン,タングステン,黒鉛系炭素などの高融点材であり、該導電板の板面に分散形成した貫通穴に、低融点,高導電性材を鋳込んでポスト電極を形成する(請求項4)。
(4)前記ヒートスプレッダの金属基材を、複数の基材ブロックに分けて格子状に並置配列し、かつ各基材ブロックの相互間に応力緩和層を充填して一体化したブロック集合体と、該ブロック集合体の端面に重ねて配線リードとの接続面側に積層した電極基板とから構成する(請求項5)。
(5)前項(4)において、応力緩和層が金属基材よりも低ヤング率の樹脂,軟質金属,もしくは樹脂に高伝熱性,ないし導電性のフィラーを混入した材質である(請求項6)。
In order to achieve the above object, according to the present invention, in a semiconductor device in which a heat spreader also serving as an electrode plate is brazed over the main electrode surface of a semiconductor chip, and then a lead member is connected to the heat spreader.
After forming a dissimilar metal film that improves the bondability with the brazing material (solder) on one side of the metal base of the heat spreader, the side is brazed to the semiconductor chip, and the other side is the same as the base of the heat spreader It is assumed that the metal lead member is directly joined (Claim 1), and specifically, configured in the following manner.
(1) The metal base material of the heat spreader is aluminum, aluminum alloy or copper, copper alloy, and the dissimilar metal film formed on one side of the metal base material is any of Ni, Ni-P, Ni-P / Au plating film. (Claim 2).
(2) A composite in which the metal base material of the heat spreader is formed by dispersing and forming highly conductive post electrodes on a base material having a low linear expansion coefficient, and further forming an electrode layer connected to the post electrodes on the joint surface side with the wiring lead. (Claim 3).
(3) In the above item (2), the conductive plate having a low linear expansion coefficient is a high melting point material such as molybdenum, tungsten, graphite-based carbon, etc. A post electrode is formed by casting a conductive material.
(4) A block assembly in which the metal base material of the heat spreader is divided into a plurality of base material blocks and arranged side by side in a lattice shape, and a stress relaxation layer is filled and integrated between the base material blocks; An electrode substrate is formed on the end surface of the block assembly and stacked on the connection surface side with the wiring lead.
(5) In the preceding item (4), the stress relaxation layer is a resin having a lower Young's modulus than that of the metal substrate, a soft metal, or a material in which a highly heat conductive or conductive filler is mixed in the resin. .

上記のように、ヒートスプレッダの片面にNi,Ni-P,Ni-P/Auめっき膜などの異種金属膜を形成した上で、このヒートスプレッダを半導体チップにろう付け(はんだ接合)することにより、ヒートスプレッダの金属基材とはんだとの濡れ性を高めつつ、一方では接合界面の腐食反応を抑制して接合信頼性の向上が図れる。また、ヒートスプレッダに接続するリード部材(箔、フレーム,あるいはワイヤのリード部材)を、ヒートスプレッダの金属基材と同種の金属材を選択して直接接合することで、ヒートスプレッダ/リード部材の接合界面に腐食反応が生じるおそれがなくて高い接続信頼性が得られる。
また、ヒートスプレッダの金属基材を、低線膨張係数の基材に高導電性のポスト電極を分散形成し、さらに配線リードとの接合面側に前記ポスト電極と同種の金属層を成層した複合材で構成することにより、ヒートスプレッダの実効的な線膨張係数を半導体チップの線膨張係数に近づけてはんだ接合層に加わる熱ストレスが軽減して接合信頼性がさらに向上する。この場合に、低線膨張係数の導電板をモリブデン,タングステン,黒鉛系炭素などの高融点材として、該導電板の板面に分散形成した貫通穴に、低融点,高導電性材を鋳込んでポスト電極を形成することで、複合構造になるヒートスプレッダを簡易な工程で製造できる。
As described above, a heat spreader is formed by forming a dissimilar metal film such as Ni, Ni-P, Ni-P / Au plating film on one side of the heat spreader, and brazing (solder bonding) the heat spreader to a semiconductor chip. While improving the wettability between the metal base material and the solder, it is possible to suppress the corrosion reaction at the joint interface and improve the joint reliability. In addition, the lead member (foil, frame, or wire lead member) connected to the heat spreader is corroded at the heat spreader / lead member joint interface by directly selecting and joining the same metal material as the heat spreader metal substrate. There is no risk of reaction and high connection reliability is obtained.
Also, a composite material in which a metal substrate of a heat spreader is formed by dispersing a highly conductive post electrode on a substrate having a low linear expansion coefficient, and a metal layer of the same type as the post electrode is formed on the joint surface side with the wiring lead With this configuration, the effective thermal expansion coefficient of the heat spreader is brought close to the linear expansion coefficient of the semiconductor chip, the thermal stress applied to the solder joint layer is reduced, and the joint reliability is further improved. In this case, a conductive plate with a low linear expansion coefficient is used as a high melting point material such as molybdenum, tungsten, or graphite carbon, and a low melting point, high conductive material is cast into the through holes dispersedly formed on the plate surface of the conductive plate. By forming the post electrode, a heat spreader having a composite structure can be manufactured by a simple process.

また、ヒートスプレッダの金属基材を、複数のブロックに分けて格子状に並置配列し、かつ各ブロック相互間の隙間に金属基材よりも低ヤング率の樹脂,軟質金属などの応力緩和層を充填して一体化したブロック集合体と、該ブロック集合体の端面に重ねて配線リードとの接合面側に積層した電極基板とで構成することにより、熱サイクルに伴うストレスを前記応力緩和層で吸収してろう付けの接合信頼性が向上する。また、樹脂の応力緩和層に高伝熱性,ないし導電性のフィラーを混入することで、応力緩和機能と併せてヒートスプレッダの伝熱性,導電性を向上できる。   In addition, the heat spreader metal base is divided into a plurality of blocks and arranged side by side in a grid, and the space between each block is filled with a stress relaxation layer such as a resin or soft metal having a lower Young's modulus than the metal base The stress relaxation layer absorbs the stress associated with the thermal cycle by constructing the block assembly integrated with each other and the electrode substrate laminated on the end surface of the block assembly and laminated on the joint surface side with the wiring lead. As a result, the brazing joint reliability is improved. In addition, by incorporating a highly heat conductive or conductive filler into the stress relaxation layer of the resin, the heat transfer and conductivity of the heat spreader can be improved together with the stress relaxation function.

以下、本発明の実施の形態を図1,図2,図3に示す各実施例に基づいて説明する。なお、実施例の図中で、図4に対応する部材には同じ符号を付してその説明は省略する。   DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be described below based on the respective examples shown in FIGS. In addition, in the figure of an Example, the same code | symbol is attached | subjected to the member corresponding to FIG. 4, and the description is abbreviate | omitted.

図1は、本発明の請求項1,2に対応する実施例の構成図であり、絶縁基板2にマウントした半導体チップ3に対して、該半導体チップ3の上面側主電極面には電極板を兼ねたヒートスプレッダ8がはんだ接合(はんだ層8)されており、このヒートスプレッダ7の上面にリード部材として、図示例ではストラップ状(平板導体)の配線リード4が接続されている。なお、配線リードはワイヤリードであってもよい。
ここで、ヒートスプレッダ7は、アルミ,アルミ合金,もしくは銅,銅合金の金属基材7aに対してその片方の面に異種金属膜7bを成膜した上で、この異種金属膜7bを半導体チップ3に向けてはんだ接合している。また、配線リード4はヒートスプレッダ7の金属基材7aの材質と同種金属であり、配線リード4の端部をヒートスプレッダ7の上面に重ね合わせて直接接合(例えば、超音波接合)するようにしている。
FIG. 1 is a configuration diagram of an embodiment corresponding to claims 1 and 2 of the present invention. In contrast to a semiconductor chip 3 mounted on an insulating substrate 2, an electrode plate is formed on the upper main electrode surface of the semiconductor chip 3. A heat spreader 8 also serving as a solder joint (solder layer 8) is connected to the upper surface of the heat spreader 7 as a lead member, in the illustrated example, a strap-like (flat conductor) wiring lead 4 is connected. The wiring lead may be a wire lead.
Here, the heat spreader 7 forms a dissimilar metal film 7b on one surface of a metal base 7a made of aluminum, aluminum alloy, or copper or copper alloy, and then disposes the dissimilar metal film 7b on the semiconductor chip 3. Soldered toward. Further, the wiring lead 4 is made of the same metal as the material of the metal base 7a of the heat spreader 7, and the end of the wiring lead 4 is superposed on the upper surface of the heat spreader 7 and directly joined (for example, ultrasonic joining). .

すなわち、ヒートスプレッダ7の金属基材7aがアルミであれば配線リード4もアルミ材質とし、金属基材7aが銅であれば銅製の配線リード4を使用する。また、前記の異種金属膜7bは、はんだ濡れ性を高め、かつ接合界面の腐食反応に対するバリア層としても機能し、アルミ,アルミ合金の金属基材7aにNiめっきを、銅,銅合金の金属基材7aにはNi−Pめっき,もしくはNi−P/Auの多層メッキを施すものとする。なお、異種金属膜7bはスパッタリング法で成膜することもできる。
上記の構成により、半導体チップ3の発生熱は絶縁基板2およびヒートスプレッダ7に伝熱し、ヒートスプレッダ7においては半導体チップ3の中央に集中する発熱をチップ全域に分散させ、さらにヒートスプレッダ7に接続した配線リード4を伝熱経路としてチップ上面側からの放熱を促進させるように機能する。また、ヒートスプレッダ7はその金属基材7aの端面に成膜した異種金属膜7bがはんだ層8に対して良好な接合性をと併せて、接合界面での腐食反応を抑止して高い接合信頼性を確保する。さらに、ヒートスプレッダ7の金属基材7aと配線リード4とは同種金属を選択して直接接合することで、異種金属の接合界面に生じるような腐食反応のおそれなしに、安定した接続信頼性を確保でき、これにより半導体モジュールの信頼性が向上する。
That is, if the metal base 7a of the heat spreader 7 is aluminum, the wiring lead 4 is also made of an aluminum material, and if the metal base 7a is copper, the copper wiring lead 4 is used. The dissimilar metal film 7b enhances solder wettability and also functions as a barrier layer against the corrosion reaction at the joint interface. Ni plating is applied to the aluminum or aluminum alloy metal substrate 7a, and copper or copper alloy metal. The substrate 7a is subjected to Ni-P plating or Ni-P / Au multilayer plating. The dissimilar metal film 7b can also be formed by a sputtering method.
With the above configuration, the heat generated by the semiconductor chip 3 is transferred to the insulating substrate 2 and the heat spreader 7. In the heat spreader 7, the heat generated in the center of the semiconductor chip 3 is dispersed throughout the chip, and the wiring leads connected to the heat spreader 7. 4 functions as a heat transfer path to promote heat dissipation from the upper surface side of the chip. Further, the heat spreader 7 has a high bonding reliability by suppressing the corrosion reaction at the bonding interface while the dissimilar metal film 7b formed on the end surface of the metal base 7a has a good bonding property to the solder layer 8. Secure. Furthermore, the metal base material 7a of the heat spreader 7 and the wiring lead 4 are selected from the same kind of metal and directly joined to ensure stable connection reliability without the risk of a corrosion reaction occurring at the joining interface of dissimilar metals. This improves the reliability of the semiconductor module.

次に、先記実施例1を改良した本発明の請求項3,4に対応する実施例を図2(a),(b)に示す。この実施例は、ヒートスプレッダ7の実効的な線膨張係数を半導体チップに近づけるように低めてはんだ層8に作用する熱ストレスを低減するようにしたものである。そのために、ヒートスプレッダ7の金属基材7を、低線膨張係数の基材(板)7cに高導電性のポスト電極7dを分散形成し、さらに配線リード4との接合面側にポスト電極7dに連なる電極層7eを成層した複合材で構成している。ここで、前記の低線膨張係数基材7cはモリブデン,タングステン,黒鉛系炭素などの高融点材で、この基材7cの板面に分散形成した貫通穴に、低融点,高導電性材(銅,アルミなど)を鋳込んでポスト電極7dを形成し、同じ鋳造工程で導電板7cの上面側に成層して電極層7eを形成する。そして、金属基材7aの下面側には実施例1と同様な異種金属膜7bを成膜して半導体チップ3とはんだ接合するようにしている。 Next, an embodiment corresponding to claims 3 and 4 of the present invention, which is an improvement of the first embodiment, is shown in FIGS. In this embodiment, the effective linear expansion coefficient of the heat spreader 7 is lowered so as to be close to the semiconductor chip, so that the thermal stress acting on the solder layer 8 is reduced. For this purpose, the metal base material 7 of the heat spreader 7 is formed by dispersing and forming a highly conductive post electrode 7d on a base material (plate) 7c with a low linear expansion coefficient, and further on the post electrode 7d on the joint surface side with the wiring lead 4. It is composed of a composite material in which continuous electrode layers 7e are formed. Here, the low linear expansion coefficient base material 7c is a high-melting-point material such as molybdenum, tungsten, and graphite-based carbon, and the low-melting-point, high-conductivity material (in the through holes dispersedly formed on the plate surface of the base material 7c). The post electrode 7d is formed by casting (copper, aluminum, etc.), and the electrode layer 7e is formed by stacking on the upper surface side of the conductive plate 7c in the same casting process. Then, a dissimilar metal film 7b similar to that of the first embodiment is formed on the lower surface side of the metal base 7a and soldered to the semiconductor chip 3.

上記の構成により、ヒートスプレッダ7の実効的な線膨張係数は前記の低線膨張係数,高融点の基材7cに近似して低減し、半導体チップ3との線膨張係数差が減少する。これにより、熱サイクルによりはんだ層8に作用する熱ストレスが小さくなって接合信頼性が向上する。   With the above-described configuration, the effective linear expansion coefficient of the heat spreader 7 is reduced to approximate the low linear expansion coefficient and the high melting point base material 7c, and the difference in linear expansion coefficient with the semiconductor chip 3 is reduced. Thereby, the thermal stress which acts on the solder layer 8 by a thermal cycle becomes small, and joining reliability improves.

図3(a),(b)は本発明の請求項5,6に対応する応用実施例であり、この実施例では熱サイクルに伴い半導体チップ/ヒートスプレッダ間を接合するはんだ層8に作用する熱ストレスを緩和させるために、ヒートスプレッダ7の金属基材7aを、複数の基材ブロック7a−1に分けて格子状に並置配列し、かつ各基材ブロック7a−1の相互間隙間に応力緩和層7fを充填して一体化したブロック集合体と、該ブロック集合体の端面に重ねて配線リード4との接続面側に積層した電極基板7a−2とから構成している。
ここで、個々の基材ブロック7a−1は、実施例1あるいは2で述べた金属基材と同様な構造になり、応力緩和層7fには、基材ブロック7a−1よりも低ヤング率の樹脂,軟質金属,もしくは樹脂に高伝熱性,ないし導電性のフィラーを混入した材質を採用している。また、はんだ接合面側に異種金属膜7bを形成し、配線リード4はヒートスプレッダ7の金属基材7aと同種金属のリードを用いることは先記の各実施例と同様である。
なお、前記の構成で基材ブロック7a−1のブロック集合体に電極基板7a−2を結合する組立方法は、複数に分けて格子状に並べた基材ブロック7a−1を薄い接着シートに貼り付けて仮組立した上で、この接着シートを挟んでブロック集合体の端面に電極基板7a−2を重ね合わせ、この状態で例えば超音波接合法などにより接着シートを突き抜いて電極基板7a−2を各基材ブロック7a−1に接合し、その後に基材ブロック7−1の相互間の隙間に応力緩和層7fを充填する。あるいは、同一面上で格子状に並べた基材ブロック7a−1の相互間隙間および周面に樹脂(応力緩和層7)を充填,被覆して一体化した後、ブロック集合体の端面に電極基板7a−2を接合する。
FIGS. 3 (a) and 3 (b) are application embodiments corresponding to claims 5 and 6 of the present invention. In this embodiment, heat acting on the solder layer 8 that joins between the semiconductor chip and the heat spreader with a thermal cycle. In order to relieve stress, the metal base material 7a of the heat spreader 7 is divided into a plurality of base material blocks 7a-1 and arranged side by side in a lattice pattern, and a stress relaxation layer is provided between the mutual gaps of the base material blocks 7a-1. The block assembly is integrated by filling with 7f, and the electrode substrate 7a-2 is stacked on the end surface of the block assembly and stacked on the connection surface side with the wiring lead 4.
Here, each base material block 7a-1 has the same structure as the metal base material described in Example 1 or 2, and the stress relaxation layer 7f has a lower Young's modulus than the base material block 7a-1. It is made of resin, soft metal, or resin mixed with highly heat conductive or conductive filler. Further, as in the above-described embodiments, the dissimilar metal film 7b is formed on the solder joint surface side, and the lead of the same metal as the metal base 7a of the heat spreader 7 is used as the wiring lead 4.
The assembly method of joining the electrode substrate 7a-2 to the block assembly of the base material block 7a-1 with the above-described configuration is to paste the base material block 7a-1 divided into a plurality of grids on a thin adhesive sheet. After the temporary assembly, the electrode substrate 7a-2 is superposed on the end surface of the block assembly with the adhesive sheet interposed therebetween, and in this state, the adhesive sheet is punched out by, for example, ultrasonic bonding or the like, and the electrode substrate 7a-2 is placed. Is joined to each base material block 7a-1, and then the stress relaxation layer 7f is filled in the gap between the base material blocks 7-1. Alternatively, the gaps between the base material blocks 7a-1 arranged in a lattice pattern on the same surface and the peripheral surface are filled with a resin (stress relaxation layer 7) and integrated to form an electrode, and then an electrode is applied to the end surface of the block assembly. The substrate 7a-2 is bonded.

上記の構成によれば、熱サイクルに伴う金属基材7aのブロックの膨張,収縮を前記の応力緩和層7fが吸収する。これにより、はんだ層8に加わる熱ストレスを緩和して先記実施例2と同様に接合信頼性が向上する。
また、この場合に応力緩和層7fとして、樹脂にアルミナ,窒化ホウ素などの微粒なフィラーを混入することにより、ヒートスプレッダ7としての伝熱性が向上する。また、樹脂に銀,銅などの微粒なフィラーを添加することで導電性が向上する。
なお、以上述べた実施例1〜3は、いずれも半導体チップ3とヒートスプレッダ7との間をはんだ接合しているが、はんだ以外のろう材でろう付けした構造に適用しても同等な効果を奏することができる。また、半導体装置のパッケージ形態についても、絶縁基板2に半導体チップ3をマウントした図示実施例の構造に限定されるものではなく、例えば表面実装形式のデバイス,スタッド形式のマルチチップ素子で構成した半導体装置にも同様に適用できる。
According to said structure, the said stress relaxation layer 7f absorbs the expansion | swelling and shrinkage | contraction of the block of the metal base material 7a accompanying a heat cycle. Thereby, the thermal stress applied to the solder layer 8 is alleviated, and the joining reliability is improved as in the second embodiment.
In this case, the heat transfer property as the heat spreader 7 is improved by mixing a fine filler such as alumina or boron nitride into the resin as the stress relaxation layer 7f. Moreover, electroconductivity improves by adding fine fillers, such as silver and copper, to resin.
In each of the first to third embodiments described above, the semiconductor chip 3 and the heat spreader 7 are joined by soldering, but the same effect can be obtained even when applied to a structure brazed with a brazing material other than solder. Can play. Further, the package form of the semiconductor device is not limited to the structure of the illustrated embodiment in which the semiconductor chip 3 is mounted on the insulating substrate 2, and for example, a semiconductor device constituted by a surface mount type device or a stud type multichip element. The same applies to the device.

本発明の実施例1に対応する実施例のパッケージ組立構造の側視断面図Side view sectional drawing of the package assembly structure of the Example corresponding to Example 1 of this invention 本発明の実施例2に対応する実施例の構成図で、(a)は側視断面図、(b)は(a)における矢視X−X断面図It is a block diagram of the Example corresponding to Example 2 of this invention, (a) is sectional drawing by a side view, (b) is sectional drawing by XX in (a). 本発明の実施例3に対応する実施例の構成図で、(a)は側視断面図、(b)は(a)における矢視X−X断面図It is a block diagram of the Example corresponding to Example 3 of this invention, (a) is sectional drawing by a side view, (b) is sectional drawing by XX in (a). パワー半導体モジュールを例にした従来のパッケージ組立構造図Conventional package assembly structure example using power semiconductor module

符号の説明Explanation of symbols

2 絶縁基板
3 半導体チップ
4 配線リード
7 ヒートスプレッダ
7a−1 基材ブロック
7a−2 電極基板
7b 異種金属膜
7c 低線膨張係数基材
7d ポスト電極
7e 電極層
7f 応力緩和層
8 はんだ層
2 Insulating substrate 3 Semiconductor chip 4 Wiring lead 7 Heat spreader 7a-1 Base material block 7a-2 Electrode substrate 7b Dissimilar metal film 7c Low linear expansion coefficient base material 7d Post electrode 7e Electrode layer 7f Stress relaxation layer 8 Solder layer

Claims (6)

半導体チップの主電極面に重ねて電極板兼用のヒートスプレッダをろう付けした上で、該ヒートスプレッダにリード部材を接続した半導体装置において、
前記ヒートスプレッダの金属基材の片面にろう材との接合性を高める異種金属膜を成膜した上で、該面を半導体チップにろう付けし、他方の面にヒートスプレッダの基材と同種金属のリード部材を直接接合したことを特徴とする半導体装置。
In a semiconductor device in which a lead spreader is connected to the heat spreader after brazing a heat spreader also serving as an electrode plate overlaid on the main electrode surface of the semiconductor chip,
A dissimilar metal film that improves the bondability to the brazing material is formed on one side of the metal base of the heat spreader, and then the surface is brazed to the semiconductor chip, and the lead of the same metal as the base of the heat spreader is formed on the other side. A semiconductor device characterized in that members are directly joined.
請求項1記載の半導体装置において、ヒートスプレッダの金属基材がアルミ,アルミ合金もしくは銅,銅合金で、該金属基材の片面に成膜した異種金属膜がNi,Ni-P,Ni-P/Auめっき膜のいずれかであることを特徴とする半導体装置。 2. The semiconductor device according to claim 1, wherein the metal base of the heat spreader is aluminum, aluminum alloy, copper, or copper alloy, and the dissimilar metal film formed on one side of the metal base is Ni, Ni-P, Ni-P /. A semiconductor device characterized by being one of Au plating films. 請求項1記載の半導体装置において、ヒートスプレッダの金属基材が、低線膨張係数の基材に高導電性のポスト電極を分散形成し、さらに配線リードとの接合面側に前記ポスト電極と連なる電極層を成層した複合材になることを特徴とする半導体装置。 2. The semiconductor device according to claim 1, wherein the metal base of the heat spreader is formed by dispersing and forming highly conductive post electrodes on a base having a low linear expansion coefficient, and further connecting to the post electrodes on the joint surface side with the wiring lead. A semiconductor device characterized by being a composite material in which layers are formed. 請求項3記載の半導体装置において、低線膨張係数の導電板がモリブデン,タングステン,黒鉛系炭素などの高融点材であり、該導電板の板面に分散形成した貫通穴に、低融点,高導電性材を鋳込んでポスト電極を形成したことを特徴とする半導体装置。 4. The semiconductor device according to claim 3, wherein the conductive plate having a low linear expansion coefficient is a high-melting point material such as molybdenum, tungsten, or graphite-based carbon. A semiconductor device, wherein a post electrode is formed by casting a conductive material. 請求項1記載の半導体装置において、ヒートスプレッダの金属基材を、複数の基材ブロックに分けて格子状に並置配列し、かつ各基材ブロックの相互間に応力緩和層を充填して一体化したブロック集合体と、該ブロック集合体の端面に重ねて配線リードとの接合面側に積層した電極基板からなることを特徴とする半導体装置。 2. The semiconductor device according to claim 1, wherein the metal base material of the heat spreader is divided into a plurality of base material blocks and juxtaposed in a lattice shape, and a stress relaxation layer is filled and integrated between the base material blocks. A semiconductor device comprising: a block assembly; and an electrode substrate stacked on an end surface of the block assembly and stacked on a joint surface side with a wiring lead. 請求項5記載の半導体装置において、応力緩和層が金属基材よりも低ヤング率の樹脂,軟質金属,もしくは樹脂に高伝熱性,ないし導電性のフィラーを混入した材質であることを特徴とする半導体装置。 6. The semiconductor device according to claim 5, wherein the stress relaxation layer is a resin having a lower Young's modulus than that of the metal substrate, a soft metal, or a material in which a highly heat conductive or conductive filler is mixed in the resin. Semiconductor device.
JP2005271987A 2005-09-20 2005-09-20 Semiconductor device Pending JP2007088030A (en)

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