CN106876357A - Electrode for chip package and the chip-packaging structure using the electrode - Google Patents

Electrode for chip package and the chip-packaging structure using the electrode Download PDF

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Publication number
CN106876357A
CN106876357A CN201710059134.4A CN201710059134A CN106876357A CN 106876357 A CN106876357 A CN 106876357A CN 201710059134 A CN201710059134 A CN 201710059134A CN 106876357 A CN106876357 A CN 106876357A
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CN
China
Prior art keywords
electrode
chip
matrix
conductive material
conductive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201710059134.4A
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Chinese (zh)
Inventor
付猛
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shenzhen Bencent Electronics Co., Ltd.
Original Assignee
Dongguan Agam Semiconductor Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Dongguan Agam Semiconductor Co Ltd filed Critical Dongguan Agam Semiconductor Co Ltd
Priority to CN201710059134.4A priority Critical patent/CN106876357A/en
Publication of CN106876357A publication Critical patent/CN106876357A/en
Pending legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/492Bases or plates or solder therefor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3114Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed the device being a chip scale package, e.g. CSP
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

There is provided a kind of electrode for chip package, the electrode includes matrix, and the scope of the coefficient of expansion of the matrix is 0 12 × 10‑6/ DEG C and the material of the matrix be:One kind in graphite, tungsten and metalized non-conductive material;Or one or more composites formed with the first conductive material in graphite, tungsten and non-conducting material.A kind of chip-packaging structure is additionally provided, including:Chip;And one or more electrodes as described above for being connected with the chip.

Description

Electrode for chip package and the chip-packaging structure using the electrode
Technical field
The present invention relates to encapsulated electrode, the particularly electrode for chip package and the chip package knot using the electrode Structure.
Background technology
Power chip application when on the one hand need good radiating, on the other hand temperature rise and decline circulation or Will cause that chip produces cracking when being mismatched with chip due to the thermal coefficient of expansion of heat sink electrodes during the thermal fatigue tests such as impact And fail.
Traditional chip package is welded with two copper electrodes on the both sides of chip, overall to be formed using ceramics or plastic packaging again. Because the radiating of copper and conduction are preferable, but its thermal coefficient of expansion is higher, tired in temperature cycles (- 40 DEG C -85 DEG C) or impact etc. Labor is easy to for chip to pull cracking when testing.Using copper as thermal fatigue properties such as its radiatings of electrode and temperature cycles or impact Can not be compatible.Accordingly, it would be desirable to develop a kind of chip package electrode, prevent from damaging and failing in temperature cycles process chips.
The content of the invention
It is an object of the invention to provide a kind of electrode for chip package, to solve chip in temperature cycles or impact etc. Being pullled by electrode during thermal fatigue test causes the problem of damage.
To realize object above, the present invention provides a kind of electrode for chip package, and the electrode includes matrix, the matrix The coefficient of expansion scope be 0-12 × 10-6/ DEG C and the material of the matrix be:
One kind in graphite, tungsten and metalized non-conductive material;Or
One or more composites formed with the first conductive material in graphite, tungsten and non-conducting material.
Further, first conductive material is that thermal conductivity is the metal or metallic composite of 60-600W/m ﹒ k.
Preferably, first conductive material is copper, aluminium or silver or is the alloy containing copper, aluminium or silver.
Further, the non-conducting material is AlN, BeO, Al2O3Or SiC.
Further, the electrode also includes at least one of metal level of the outer surface for covering the matrix.
Preferably, the material of the metal level is one or more in copper, silver, gold, platinum, palladium, aluminium, molybdenum, manganese or nickel, or its In one or more with other materials formed composite.
Further, the matrix has porous even pore structure, and the electrode also includes be filled in the hole in the matrix second Conductive material.
Further, second conductive material is that thermal conductivity is the metal or metallic composite of 60-600W/m ﹒ k.
Preferably, second conductive material be copper, aluminium, silver, gold in one kind, or two or more formed mixing Thing, or one or more composites with other materials.
Further, the matrix is provided with one or more through holes, and the electrode also includes the conductive pole being arranged in the through hole.
Further, the material of the conductive pole is that thermal conductivity is the metal or metallic composite of 60-600W/m ﹒ k.
Further, it is provided with conductive layer on the side wall of the through hole.
The present invention also provides a kind of chip-packaging structure, including:
Chip;And
One or more electrodes as described above being connected with the chip.
Electrode for chip package of the invention, using the one kind in graphite, tungsten and metalized non-conductive material;Or stone One or more composites formed with the first conductive material in ink, tungsten and non-conducting material as electrode matrix Material, the thermal coefficient of expansion of these materials is approached with the thermal coefficient of expansion of chip, and with preferable electrical and thermal conductivity, Ke Yizuo Chip is caused to damage for electrode material will not simultaneously be pullled chip during temperature cycles simultaneously.
Brief description of the drawings
Fig. 1 is the schematic diagram of the matrix of embodiments of the invention.
Fig. 2 is the profile of the electrode of embodiments of the invention.
Fig. 3 A are the top views of the electrode of another embodiment of the present invention.
Fig. 3 B-D are the longitudinal profiles of the porous even pore structure of certain embodiments of the present invention.
Fig. 4 is the profile of the electrode of another embodiment of the present invention.
Fig. 5 is the profile of the electrode of another embodiment of the present invention.
Fig. 6 is the profile of the electrode of another embodiment of the present invention.
Fig. 7 is the profile of the electrode of another embodiment of the present invention.
Fig. 8 is the profile of the chip-packaging structure of certain embodiments of the present invention.
Specific embodiment
In order to make the purpose , technical scheme and advantage of the present invention be clearer, it is right below in conjunction with drawings and Examples The present invention is further elaborated.It should be appreciated that the specific embodiments described herein are merely illustrative of the present invention, and It is not used in the restriction present invention.
Referring to Fig. 1, in certain embodiments, electrode of the invention includes matrix 102, the coefficient of expansion of the matrix 102 Scope is 0-12 × 10-6/℃.The material of the matrix can be formed as shown in part A in Fig. 1 by single material, it is preferable that should The material of matrix is the one kind in graphite, tungsten and metalized non-conductive material.The material of the matrix can be such as part B institute in Fig. 1 Show, formed by composite, it is preferable that the matrix is by one or more in graphite, tungsten and non-conducting material with first The composite that conductive material is formed is formed.
Electrode for chip package of the invention, using the one kind in graphite, tungsten and metalized non-conductive material;Or stone One or more composites formed with the first conductive material in ink, tungsten and non-conducting material as electrode matrix Material, the thermal coefficient of expansion of these materials is approached with the thermal coefficient of expansion of chip, and with preferable electrical and thermal conductivity, Ke Yizuo Chip is caused to damage for electrode material will not simultaneously be pullled chip during temperature cycles simultaneously.
In certain embodiments, first conductive material is that thermal conductivity is the metal or metallic composite of 60-600W/m ﹒ k. Preferably, first conductive material is copper, aluminium or silver, or is the alloy containing copper, aluminium or silver.In certain embodiments, should Non-conducting material can be AlN, BeO, Al2O3Or SiC.
Referring to Fig. 2, in certain embodiments, the electrode for chip package of the invention also includes covering the matrix 102 Outer surface at least one of metal level 104.The metal level 104 can only cover of the outer surface of the matrix 102 Point, for example, only paying the lower surface of covering matrix 102, or only cover lower surface and side.Preferably, the metal level 104 covering should The whole outer surface of matrix 102.Preferably, the material of the metal level is in copper, silver, gold, platinum, palladium, aluminium, molybdenum, manganese or nickel Plant or various, or the composite for being formed with other materials for one or more therein.
Metal level is covered by the outer surface of matrix, the heat conductivility of electrode can be further improved, it is possible to reduce The stress that electrode pair chip is produced during temperature cycles.
Referring to Fig. 3, Fig. 3 is the top view of electrode of the invention.In certain embodiments, matrix 102 has porous even hole Structure 106, the second conductive material 108 is filled with porous even pore structure 106.In one embodiment, second conductive material For thermal conductivity is the metal or metallic composite of 60-600W/m ﹒ k.Preferably, second conductive material is copper, aluminium, silver, Jin Zhong One kind, or two or more mixture for being formed, or one or more composites with other materials.
Porous even pore structure herein refers to have multiple holes in the structure, and at least a portion hole in this some holes is Up/down perforation, can be mutually communicated between Kong Yukong to be spaced from each other.Referring to Fig. 3 B-D, Fig. 3 B-D be it is of the invention certain The longitudinal profile of the porous even pore structure of a little embodiments.As shown in Figure 3 B, in certain embodiments, the hole 22 in loose structure 20 The bottom surface of material is penetrated into from the top surface of material.Also just say, when matrix has loose structure, top surface insertion of the hole 22 from matrix To the bottom surface of matrix, the bottom surface of matrix is also penetrated into from the top surface of matrix so as to the second conductive material for being filled in hole 22.In figure It is disconnected between each hole 22 in 3B.But in certain embodiments, can be between two holes 22 in multiple holes 22 Connection, as shown in Figure 3 C.The direction in the hole in Fig. 3 B and Fig. 3 C is generallyperpendicular, but in certain embodiments, it is porous The shape in the hole in structure 20 can be with irregular, and hole can arbitrarily extend in the material, as long as can prolong from the top surface of material Bottom surface is reached, as shown in Figure 3 D.
By setting porous even pore structure to matrix, then the hole in porous even pore structure is filled with the second conductive material, can To adjust the thermal coefficient of expansion of whole electrode so that the overall thermal coefficient of expansion of electrode is matched with chip, can prevent electrode from existing Chip is caused to damage failure chip generation pulling force during temperature cycles.
Additionally, the overall thermal expansion character in order to adjust electrode, as shown in figure 4, Fig. 4 is the side cut away view of electrode, base Body 102 can also set through hole 110, and the setting conductive pole 112 in the through hole 110.The quantity of through hole 110 can be one Individual or multiple, can set the through hole of varying number, so as to adjust the bulk expansion characteristic of electrode according to actual conditions.In order to increase The heat conductivility of pole is powered up, the material of the conductive pole 112 is that thermal conductivity is the metal or metallic composite of 60-600W/m ﹒ k.
Referring to Fig. 5, conductive layer 114 is also provided with the side wall of the through hole on matrix.Preferably, conductive layer can be Metal level.As shown in fig. 6, through hole is provided with matrix, and the side wall of through hole and the outer surface of matrix are all covered with metal level 104, conductive pole is set in through-holes.The electrode structure of the present embodiment, not only with the coefficient of expansion matched with chip, and tool There is good conduction and heat conductivility.
In certain embodiments, as shown in fig. 7, the matrix of electrode of the invention is provided with through hole, conductive pole is arranged on logical Kong Zhong, metal level 104 covers the whole outer surface of conductive pole and matrix.The electrode structure of the present embodiment, it is same to have and core The coefficient of expansion of piece matching, and with good conduction and heat conductivility.
Each embodiment of electrode of the present invention is described above is, these embodiments can individually be implemented, or different implementations Example between can combine, such as in one embodiment refer to material can another embodiment in, same one embodiment In structure can also be combined with the structure of other embodiment, the embodiments herein be used only for citing, be not construed as to this hair Bright limitation.
The present invention also provides a kind of chip-packaging structure, including:Chip;And one or more be connected with the chip as Electrode recited above.Wherein when electrode includes matrix and the second material, the matrix and second material pass through solder layer Or be conductively connected thing and be connected with the chip;When electrode includes matrix and conductive pole, the matrix and the conductive pole pass through solder Layer is conductively connected thing and is connected with the chip.Chip-packaging structure in an embodiment of the present invention, leads between chip and electrode Cross solder layer connection.Referring to Fig. 8, in certain embodiments, chip-packaging structure include the electrodes of two embodiment of the present invention and Chip 202 between two electrodes is set, and wherein each electrode includes matrix 102 and is arranged in the through hole 110 of matrix 102 Conductive pole 112, wherein matrix 102 and conductive pole 112 be connected by solder layer 204 with chip 202.In other embodiments In, the matrix and the conductive pole can also be connected by being conductively connected thing with the chip.
Below only list using the chip-packaging structure of above mentioned one of which electrode, but encapsulating structure can To use above mentioned any one electrode structure, will not be repeated here.
In certain embodiments, the chip-packaging structure is TSS (Thyristor Surge Suppressor, IGCT Surgesuppressor) chip-packaging structure, the TSS chip-packaging structures include TSS chips, two electrodes, one of electrode with The upper surface connection of TSS chips, another electrode is connected with the lower surface of TSS chips.Two electrodes pass through solder layer respectively It is connected with TSS chips.Also, it is to be understood that chip-packaging structure of the invention is not limited to TSS chip-packaging structures, the above is only It is merely illustrative of, chip-packaging structure of the invention can also be the encapsulating structure of arbitrary semiconductor chip.The chip is sealed Chip in assembling structure can be the semiconductor chip being made up of the base chip material such as silicon, germanium, GaAs.
Presently preferred embodiments of the present invention is the foregoing is only, is not intended to limit the invention, it is all in essence of the invention Any modification, equivalent and improvement made within god and principle etc., should be included within the scope of the present invention.

Claims (13)

1. a kind of electrode for chip package, the electrode includes matrix, and the scope of the coefficient of expansion of the matrix is 0-12 × 10-6/ DEG C and the material of the matrix be:
One kind in graphite, tungsten and metalized non-conductive material;Or
One or more composites formed with the first conductive material in graphite, tungsten and non-conducting material.
2. electrode as claimed in claim 1, it is characterised in that first conductive material is that thermal conductivity is the metal of 60-600W/m ﹒ k Or metallic composite.
3. electrode as claimed in claim 2, it is characterised in that first conductive material is copper, aluminium or silver, or be containing copper, The alloy of aluminium or silver.
4. electrode as claimed in claim 1, it is characterised in that the non-conducting material is AlN, BeO, Al2O3Or SiC.
5. electrode as claimed in claim 1, it is characterised in that the electrode also includes covering at least the one of the outer surface of the matrix Partial metal level.
6. electrode as claimed in claim 5, it is characterised in that the material of the metal level is copper, silver, gold, platinum, palladium, aluminium, molybdenum, manganese Or one or more in nickel, or the composite for being formed with other materials for one or more therein.
7. electrode as claimed in claim 1, it is characterised in that the matrix has porous even pore structure, the electrode also includes filling out The second conductive material in the hole filled in the matrix.
8. electrode as claimed in claim 7, it is characterised in that second conductive material is that thermal conductivity is the gold of 60-600W/m ﹒ k Category or metallic composite.
9. electrode as claimed in claim 8, it is characterised in that second conductive material is the one kind in copper, aluminium, silver, gold, or Two or more mixture for being formed, or one or more composites with other materials.
10. electrode as claimed in claim 1, it is characterised in that the matrix is provided with one or more through holes, and the electrode is also wrapped Include the conductive pole being arranged in the through hole.
11. electrodes as claimed in claim 10, it is characterised in that the material of the conductive pole is that thermal conductivity is 60-600W/m ﹒ k's Metal or metallic composite.
12. electrodes as claimed in claim 11, it is characterised in that be provided with conductive layer on the side wall of the through hole.
A kind of 13. chip-packaging structures, including:
Chip;And
One or more electrodes as described in claim any one of 1-6 being connected with the chip, or one or more and this The electrode as described in claim any one of 6-9 of chip connection, the wherein matrix and second material by solder layer or Thing is conductively connected to be connected with the chip, or one or more be connected with the chip as described in claim any one of 9-12 Electrode, the wherein matrix and the conductive pole by solder layer or are conductively connected thing and are connected with the chip.
CN201710059134.4A 2017-01-24 2017-01-24 Electrode for chip package and the chip-packaging structure using the electrode Pending CN106876357A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201710059134.4A CN106876357A (en) 2017-01-24 2017-01-24 Electrode for chip package and the chip-packaging structure using the electrode

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201710059134.4A CN106876357A (en) 2017-01-24 2017-01-24 Electrode for chip package and the chip-packaging structure using the electrode

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CN106876357A true CN106876357A (en) 2017-06-20

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Citations (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0340453A (en) * 1990-01-16 1991-02-21 Sumitomo Electric Ind Ltd High frequency high output transistor package
US6108190A (en) * 1997-12-01 2000-08-22 Kyocera Corporation Wafer holding device
CN1330403A (en) * 2000-06-29 2002-01-09 国际商业机器公司 Polymer-ceramic composite electronic substrate
JP2003203932A (en) * 2002-01-07 2003-07-18 Sanken Electric Co Ltd Semiconductor device and manufacturing method thereof
JP2004289063A (en) * 2003-03-25 2004-10-14 Mitsubishi Electric Corp Heat dissipating sheet
CN1685499A (en) * 2002-09-27 2005-10-19 Abb研究有限公司 Press pack power semiconductor module
JP2007088030A (en) * 2005-09-20 2007-04-05 Fuji Electric Holdings Co Ltd Semiconductor device
JP2009252977A (en) * 2008-04-04 2009-10-29 Toyota Central R&D Labs Inc Module formed by bonding low thermal expansion coefficient material and high thermal expansion coefficient material
CN103871972A (en) * 2014-03-31 2014-06-18 华为技术有限公司 Flange, semiconductor power device and integrated circuit board
CN105190871A (en) * 2013-03-13 2015-12-23 施韦策电子公司 Electronic sub-assembly, method for the production thereof and printed circuit board having an electronic sub-assembly
CN206961813U (en) * 2017-01-24 2018-02-02 东莞市阿甘半导体有限公司 Electrode for chip package and the chip-packaging structure using the electrode

Patent Citations (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0340453A (en) * 1990-01-16 1991-02-21 Sumitomo Electric Ind Ltd High frequency high output transistor package
US6108190A (en) * 1997-12-01 2000-08-22 Kyocera Corporation Wafer holding device
CN1330403A (en) * 2000-06-29 2002-01-09 国际商业机器公司 Polymer-ceramic composite electronic substrate
JP2003203932A (en) * 2002-01-07 2003-07-18 Sanken Electric Co Ltd Semiconductor device and manufacturing method thereof
CN1685499A (en) * 2002-09-27 2005-10-19 Abb研究有限公司 Press pack power semiconductor module
JP2004289063A (en) * 2003-03-25 2004-10-14 Mitsubishi Electric Corp Heat dissipating sheet
JP2007088030A (en) * 2005-09-20 2007-04-05 Fuji Electric Holdings Co Ltd Semiconductor device
JP2009252977A (en) * 2008-04-04 2009-10-29 Toyota Central R&D Labs Inc Module formed by bonding low thermal expansion coefficient material and high thermal expansion coefficient material
CN105190871A (en) * 2013-03-13 2015-12-23 施韦策电子公司 Electronic sub-assembly, method for the production thereof and printed circuit board having an electronic sub-assembly
CN103871972A (en) * 2014-03-31 2014-06-18 华为技术有限公司 Flange, semiconductor power device and integrated circuit board
CN206961813U (en) * 2017-01-24 2018-02-02 东莞市阿甘半导体有限公司 Electrode for chip package and the chip-packaging structure using the electrode

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Effective date of registration: 20191111

Address after: 518000 west side of building e, zone a, Hongfa science and Technology Industrial Park, Tangtou community, Shiyan street, Bao'an District, Shenzhen City, Guangdong Province

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Address before: 523808, Guangdong, Dongguan province hi tech Industrial Development Zone Songshan Lake Road, No. 8 venture capital building, 1 floor, 111, 112B, 112C, 112D

Applicant before: Dongguan Agam Semiconductor Co., Ltd.

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Address after: 518000 west side of 1st floor, building e, area a, Hongfa science and Technology Industrial Park, Tangtou community, Shiyan street, Bao'an District, Shenzhen City, Guangdong Province

Applicant after: Shenzhen Penang Electronics Co.,Ltd.

Address before: 518000 west side of 1st floor, building e, area a, Hongfa science and Technology Industrial Park, Tangtou community, Shiyan street, Bao'an District, Shenzhen City, Guangdong Province

Applicant before: Shenzhen Bencent Electronics Co.,Ltd.