JP5957862B2 - Power module substrate - Google Patents

Power module substrate Download PDF

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JP5957862B2
JP5957862B2 JP2011265431A JP2011265431A JP5957862B2 JP 5957862 B2 JP5957862 B2 JP 5957862B2 JP 2011265431 A JP2011265431 A JP 2011265431A JP 2011265431 A JP2011265431 A JP 2011265431A JP 5957862 B2 JP5957862 B2 JP 5957862B2
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layer
heat dissipation
ceramic substrate
circuit layer
power module
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JP2013118299A (en
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亮 村中
亮 村中
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Mitsubishi Materials Corp
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1305Bipolar Junction Transistor [BJT]
    • H01L2924/13055Insulated gate bipolar transistor [IGBT]

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Description

本発明は、大電流、高電圧を制御する半導体装置に用いられるパワーモジュール用基板に関する。   The present invention relates to a power module substrate used in a semiconductor device that controls a large current and a high voltage.

従来のパワーモジュールとして、セラミックス基板の一方の面に、回路層となる金属層が積層され、この回路層の上に半導体チップ等の電子部品がはんだ付けされるとともに、セラミックス基板の他方の面に放熱層となる金属層が形成され、この金属層にヒートシンクが接合された構成のものが知られている。   As a conventional power module, a metal layer serving as a circuit layer is laminated on one surface of a ceramic substrate, and an electronic component such as a semiconductor chip is soldered on the circuit layer, and on the other surface of the ceramic substrate. A structure in which a metal layer to be a heat dissipation layer is formed and a heat sink is joined to the metal layer is known.

そして、このようなパワーモジュールに用いられるパワーモジュール用基板においては、セラミックス基板の両側に接合される回路層と放熱層との絶縁性を向上させるために様々な対策がなされている。また、電子部品に流れる電流が大きいと、電子部品自体の発熱だけでなく、ボンディングワイヤ等の配線部にもジュール熱が発生する。そのため、通電時には電子部品及び配線部の発熱と、非通電時にはヒートシンクによる冷却とにより温度変化が短時間に繰り返し作用する(一般的にパワーサイクルという)。このため、主に配線接合部とはんだ接合部において剥離やボイドが進展し熱抵抗の上昇が問題となり、パワーサイクル耐性向上が求められている。   And in the power module substrate used for such a power module, various measures are taken in order to improve the insulation between the circuit layer and the heat dissipation layer bonded to both sides of the ceramic substrate. In addition, when the current flowing through the electronic component is large, not only the heat of the electronic component itself but also Joule heat is generated in the wiring portion such as a bonding wire. For this reason, a temperature change repeatedly acts in a short time (generally referred to as a power cycle) due to heat generation of the electronic components and the wiring part when energized and cooling by a heat sink when not energized. For this reason, peeling and voids develop mainly at the wiring joint and the solder joint, and the rise in thermal resistance becomes a problem, and improvement in power cycle resistance is required.

例えば、特許文献1では、セラミックス基板と放熱層(金属ベース板)との接合面のまわりに段差を設けることにより、回路層と放熱層との絶縁距離(沿面距離)を大きくして絶縁性を向上させるとともに、パワーサイクル耐性を向上させている。
特許文献2では、電子部品上にヒートスプレッタを配置して配線リードの金属箔を接合することにより、電子部品上面側からの放熱性を高め、パワーサイクル耐性を向上させている。また、特許文献3では、電子部品と回路層との間のはんだ接合部を、中央部で薄く、外周部で厚くして設けることで、熱膨張係数差により生じる応力を吸収緩和させてパワーサイクル耐性を向上させている。
For example, in Patent Document 1, by providing a step around the joint surface between the ceramic substrate and the heat dissipation layer (metal base plate), the insulation distance (creeping distance) between the circuit layer and the heat dissipation layer is increased, thereby providing insulation. As well as improving power cycle resistance.
In Patent Document 2, by disposing a heat spreader on an electronic component and joining a metal foil of a wiring lead, heat dissipation from the upper surface side of the electronic component is enhanced and power cycle resistance is improved. In Patent Document 3, the solder joint between the electronic component and the circuit layer is provided thin at the center and thick at the outer periphery to absorb and relieve the stress caused by the difference in thermal expansion coefficient, thereby reducing the power cycle. Improves tolerance.

特許第4496404号公報Japanese Patent No. 4496404 特開2006‐135270号公報JP 2006-135270 A 特開2011‐159994号公報JP 2011-159994 A

しかし、配線接合部やはんだ接合部における熱抵抗によるパワーサイクル耐性の対策がなされている一方で、パワーモジュール用基板を構成する基板におけるパワーサイクル耐性の対策は少ない。   However, while countermeasures against power cycle resistance due to thermal resistance at wiring joints and solder joints have been taken, there are few countermeasures against power cycle tolerance at the substrate constituting the power module substrate.

本発明は、このような事情に鑑みてなされたものであって、パワーモジュール用基板を大型化することなく絶縁性を維持したまま、パワーサイクル耐性を向上させることができるパワーモジュール用基板を提供することを目的とする。   The present invention has been made in view of such circumstances, and provides a power module substrate capable of improving power cycle resistance while maintaining insulation without increasing the size of the power module substrate. The purpose is to do.

本発明は、セラミックス基板の一方の面に電子部品が接合される回路層が積層され、他方の面に放熱層が積層されており、前記放熱層の前記セラミックス基板との接合面とは反対側に、ヒートシンクが接合されるヒートシンク接合面が形成されたパワーモジュール用基板であって、前記セラミックス基板と前記回路層との接合面よりその反対側の電子部品が接合される電子部品搭載面の面積を大きくする張出部が前記回路層の側面の前記電子部品搭載面側に形成され、かつ、前記セラミックス基板と前記放熱層との接合面よりその反対側の前記ヒートシンク接合面の面積を大きくする張出部が前記放熱層の前記ヒートシンク接合面側に形成されており、前記回路層の張出部は、前記セラミックス基板との接合面からの厚さ方向の距離t11が前記回路層の板厚t10の1/4以上1/2以下となるように設定され、前記放熱層の張出部は、前記セラミックス基板との接合面からの厚さ方向の距離t21が前記放熱層の板厚t20の2/5以上7/10以下となるように設定されていることを特徴とする。 In the present invention, a circuit layer to which an electronic component is bonded is laminated on one surface of a ceramic substrate, and a heat dissipation layer is stacked on the other surface, and the heat dissipation layer is opposite to the bonding surface with the ceramic substrate. In addition, a power module substrate on which a heat sink bonding surface to which a heat sink is bonded is formed, and an area of an electronic component mounting surface to which an electronic component opposite to the bonding surface between the ceramic substrate and the circuit layer is bonded An overhanging portion is formed on the electronic component mounting surface side of the side surface of the circuit layer, and the area of the heat sink joint surface opposite to the joint surface between the ceramic substrate and the heat dissipation layer is increased. projecting portion is formed on the heat sink bonding surface side of the heat dissipation layer, overhanging portions of the circuit layer, the distance t11 in the thickness direction from the joint surface between the ceramic substrate The thickness t10 of the circuit layer is set to be ¼ or more and ½ or less of the circuit layer, and the projecting portion of the heat dissipation layer has a distance t21 in the thickness direction from the bonding surface with the ceramic substrate. It is set so that it may become 2/5 or more and 7/10 or less of the plate | board thickness t20 of a layer .

セラミックス基板の一方の面に張出部が設けられた回路層を積層し、セラミック基板の他方の面に張出部が設けられた放熱層を積層することにより、回路層と放熱層との沿面距離を確保し、絶縁性を維持できる。
また、張出部により回路層の体積を増加させ熱容量を増やすことができるので、電子部品の発熱による温度上昇を抑制することができる。放熱層においても、張出部により主面の体積を増加させて熱容量を増やすことができるとともに、ヒートシンク、放熱板などの放熱部材との接合面積を増やすことができるので、放熱性を高めることができる。したがって、パワーサイクル耐性を向上させることができる。
また、セラミックス基板の両面に、回路層及び放熱層を接合する際には、加圧面に対して接合面の面積が小さいため、加圧荷重が十分に接合面に働き、回路層及び放熱層と、セラミックス基板との接合信頼性を向上させることができる。さらに、回路層及び放熱層に設けられた張出部により、接合時の余剰ろう材による回路層の電子部品搭載面及び放熱層のヒートシンク接合面(主面)へのろう材の回り込みが抑制され、ろう材付着に起因する表面のシミ発生が防止され、電子部品等の接合性を向上させることができる。
By laminating a circuit layer with an overhang on one surface of a ceramic substrate and laminating a heat dissipation layer with an overhang on the other surface of the ceramic substrate, the creepage between the circuit layer and the heat dissipation layer A distance can be secured and insulation can be maintained.
Moreover, since the heat capacity can be increased by increasing the volume of the circuit layer by the overhanging portion, it is possible to suppress an increase in temperature due to heat generation of the electronic component. Also in the heat dissipation layer, the volume of the main surface can be increased by the overhanging portion, and the heat capacity can be increased, and the area of the heat sink, heat sink and other heat dissipation members can be increased, so that the heat dissipation can be improved. it can. Therefore, power cycle tolerance can be improved.
In addition, when the circuit layer and the heat dissipation layer are bonded to both surfaces of the ceramic substrate, the area of the bonding surface is small with respect to the pressure surface, so that the pressure load acts on the bonding surface sufficiently, and the circuit layer and the heat dissipation layer The bonding reliability with the ceramic substrate can be improved. Furthermore, the overhanging portions provided in the circuit layer and the heat dissipation layer suppress the wrapping of the brazing material to the electronic component mounting surface of the circuit layer and the heat sink joint surface (main surface) of the heat dissipation layer due to the excess brazing material at the time of bonding. Further, the occurrence of surface stains due to adhesion of the brazing material can be prevented, and the joining properties of electronic parts and the like can be improved.

本発明のパワーモジュール用基板において、前記回路層の板厚t10が1.0mm以上2.0mm以下で、記放熱層の板厚t20が1.0mm以上2.0mm以下なるように設定されているとよい。
このような回路層及び放熱層を用いることにより、確実にパワーモジュール用基板の絶縁性維持とパワーサイクル耐性を向上させることができる。
In the power module substrate of the present invention, a plate thickness t10 of the circuit layer is less than 1.0mm 2.0mm or less, the thickness t20 of the previous SL radiating layer is set to be 1.0mm or more 2.0mm or less It is good to have.
By using such a circuit layer and a heat dissipation layer, it is possible to reliably improve insulation and power cycle resistance of the power module substrate.

また、IGBTなどのモジュール内で隣接する他のパワーモジュール用基板との間の短絡防止かつ実装密度向上のためには、本発明のパワーモジュール用基板において、前記回路層及び前記放熱層の張出部の外周縁の大きさは、前記セラミックス基板の外周縁の大きさと同じか、それよりも小さく設定されているとよい。   Further, in order to prevent a short circuit with another power module substrate adjacent in the module such as an IGBT and improve the mounting density, in the power module substrate of the present invention, the circuit layer and the heat dissipation layer are extended. The size of the outer peripheral edge of the part may be set to be equal to or smaller than the size of the outer peripheral edge of the ceramic substrate.

本発明によれば、パワーモジュール用基板を大型化することなく絶縁性を維持したまま、パワーサイクル耐性を向上させることができる。   ADVANTAGE OF THE INVENTION According to this invention, power cycle tolerance can be improved, maintaining insulation, without enlarging the board | substrate for power modules.

本発明のパワーモジュール用基板の一実施形態を示す縦断面図である。It is a longitudinal cross-sectional view which shows one Embodiment of the board | substrate for power modules of this invention. 実施例のパワーモジュール用基板を説明する要部縦断面図である。It is a principal part longitudinal cross-sectional view explaining the board | substrate for power modules of an Example. 回路層又は放熱層のいずれかに張出部を設けた場合の電子部品上面の最高温度と張出部の厚みとの関係を示す図である。It is a figure which shows the relationship between the maximum temperature of the electronic component upper surface at the time of providing the overhang | projection part in either a circuit layer or a thermal radiation layer, and the thickness of an overhang | projection part. 回路層又は放熱層の張出部の突出長さを変更した場合の電子部品上面の最高温度と張出部の突出長さとの関係を示す図である。It is a figure which shows the relationship between the maximum temperature of the electronic component upper surface at the time of changing the protrusion length of the overhang | projection part of a circuit layer or a thermal radiation layer, and the protrusion length of an overhang | projection part. 比較例のパワーモジュール用基板を説明する要部縦断面図である。It is a principal part longitudinal cross-sectional view explaining the board | substrate for power modules of a comparative example.

以下、本発明の一実施形態を、図面を参照しながら説明する。
図1は、本発明の一実施形態のパワーモジュール用基板を用いたパワーモジュールを示している。このパワーモジュール1は、セラミックス等からなるセラミックス基板2を有するパワーモジュール用基板3と、パワーモジュール用基板3の表面に搭載された半導体チップ等の電子部品4と、パワーモジュール用基板3の裏面に接合されたヒートシンク5とから構成される。
Hereinafter, an embodiment of the present invention will be described with reference to the drawings.
FIG. 1 shows a power module using a power module substrate according to an embodiment of the present invention. The power module 1 includes a power module substrate 3 having a ceramic substrate 2 made of ceramics, an electronic component 4 such as a semiconductor chip mounted on the surface of the power module substrate 3, and a back surface of the power module substrate 3. The heat sink 5 is joined.

パワーモジュール用基板3は、セラミックス基板2の両面に金属層が積層されており、セラミックス基板2の一方の面に積層される金属層が回路層6となり、その表面に電子部品4がはんだ付けされる。また、セラミックス基板2の他方の面に積層される金属層は放熱層7とされ、その表面にヒートシンク5が取り付けられる。   In the power module substrate 3, metal layers are laminated on both surfaces of the ceramic substrate 2, the metal layer laminated on one surface of the ceramic substrate 2 becomes the circuit layer 6, and the electronic component 4 is soldered to the surface. The Moreover, the metal layer laminated | stacked on the other surface of the ceramic substrate 2 is made into the thermal radiation layer 7, and the heat sink 5 is attached to the surface.

回路層6の側面は、セラミックス基板2との接合面6aより、その反対側の電子部品搭載面6bの面積を大きくする張出部6cが形成されている。また、放熱層7の側面にも、セラミックス基板2との接合面7aより、その反対側のヒートシンク接合面7b(主面)の面積を大きくする張出部7cが形成されている。そして、これら張出部6c,7cの外周縁の大きさは、セラミックス基板2の外周縁の大きさと同じか、それよりも小さく設定されている。   On the side surface of the circuit layer 6, an overhanging portion 6 c is formed to increase the area of the electronic component mounting surface 6 b on the opposite side from the bonding surface 6 a with the ceramic substrate 2. In addition, a protruding portion 7c is formed on the side surface of the heat dissipation layer 7 so that the area of the heat sink bonding surface 7b (main surface) on the opposite side is larger than the bonding surface 7a with the ceramic substrate 2. The sizes of the outer peripheral edges of the overhang portions 6c and 7c are set to be the same as or smaller than the outer peripheral edge of the ceramic substrate 2.

また、回路層6は、板厚t10が1.0mm以上2.0mm以下で、かつ、セラミックス基板2との接合面6aから張出部6cまでの厚さ方向の距離t11が板厚t10の1/4以上1/2以下となるように設定されている。そして、放熱層7は、板厚t20が1.0mm以上2.0mm以下で、かつ、セラミックス基板2との接合面7aから張出部7cまでの厚さ方向の距離t21が、板厚t20の2/5以上7/10以下となるように設定されている。
なお、本実施形態においては、回路層6の張出部6cの突出長さw11は、距離t11と同じ大きさに設けられ、放熱層7の張出部7cの突出長さw21は、距離t21と同じ大きさに設けられている。
The circuit layer 6 has a plate thickness t10 of 1.0 mm or more and 2.0 mm or less, and a distance t11 in the thickness direction from the joint surface 6a to the overhanging portion 6c to the ceramic substrate 2 is 1 of the plate thickness t10. It is set to be / 4 or more and ½ or less. The heat dissipation layer 7 has a thickness t20 of 1.0 mm or more and 2.0 mm or less, and a distance t21 in the thickness direction from the bonding surface 7a to the overhanging portion 7c with the ceramic substrate 2 is equal to the thickness t20. It is set to be 2/5 or more and 7/10 or less.
In the present embodiment, the protruding length w11 of the overhanging portion 6c of the circuit layer 6 is provided with the same size as the distance t11, and the protruding length w21 of the overhanging portion 7c of the heat radiation layer 7 is equal to the distance t21. Are provided in the same size.

セラミックス基板2は、例えば、AlN(窒化アルミニウム)、Si(窒化珪素)等の窒化物系セラミックス、もしくはAl(アルミナ)等の酸化物系セラミックスやSiC(炭化珪素)等の炭化物系セラミックスにより形成され、その厚さは例えばAlNの場合、0.635mm、1.0mmなどとされ、Al又はSiの場合、0.32mmとされる。
回路層6及び放熱層7は、純度99.00質量%以上のアルミニウム(いわゆる2Nアルミニウム)を用いることができる。特に、純度99.90質量%以上のアルミニウムが望ましく、JIS規格では、1N90(純度99.90質量%以上:いわゆる3Nアルミニウム)又は1N99(純度99.99質量%以上:いわゆる4Nアルミニウム)を用いることができる。なお、回路層6及び放熱層7には、アルミニウムの他、アルミニウム合金、銅及び銅合金を用いることもできる。また、回路層6及び放熱層7の張出部6c,7cは、プレス加工により所望の外形に打ち抜くと同時に、その外周縁部を残して潰す等して形成することができる。
The ceramic substrate 2 is made of, for example, nitride ceramics such as AlN (aluminum nitride), Si 3 N 4 (silicon nitride), oxide ceramics such as Al 2 O 3 (alumina), SiC (silicon carbide), or the like. For example, in the case of AlN, the thickness is 0.635 mm, 1.0 mm, etc., and in the case of Al 2 O 3 or Si 3 N 4 , the thickness is 0.32 mm.
The circuit layer 6 and the heat dissipation layer 7 can be made of aluminum having a purity of 99.00% by mass or more (so-called 2N aluminum). In particular, aluminum having a purity of 99.90% by mass or more is desirable, and JIS standard uses 1N90 (purity 99.90% by mass or more: so-called 3N aluminum) or 1N99 (purity 99.99% by mass or more: so-called 4N aluminum). Can do. The circuit layer 6 and the heat dissipation layer 7 may be made of aluminum alloy, copper, and copper alloy in addition to aluminum. Further, the overhang portions 6c and 7c of the circuit layer 6 and the heat dissipation layer 7 can be formed by punching out to a desired outer shape by press working and crushing leaving the outer peripheral edge portion.

回路層6及び放熱層7とセラミックス基板2とは、ろう付けにより接合されている。ろう材としては、Al−Si系、Al−Ge系、Al−Cu系、Al−Mg系またはAl−Mn系等の合金が使用される。
なお、回路層6と電子部品4との接合には、Sn−Cu系、Sn−Ag−Cu系,Zn−Al系もしくはPb−Sn系等のはんだ材が用いられる。図中符号8がそのはんだ接合層を示す。また、電子部品4と回路層6の端子部との間は、アルミニウム等からなるワイヤ及びリボンボンディング等(図示略)により接続される。
The circuit layer 6 and the heat dissipation layer 7 and the ceramic substrate 2 are joined by brazing. As the brazing material, an alloy such as Al—Si, Al—Ge, Al—Cu, Al—Mg, or Al—Mn is used.
For joining the circuit layer 6 and the electronic component 4, a solder material such as Sn—Cu, Sn—Ag—Cu, Zn—Al, or Pb—Sn is used. Reference numeral 8 in the figure indicates the solder joint layer. The electronic component 4 and the terminal portion of the circuit layer 6 are connected by a wire made of aluminum or the like, ribbon bonding, or the like (not shown).

また、ヒートシンク5は、平板状のもの、熱間鍛造等によって多数のピン状フィンを一体に形成したもの、押出成形によって相互に平行な帯状フィンを一体に形成したもの等、適宜の形状のものを採用することができる。また、ヒートシンク5と放熱層7との間に、さらにアルミニウム、アルミニウム合金、銅又は銅合金などの金属板で形成された放熱板若しくは応力緩衝層を設けることもできる。
放熱層7とヒートシンク5との間の接合法としては、Al−Si系、Al−Ge系、Al−Cu系、Al−Mg系またはAl−Mn系等の合金のろう材によるろう付け法や、Al−Si系のろう材にフラックスを用いたノコロックろう付け法、放熱層およびヒートシンクにNiめっきを施し、Sn−Ag−Cu系、Zn−AlもしくはPb−Sn系等のはんだ材によりはんだ付けする方法が用いられ、あるいは、シリコングリースによって密着させた状態でねじによって機械的に固定される。
Further, the heat sink 5 has an appropriate shape, such as a flat plate, one in which a large number of pin-shaped fins are integrally formed by hot forging or the like, and one in which strip-like fins are formed in parallel by extrusion. Can be adopted. Further, a heat radiating plate or a stress buffer layer made of a metal plate such as aluminum, aluminum alloy, copper, or copper alloy can be provided between the heat sink 5 and the heat radiating layer 7.
As a joining method between the heat radiation layer 7 and the heat sink 5, a brazing method using a brazing material of an alloy such as Al—Si, Al—Ge, Al—Cu, Al—Mg, or Al—Mn can be used. , Nocolok brazing method using flux for Al-Si brazing material, Ni plating on heat dissipation layer and heat sink, and soldering with solder material such as Sn-Ag-Cu, Zn-Al or Pb-Sn The method is used, or is mechanically fixed with screws in a state of being in close contact with silicon grease.

そして、このように構成されるパワーモジュール用基板3を製造するには、まず、回路層6の接合面6aとセラミックス基板2の表面、及び放熱層7の接合面7aとセラミックス基板2の裏面を、それぞれろう材を挟んで当接させ、これら積層したセラミックス基板2及び回路層6,放熱層7を厚さ方向に1〜5kgf/cmで加圧しながら、615℃以上645℃以下で加熱することにより、真空又は不活性ガス雰囲気下でろう付けする。
次に、このようにして製造されたパワーモジュール用基板3の放熱層7へヒートシンク5を接合する。また、一般的に回路層6へ実装される半導体チップ等の電子部品は、はんだ付けで行われる。そのため、パワーモジュール用基板3とヒートシンク5との接合体は、はんだ濡れ性を向上させるために、その表面に電解又は無電解Ni若しくはNi合金めっきを施した後に、電子部品をはんだ付けする。
And in order to manufacture the board | substrate 3 for power modules comprised in this way, first, the joining surface 6a of the circuit layer 6 and the surface of the ceramic substrate 2, and the joining surface 7a of the thermal radiation layer 7 and the back surface of the ceramic substrate 2 are first made. The ceramic substrate 2, the circuit layer 6, and the heat dissipation layer 7 are brought into contact with each other with a brazing material interposed therebetween, and heated at 615 ° C. or more and 645 ° C. or less while pressurizing the laminated ceramic substrate 2, the circuit layer 6, and the heat dissipation layer 7 with 1 to 5 kgf / cm 2 in the thickness direction. By brazing in a vacuum or an inert gas atmosphere.
Next, the heat sink 5 is bonded to the heat dissipation layer 7 of the power module substrate 3 manufactured as described above. In general, an electronic component such as a semiconductor chip mounted on the circuit layer 6 is soldered. Therefore, in order to improve solder wettability, the joined body of the power module substrate 3 and the heat sink 5 is subjected to electrolysis or electroless Ni or Ni alloy plating on the surface, and then the electronic component is soldered.

図1に示すパワーモジュール用基板3のように、セラミックス基板2の一方の面に張出部6cが設けられた回路層6を積層し、セラミック基板2の他方の面に張出部7cが設けられた放熱層7を積層した場合、回路層6と放熱層7との沿面距離を十分に確保することができる。また、回路層6及び放熱層7の張出部6c,7cの外周縁の大きさを、セラミックス基板2の外周縁の大きさと同じか、それよりも小さく設定することにより、回路層6と放熱層7との間の短絡をより確実に防止することができる。
また、張出部6cにより回路層6の体積を増加させ熱容量を増やすことができるので、電子部品4の発熱による温度上昇を抑制することができる。放熱層7においても、張出部7cにより体積を増加させて熱容量を増やすことができるとともに、ヒートシンク5との接合面7aの面積を増やすことができるので、放熱性を高めることができる。したがって、パワーサイクル耐性を向上させることができる。
Like the power module substrate 3 shown in FIG. 1, the circuit layer 6 provided with the overhanging portion 6 c is laminated on one surface of the ceramic substrate 2, and the overhanging portion 7 c is provided on the other surface of the ceramic substrate 2. When the heat radiation layer 7 is laminated, the creeping distance between the circuit layer 6 and the heat radiation layer 7 can be sufficiently secured. In addition, by setting the size of the outer peripheral edge of the overhang portions 6c and 7c of the circuit layer 6 and the heat dissipation layer 7 to be equal to or smaller than the size of the outer peripheral edge of the ceramic substrate 2, the circuit layer 6 and the heat dissipation A short circuit with the layer 7 can be prevented more reliably.
Moreover, since the volume of the circuit layer 6 can be increased by the overhang | projection part 6c and a heat capacity can be increased, the temperature rise by the heat_generation | fever of the electronic component 4 can be suppressed. Also in the heat dissipation layer 7, the volume can be increased by the overhanging portion 7 c to increase the heat capacity, and the area of the joint surface 7 a with the heat sink 5 can be increased, so that the heat dissipation can be improved. Therefore, power cycle tolerance can be improved.

また、セラミックス基板2の両面に回路層6及び放熱層7を積層する際において、加圧面に対して接合面6a,7aの面積が小さいため、加圧荷重が十分に接合面6a,7aに働き、回路層6及び放熱層7と、セラミックス基板2との接合信頼性を向上させることができる。さらに、回路層6及び放熱層7に設けられた張出部6c,7cにより、接合時の余剰ろう材による回路層6の電子部品積層面6b及び放熱層7の主面7bへのろう材の回り込みが抑制され、ろう材付着に起因する表面のシミ発生が防止され、電子部品等の接合性を向上させることができる。   In addition, when the circuit layer 6 and the heat dissipation layer 7 are laminated on both surfaces of the ceramic substrate 2, since the area of the bonding surfaces 6a and 7a is smaller than the pressing surface, the pressing load sufficiently acts on the bonding surfaces 6a and 7a. The bonding reliability between the circuit layer 6 and the heat dissipation layer 7 and the ceramic substrate 2 can be improved. Further, the overhang portions 6c and 7c provided in the circuit layer 6 and the heat dissipation layer 7 allow the brazing material to be bonded to the electronic component laminated surface 6b of the circuit layer 6 and the main surface 7b of the heat dissipation layer 7 by the excess brazing material at the time of joining. The wraparound is suppressed, the occurrence of surface stains due to the adhesion of the brazing material is prevented, and the bondability of electronic components and the like can be improved.

なお、回路層6は、板厚t10が1.0mm以上2.0mm以下で、かつ、セラミックス基板2との接合面7aから張出部6cまでの厚さ方向の距離t11が板厚t10の1/4以上1/2以下となるように設定され、放熱層7は、板厚t20が1.0mm以上2.0mm以下で、かつ、セラミックス基板2との接合面7aから張出部7cまでの厚さ方向の距離t21が、板厚t20の2/5以上7/10以下となるように設定されることが好ましい。
このような回路層6及び放熱層7を用いることにより、絶縁性を維持したまま、パワーサイクル耐性を向上させることができる。
The circuit layer 6 has a thickness t10 of 1.0 mm or more and 2.0 mm or less, and a distance t11 in the thickness direction from the joint surface 7a to the overhanging portion 6c with the ceramic substrate 2 is 1 of the thickness t10. / 4 or more and 1/2 or less, the heat dissipation layer 7 has a plate thickness t20 of 1.0 mm or more and 2.0 mm or less, and from the joint surface 7a to the overhanging portion 7c to the ceramic substrate 2. It is preferable that the distance t21 in the thickness direction is set to be 2/5 or more and 7/10 or less of the plate thickness t20.
By using the circuit layer 6 and the heat dissipation layer 7 as described above, it is possible to improve power cycle resistance while maintaining insulation.

本発明の効果を確認するために、実施例及び比較例について以下の実験を行った。
(実験1)
回路層及び放熱層ともにアルミニウム純度99.99質量%の金属板を用いた。また、セラミックス基板にはAlNを用い、表1に示す条件でパワーモジュール用基板(試料1〜6)を製造した。試料1〜3のパワーモジュール用基板は、図2(a)に示すように、回路層6のみ張出部6cを有し、放熱層7には張出部が形成されていないものを用いて製造したものである。また、試料4〜6のパワーモジュール用基板は、図2(b)に示すように、放熱層7のみ張出部7cを有し、放熱層6には張出部が形成されていないものを用いて製造したものである。
In order to confirm the effect of the present invention, the following experiments were conducted on the examples and comparative examples.
(Experiment 1)
A metal plate having an aluminum purity of 99.99% by mass was used for both the circuit layer and the heat dissipation layer. Further, AlN was used for the ceramic substrate, and power module substrates (samples 1 to 6) were manufactured under the conditions shown in Table 1. As shown in FIG. 2A, the power module substrates of Samples 1 to 3 have a protruding portion 6 c only in the circuit layer 6, and the heat radiating layer 7 has no protruding portion. It is manufactured. In addition, as shown in FIG. 2B, the power module substrates of Samples 4 to 6 have a protruding portion 7 c only in the heat dissipation layer 7, and the heat dissipation layer 6 is not formed with a protruding portion. It was manufactured using.

これら試料1〜6は、表1に示すように、回路層6のセラミックス基板2との接合面6aを19mm角に形成し、放熱層7のセラミックス基板2との接合面7aを21mm角に形成した。また、回路層6の張出部6cの突出長さw11を距離t11と同じ大きさに設け、放熱層7の張出部7cの突出長さw21を距離t21と同じ大きさに設けた。   In these samples 1 to 6, as shown in Table 1, the bonding surface 6a of the circuit layer 6 with the ceramic substrate 2 is formed in 19 mm square, and the bonding surface 7a of the heat dissipation layer 7 with the ceramic substrate 2 is formed in 21 mm square. did. Further, the protruding length w11 of the overhanging portion 6c of the circuit layer 6 is set to the same size as the distance t11, and the protruding length w21 of the protruding portion 7c of the heat radiation layer 7 is set to the same size as the distance t21.

そして、回路層6の距離t11又は放熱層7の距離t21の大きさを変更したパワーモジュール用基板を複数作製し、それぞれのパワーモジュール用基板にヒートシンクを接合した後に電子部品を搭載してパワーモジュールを製造し、電子部品への通電時における電子部品上面の最高温度を測定した。図3に、試料ごとにまとめた測定結果を示す。
なお、各試料1〜6のセラミックス基板2には、25mm角で板厚0.635mmのものを用い、ヒートシンク5には、30mm角で板厚1mmのJIS規格A6063のアルミニウム合金の金属板を用いた。
また、表1において、距離t11及び距離t21は、図3のグラフの横軸に示すとおり、セラミックス基板2との接合面6a,7aから張出部6c,7cまでの厚さ方向の距離を変量させたものである。
Then, a plurality of power module substrates having different sizes of the distance t11 of the circuit layer 6 or the distance t21 of the heat dissipation layer 7 are manufactured, and after attaching a heat sink to each of the power module substrates, an electronic component is mounted on the power module. The maximum temperature of the upper surface of the electronic component when the electronic component was energized was measured. FIG. 3 shows the measurement results summarized for each sample.
The ceramic substrates 2 of the samples 1 to 6 are 25 mm square and 0.635 mm thick, and the heat sink 5 is a 30 mm square and 1 mm thick JIS standard A6063 aluminum alloy metal plate. It was.
In Table 1, the distance t11 and the distance t21 vary the distance in the thickness direction from the joint surfaces 6a, 7a to the overhang portions 6c, 7c with the ceramic substrate 2 as shown on the horizontal axis of the graph of FIG. It has been made.

Figure 0005957862
Figure 0005957862

図3に示すように、パワーモジュール用基板の回路層6又は放熱層7に張出部6c,7cを適切な範囲に設けることにより、放熱性を向上させることができることがわかる
なお、回路層6に張出部6cを設けた試料1〜3では、板厚t10が1.0mm以上2.0mm以下の場合、距離t11が板厚10の1/4以上1/2以下のときに、高い放熱性が得られた。放熱層7に張出部7cを設けた試料4〜6では、板厚t20が1.0mm以上2.0mm以下の場合、距離t21が板厚20の2/5以上7/10以下のときに、高い放熱性が得られた。また、放熱層7に張出部7cを設けた試料4〜6の方が、回路層6に張出部7cを設けた試料1〜3よりも、より高い放熱性が得られることがわかった。
As shown in FIG. 3, it can be seen that the heat radiation can be improved by providing the overhang portions 6 c and 7 c in an appropriate range on the circuit layer 6 or the heat radiation layer 7 of the power module substrate. In the samples 1 to 3 provided with the overhang portion 6c, when the plate thickness t10 is 1.0 mm or more and 2.0 mm or less, high heat dissipation is obtained when the distance t11 is 1/4 or more and 1/2 or less of the plate thickness 10. Sex was obtained. In the samples 4 to 6 in which the overhang portion 7c is provided on the heat dissipation layer 7, when the thickness t20 is 1.0 mm or more and 2.0 mm or less, the distance t21 is 2/5 or more and 7/10 or less of the plate thickness 20 High heat dissipation was obtained. Moreover, it turned out that the samples 4-6 which provided the overhang | projection part 7c in the heat radiating layer 7 can obtain higher heat dissipation than the samples 1-3 which provided the overhang | projection part 7c in the circuit layer 6. FIG. .

(実験2)
回路層及び放熱層ともに、板厚2.0mmでアルミニウム純度99.99質量%の金属板を用いてパワーモジュール用基板(試料21,22)を製造した。これら試料21,22は、共に回路層6のセラミックス基板2との接合面6aを19mm角に形成し、放熱層7のセラミックス基板2との接合面7aを21mm角に形成した。
試料21のパワーモジュール用基板は、図2(a)に示すように、回路層6のみ張出部6cを有するものである。また、試料22のパワーモジュール用基板は、図2(b)に示すように、放熱層7のみ張出部7cを有するものである。
(Experiment 2)
For both the circuit layer and the heat dissipation layer, a power module substrate (samples 21 and 22) was manufactured using a metal plate having a plate thickness of 2.0 mm and an aluminum purity of 99.99 mass%. In both of these samples 21 and 22, the bonding surface 6a of the circuit layer 6 with the ceramic substrate 2 was formed in 19 mm square, and the bonding surface 7a of the heat dissipation layer 7 with the ceramic substrate 2 was formed in 21 mm square.
As shown in FIG. 2A, the power module substrate of the sample 21 has only the overhanging portion 6c. Further, the power module substrate of the sample 22 has an overhanging portion 7c only in the heat dissipation layer 7, as shown in FIG. 2 (b).

試料21においては、回路層6の距離t11を1.2mmとし、張出部6cの突出長さw11の大きさを種々変更したパワーモジュール用基板を複数作製した。また、試料22においては、放熱層7の距離t21を1.2mmとし、張出部7cの突出長さw21の大きさを種々変更したパワーモジュール用基板を複数作製した。そして、それぞれのパワーモジュール用基板にヒートシンクを接合した後に電子部品を搭載してパワーモジュールを製造し、電子部品への通電時における電子部品上面の最高温度を測定した。図4に、試料ごとにまとめた測定結果を示す。
なお、各試料21,22のセラミックス基板2には、25mm角で板厚0.6mmのものを用いており、回路層6の張出部6cは、その突出長さw11が3.0mmを超えると、セラミックス基板2の外周縁より突き出る形となり、放熱層7においては、張出部7cの突出長さw21が2.0mmを超えると、セラミックス基板2の外周縁部より突き出る形となる。
また、ヒートシンク5には、30mm角で板厚1mmのJIS規格A6063のアルミニウム合金の金属板を用いた。
In the sample 21, a plurality of power module substrates in which the distance t11 of the circuit layer 6 was 1.2 mm and the length of the protruding length w11 of the overhang portion 6c was variously changed were produced. Further, in the sample 22, a plurality of power module substrates in which the distance t21 of the heat radiation layer 7 was 1.2 mm and the size of the protruding length w21 of the overhang portion 7c was variously changed were produced. And after joining a heat sink to each power module substrate, an electronic component was mounted to manufacture a power module, and the maximum temperature of the upper surface of the electronic component when the electronic component was energized was measured. FIG. 4 shows the measurement results summarized for each sample.
The ceramic substrate 2 of each of the samples 21 and 22 has a 25 mm square and a plate thickness of 0.6 mm, and the overhanging portion 6c of the circuit layer 6 has a protruding length w11 exceeding 3.0 mm. When the protruding length w21 of the overhanging portion 7c exceeds 2.0 mm, the heat dissipation layer 7 protrudes from the outer peripheral edge of the ceramic substrate 2.
The heat sink 5 was a 30 mm square and 1 mm thick JIS A6063 aluminum alloy metal plate.

図4からわかるように、張出部6cの長さw11及び張出部7cの長さw21は、大きくなる程に放熱性が高くなる。
また、回路層6は、張出部6cがセラミックス基板2の外周縁を超えない大きさである3.0mm以下に設定しても、十分に高い放熱性を得られる。同様に、放熱層7は、張出部7cがセラミックス基板2の外周縁を超えない大きさである2.0mm以下に設定しても、十分に高い放熱性を得られる。このように、IGBTなどのモジュール内で隣接する他のパワーモジュール用基板との間の短絡防止かつ実装密度向上のために、張出部6a,7aの外周縁をセラミックス基板2の外周縁の大きさと同じか、それよりも小さく設定しても、十分な放熱効果を得ることができる。
As can be seen from FIG. 4, the greater the length w11 of the overhang portion 6c and the length w21 of the overhang portion 7c, the higher the heat dissipation.
Further, even when the overhanging portion 6c is set to 3.0 mm or less, which is a size that does not exceed the outer peripheral edge of the ceramic substrate 2, the circuit layer 6 can obtain sufficiently high heat dissipation. Similarly, even if the heat dissipation layer 7 is set to 2.0 mm or less, which is a size in which the overhanging portion 7c does not exceed the outer peripheral edge of the ceramic substrate 2, sufficiently high heat dissipation can be obtained. In this way, the outer peripheral edges of the overhang portions 6a and 7a are made larger than the outer peripheral edge of the ceramic substrate 2 in order to prevent short circuit with other power module substrates adjacent in the module such as IGBT and to improve the mounting density. Even if it is set to be equal to or smaller than that, a sufficient heat radiation effect can be obtained.

(実験3)
回路層及び放熱層ともにアルミニウム純度99.99質量%の金属板を用い、表2に示す条件でパワーモジュール用基板(試料31〜39)を製造した。このうち試料31,34,37は、回路層6及び放熱層7ともに張出部が形成されていないものを用いて製造した(図5)。また、試料32,35,38のパワーモジュール用基板は、放熱層7のみ張出部7cを形成したものを用いて製造した(図2(b))。試料33,36,39は、回路層6及び放熱層7ともに張出部6c,7cを形成したものを用いて製造した(図1)。
(Experiment 3)
A power module substrate (samples 31 to 39) was manufactured under the conditions shown in Table 2 using a metal plate having an aluminum purity of 99.99 mass% for both the circuit layer and the heat dissipation layer. Among these, samples 31, 34, and 37 were manufactured using the circuit layer 6 and the heat dissipation layer 7 in which no overhang was formed (FIG. 5). Further, the power module substrates of the samples 32, 35, and 38 were manufactured by using only the heat dissipation layer 7 in which the overhanging portion 7c was formed (FIG. 2B). Samples 33, 36, and 39 were manufactured using the circuit layer 6 and the heat dissipation layer 7 in which the overhang portions 6c and 7c were formed (FIG. 1).

これら試料31〜39は、回路層6のセラミックス基板2との接合面6aを19mm角に形成し、放熱層7のセラミックス基板2との接合面7aを21mm角に形成した。また、回路層6又は放熱層7に張出部6c,7cを設けた試料については、回路層6の張出部6cの突出長さw11を距離t11と同じ大きさに設け、放熱層7の張出部7cの突出長さw21を距離t21と同じ大きさに設けた。
なお、試料31〜33は、回路層6の板厚t10及び放熱層7の板厚t20が1.0mm、試料34〜36は板厚t10及び板厚t20が1.6mm、試料37〜39は板厚t10及び板厚t20が2.0mmの金属板を用いて形成した。また、各試料21〜29のセラミックス基板2には、25mm角で板厚0.6mmのものを用い、ヒートシンク5には、30mm角で板厚1mmのJIS規格A6063のアルミニウム合金の金属板を用いた。
In these samples 31 to 39, the bonding surface 6a of the circuit layer 6 with the ceramic substrate 2 was formed in 19 mm square, and the bonding surface 7a of the heat dissipation layer 7 with the ceramic substrate 2 was formed in 21 mm square. For the sample in which the overhang portions 6c and 7c are provided on the circuit layer 6 or the heat dissipation layer 7, the protruding length w11 of the overhang portion 6c of the circuit layer 6 is set to the same size as the distance t11. The protruding length w21 of the overhang portion 7c is set to the same size as the distance t21.
The samples 31 to 33 have a plate thickness t10 of the circuit layer 6 and the plate thickness t20 of the heat dissipation layer 7 of 1.0 mm, the samples 34 to 36 have a plate thickness t10 and a plate thickness t20 of 1.6 mm, and the samples 37 to 39 have It formed using the metal plate whose plate | board thickness t10 and plate | board thickness t20 are 2.0 mm. The ceramic substrates 2 of the samples 21 to 29 are 25 mm square and 0.6 mm thick, and the heat sink 5 is a 30 mm square and 1 mm thick JIS A6063 aluminum alloy metal plate. It was.

このように形成した試料31〜39のそれぞれのパワーモジュール用基板に、ヒートシンクを接合した後に電子部品を搭載して、パワーモジュールを製造した。そして、各試料21〜29の電子部品への通電から2秒後の電子部品上面の温度を測定した。表2に測定結果を示す。なお、表2の「電子部品上面の温度差」は、試料31,34,37の温度を基準とした各試料の電子部品上面との温度差を示す。   A power module was manufactured by mounting an electronic component on the power module substrate of each of the samples 31 to 39 formed in this manner, after bonding a heat sink. And the temperature of the electronic component upper surface 2 second after energization to the electronic component of each sample 21-29 was measured. Table 2 shows the measurement results. The “temperature difference on the upper surface of the electronic component” in Table 2 indicates the temperature difference between the upper surface of the electronic component of each sample and the temperature of the samples 31, 34, and 37 as a reference.

Figure 0005957862
Figure 0005957862

表2からわかるように、少なくとも放熱層7に張出部7cを設けることで、放熱性を向上させることができるが、放熱層7のみ張出部7cを形成した場合(試料32,35,38)よりも、回路層6及び放熱層7ともに張出部6c,7cを形成した場合(試料33,36,39)の方が、より高い放熱性が得られる。   As can be seen from Table 2, at least the heat radiation layer 7 is provided with the overhanging portion 7c, so that the heat dissipation can be improved. In the case where the overhang portions 6c and 7c are formed on both the circuit layer 6 and the heat dissipation layer 7 (samples 33, 36, and 39), higher heat dissipation is obtained.

なお、本発明は上記実施形態に限定されるものではなく、本発明の趣旨を逸脱しない範囲において種々の変更を加えることが可能である。
例えば、回路層6及び放熱層7に用いる金属層は、アルミニウム以外にアルミニウム合金、銅又は銅合金も使用可能である。
In addition, this invention is not limited to the said embodiment, A various change can be added in the range which does not deviate from the meaning of this invention.
For example, the metal layer used for the circuit layer 6 and the heat dissipation layer 7 can use aluminum alloy, copper, or copper alloy in addition to aluminum.

また、セラミックス基板と金属板との接合は、ろう付け以外にもTLP接合法(Transient Liquid Phase Bonding)と称される過渡液相接合法によって接合してもよい。この過渡液相接合法においては、金属板の表面に蒸着させた銅層を、金属板とセラミックス基板及びヒートシンクとの界面に介在させて行う。加熱により、金属板のアルミニウム中に銅が拡散し、金属板の銅層近傍の銅濃度が上昇して融点が低下し、アルミニウムと銅との共晶域にて接合界面に金属液相が形成される。この金属液相が形成された状態で温度を一定に保持しておくと、金属液相がセラミックス基板又はヒートシンクと反応するとともに、銅がさらにアルミニウム中に拡散することに伴い、金属液相中の銅濃度が徐々に低下して融点が上昇し、温度を一定に保持した状態で凝固が進行する。これにより、金属板とセラミックス基板及びヒートシンクとの強固な接合が得られる。
また、セラミックス基板と銅製の金属板とを、活性金属ろう材を用いて接合する方法を採用することもできる。例えば、活性金属であるTiを含む活性金属ろう材(Ag‐27.4質量%Cu‐2.0質量%Ti)を用い、銅製の金属板とセラミックス基板との積層体を加圧した状態のまま真空中で加熱し、活性金属であるTiをセラミックス基板に優先的に拡散させて、Ag‐Cu合金を介して金属板とセラミックス基板とを接合できる。
Further, the ceramic substrate and the metal plate may be joined by a transient liquid phase joining method called TLP joining method (Transient Liquid Phase Bonding) in addition to brazing. In this transient liquid phase bonding method, a copper layer deposited on the surface of the metal plate is interposed at the interface between the metal plate, the ceramic substrate, and the heat sink. By heating, copper diffuses into the aluminum of the metal plate, the copper concentration in the vicinity of the copper layer of the metal plate increases and the melting point decreases, and a metal liquid phase forms at the bonding interface in the eutectic region of aluminum and copper Is done. If the temperature is kept constant in a state in which this metal liquid phase is formed, the metal liquid phase reacts with the ceramic substrate or the heat sink, and copper further diffuses into the aluminum. The copper concentration gradually decreases, the melting point increases, and solidification proceeds with the temperature kept constant. Thereby, strong joining with a metal plate, a ceramic substrate, and a heat sink is obtained.
Moreover, the method of joining a ceramic board | substrate and a copper metal plate using an active metal brazing material is also employable. For example, using an active metal brazing material (Ag-27.4 mass% Cu-2.0 mass% Ti) containing Ti as an active metal, a laminate of a copper metal plate and a ceramic substrate is pressed. It can be heated in a vacuum and Ti, which is an active metal, can be preferentially diffused in the ceramic substrate, and the metal plate and the ceramic substrate can be joined via the Ag-Cu alloy.

また、ヒートシンクは、平板状のもの、熱間鍛造等によって多数のピン状フィンを一体に形成したもの、押出成形によって相互に平行な帯状フィンを一体に形成したもの等、適宜の形状のものを採用することができる。また、ヒートシンクと放熱層との間にさらにアルミニウム、アルミニウム合金、銅又は銅合金などの金属板で形成された放熱板若しくは応力緩衝層を設けることもできる。   In addition, the heat sink should have an appropriate shape, such as a flat plate, one in which a large number of pin-shaped fins are integrally formed by hot forging, etc., one in which strip-shaped fins are formed integrally in parallel by extrusion. Can be adopted. Further, a heat radiating plate or a stress buffer layer made of a metal plate such as aluminum, aluminum alloy, copper, or copper alloy can be provided between the heat sink and the heat radiating layer.

1 パワーモジュール
2 セラミックス基板
3 パワーモジュール用基板
4 電子部品
5 ヒートシンク
6 回路層
6a 接合面
6b 電子部品搭載面
6c 張出部
7 放熱層
7a 接合面
7b 主面
7c 張出部
8 はんだ接合層
DESCRIPTION OF SYMBOLS 1 Power module 2 Ceramic substrate 3 Power module substrate 4 Electronic component 5 Heat sink 6 Circuit layer 6a Joint surface 6b Electronic component mounting surface 6c Overhang part 7 Heat radiation layer 7a Joint surface 7b Main surface 7c Overhang part 8 Solder joint layer

Claims (3)

セラミックス基板の一方の面に電子部品が接合される回路層が積層され、他方の面に放熱層が積層されており、前記放熱層の前記セラミックス基板との接合面とは反対側に、ヒートシンクが接合されるヒートシンク接合面が形成されたパワーモジュール用基板であって、前記セラミックス基板と前記回路層との接合面よりその反対側の電子部品が接合される電子部品搭載面の面積を大きくする張出部が前記回路層の側面の前記電子部品搭載面側に形成され、かつ、前記セラミックス基板と前記放熱層との接合面よりその反対側の前記ヒートシンク接合面の面積を大きくする張出部が前記放熱層の前記ヒートシンク接合面側に形成されており、前記回路層の張出部は、前記セラミックス基板との接合面からの厚さ方向の距離t11が前記回路層の板厚t10の1/4以上1/2以下となるように設定され、前記放熱層の張出部は、前記セラミックス基板との接合面からの厚さ方向の距離t21が前記放熱層の板厚t20の2/5以上7/10以下となるように設定されていることを特徴とするパワーモジュール用基板。 A circuit layer to which electronic components are bonded is laminated on one surface of the ceramic substrate, and a heat dissipation layer is stacked on the other surface, and a heat sink is provided on the opposite side of the heat dissipation layer from the bonding surface with the ceramic substrate. A power module substrate on which a heat sink bonding surface to be bonded is formed, wherein the electronic component mounting surface to which the electronic component on the opposite side of the bonding surface between the ceramic substrate and the circuit layer is bonded is increased. A protruding portion is formed on the electronic component mounting surface side of the side surface of the circuit layer, and an overhang portion that increases the area of the heat sink bonding surface on the opposite side of the bonding surface between the ceramic substrate and the heat dissipation layer wherein the heat dissipation layer is formed on the heat sink junction surface, the overhang portion of the circuit layer, the circuit layer distance t11 in the thickness direction from the joint surface between the ceramic substrate The thickness t10 is set to be ¼ or more and ½ or less of the thickness t10, and the protruding portion of the heat dissipation layer has a thickness direction distance t21 from the bonding surface with the ceramic substrate of the thickness of the heat dissipation layer. It is set so that it may become 2/5 or more and 7/10 or less of t20, The board | substrate for power modules characterized by the above-mentioned. 前記回路層の板厚t10が1.0mm以上2.0mm以下で、記放熱層の板厚t20が1.0mm以上2.0mm以下なるように設定されていることを特徴とする請求項1記載のパワーモジュール用基板。 Claims, characterized in that the thickness t10 of the circuit layer is in 1.0mm or more 2.0mm or less, the thickness t20 of the previous SL radiating layer is set to be 1.0mm or more 2.0mm or less 1. The power module substrate according to 1. 前記回路層及び前記放熱層の張出部の外周縁の大きさは、前記セラミックス基板の外周縁の大きさと同じか、それよりも小さく設定されていることを特徴とする請求項1又は2に記載のパワーモジュール用基板。   The size of the outer peripheral edge of the overhanging portion of the circuit layer and the heat dissipation layer is set to be equal to or smaller than the size of the outer peripheral edge of the ceramic substrate. The board | substrate for power modules as described.
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