JP2007019268A - Wiring board and manufacturing method thereof, and electronic equipment incorporating wiring board - Google Patents

Wiring board and manufacturing method thereof, and electronic equipment incorporating wiring board Download PDF

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Publication number
JP2007019268A
JP2007019268A JP2005199152A JP2005199152A JP2007019268A JP 2007019268 A JP2007019268 A JP 2007019268A JP 2005199152 A JP2005199152 A JP 2005199152A JP 2005199152 A JP2005199152 A JP 2005199152A JP 2007019268 A JP2007019268 A JP 2007019268A
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pad
wiring board
electronic component
substrate
resin layer
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JP2007019268A5 (en
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Daigo Suzuki
大悟 鈴木
Akihiko Happoya
明彦 八甫谷
Shusuke Tanaka
秀典 田中
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Toshiba Corp
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Toshiba Corp
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a wiring board that can be miniaturized, and a method of manufacturing the wiring board. <P>SOLUTION: The wiring board 10 has two core materials 11, 12, and a resin layer 22 sandwiched between the two core materials 11, 12. Copper foil existing on the inner surface of the core member 11 is etched to form a pad 15', and an electronic component 20 is packaged onto the pad 15'. The core material 12 is oppositely arranged via the resin layer 22, and the electronic component 20 is sandwiched between the two core materials 11, 12 to form the laminated wiring board 10. A hole 24 (26) is formed from the outer surface side of the core material 11 (12) toward the pad 15' (16'), and wiring is connected via the hole. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

この発明は、電子部品を内蔵した配線基板、この配線基板を内蔵した電子機器、およびこの配線基板の製造方法に関する。   The present invention relates to a wiring board incorporating an electronic component, an electronic device incorporating the wiring board, and a method of manufacturing the wiring board.

従来、電子部品を内蔵した配線基板として、コア基板の実装面に粘着材を介して電子部品を貼り付けて絶縁樹脂で封止し、コア基板の裏面側から電子部品の電極に向けて貫通した孔をレーザ加工によって形成し、この貫通孔を介して電子部品の電極に接続する回路パターンをコア基板の裏面に形成した配線基板が知られている(特許文献1参照。)。   Conventionally, as a wiring board incorporating an electronic component, the electronic component is attached to the mounting surface of the core substrate via an adhesive and sealed with an insulating resin, and penetrated from the back side of the core substrate toward the electrode of the electronic component. There is known a wiring board in which holes are formed by laser processing and a circuit pattern connected to an electrode of an electronic component through the through hole is formed on the back surface of a core substrate (see Patent Document 1).

この配線基板によると、コア基板に貼り付けた電子部品の電極に対して、コア基板の貫通孔を介して、回路パターンを直接接続するようにしたため、コア基板の実装面に配線が不要となり、製造工程を簡略化できる。   According to this wiring board, since the circuit pattern is directly connected to the electrode of the electronic component attached to the core board through the through hole of the core board, no wiring is required on the mounting surface of the core board. The manufacturing process can be simplified.

しかし、この配線基板の製造に際し、レーザ加工によってコア基板に貫通孔を形成するとき、電子部品の電極に向けてレーザを直接照射するため、電子部品にダメージを与えてしまう問題が生じる。
特開2004−296562号公報(図1)
However, when manufacturing the wiring board, when the through hole is formed in the core substrate by laser processing, the laser is directly irradiated toward the electrode of the electronic component, which causes a problem of damaging the electronic component.
JP 2004-296562 A (FIG. 1)

この発明の目的は、内蔵した電子部品に損傷を与えることがなく製品歩留まりを高めることができ、配線基板の小型化を実現できる配線基板、この配線基板を内蔵した電子機器、およびこの配線基板の製造方法を提供することにある。   The object of the present invention is to increase the product yield without damaging the built-in electronic components, and to realize a reduction in size of the wiring board, the electronic device incorporating the wiring board, and the wiring board It is to provide a manufacturing method.

上記目的を達成するため、この発明の配線基板は、第1パッドを有する第1基板と、この第1パッドに接続された電子部品と、この電子部品を挟んで上記第1基板に対向した第2基板と、上記第1および第2基板間で上記電子部品を積層する樹脂層と、を有する。   In order to achieve the above object, a wiring board according to the present invention includes a first board having a first pad, an electronic component connected to the first pad, and a first board facing the first board across the electronic part. Two substrates, and a resin layer on which the electronic component is laminated between the first and second substrates.

また、この発明の配線基板の製造方法は、両面に金属層を有する第1基板の内面に形成されている金属層をパターニングして該内面に第1パッドを形成する工程と、この第1パッドに電子部品を接続して上記内面に該電子部品を実装する実装工程と、樹脂層を介して上記第1基板の内面に第2基板を対向させて上記樹脂層を溶融させて積層する工程と、上記第1基板の外面から上記第1パッドにつながる導通孔を形成する孔形成工程と、を有する。   Further, the method of manufacturing a wiring board according to the present invention includes a step of patterning a metal layer formed on an inner surface of a first substrate having metal layers on both sides to form a first pad on the inner surface, and the first pad. A mounting step of connecting the electronic component to the inner surface and mounting the electronic component on the inner surface; and a step of melting and laminating the resin layer with the second substrate facing the inner surface of the first substrate via the resin layer; And a hole forming step of forming a conduction hole connected from the outer surface of the first substrate to the first pad.

さらに、この発明の配線基板の製造方法は、両面に金属層を有する第1基板の内面に形成されている金属層をパターニングして該内面に第1パッドを形成する工程と、この第1パッドに電子部品を接続して上記内面に該電子部品を実装する実装工程と、樹脂層を介して上記第1基板の内面に第2基板を対向させて上記樹脂層を溶融させて積層する工程と、上記第1基板の外面から上記第1パッドに向けてレーザ光を照射することにより該第1パッドにつながる導通孔を形成する孔形成工程と、を有する。   Furthermore, the method for manufacturing a wiring board according to the present invention includes a step of patterning a metal layer formed on an inner surface of a first substrate having metal layers on both sides to form a first pad on the inner surface, and the first pad. A mounting step of connecting the electronic component to the inner surface and mounting the electronic component on the inner surface; and a step of melting and laminating the resin layer with the second substrate facing the inner surface of the first substrate via the resin layer; And a hole forming step of forming a conduction hole connected to the first pad by irradiating laser light from the outer surface of the first substrate toward the first pad.

上記発明によると、第1基板の外面側から第1配線を接続するための導通孔を形成する際、第1基板の外面側から第1パッドに向けてレーザを照射することになるため、電子部品の電極にレーザを直接照射することがなく、電子部品に損傷を与えることを防止できる。   According to the above invention, when the conduction hole for connecting the first wiring from the outer surface side of the first substrate is formed, the laser is irradiated from the outer surface side of the first substrate toward the first pad. It is possible to prevent the electronic component from being damaged without directly irradiating the electrode of the component with the laser.

この発明によると、配線基板の小型化を実現できる。   According to the present invention, it is possible to reduce the size of the wiring board.

以下、図面を参照しながらこの発明の実施の形態について詳細に説明する。
図1には、この発明の実施の形態に係る配線基板10の断面を部分的に拡大した概略図を示してある。この配線基板10は、例えば、TVや携帯電話やノートパソコンなどの電子機器100の筐体101に組み込まれる(図13参照)。この配線基板10は、コンデンサやチップ抵抗などの電子部品20を2枚のコア材11、12の間に配置して樹脂層22で挟み込んだ構造を有する。ここでは1つの電子部品20の取り付け構造を代表して説明するが、2枚のコア材11、12の間には複数の電子部品を配置できる。
Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
FIG. 1 is a schematic view partially enlarging a cross section of a wiring board 10 according to an embodiment of the present invention. For example, the wiring board 10 is incorporated in a casing 101 of an electronic device 100 such as a TV, a mobile phone, or a laptop computer (see FIG. 13). The wiring substrate 10 has a structure in which an electronic component 20 such as a capacitor or a chip resistor is disposed between two core materials 11 and 12 and sandwiched between resin layers 22. Here, the mounting structure of one electronic component 20 will be described as a representative, but a plurality of electronic components can be arranged between the two core members 11 and 12.

以下、図12に示すフローチャートとともに図1乃至図11を参照して、この配線基板10の製造方法について説明する。
まず、図2に部分的に拡大して示すようなコア材11(第1基板)を用意する。コア材11は、例えばガラス繊維を含む樹脂材料(プリプレグ)により形成された扁平な基板13の両面に銅箔15、17(金属層)を積層して形成されている。基板13の熱膨張率を銅箔15、17に合わせたり、反り捩れを抑えるため、基板13にガラス繊維を混ぜてある。これにより、加熱によるコア材11の反りを抑制できる。後述するコア材12(第2基板)もコア材11と同じ構造を有する。
A method for manufacturing the wiring board 10 will be described below with reference to FIGS. 1 to 11 together with the flowchart shown in FIG.
First, a core material 11 (first substrate) as shown partially enlarged in FIG. 2 is prepared. The core material 11 is formed by laminating copper foils 15 and 17 (metal layers) on both surfaces of a flat substrate 13 made of, for example, a resin material (prepreg) containing glass fibers. In order to match the thermal expansion coefficient of the substrate 13 with the copper foils 15 and 17 and to suppress warping, glass fiber is mixed with the substrate 13. Thereby, the curvature of the core material 11 by heating can be suppressed. A core material 12 (second substrate) described later also has the same structure as the core material 11.

この後、図3に示すように、用意したコア材11の1面(内面)側に積層された銅箔15をエッチングしてパターニングし、電子部品20を接続するためのパッド15’(第1パッド)を形成する(図12、ステップ1)。このとき、銅箔15の上に図示しないフォトレジスト層を形成し、露光、現像により図示しないマスクパターンを形成し、このマスクパターンを介して銅箔15をエッチングすることによりパッド15’を形成する。このパッド15’は、電子部品20の電極端子を電気的に接続するためのパッドとして機能する。   Thereafter, as shown in FIG. 3, the copper foil 15 laminated on the one surface (inner surface) side of the prepared core material 11 is etched and patterned, and a pad 15 ′ (first) for connecting the electronic component 20 is formed. Pad) is formed (FIG. 12, step 1). At this time, a photoresist layer (not shown) is formed on the copper foil 15, a mask pattern (not shown) is formed by exposure and development, and the pad 15 ′ is formed by etching the copper foil 15 through the mask pattern. . The pad 15 ′ functions as a pad for electrically connecting the electrode terminals of the electronic component 20.

そして、図4に示すように、パッド15’上の電子部品20を接続する部位に導電ペースト2(導電性接着剤)を配置する。このとき、たとえば図示しないメタルマスクもしくはシリンジを利用して導電ペースト2をパッド15’上に印刷により形成する。導電ペースト2は、数種類の金属材料4と接着剤6を混合して形成されており、加熱して溶融することで、図5に拡大して示すように接着剤6が金属材料4の表面に現れる性質を有する。つまり、金属材料4と接着剤6の溶融速度が異なり且つ表面張力が異なるため、接着剤6が金属材料4の表面に析出することになる。このような性質を有する導電ペースト2として、例えば、Sn−Bi+エポキシ樹脂が知られている。   Then, as shown in FIG. 4, the conductive paste 2 (conductive adhesive) is disposed on the portion where the electronic component 20 is connected on the pad 15 ′. At this time, the conductive paste 2 is formed on the pad 15 ′ by printing using a metal mask or syringe (not shown), for example. The conductive paste 2 is formed by mixing several kinds of metal materials 4 and an adhesive 6, and when heated and melted, the adhesive 6 is applied to the surface of the metal material 4 as shown in an enlarged view in FIG. 5. Has the property of appearing. That is, since the melting rate of the metal material 4 and the adhesive 6 are different and the surface tension is different, the adhesive 6 is deposited on the surface of the metal material 4. As the conductive paste 2 having such properties, for example, Sn-Bi + epoxy resin is known.

さらに、図6に示すように、この導電ペースト2を介して電子部品20の電極端子をパッド15’に接続し、電子部品20をコア材11の内面に実装する(ステップ2)。電子部品20は、例えば0603、0402等のコンデンサ、抵抗、インダクタ等の小型の部品である。このとき、例えば、150℃〜200℃程度の温度で3〜10分程度、好ましくは170℃の温度で5分間、上述した導電ペースト2を加熱して溶融させ、接着剤6で表面を覆った金属材料4で電子部品20の電極端子とパッド15’を電気的に接続する。このときの加熱温度および加熱時間は、数種類の金属材料が合金化して接着剤6が表面に析出することのできる温度および時間に設定される。表面に析出した接着剤6は、後述する熱工程で溶融した金属材料4が外側に流れ出すことを防止するためのバリアとして機能する。   Further, as shown in FIG. 6, the electrode terminal of the electronic component 20 is connected to the pad 15 'through the conductive paste 2, and the electronic component 20 is mounted on the inner surface of the core material 11 (step 2). The electronic component 20 is a small component such as a capacitor such as 0603 and 0402, a resistor, and an inductor. At this time, for example, the conductive paste 2 is heated and melted at a temperature of about 150 ° C. to 200 ° C. for about 3 to 10 minutes, preferably at a temperature of 170 ° C. for 5 minutes, and the surface is covered with the adhesive 6. The electrode terminal of the electronic component 20 and the pad 15 ′ are electrically connected with the metal material 4. The heating temperature and heating time at this time are set to temperatures and times at which several kinds of metal materials can be alloyed and the adhesive 6 can be deposited on the surface. The adhesive 6 deposited on the surface functions as a barrier for preventing the metal material 4 melted in the thermal process described later from flowing out.

コア材11の内面に電子部品20を実装するときにコア材11の外面に他の電子部品が実装されていないため、外面側の電子部品に干渉しないようにコア材11を保持する必要がなく、装置構成を簡略化できる。   Since no other electronic components are mounted on the outer surface of the core material 11 when the electronic component 20 is mounted on the inner surface of the core material 11, there is no need to hold the core material 11 so as not to interfere with the electronic component on the outer surface side. The apparatus configuration can be simplified.

上記のように電子部品20を実装した後、図7に示すように、樹脂層22を介して電子部品20を挟むようにコア材11の内面に対向してもう一枚のコア材12を配置する。コア材12も、コア材11と同じ構造を有し、プリプレグ基板14の両面に銅箔16、18を積層して形成されている。なお、本実施の形態では、コア材12がコア材11に対向する内面側の銅箔もエッチングによりパターニングされてパッド16’(第2パッド)が予め形成されている。ここでは図示していないが、コア材12の内面側に形成したパッド16’に別の電子部品を実装してコア材11に実装した電子部品20と入れ子状に配置しても良く、より狭いスペースに多数の電子部品を実装できる。   After the electronic component 20 is mounted as described above, another core material 12 is arranged facing the inner surface of the core material 11 so as to sandwich the electronic component 20 via the resin layer 22 as shown in FIG. To do. The core material 12 also has the same structure as the core material 11 and is formed by laminating copper foils 16 and 18 on both surfaces of the prepreg substrate 14. In the present embodiment, the copper foil on the inner surface side where the core material 12 faces the core material 11 is also patterned by etching, and the pad 16 ′ (second pad) is formed in advance. Although not shown here, another electronic component may be mounted on the pad 16 ′ formed on the inner surface side of the core material 12 so as to be nested with the electronic component 20 mounted on the core material 11. A large number of electronic components can be mounted in the space.

この状態で、図8に示すように、2枚のコア材11、12によって電子部品20を挟んで加熱および加圧し、樹脂層22を溶融させて電子部品20を2枚のコア材11、12間に積層する(ステップ3)。樹脂層22は、図9に示すように、樹脂材料22aにシリカ粒子22bを比較的高い比率で混合して形成されており、加熱により溶融可能な状態でシート状に形成されている。   In this state, as shown in FIG. 8, the electronic component 20 is sandwiched between the two core materials 11 and 12 and heated and pressurized to melt the resin layer 22, so that the electronic component 20 is replaced with the two core materials 11 and 12. Laminate in between (step 3). As shown in FIG. 9, the resin layer 22 is formed by mixing a resin material 22 a with silica particles 22 b at a relatively high ratio, and is formed in a sheet shape that can be melted by heating.

このとき、樹脂層22の加熱により、電子部品20とパッド15’を接続した導電ペースト2も加熱される。しかし、本実施の形態の導電ペースト2は、図5に示すように、接着剤6により金属材料4の表面を覆っているため、加熱により溶融した金属材料4が樹脂層22へ流れ出すことがない。   At this time, the conductive paste 2 connecting the electronic component 20 and the pad 15 ′ is also heated by the heating of the resin layer 22. However, since the conductive paste 2 of the present embodiment covers the surface of the metal material 4 with the adhesive 6 as shown in FIG. 5, the metal material 4 melted by heating does not flow out to the resin layer 22. .

以上のように、フィラーとしてシリカ粒子22bを樹脂材料22aに混ぜた樹脂層22を樹脂材として用いることで、プリプレグを用いた場合のようにガラス繊維があたって電子部品20を傷つけることがない。つまり、樹脂層22を溶融して電子部品20を積層する際、フィラーが電子部品を避けるように樹脂材料の中で移動して電子部品20を傷つけることがない。   As described above, by using the resin layer 22 in which the silica particles 22b are mixed as the filler as the resin material as the resin material, the glass fiber is not hit and the electronic component 20 is not damaged as in the case of using the prepreg. That is, when the electronic component 20 is laminated by melting the resin layer 22, the filler does not move in the resin material so as to avoid the electronic component, and the electronic component 20 is not damaged.

なお、フィラー22bの充填量は、樹脂層22と電子部品20の熱膨張率が略同じになる量に調整されている。これにより、熱膨張率の差に起因してクラックを生じることを防止できる。   The filling amount of the filler 22b is adjusted so that the thermal expansion coefficients of the resin layer 22 and the electronic component 20 are substantially the same. Thereby, it can prevent that a crack originates in the difference in a thermal expansion coefficient.

上述したようにコア材11(12)に電子部品20を実装して2枚のコア材11、12間に積層した後、図10に示すように、レーザ加工によってパッド15’につながる孔24(導通孔)をコア材11の外面側から形成し、パッド16’につながる孔26(導通孔)をコア材12の外面側から形成する(ステップ4、5)。そして、必要に応じて2枚のコア材11、12、および樹脂層22を貫通する孔28をドリル加工によって形成する。   As described above, after the electronic component 20 is mounted on the core material 11 (12) and laminated between the two core materials 11 and 12, as shown in FIG. 10, the holes 24 ( A conduction hole) is formed from the outer surface side of the core material 11, and a hole 26 (conduction hole) connected to the pad 16 'is formed from the outer surface side of the core material 12 (steps 4 and 5). And the hole 28 which penetrates the two core materials 11 and 12 and the resin layer 22 is formed by drilling as needed.

レーザ加工によってパッド15’につながる孔24を形成する場合、例えばコア材11の外面側に積層されている銅箔17を部分的に除去する必要がある(ステップ4)。レーザとしてCOレーザを用いる場合、コア材11の基板13に孔を開けることのできるレーザ強度で銅箔17にレーザを照射すると、95%程度のレーザが反射されてしまう。このため、レーザを照射する前に、レーザ照射位置の銅箔17を部分的に除去する必要がある。この場合、レーザ照射位置は、電子部品20を接続したパッド15’に対向する位置、すなわち孔24を形成する位置となる。 When the hole 24 connected to the pad 15 ′ is formed by laser processing, for example, the copper foil 17 laminated on the outer surface side of the core material 11 needs to be partially removed (step 4). When a CO 2 laser is used as the laser, if the laser is applied to the copper foil 17 with a laser intensity capable of making a hole in the substrate 13 of the core material 11, about 95% of the laser is reflected. For this reason, it is necessary to partially remove the copper foil 17 at the laser irradiation position before the laser irradiation. In this case, the laser irradiation position is a position facing the pad 15 ′ to which the electronic component 20 is connected, that is, a position where the hole 24 is formed.

銅箔17を部分的に除去する際には、銅箔17の上にドライフィルムを貼り付けてパターニングし、レーザを照射する位置に孔の開いたマスクパターンを形成する。そして、このマスクパターンの孔を介して銅箔17をエッチングしてレーザ照射位置に孔を開ける。同様にして、孔26を形成する位置の銅箔18も部分的に除去される。   When the copper foil 17 is partially removed, a dry film is attached on the copper foil 17 and patterned to form a mask pattern with holes at positions where laser irradiation is performed. And the copper foil 17 is etched through the hole of this mask pattern, and a hole is opened in a laser irradiation position. Similarly, the copper foil 18 at the position where the hole 26 is formed is also partially removed.

そして、この銅箔17の孔を介してコア材11の外面側からパッド15’に向けてレーザを照射し、パッド15’につながる孔24を形成する(ステップ5)。この場合、銅箔17の孔をマスク代わりに使ってレーザを照射するコンフォーマルマスク法、銅箔17の孔より小さいビーム径でレーザを照射するオープンウィンドウ法などがある。   Then, laser is irradiated from the outer surface side of the core material 11 toward the pad 15 ′ through the hole of the copper foil 17 to form a hole 24 connected to the pad 15 ′ (step 5). In this case, there are a conformal mask method in which the hole of the copper foil 17 is used instead of a mask and laser is irradiated, and an open window method in which the laser is irradiated with a beam diameter smaller than the hole of the copper foil 17.

いずれにしても、本実施の形態では、電子部品20の電極端子に向けて直接レーザを当てるのではなく、パッド15’にレーザを照射するため、レーザの照射によって電子部品20に損傷を与えることがない。孔26を形成する場合も同様に、コア材12の外側からパッド16’に向けてレーザを照射するため、電子部品20の電極端子に損傷を与えることがない。   In any case, in the present embodiment, the laser is not directly applied to the electrode terminal of the electronic component 20, but the pad 15 ′ is irradiated with the laser, and thus the electronic component 20 is damaged by the laser irradiation. There is no. Similarly, when the hole 26 is formed, the electrode terminal of the electronic component 20 is not damaged because the laser is irradiated from the outside of the core material 12 toward the pad 16 ′.

この他に、銅箔17のレーザ照射位置に予め孔を開ける工程を省略した方法として、ダイレクトレーザ法がある。この方法では、はじめに銅箔17に孔を開けることのできるレーザ強度でレーザを照射し、銅箔17に孔が開いた後、パッド15’を貫通しないレーザ強度まで下げて基板13に孔を開ける(ステップ5)。このように、銅箔17を貫通した後、はじめと違う低いエネルギーでレーザを照射することで、パッド15’を貫通しなくなる。つまり、レーザ照射により電子部品20に損傷を与えることがない。   In addition to this, there is a direct laser method as a method in which the step of opening a hole in advance at the laser irradiation position of the copper foil 17 is omitted. In this method, first, a laser is irradiated with a laser intensity capable of opening a hole in the copper foil 17, and after the hole is formed in the copper foil 17, the hole is formed in the substrate 13 by reducing the laser intensity to not penetrate the pad 15 ′. (Step 5). Thus, after penetrating the copper foil 17, the pad 15 'is not penetrated by irradiating the laser with low energy different from the first. That is, the electronic component 20 is not damaged by the laser irradiation.

この後、図11に示すように、コア材11、12の外側表面全体に金属層35をメッキにより形成し、最後に、エッチングにより、図1に示すように、各孔24、26、28を被覆する金属層32と配線34を各コア材11、12の外面に形成する(ステップ6)。コア材11の外面に形成される配線はこの発明の第1配線として機能し、コア材12の外面に形成される配線はこの発明の第2配線として機能する。   Thereafter, as shown in FIG. 11, a metal layer 35 is formed on the entire outer surface of the core materials 11 and 12 by plating, and finally, by etching, the holes 24, 26 and 28 are formed as shown in FIG. The metal layer 32 and the wiring 34 to cover are formed on the outer surface of each core material 11 and 12 (step 6). The wiring formed on the outer surface of the core material 11 functions as the first wiring of the present invention, and the wiring formed on the outer surface of the core material 12 functions as the second wiring of the present invention.

このように、電子部品20の電極端子を接続したパッド15’にコア材11の外面側から孔24を介して直接配線32、34を形成することで、配線長を短くでき、設計の自由度を高めることができ、配線のスペースを確保でき、ノイズを少なくできる。   In this manner, by directly forming the wirings 32 and 34 from the outer surface side of the core material 11 through the holes 24 on the pad 15 ′ to which the electrode terminals of the electronic component 20 are connected, the wiring length can be shortened and the degree of freedom in design The wiring space can be secured and the noise can be reduced.

以上のように、本実施の形態によると、コア材11(12)の片面に電子部品20を実装してコア材の外面側から配線を接続するようにしたため、コア材の両面に電子部品を実装する場合と比較して製造を容易にできる。また、2枚のコア材11、12間に電子部品20を挟んで樹脂層22により積層したため、コア材11、12の外面側に容易に配線を形成でき、設計の自由度を高めることができる。   As described above, according to the present embodiment, the electronic component 20 is mounted on one side of the core material 11 (12) and the wiring is connected from the outer surface side of the core material. Manufacture can be facilitated compared with the case of mounting. In addition, since the electronic component 20 is sandwiched between the two core members 11 and 12 and laminated by the resin layer 22, wiring can be easily formed on the outer surface side of the core members 11 and 12, and the degree of freedom in design can be increased. .

また、本実施の形態によると、コア材11、12の外面側から配線のための孔24、26を形成する場合、コア材11、12それぞれの内面に形成されたパッド15’およびパッド16’に向けてレーザを照射するため、従来のように電子部品の電極に直接レーザを照射する場合と比較して、電子部品20に損傷を与えることがなく、製品歩留まりを向上させることができる。   Further, according to the present embodiment, when the holes 24 and 26 for wiring are formed from the outer surface side of the core materials 11 and 12, the pad 15 ′ and the pad 16 ′ formed on the inner surfaces of the core materials 11 and 12, respectively. Since the laser is irradiated toward the surface, the electronic component 20 is not damaged and the product yield can be improved as compared with the conventional case where the laser is directly applied to the electrode of the electronic component.

さらに、本実施の形態によると、2枚のコア材11、12の間に複数個の電子部品20を配置できるため、コア材11、12の外面に電子部品20を配置する必要がなくなり、その分、外面のスペースを小さくでき、結果的に配線基板の面積を小さくでき、配線基板の小型化を実現できる。なお、電子部品20を2枚のコア材11、12の間に配置することで、配線基板の厚さが大きくなることが考えられるが、電子部品20自体の高さを低くしたり、コア材11に実装した電子部品とコア材12に実装した電子部品を入れ子状に配置したりすることで、配線基板が厚くなることを抑制できる。   Furthermore, according to the present embodiment, since a plurality of electronic components 20 can be arranged between the two core materials 11 and 12, there is no need to arrange the electronic components 20 on the outer surface of the core materials 11 and 12, Thus, the space on the outer surface can be reduced, and as a result, the area of the wiring board can be reduced, and the wiring board can be downsized. Although it is conceivable that the thickness of the wiring board is increased by disposing the electronic component 20 between the two core materials 11 and 12, the height of the electronic component 20 itself can be reduced or the core material can be reduced. By arranging the electronic component mounted on 11 and the electronic component mounted on the core material 12 in a nested manner, the wiring board can be prevented from becoming thick.

なお、この発明は、上述した実施の形態そのままに限定されるものではなく、実施段階ではその要旨を逸脱しない範囲で構成要素を変形して具体化できる。また、上述した実施の形態に開示されている複数の構成要素の適宜な組み合わせにより種々の発明を形成できる。例えば、上述した実施の形態に示される全構成要素から幾つかの構成要素を削除しても良い。更に、異なる実施の形態に亘る構成要素を適宜組み合わせても良い。   Note that the present invention is not limited to the above-described embodiment as it is, and can be embodied by modifying the constituent elements without departing from the scope of the invention in the implementation stage. Various inventions can be formed by appropriately combining a plurality of constituent elements disclosed in the above-described embodiments. For example, you may delete some components from all the components shown by embodiment mentioned above. Furthermore, you may combine the component covering different embodiment suitably.

例えば、上述した実施の形態では、2枚のコア材11、12間に電子部品20を積層した構造について説明したが、これに限らず、コア材11、12のさらに外側に電子部品を実装して樹脂層を介して別のコア材を積層しても良く、コア材の枚数は任意に設定できる。例えば、4枚のコア材を積層する場合、2層目と3層目のコア材に電子部品を実装できる。   For example, in the above-described embodiment, the structure in which the electronic component 20 is laminated between the two core materials 11 and 12 has been described. However, the invention is not limited to this, and the electronic component is mounted on the outer side of the core materials 11 and 12. Thus, another core material may be laminated via the resin layer, and the number of core materials can be arbitrarily set. For example, when four core materials are laminated, electronic components can be mounted on the second and third core materials.

この発明の実施の形態に係る配線基板の要部の構造を部分的に拡大して示す部分拡大断面図。The partial expanded sectional view which expands and shows partially the structure of the principal part of the wiring board which concerns on embodiment of this invention. 図1の配線基板の製造方法を説明するための図。The figure for demonstrating the manufacturing method of the wiring board of FIG. 図1の配線基板の製造方法を説明するための図。The figure for demonstrating the manufacturing method of the wiring board of FIG. 図1の配線基板の製造方法を説明するための図。The figure for demonstrating the manufacturing method of the wiring board of FIG. 図4の要部の構造を部分的に拡大して示す部分拡大断面図。The partial expanded sectional view which expands and shows partially the structure of the principal part of FIG. 図1の配線基板の製造方法を説明するための図。The figure for demonstrating the manufacturing method of the wiring board of FIG. 図1の配線基板の製造方法を説明するための図。The figure for demonstrating the manufacturing method of the wiring board of FIG. 図1の配線基板の製造方法を説明するための図。The figure for demonstrating the manufacturing method of the wiring board of FIG. 図7で2枚のコア材の間に配置される樹脂層の構造を説明するための図。The figure for demonstrating the structure of the resin layer arrange | positioned between two core materials in FIG. 図1の配線基板の製造方法を説明するための図。The figure for demonstrating the manufacturing method of the wiring board of FIG. 図1の配線基板の製造方法を説明するための図。The figure for demonstrating the manufacturing method of the wiring board of FIG. 図1の配線基板の製造方法を説明するためのフローチャート。The flowchart for demonstrating the manufacturing method of the wiring board of FIG. 図1の配線基板を内蔵した電子機器を示す概略図。Schematic which shows the electronic device which incorporated the wiring board of FIG.

符号の説明Explanation of symbols

11、12…コア材、13、14…基板、15、16、17、18…銅箔、15’…第1配線、16’…第3配線、20…電子部品、22…樹脂層、24、26、28…孔、32…金属層、34…配線、100…電子機器。   DESCRIPTION OF SYMBOLS 11, 12 ... Core material, 13, 14 ... Board | substrate, 15, 16, 17, 18 ... Copper foil, 15 '... 1st wiring, 16' ... 3rd wiring, 20 ... Electronic component, 22 ... Resin layer, 24, 26, 28 ... holes, 32 ... metal layer, 34 ... wiring, 100 ... electronic equipment.

Claims (14)

第1パッドを有する第1基板と、
この第1パッドに接続された電子部品と、
この電子部品を挟んで上記第1基板に対向した第2基板と、
上記第1および第2基板間で上記電子部品を積層する樹脂層と、
を有することを特徴とする配線基板。
A first substrate having a first pad;
An electronic component connected to the first pad;
A second substrate facing the first substrate across the electronic component;
A resin layer for laminating the electronic component between the first and second substrates;
A wiring board comprising:
上記第1基板の外面から上記第1パッドにつながる導通孔をさらに有することを特徴とする請求項1に記載の配線基板。   The wiring board according to claim 1, further comprising a conduction hole connected to the first pad from an outer surface of the first board. 上記導通孔を介して上記第1パッドに接続するように上記第1基板の外面に形成された第1配線をさらに有することを特徴とする請求項2に記載の配線基板。   The wiring board according to claim 2, further comprising a first wiring formed on an outer surface of the first board so as to be connected to the first pad through the conduction hole. 上記電子部品の電極と上記第1パッドを導電性接着剤を介して接続したことを特徴とする請求項1に記載の配線基板。   The wiring board according to claim 1, wherein the electrode of the electronic component and the first pad are connected via a conductive adhesive. 上記樹脂層は、樹脂材料にシリカ粒子を混ぜて形成されていることを特徴とする請求項1に記載の配線基板。   The wiring board according to claim 1, wherein the resin layer is formed by mixing silica particles in a resin material. 上記シリカ粒子は、上記樹脂層と電子部品の熱膨張率が略同じになる比率で上記樹脂材料に混合されていることを特徴とする請求項5に記載の配線基板。   The wiring substrate according to claim 5, wherein the silica particles are mixed with the resin material at a ratio such that the thermal expansion coefficients of the resin layer and the electronic component are substantially the same. 上記第2基板の内面に第2パッドを形成し、この第2パッドに別の電子部品を接続したことを特徴とする請求項1に記載の配線基板。   The wiring board according to claim 1, wherein a second pad is formed on an inner surface of the second substrate, and another electronic component is connected to the second pad. 上記第2基板の外面から上記第2パッドにつながる導通孔を形成し、この導通孔を介して上記第2パッドにつながる第2配線を上記第2基板の外面に形成したことを特徴とする請求項7に記載の配線基板。   A conduction hole connected to the second pad from the outer surface of the second substrate is formed, and a second wiring connected to the second pad through the conduction hole is formed on the outer surface of the second substrate. Item 8. The wiring board according to Item 7. 両面に金属層を有する第1基板の内面に形成されている金属層をパターニングして該内面に第1パッドを形成する工程と、
この第1パッドに電子部品を接続して上記内面に該電子部品を実装する実装工程と、
樹脂層を介して上記第1基板の内面に第2基板を対向させて上記樹脂層を溶融させて積層する工程と、
上記第1基板の外面から上記第1パッドにつながる導通孔を形成する孔形成工程と、
を有することを特徴とする配線基板の製造方法。
Patterning a metal layer formed on an inner surface of a first substrate having metal layers on both sides to form a first pad on the inner surface;
A mounting step of connecting an electronic component to the first pad and mounting the electronic component on the inner surface;
A step of causing the second substrate to face the inner surface of the first substrate via the resin layer and melting and laminating the resin layer;
A hole forming step of forming a conduction hole connected from the outer surface of the first substrate to the first pad;
A method of manufacturing a wiring board, comprising:
上記実装工程では、加熱溶融することでその表面張力の違いにより表面に現れる接着剤と金属材料とを混合して形成されている導電性接着剤を上記第1パッドと上記電子部品の電極との間に配置し、該導電性接着剤を加熱溶融させて上記第1パッドと電極を接続することを特徴とする請求項9に記載の配線基板の製造方法。   In the mounting step, a conductive adhesive formed by mixing an adhesive that appears on the surface due to a difference in surface tension by heating and melting and a metal material is formed between the first pad and the electrode of the electronic component. The method for manufacturing a wiring board according to claim 9, wherein the wiring board is disposed between the first pad and the electrode by heating and melting the conductive adhesive. 上記導通孔を介して上記第1パッドにつながる第1配線を上記第1基板の外面に形成する工程をさらに有することを特徴とする請求項9に記載の配線基板の製造方法。   The method for manufacturing a wiring board according to claim 9, further comprising a step of forming a first wiring connected to the first pad through the conduction hole on an outer surface of the first board. 両面に金属層を有する第1基板の内面に形成されている金属層をパターニングして該内面に第1パッドを形成する工程と、
この第1パッドに電子部品を接続して上記内面に該電子部品を実装する実装工程と、
樹脂層を介して上記第1基板の内面に第2基板を対向させて上記樹脂層を溶融させて積層する工程と、
上記第1基板の外面から上記第1パッドに向けてレーザ光を照射することにより該第1パッドにつながる導通孔を形成する孔形成工程と、
を有することを特徴とする配線基板の製造方法。
Patterning a metal layer formed on an inner surface of a first substrate having metal layers on both sides to form a first pad on the inner surface;
A mounting step of connecting an electronic component to the first pad and mounting the electronic component on the inner surface;
A step of causing the second substrate to face the inner surface of the first substrate via the resin layer and melting and laminating the resin layer;
A hole forming step of forming a conduction hole connected to the first pad by irradiating laser light from the outer surface of the first substrate toward the first pad;
A method of manufacturing a wiring board, comprising:
上記孔形成工程は、上記レーザ光を照射する前に、上記第1基板の外面に形成されている金属層をパターニングしてレーザ照射位置の金属層を除去する工程を含むことを特徴とする請求項12に記載の配線基板の製造方法。   The hole forming step includes a step of patterning a metal layer formed on an outer surface of the first substrate and removing the metal layer at a laser irradiation position before irradiating the laser beam. Item 13. A method for manufacturing a wiring board according to Item 12. 請求項1乃至請求項8のいずれか1項に記載の配線基板、およびこの配線基板を内蔵した筐体を有する電子機器。   An electronic device comprising: the wiring board according to claim 1; and a housing having the wiring board built therein.
JP2005199152A 2005-07-07 2005-07-07 Wiring board and manufacturing method thereof, and electronic equipment incorporating wiring board Pending JP2007019268A (en)

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