JP2006324254A - Manufacturing method of gas discharge display device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To manufacture a gas discharge display device having a uniform dielectric of a small relative dielectric constant. <P>SOLUTION: In the manufacturing method of the gas discharge display device having a dielectric layer 17 spread over a whole display area covering electrodes X, Y arranged on a glass base plate 11, a light-shielding layer 55 is provided before formation of a dielectric layer 17 in an area between the electrodes within the display area excluding a discharge gap. On a surface of a base structure after a stage of arranging the electrodes X, Y, a layer which covers its bottom surface isotropic by a plasma vapor growth method and is composed of a silica compound with a compressive stress is formed as a dielectric layer 17. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to an electrode group for discharge such as PDP and PALC, and a method for manufacturing a gas discharge display device having a dielectric layer covering the electrode group.

  PDP is becoming widespread as a display device for large-screen television images and computer output with the practical use of color display. The market demands larger screens and higher quality devices.

  An AC type PDP having a three-electrode surface discharge structure has been commercialized as a color display device. This is one in which a pair of main electrodes (first and second electrodes) for maintaining lighting is arranged for each row (line) of the matrix display, and an address electrode (third electrode) is arranged for each column. It is. Since it is an AC type, a memory function of a dielectric layer covering the main electrode is used for display. That is, addressing is performed to form a charged state according to the display content in a line scanning format, and thereafter, the lighting sustaining voltage Vs having an alternating polarity is applied to all the main electrode pairs simultaneously. As a result, the effective voltage (also referred to as the cell voltage) Veff exceeds the discharge start voltage Vf only in the cells having wall charges, and surface discharge along the substrate surface occurs. If the application period of the lighting sustaining voltage Vs is shortened, an apparently continuous lighting state can be obtained.

  In the surface discharge type PDP, the phosphor layer for color display is provided on the other substrate facing the substrate on which the main electrode pair is disposed, thereby reducing deterioration of the phosphor layer due to ion bombardment during discharge, Long life can be achieved. Those in which the phosphor layer is disposed on the back side substrate are referred to as “reflection type”, and conversely, those in which the phosphor layer is disposed on the front side substrate are referred to as “transmission type”. What is excellent in luminous efficiency is a reflective type in which the front surface of the phosphor layer emits light.

Conventionally, a dielectric layer for AC driving has been formed by a thick film technique in which a low-melting glass paste is printed in a solid film form and fired. In order to reduce the capacitance between the main electrodes, formation of a dielectric layer made of a material having a relative dielectric constant smaller than that of the low melting point glass has been studied. As an example, a polyimide layer is disclosed in JP-A-9-35641. Is screen-printed or applied with a spinner.
Japanese Patent Laid-Open No. 9-35641

  In the dielectric layer by the conventional thick film method, there is a problem that bubbles are generated during firing and it is difficult to make the film quality uniform over the entire screen. Bubbles reduce the breakdown voltage between the main electrode and the address electrode. In addition, since transparency is lowered by bubbles, in the reflective PDP in which the dielectric layer is located on the front side of the discharge space, the luminance is impaired by the dielectric layer.

  In addition, since the relative dielectric constant of the low melting point glass is large, there is a problem that a large amount of electric power is consumed for charging the capacitance between the electrodes, and that a thermal distortion occurs in the substrate during firing. Regarding the capacitance between the electrodes, it is conceivable to make the dielectric layer thin. However, if the thickness is made thin, uneven coating tends to occur, the variation in discharge characteristics becomes remarkable, and the possibility that a part of the electrode group is exposed increases.

  Further, as shown in FIG. 8 schematically showing a cross-sectional structure of a main part of a conventional PDP, the upper surface of the dielectric layer 17p by screen printing or spin coating becomes substantially flat regardless of the undulation of the base surface. For this reason, in the reflective type in which each of the paired main electrodes Xp and Yp is composed of the transparent conductive film 41p and the metal film 42p overlapping therewith, the portion of the dielectric layer 17p that covers the metal film 42p is transparent. Since it is thinner than the portion covering the conductive film 41p, a strong discharge occurs above the metal film 42p despite being far from the discharge gap. This discharge results in useless power consumption that does not contribute to display because light emitted by the discharge is shielded by the metal film 42p.

  In order to solve these problems, attempts have been made to form a dielectric layer by a thin film technique. However, the vapor deposition method and the atmospheric pressure CVD method cannot form a film having a sufficient thickness without causing cracks. It was.

  An object of the present invention is to make it possible to manufacture a gas discharge display device having a homogeneous dielectric layer having a small relative dielectric constant.

In the present invention, a plasma vapor deposition method (plasma CVD method) is used for forming the dielectric layer. By appropriately selecting the film formation conditions and controlling the stress of the film, a layer having a predetermined thickness with high crack resistance can be obtained. Does not depend on the firing can also be a layer composed of a dielectric layer of a material other than the low melting glass, for example, silicon dioxide (SiO _2), silicon oxynitride (SiON), silicon compound such as silicon nitride (SiN), or When a layer of organic silicon oxide (RSiO: R represents an alkyl group or an allyl group) is used, the relative dielectric constant is significantly smaller than that of a low-melting glass layer.

  In addition, according to the plasma CVD method, the deposition proceeds isotropically with respect to the base surface, so that even if there is a step on the upper surface of the electrode, the thickness of the dielectric layer covered by the electrode becomes uniform. Therefore, when the electrode has a laminated structure of a transparent conductive film and a metal film, useless discharge above the metal film can be suppressed.

  The method of the invention of claim 1 is a method of manufacturing a gas discharge display device having a dielectric layer that covers an electrode arranged on a glass substrate and extends over the entire display region, and before the formation of the dielectric layer. In addition, a light-shielding layer is provided in the display area between the electrodes excluding the discharge gap, and the dielectric layer is formed by plasma vapor deposition on the surface of the substrate structure after the electrodes are arranged. A layer made of a silicon compound isotropically covering the lower ground of the film is formed.

  In the manufacturing method of the invention of claim 2, a layer made of silicon dioxide or organic silicon oxide is formed as the dielectric layer.

  According to the first or second aspect of the present invention, it is possible to manufacture a gas discharge display device having a homogeneous dielectric layer having a small relative dielectric constant, and to increase the display contrast.

[First Embodiment]
FIG. 1 is a plan view showing an electrode arrangement of a PDP 1 according to the present invention.

  In the illustrated PDP 1, a pair of first and second main electrodes X and Y are arranged in parallel, and in each cell C, the main electrodes X and Y intersect with an address electrode A as a third electrode. This is an AC type PDP having a discharge structure. Both the main electrodes X and Y extend in the row direction (horizontal direction) of the screen, and one main electrode Y is used as a scan electrode for selecting cells C in units of rows at the time of addressing. The address electrode A extends in the column direction (vertical direction), and is used as a data electrode for selecting the cell C for each column. A range in which the main electrode group and the address electrode group intersect on the substrate surface is a display area (screen) ES.

  FIG. 2 is an exploded perspective view showing the basic structure inside the PDP according to the present invention.

  The PDP 1 is a reflection type and includes a pair of substrate structures 10 and 20. In the PDP 1, a pair of main electrodes X and Y are arranged for each row on the inner surface of the glass substrate 11 which is a base material of the substrate structure 10 on the front side. A row is a horizontal cell column. The main electrodes X and Y each consist of a transparent conductive film 41 and a metal film (bus conductor) 42 and are covered with a dielectric layer 17 having a thickness of about 10 μm. A protective film 18 made of magnesia (MgO) and having a thickness of several thousand angstroms is provided on the surface of the dielectric layer 17. The address electrodes A are arranged on the inner surface of the glass substrate 21 which is the base material of the substrate structure 20 on the back side, and are covered with the dielectric layer 24. On the dielectric layer 24, one partition wall 29 having a height of 150 μm in a straight line in plan view is provided between the address electrodes A. These partition walls 29 divide the discharge space 30 into sub-pixels (unit light-emitting regions) in the row direction and define the gap size of the discharge space 30. Then, phosphor layers 28R, 28G, and 28B of three colors R, G, and B for color display are provided so as to cover the inner surface on the back side including the upper side of the address electrode A and the side surface of the partition wall 29. ing. The discharge space 30 is filled with a discharge gas in which xenon is mixed with neon as a main component, and the phosphor layers 28R, 28G, and 28B are locally excited by ultraviolet rays emitted by xenon during discharge to emit light. One pixel (pixel) for display is composed of three sub-pixels arranged in the row direction. A structure in each sub-pixel is a cell (display element) C. Since the arrangement pattern of the barrier ribs 29 is a stripe pattern, the portion corresponding to each column in the discharge space 30 extends across all rows L in the column direction.

  FIG. 3 is a schematic diagram of a cross-sectional structure of a main part of the PDP according to the first embodiment. In the figure, in order to facilitate understanding of the shape of the dielectric layer 17, the front side of the PDP 1 is the lower side of the figure. Further, the protective film is not shown. The manner of illustration is the same for the cross-sectional structure of the main part of a PDP according to another embodiment to be described later.

  As shown in FIG. 3, the metal film 42 is arranged close to the end of the transparent conductive film 41 on the side opposite to the surface discharge gap. The dielectric layer 17 is formed so as to cover the main electrodes X and Y isotropically and has a compressive stress F. Since the thickness of the dielectric layer 17 is uniform, unnecessary discharge hardly occurs above the metal film 42 far from the surface discharge gap. Therefore, it is easy to optimize the discharge range by selecting the drive voltage. Further, the occurrence of cracks is suppressed by the compressive stress F. In the PDP 1 having the above configuration, predetermined constituent elements are separately provided for the glass substrates 11 and 21 to produce the front and rear substrate structures 10 and 20, and the two substrate structures 10 and 20 are overlapped to face each other. Is manufactured by a series of processes for sealing the periphery of the gas and filling the inside with exhaust gas and discharge gas. At that time, the dielectric layer 17 which is a component of the substrate structure 10 is formed by a plasma CVD method which is a kind of thin film forming method. FIG. 4 is a schematic view of a plasma CVD apparatus according to the present invention.

The plasma CVD apparatus 100 is a parallel plate type. The substrate structure 10 ′ at the stage where the arrangement of the main electrodes X and Y is finished is placed in the vacuum chamber, and plasma is generated to deposit a predetermined substance on the base surface s. The lower ground s is the exposed surfaces of the main electrodes X and Y and the glass substrate 11. For example, tetraethoxysilane [TEOS: Si (C ₂ H ₅ O) ₄ ] is introduced as a source gas and oxygen (O ₂ ) is introduced as a reactive gas to form the dielectric layer 17 made of SiO _2. .

Using a parallel plate type plasma CVD apparatus 100, SiO ₂ films were formed on a silicon substrate and a soda lime glass substrate, respectively, under the following conditions.

Introduction gas and flow rate: TEOS / 800SCCM
Introduction gas and flow rate: O ₂ / 2000SCCM
High frequency output: 1.5 kW
Substrate temperature: 350 ° C
Degree of vacuum: 1.0 Torr
The obtained SiO ₂ film has a compressive stress of −0.7 × 10 ⁹ dyn / cm ^{2 for} a silicon substrate and −1.9 × 10 ⁹ dyn / cm ² for a soda lime glass substrate, and has a relative dielectric constant. The rate was 4.1.

Under the same conditions, a SiO ₂ film having a thickness of 10 μm was formed on a substrate structure made of a glass substrate and a main electrode made of the materials shown in Table 1.

Due to the film formation, the substrate structure warped in a convex shape by about 5 mm with the film formation surface facing upward. An MgO film having a thickness of 0.5 μm was formed on the SiO ₂ film by a vapor deposition method, and the substrate structure obtained thereby was bonded to a separately manufactured back side substrate structure to complete a PDP. The measurement result of luminous efficiency was 1.5 lm / W.

Using a parallel plate type plasma CVD apparatus 100, SiO ₂ films were formed on a silicon substrate and a soda lime glass substrate, respectively, under the following conditions.

Introduction gas and flow rate: SiH ₄ / 900SCCM
Introduction gas and flow rate: N ₂ O / 4000 SCCM
High frequency output: 1.0kW
Substrate temperature: 340 ° C
Degree of vacuum: 1.2 Torr
The obtained SiO ₂ film has a tensile stress of + 1.0 × 10 ⁹ dyn / cm ² for a silicon substrate and a compressive stress of −0.2 × 10 ⁹ dyn / cm ² for a soda lime glass substrate. The relative dielectric constant was 4.1.

A SiO ₂ film having a thickness of 10 μm was formed on a substrate structure composed of a glass substrate and a main electrode made of the same material as in Example 1 under the same conditions as in Example 1. As a result of the film formation, the substrate structure warped about 1 mm in a convex shape with the film formation surface facing upward. A PDP was completed by laminating a substrate structure obtained by depositing a 0.5 μm thick MgO film on the SiO ₂ film by a vapor deposition method and a separately manufactured substrate structure on the back side. The measurement result of luminous efficiency was 1.5 lm / W.

Using a parallel plate type plasma CVD apparatus 100, an organic silicon oxide film (CH ₃ SiO) was formed on the sample substrate under the following conditions.

Introduction gas and flow rate: Si (CH ₃ ) ₄ / 800SCCM
Introduction gas and flow rate: H ₂ O / 4000 SCCM
High frequency output: 2.0kW
Substrate temperature: 400 ° C
Degree of vacuum: 1.0 Torr
The obtained organic silicon oxide film had a relative dielectric constant of 2.6.

A CH ₃ SiO film having a thickness of 10 μm was formed on a substrate structure including a glass substrate and a main electrode made of the same material as in Example 1 under the same conditions as in Example 1. A substrate structure obtained by depositing an MgO film having a thickness of 0.5 μm on the CH ₃ SiO film by vapor deposition and a separately manufactured back-side substrate structure were bonded to complete a PDP. The measurement result of luminous efficiency was 1.7 lm / W.
[Comparative Example 1]
Using an atmospheric pressure CVD apparatus 100, SiO ₂ films (thermal CVD films) were formed on a silicon substrate and a soda lime glass substrate, respectively, under the following conditions.

Introduction gas and flow rate: SiH ₄ / 900SCCM
Introduction gas and flow rate: H ₂ O / 6000 SCCM
Substrate temperature: 450 ° C
The obtained SiO ₂ film had a tensile stress of + 4.0 × 10 ⁹ dyn / cm ^{2 for} a silicon substrate and + 2.3 × 10 ⁹ dyn / cm ² for a soda lime glass substrate.

A SiO ₂ film having a thickness of 10 μm was formed on a substrate structure composed of a glass substrate and a main electrode made of the same material as shown in Table 1 under the same conditions as in Example 1. Many cracks occurred on the film surface, and the PDP could not be assembled.
[Comparative Example 2]
Using a parallel plate type plasma CVD apparatus 100, SiO ₂ films were formed on a silicon substrate and a soda lime glass substrate, respectively, under the following conditions.

Introduction gas and flow rate: SiH ₄ / 900SCCM
Introduction gas and flow rate: N ₂ O / 5000 SCCM
High frequency output: 1.8kW
Substrate temperature: 380 ° C
Degree of vacuum: 0.7 Torr
The obtained SiO ₂ film has a compressive stress of −3.3 × 10 ⁹ dyn / cm ² for a silicon substrate and a compressive stress of −4.6 × 10 ⁹ dyn / cm ² for a soda lime glass substrate. Was.

A SiO ₂ film having a thickness of 10 μm was formed on a substrate structure composed of a glass substrate and a main electrode made of the same material as in Example 1 under the same conditions as in Example 1. As a result of the film formation, the substrate structure warped in a convex shape by about 12 mm with the film formation surface facing upward. Since the warpage was excessive, it could not be bonded to the substrate structure on the back side.
[Comparative Example 3]
A dielectric layer was formed by a conventional thick film technique. That is, PbO—BO—SiO-based frit glass was printed on a substrate structure composed of a glass substrate and a main electrode made of the same materials as in Example 1 in Table 1 with a roll coater, and the atmosphere was formed using a conveyor furnace. Firing was performed in an atmosphere (580 ° C., 60 min). The obtained low-melting-point glass layer contained innumerable bubbles, and the measured value of relative dielectric constant was 12.0. An MgO film having a thickness of 0.5 μm was formed on the low melting point glass layer by a vapor deposition method, and the obtained substrate structure was bonded to a separately prepared back side substrate structure to complete a PDP. The measurement result of luminous efficiency was 0.8 lm / W.
[Second Embodiment]
FIG. 5 is a schematic diagram of a cross-sectional structure of a main part of a PDP according to the second embodiment.

In the PDP 2, a transparent conductive film 41b and a metal film 42b are sequentially formed on the front glass substrate 11b to form the main electrodes Xb and Yb, and then before the dielectric layer 17b is formed by a thin film technique, An insulator layer 50 is provided on the film 42b. As a result, the layer covering the portion of the main electrodes Xb, Yb that overlaps the metal film 42b is thicker than the other portions, so that unnecessary discharge above the metal film 42b is suppressed and the luminous efficiency is increased.
[Third Embodiment]
FIG. 6 is a schematic diagram of a cross-sectional structure of a main part of a PDP according to the third embodiment. FIG. 7 is a plan view of the display area of the PDP according to the third embodiment.

  In the PDP 3, after forming the main electrodes Xc and Yc by sequentially providing the transparent conductive film 41c and the metal film 42c on the front glass substrate 11c, before forming the dielectric layer 17c by a thin film technique, A dark insulator layer 55 is provided so as to cover the metal film 42c and the reverse slit S2. The reverse slit S2 is an electrode arrangement gap between adjacent rows, and is wider than the electrode arrangement gap (slit) S1 in the row which is a surface discharge gap. As shown in FIG. 7, the insulating layer 55 forms a stripe-shaped light shielding pattern in the entire display area ESc, and the phosphor layer is hidden between the rows to increase the display contrast. In addition, since the layer covering the portion of the main electrodes Xc, Yc that overlaps the metal film 42c is thicker than the other portions, unnecessary discharge above the metal film 42c is suppressed, and the luminous efficiency is increased.

  According to the above embodiment, the dielectric layers 17, 17b, and 17c can be provided at a lower temperature than firing, and the thermal distortion of the substrate can be reduced. Moreover, since the dielectric constants of the dielectric layers 17, 17b and 17c are lower than those of the conventional low melting point glass layer, the capacitance between the electrodes is reduced and the power consumption is reduced. Furthermore, since the dielectric layers 17, 17b, and 17c do not contain metals such as lead and zinc, the work safety of manufacturing is increased, and PDPs 1, 2, and 3 that are excellent in recyclability are obtained.

  INDUSTRIAL APPLICABILITY The present invention is suitable for manufacturing a gas discharge display device having a homogeneous dielectric layer having a small relative dielectric constant that is effective for reducing the capacitance between electrodes.

It is a top view which shows the electrode arrangement | sequence of PDP which concerns on this invention. It is a disassembled perspective view which shows the basic structure inside the PDP which concerns on this invention. It is a schematic diagram of the principal part cross-section of PDP which concerns on 1st Embodiment. 1 is a schematic view of a plasma CVD apparatus according to the present invention. It is a schematic diagram of the principal part cross-section of PDP which concerns on 2nd Embodiment. It is a schematic diagram of the principal part cross-section of PDP which concerns on 3rd Embodiment. It is a top view of the display area of PDP which concerns on 3rd Embodiment. It is a schematic diagram of the principal part cross-section of the conventional PDP.

Explanation of symbols

1,2,3 PDP (Gas Discharge Display Device)
11, 11b, 11c Glass substrate (substrate)
X, Y, Xb, Yb, Xc, Yc Main electrode (electrode)
ES, ESc Display area 17, 17b, 17c Dielectric layer s Underground F Compressive stress 50 Insulator layer 55 Insulator layer (light-shielding layer)
S1 slit (discharge gap)
S2 Reverse slit (interelectrode area)

Claims (2)

A method for manufacturing a gas discharge display device having a dielectric layer covering an electrode arranged on a glass substrate and extending over the entire display region,
Prior to the formation of the dielectric layer, a light shielding layer is provided in a portion between the electrodes excluding a discharge gap in the display region,
A layer made of a silicon compound isotropically covering the lower surface of the film by plasma vapor deposition is formed as the dielectric layer on the surface of the substrate structure after the step of arranging the electrodes. A method for manufacturing a gas discharge display device. The method for manufacturing a gas discharge display device according to claim 1, wherein a layer made of silicon dioxide or organic silicon oxide is formed as the dielectric layer.