JP2006164526A - Plasma display panel and its manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a highly reliable plasma display panel high in withstand voltage and hard to cause insulation breakdown, and reduced in wattless power not directly contributing to discharge. <P>SOLUTION: This plasma display panel has at least a front plate 2 and a rear plate 3 disposed sandwiching a discharge space and facing each other, a plurality of display electrode pairs 4 formed in the inner surface of a glass substrate 10 in the front plate 2 and a dielectric layer 17 formed covering the display electrode pairs 4. The front plate has at least two or more dielectric layers. A relative dielectric constant of a dielectric layer 18 covering the surface of the glass substrate 10 is smaller than a relative dielectric constant of the glass substrate 10. At least a part of the display electrode pairs 4 is embedded in the dielectric layer 18 covering the surface of the glass substrate 10. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a plasma display (gas discharge display) panel using radiation from a gas discharge and a manufacturing method thereof, and more particularly to a configuration of a front plate capable of reducing power consumption and a manufacturing method thereof.

  Commercialization of a plasma display device or a plasma display panel (hereinafter referred to as PDP) has been attempted as a conventional flat display device using radiation from gas discharge. There are a direct current type (DC type) and an alternating current type (AC type) in the PDP. As a large display device, the AC type PDP has a higher technical potential at present. Furthermore, surface discharge type PDPs having particularly excellent life characteristics among AC types are becoming mainstream as products.

  FIG. 7 is a conceptual cross-sectional view showing a discharge cell structure which is a discharge unit of a conventional surface discharge AC type PDP. FIG. 7B is a conceptual cross-sectional view taken along a plane indicated by xy in FIG. Hereinafter, a conventional plasma display panel will be described using the discharge cell 71 of FIG. On the surface of the glass substrate 10 of the front plate 2, a scanning electrode 5 as a display electrode 4 made of a transparent conductive material and a sustaining electrode 6 form a pair, for example, in a stripe shape. The dielectric layer 7 and the protective film 8 are laminated so as to cover the pair. The paired display electrodes 4 are transparent electrodes 75 and 76 having a film thickness of about 1000 mm having a relatively high electrical resistance of ITO (Indium Tin Oxide Film) or the like, and are usually thin to supply power on them. A bus electrode 9 which is a metal electrode having a width of about 5 μm is formed by a thick film process in which an Ag paste is printed and fired. In the front plate 2, the dielectric layer 7 for accumulating wall charges is a low melting point glass layer made of lead-based glass material formed with a film thickness of about 40 μm, and has a current limiting function peculiar to the AC type PDP. I am doing so. The dielectric layer 7 and the protective film 8 function to prevent the surface of the electrode pair from being sputtered and deteriorated by high energy ions generated by discharge. As the protective film 8, an electrically insulating and transparent MgO film formed by a thin film process or a printing method is usually used. The protective film 8 protects the electrode surface and has secondary electrons in the discharge cell. Is efficiently released, and the discharge starting voltage is lowered.

  On the glass substrate 11 of the back plate 3, data electrodes 12 for writing image data are formed in a stripe shape, and a back side dielectric layer 13 is laminated so as to cover the data electrodes 12. On the dielectric layer 13 between adjacent discharge cells (not shown), barrier ribs 14 having a predetermined height are formed in a stripe shape, a cross-beam shape (not shown), and the like. The side wall of the barrier rib 14 has a structure in which a phosphor layer 15 is applied.

  The front plate 2 and the back plate 3 configured as described above are arranged and sealed so that their processing surfaces are opposed to each other, and the scan electrodes 5, the sustain electrodes 6, and the data electrodes 12 are orthogonal to each other. After exhausting the atmosphere and impurity gas inside, a mixed gas such as a rare gas xenon / neon or xenon / helium is sealed and sealed as a discharge gas.

  Here, light is directly emitted for display by the scan electrode 5 and the sustain electrode 6 on the front plate 2, and the data electrode 12 is an electrode for selecting a discharge cell 71 as a discharge display unit. It does not contribute directly to display light emission. A plurality of discharge cells 71 as discharge units are arranged in a matrix to form a plasma display panel, thereby completing the plasma display device. Although not shown in the figure, the plasma display device is provided with a drive circuit for driving the discharge cells in the plasma display panel in a matrix, a control circuit for controlling these, and the like.

  The AC-type PDP has three operation periods (not shown), that is, (1) an initialization period in which all display cells are initialized, (2) each discharge cell is addressed, and each cell corresponds to input data. The display is driven and displayed by an address / display separation drive system composed of a data writing period for selecting and inputting a display state, and (3) a sustain discharge period for causing the discharge cells in the display state to emit light.

  In the initialization period (1), a high voltage of 400 to 600 V is applied between the scan electrode 5 and the data electrode 12, and the amount of wall charges of all the display cells becomes the level of the initialization state.

  In the data write period (2), write data is input using the data electrode 12 of the back plate 3, and wall charges are formed on the surfaces of the dielectric layer 7 and the protective film 8 of the front plate 2 facing each other. In the sustain discharge period of (3) above, in the discharge cells in which the wall charges exist, rectangular wave voltages of electrode voltage pulses of about 200 V are mutually in phase with each of the scan electrode 5 and the sustain electrode 6 of the display electrode 4 that make a pair. Applied differently. That is, by applying an AC voltage between the electrode pairs, a pulse discharge is generated each time the voltage polarity changes in the discharge cell in which the display state is written. Due to this sustain discharge, the display emission is such that a vacuum ultraviolet emission spectrum of 147 nm is emitted from the excited xenon atoms in the discharge space, and vacuum ultraviolet rays mainly composed of 173 nm are emitted from the excited xenon molecules, and then the ultraviolet radiation is provided on the back plate 3. It is obtained by converting to visible radiation in the phosphor layer 15. In a discharge cell in which wall charges are not written on the dielectric layer 7 and the protective film 8, no sustain discharge occurs and the display state is black. The display pixel unit of the AC type PDP is composed of discharge cells which are three display discharge units each provided with a phosphor layer for emitting red, green and blue light. The surface of the protective film 8 is exposed to the discharge space, protects the dielectric layer 7 from ion bombardment during discharge, and lowers the discharge start voltage by efficiently emitting secondary electrons. Among them, MgO (magnesium oxide), which is a metal oxide, is a material having a large secondary electron emission coefficient γ and an optically transparent material having high sputter resistance and is widely used as a material for the protective film 8. Yes.

  However, in the conventional PDP, since the electrode voltage pulses are applied to the scan electrodes 5 and the sustain electrodes 6 of the display electrode 4 so that the phases thereof are different from each other, the displacement between the electrodes is charged. Current flows. Since this displacement current does not directly contribute to image display, it becomes reactive power, causing a loss in the resistance component of the scan electrode 5 and the sustain electrode 6 and the control circuit, resulting in reactive power.

In order to reduce such power loss, reactive power is reduced by forming a dielectric having a small relative dielectric constant on a glass substrate and forming a plurality of display electrode pairs on the dielectric (for example, Patent Document 1).
JP 2003-197110 A

  However, with such a configuration, since the dielectric layer becomes two layers, the thickness of the front plate increases. Therefore, in order to reduce the increase in thickness, it is necessary to reduce the thickness of the dielectric layer covering the display electrode. However, if the thickness of the dielectric layer is reduced, the bus electrode composed of the Ag electrode formed by printing is a film. Since the thickness is about 5 μm, the dielectric layer formed on the dielectric layer has a thickness difference of several μm or more in the dielectric layer only at the bus electrode part. There is a problem that the withstand voltage of the panel is lowered.

  The present invention has been made in view of such problems, and at least a part of the display electrode pair is embedded in a dielectric layer covering the surface of the glass substrate as at least the front plate of the PDP. It is an object of the present invention to provide a plasma display panel having high voltage characteristics and more effective in reducing power consumption, and a method for manufacturing the same.

  The present invention employs the following means in order to solve the above problems.

  In other words, the plasma display panel of the present invention is a plasma display panel in which a front plate and a back plate are arranged to face each other with a discharge space interposed therebetween, and the front plate has at least two dielectric layers. The dielectric constant of the dielectric layer covering the surface of the glass substrate is smaller than the relative dielectric constant of the glass substrate, and a plurality of display electrode pairs at least partially cover the surface of the glass substrate. The gist of the invention is that the display electrode is arranged in a state embedded in a body layer, and is separated from the glass substrate by a dielectric layer covering the surface of the glass substrate. .

  As a result, the difference in film thickness of the dielectric layer facing the discharge space is reduced, so that a plasma display with good withstand voltage can be obtained. In addition, since at least a part of the display electrode is embedded in a dielectric layer having a small relative dielectric constant, a plasma display having an excellent reactive power reduction effect can be obtained.

  Specifically, the dielectric constant of the dielectric layer is characterized in that the dielectric constant of the dielectric layer covering the surface of the glass substrate is smaller than the dielectric constant of the dielectric layer facing the discharge space. To do.

  The display electrode is composed of a transparent electrode and a narrower bus electrode. Specifically, the bus electrode is embedded in a dielectric layer covering the surface of the glass substrate, and the transparent electrode is a bus electrode. And it is arrange | positioned so that at least one part of the dielectric material layer which covers the surface of a glass substrate may be covered. Further, specifically, the transparent electrode and the bus electrode are both configured to be at least partially embedded in the dielectric layer covering the surface of the glass substrate. In addition, specifically, the bus electrode is partially embedded in a dielectric layer covering the surface of the glass substrate, and the transparent electrode is arranged beside the bus electrode. In addition, specifically, the transparent electrode is at least partially embedded in a dielectric layer covering the surface of the glass substrate, the bus electrode is formed on the transparent electrode, and the bus electrode is formed by the transparent electrode. And having a structure isolated from the dielectric layer covering the substrate. Note that, here, the display electrode pair includes a transparent electrode and a narrower bus electrode. However, the present invention can be applied to a display electrode pair using only Ag, for example, without using a transparent electrode. It is.

  In detail, the thickness of the dielectric layer covering the surface of the glass substrate is smaller than the thickness of the dielectric layer facing the discharge space. Preferably, the thickness of the dielectric layer covering the surface of the glass substrate is at least 1 μm in order to isolate the bus electrode from the glass substrate. If the thickness of the dielectric layer is too thick, the front plate itself However, the thickness of the dielectric layer covering the surface of the glass substrate is preferably in the range of 1 to 15 μm. The thickness of the dielectric layer facing the discharge space is required to be at least 10 μm from the viewpoint of voltage resistance, and if it is too thick, it is not good from the viewpoint of cracking problems and light extraction efficiency. is there. Therefore, the thickness of the dielectric layer facing the discharge space surface is preferably in the range of 10 to 50 μm. In addition, preferably, the dielectric layer covering the surface of the glass substrate has a relative dielectric constant of 1 to 5, and the dielectric layer facing the discharge space has a relative dielectric constant of 5 to 15. And

  The method of manufacturing a plasma display according to the present invention is a method of manufacturing a plasma display panel in which a front plate and a back plate are arranged to face each other with a discharge space interposed therebetween, and the step of forming the front plate includes the step of forming the front plate on the front plate. It includes at least a step of forming at least two dielectric layers, and a step of forming at least a part of a plurality of display electrodes in the dielectric layer covering the glass substrate. To do.

  As a result, the plasma display panel has the effect of reducing reactive power, and the thickness distribution on the discharge space side of the dielectric layer is reduced, thereby improving the withstand voltage and preventing the dielectric breakdown. I can do it.

  Further, the step of forming a display electrode pair formed of a transparent electrode and a narrower bus electrode is specifically a step of embedding the bus electrode in a dielectric layer covering the surface of the glass substrate, Forming the electrode so as to cover the bus electrode embedded in the dielectric layer covering the surface of the glass substrate and at least a part of the dielectric layer covering the surface of the glass substrate. Is. In addition, specifically, the method includes a step of embedding and forming both the transparent electrode and the bus electrode in a dielectric layer covering the surface of the glass substrate. In addition, specifically, the method includes a step of partially embedding the bus electrode in a dielectric layer covering the surface of the glass substrate, and a step of arranging transparent electrodes next to the bus electrode. is there. In addition, specifically, at least a part of the transparent electrode is embedded in a dielectric layer covering the surface of the glass substrate, and the bus electrode is formed on the transparent electrode, and the bus electrode is formed on the surface of the glass substrate. Including a step of forming a structure isolated from the dielectric layer covering the substrate. Preferably, the step of embedding at least part of the display electrode in the dielectric layer covering the surface of the glass substrate is performed by at least one of a sandblasting method, an etching method, and a laser processing method. At least a step of forming a groove in the dielectric layer covering the substrate. Preferably, the step of embedding the bus electrode in the groove portion of the dielectric layer covering the surface of the glass substrate includes at least one of a screen printing method, a vacuum deposition method, a sputtering method, a plating method, and a CVD method. It is the process including this. In addition, preferably, the step of embedding the bus electrode in the dielectric layer covering the surface of the glass substrate includes forming a dielectric layer so as to cover the surface of the glass substrate and covering the surface of the glass substrate. The method includes a step of embedding the bus electrode in a dielectric layer covering the surface of the glass substrate by applying a paste on the layer by a screen printing method and baking the bus electrode.

  The idea of embedding a bus electrode in a glass substrate to improve yellowing caused by diffusion of silver into a dielectric is disclosed (for example, JP-A-2001-143610). There is an advantage that manufacturing can be easily performed by embedding electrodes in the dielectric layer on the substrate.

  Note that the configurations described above can be combined with each other without departing from the spirit of the present invention.

  As described above, according to the plasma display panel of the present invention, at least a part of the display electrode pair is embedded in the dielectric layer covering the glass substrate having a relative dielectric constant smaller than that of the glass substrate. Therefore, it has the effect of reducing reactive power that does not contribute directly to the discharge, and the difference in the thickness of the dielectric on the discharge space side is reduced, making it easy to create a plasma display panel with high withstand voltage and high reliability. Can be manufactured.

  Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the drawings.

(Embodiment 1)
FIG. 1 is a conceptual cross-sectional view showing a configuration of a discharge cell of a PDP in Embodiment 1 of the present invention. 1A is a cross-sectional view taken along a plane perpendicular to the partition wall 14, and FIG. 1B is a cross-sectional view taken along a plane indicated by xy in FIG. 1A. Components having the same configuration as in FIG. 7 are given the same reference numerals. Although only one cell is displayed in FIG. 1, a PDP panel is configured by arranging a large number of cells that emit red, green, and blue colors.

  In FIG. 1, at least two dielectric layers are formed on the inner surface of the glass substrate 10 on the front plate 2 side in the discharge cell 1, and the dielectric layer 18 covering the inner surface of the glass substrate 10 is formed. The relative dielectric constant is smaller than the relative dielectric constant of the glass substrate 10, and at least a part of the display electrode pair 4 (here, the bus electrode 19) is embedded in the dielectric layer 18 covering the surface without the glass substrate. Yes. The dielectric layer 18 is a predetermined paste on the glass substrate 10 by a screen printing method in which a transparent glass material having a relative dielectric constant smaller than that of the glass substrate 10 is pasted, or a sheet laminating method in which a sheet material is laminated. It is formed in place and fired at a predetermined temperature. As a method of embedding the bus electrode 19 in the dielectric layer 18 covering the inner surface of the glass substrate 10, for example, the bus electrode 19 has a shape of a depth of several μm that can bury at least the bus electrode 19 on the inner surface of the dielectric layer 18. In addition, at least two stripe-shaped grooves arranged in parallel are formed by a method such as sandblasting. Although not shown, it is formed in detail as follows. After the dielectric layer 18 is washed, a negative dry film resist having a thickness of about 50 μm is laminated on the inner surface of the dielectric layer 18 as a photosensitive coating layer. A striped resist pattern hole having an opening width of about 100 μm is formed on the dry film using a photomask. In addition, a striped groove is dug on the surface of the hard dielectric layer 18 under the resist pattern hole by a sandblasting method in which silica particles, alumina particles, etc. are uniformly sprayed, and a soft film is not dug by the particles. Remains. The depth and accuracy of the groove can be adjusted by the particle material used, its particle size, and the spraying conditions. Thereafter, the substrate is immersed in a stripping solution to peel off the dry film on the surface, and further washed to wash away the particles, whereby the dielectric layer 18 having grooves on the inner surface is formed.

  Next, the bus electrode 19 for lowering the electric resistance is a single-layer film such as silver, aluminum or copper having a low resistance, or a laminated structure such as a two-layer structure of chromium and copper, or a three-layer structure of chromium, copper and chromium. The film is formed in a groove formed in the dielectric layer 18 by a thin film forming technique such as a printing / firing method or sputtering.

  As another method of embedding the bus electrode 19 in the dielectric layer 18, a paste of bus electrode material is formed at a predetermined location on the dielectric layer 18 by screen printing, exposure and development, and a predetermined temperature. By firing at, the bus electrode 19 can be embedded in the dielectric layer 18 without forming a groove in the dielectric layer 18 due to a difference in melting point or mass between the dielectric layer 18 and the bus electrode 19.

  Next, as shown in FIG. 1, the scanning electrode 5 as the display electrode 4 and the transparent electrodes 151 and 161 as the sustaining electrode 6 are paired to be flat with the surface of the dielectric layer 18. The bus electrode 19 embedded in the dielectric layer 18 is disposed so as to cover at least a part of the surface of the dielectric layer 18 and the surface. In this way, the bus electrode and the transparent electrode are disposed so that the discharge space side surface and the dielectric layer surface of the transparent electrode are substantially flat, and therefore the dielectric layer 17 on the discharge space side to be formed thereafter. Thus, the withstand voltage as the dielectric layer can be improved and the dielectric breakdown can be prevented.

The transparent electrodes 151 and 161 include ITO (Indium Tin Oxide Film), SnO ₂ (Tin Oxide), ZnO (Zinc Oxide) -based material, etc., and are formed by sputtering or vapor deposition, and widened by photolithography. For example, in the form of stripes, they are formed on the inner surface of the glass substrate 10 on the front plate 2 side so as to face each other with a predetermined interval (discharge gap) therebetween.

  Next, the bus electrode 19 embedded in the dielectric layer 18 and the pair of display electrodes 4 including the transparent electrodes 151 and 161 formed on at least a part of the surface of the bus electrode 19 and the dielectric layer 18 are covered. In addition, the dielectric layer 17 is applied and fired by screen printing or the like. Next, the protective film 8 containing MgO (magnesium oxide) which is a metal oxide is formed on the dielectric layer 17. The material of the protective film 8 and the film thickness thereof are appropriately selected and designed.

  On the inner surface of the glass substrate 11 on the other back plate 3 side, for each discharge cell, perpendicular to the scanning electrode 5 and the sustain electrode 6 provided on the front plate 2, Cr—Cu—Cr, Ag, etc. The data (address) electrodes 12 which are the third electrodes formed from are formed and arranged by photolithography or printing. In addition, Au (gold), Ag (silver), Cr (chromium), Cu (copper), Ni (nickel), Pt (platinum), or a combination thereof may be used as necessary for the electrodes. Can be used.

Furthermore, a dielectric layer 13 is printed on the inner surface of the glass substrate 11 of the back plate 3 so as to cover the data electrodes 12, and a partition wall 14 having a substantially constant height is formed and arranged. The discharge cells are formed in a rib shape by a sandblast method, a photolithography method, or the like in a predetermined pattern that partitions a plurality of arrays of discharge cells into a stripe shape or a cross pattern shape (not shown) in the column direction. As the phosphor layers 15 for emitting red, green, and blue light, phosphors such as (Y, Gd) BO ₃ : Eu, Zn ₂ SiO ₄ : Mn, and BaMg ₂ Al ₁₄ O ₂₄ : Eu are used. The phosphor layer 15 is formed on the side surface of the partition wall 14 and the surface of the dielectric layer 13 through the printing application and firing process for each phosphor color on the back plate 3 in which the partition wall 14 is formed in a pattern. .

  Although not described in detail, the front plate 2 provided with the above-described various electrodes and the back plate 3 provided with the partition walls 14 and the phosphor layer 15 are made to face each other, and the periphery is sealed and bonded together. After being attached and evacuated to high vacuum, a mixed gas containing rare gas xenon and neon is sealed as a discharge gas inside the light emitting plate envelope (not shown) at a pressure of about 60 kPa. The phosphor material, gas, and pressure thereof are not specified above, and materials and conditions that can be normally used in the AC type PDP can be applied.

  In the AC type PDP of Embodiment 1 of FIG. 1, a plurality of discharge cells 1 are formed and arranged, although not shown, a drive circuit that drives in a matrix and a control circuit that controls these are provided. The PDP has three operation periods (not shown), that is, (1) an initialization period in which all display cells are initialized, and (2) each discharge cell 1 is addressed and a display corresponding to input data is given to each cell. Drive light emission display is performed by an address / display separation drive system constituted by a data writing period for selecting and inputting a state, and (3) a sustain discharge period for causing the discharge cells 1 in the display state to display light. In the sustain discharge period of the above item (3), rectangular wave voltages of electrode voltage pulses are applied to the pair of scan electrodes 5 and sustain electrodes 6 so as to have different phases. That is, an alternating voltage is applied between the electrode pairs, and a pulse discharge is generated every time the voltage polarity changes in the discharge cell 1 in which the display state data is written. Due to this sustain discharge, the display emission is such that a vacuum ultraviolet emission spectrum of 147 nm is emitted from the excited xenon atoms in the discharge space, and vacuum ultraviolet rays mainly composed of 173 nm are emitted from the excited xenon molecules, and then the ultraviolet radiation is provided on the back plate 3. A PDP display can be obtained by converting the phosphor layer 15 into visible radiation.

  Specific examples of the present invention will be described below.

As an experiment, a PDP using the discharge cell of the first embodiment was created using the above-described PDP creation technique. As a front plate of the discharge cell 1, a dielectric layer 18 having a low relative dielectric constant containing at least a [B ₂ O ₃ —ZnO—SiO ₂ ] material is applied on a glass substrate at a thickness of about 10 μm by a screen printing method. A bus electrode material made of Ag and formed into a paste is formed at a predetermined location on the dielectric layer 18 by a screen printing method, and fired at a predetermined temperature, whereby the bus electrode 19 is formed into a dielectric layer. The transparent electrodes 151 and 161 made of ITO and having a thickness of about 1000 mm were formed so as to cover at least a part of the surface of the bus electrode 19 embedded in the semiconductor substrate 18 and at least a part of the surface of the dielectric layer 18. Next, a dielectric layer 17 having a film thickness of about 30 μm containing a [SiO ₂ —Bi ₂ O ₃ —B ₂ O ₃ ] material is applied and baked thereon, and then a protective layer containing MgO as a metal oxide film is formed. The film 8 was formed with a film thickness of about 6000 mm.

  As a result, in the PDP according to the present invention, the reactive power that does not directly contribute to the discharge can be reduced, and the difference in the thickness of the dielectric layer 17 on the discharge space side is reduced. Even when the dielectric layer is formed, the problem of dielectric breakdown is reduced when the PDP is driven, and the withstand voltage is improved.

  FIG. 2 is a conceptual cross-sectional view showing another configuration of the front plate of the discharge cell according to Embodiment 1 of the present invention. The cross-sectional configuration diagram of the front plate 2 in FIG. 2A is shown upside down with respect to the front plate in FIG. The same reference numerals are given to the same components as those in FIG. 1B, and some of them are omitted for the sake of brevity. FIG. 2A differs from FIG. 1 in that the transparent electrode covers the bus electrode and is embedded in a dielectric layer covering the surface of the glass substrate together with the bus electrode. The surface of the layer 182 is flat. In FIG. 2A, the transparent electrodes 152 and 162 that are the pair of display electrodes 4 cover the bus electrode 192 and are embedded in the dielectric layer 182 together with the bus electrode. It arrange | positions so that the surface of the body layer 182 may become flat. Then, the dielectric layer 17 and the protective film 8 are sequentially formed on the surfaces of the transparent electrodes 152 and 162 and the dielectric layer 182 formed to be flat. The film thickness distribution of the dielectric layer 17 formed here is substantially uniform. 2B is different from FIG. 2A in that the transparent electrode is embedded in the groove together with the bus electrode, the surface of the transparent electrode on the discharge space side, the surface of the bus electrode, and the surface of the dielectric layer 182. Is flat. In FIG. 2B, the transparent electrodes 152 and 162 which are the pair of display electrodes 4 are embedded in the dielectric layer 182 together with the bus electrode 192, and the discharge space side surface of the transparent electrodes 152 and 162, and the bus electrode. The surface of 192 and the surface of the dielectric layer 182 are disposed so as to be flat. Then, the dielectric layer 17 and the protective film 8 are sequentially formed on the surface where the transparent electrodes 152 and 162, the bus electrode 192, and the dielectric layer 182 are formed so as to be flat. Thereby, the film thickness distribution of the formed dielectric layer is almost eliminated, and the film thickness of the dielectric layer becomes substantially uniform.

  In this way, the transparent electrode is embedded in the groove together with the thick bus electrode, and the surface of the transparent electrode on the discharge space side and the surface of the dielectric layer 182 are disposed so as to be substantially flat. Since the distribution is eliminated, the dielectric layer having a small thickness can be made almost flat to improve the withstand voltage and prevent dielectric breakdown.

  FIG. 3 is a conceptual cross-sectional view showing a configuration of still another example of the front plate of the discharge cell according to Embodiment 1 of the present invention. The cross-sectional configuration diagram of the front plate 2 in FIG. 3 is shown upside down with respect to the front plate of FIG. The same reference numerals are given to the same components as those in FIG. 1B, and some of them are omitted for the sake of brevity. FIG. 3 is different from FIGS. 1 and 2 in that the transparent electrodes are arranged side by side with the bus electrodes, and the discharge space side surface of the transparent electrodes and the surface of the bus electrodes cover the surface of the glass substrate. It is arrange | positioned so that it may become substantially flat with at least one part of the surface of a layer. In FIG. 3, the transparent electrodes 153 and 163 of the pair of display electrodes 4 are arrayed beside the electrode portion where the bus electrode 193 partially embedded in the dielectric layer 183 is not embedded, and the transparent electrodes 153 and 163 are formed. The surface of the discharge space and the surface of the bus electrode 193 are disposed so as to be substantially flat with the surface of the glass substrate 10. Then, the dielectric layer 17 and the protective film 8 are sequentially formed on the surfaces of the transparent electrodes 153 and 163, the bus electrode 193, and the dielectric layer 183 that are formed substantially flat. The difference in the thickness of the dielectric layer formed here is as small as the difference in the thickness of the transparent electrode.

  In this way, the transparent electrodes are arranged side by side with the thick bus electrodes partially embedded in the dielectric layer covering the surface of the glass substrate. Since the film thickness distribution is almost eliminated by arranging the surface so as to be substantially flat with the surface of the dielectric layer covering the surface of the glass substrate, the thin dielectric layer is almost flat. Thus, withstand voltage can be improved and dielectric breakdown can be prevented.

  FIG. 4 is a conceptual cross-sectional view showing still another configuration of the front plate of the discharge cell according to Embodiment 1 of the present invention. The cross-sectional configuration diagram of the front plate 2 in FIG. 4 is shown upside down with respect to the front plate of FIG. The same reference numerals are given to the same components as those in FIG. 1B, and some of them are omitted for the sake of brevity. 4 differs from FIGS. 1 to 3 in that a part of the transparent electrode is provided on the side wall and the bottom of both sides of the groove, and at least a part of the bus electrode is disposed on the transparent electrode groove. The bus electrode has a structure separated from the dielectric layer covering the surface of the glass substrate by the transparent electrode. In FIG. 4, a part of the transparent electrodes 154 and 164 that are the pair of display electrodes 4 are provided on the side walls and the bottom side on both sides of the dielectric layer 184 so that the bus electrode 194 is stacked in the transparent electrode grooves 254 and 264. The bus electrode 194 is isolated from the dielectric layer 184 by the transparent electrodes 154 and 164. Then, the dielectric layer 17 and the protective film 8 are sequentially formed on the surfaces of the transparent electrodes 154 and 164, the bus electrode 194, and the dielectric layer 184.

  1 to 4, at least the bus electrode is embedded in the dielectric layer covering the surface of the glass substrate, so that reactive power can be reduced. The bus electrode and the transparent electrode can be reduced. Since the transparent electrode is disposed so that the surface on the discharge space side of the transparent electrode and the dielectric layer covering the surface of the glass substrate are flat or substantially flat, the film thickness distribution of the dielectric layer can be reduced. As a dielectric layer, the withstand voltage can be improved and dielectric breakdown can be prevented.

  As described above, with the configuration of the first embodiment, that is, as the front plate, by embedding at least the bus electrode in the dielectric layer covering the surface of the glass substrate, reactive power that does not directly contribute to discharge can be reduced. In addition, since at least a part of the bus electrode having a large film thickness is embedded in the dielectric layer covering the surface of the glass substrate, the film thickness distribution of the dielectric layer is reduced, so that the withstand voltage is improved. A plasma display panel having an effect of preventing dielectric breakdown can be obtained.

  In the above embodiment, the film thickness of the dielectric layer covering the surface glass substrate has been described as about 10 μm, but at least a part of the bus electrode can be embedded and the film is smaller than the film pressure on the discharge space side. The thickness of the dielectric layer is small as long as the thickness is smaller than 1 μm, and the effect of reducing reactive power is small. When the thickness is larger than 15 μm, the thickness of the dielectric layer on the discharge space side is too large. Problems such as cracks and swells occur. Desirably, the range of 3 to 12 μm is preferable, and in this range, the reactive power, the withstand voltage, the wall charge amount, and the applied voltage can be further set as appropriate ranges.

In the above embodiment, it the dielectric layer 18 from lead-free low-melting glass containing _{[B 2 O 3 -ZnO-SiO} 2] material, the dielectric layer _{17 [SiO 2 -Bi 2 O 3} - Although it has been described that it is made of a lead-free low-melting glass made of a B ₂ O ₃ ] material, it can be similarly implemented using soda lime glass generally used for PDP. However, it is preferable to form the lead-free glass material containing at least one of B ₂ O ₃ , ZnO and Bi ₂ O ₃ from the viewpoint of reducing environmental pollution. In the structure shown in FIG. 1, the bus electrode 19 is isolated from the dielectric layer 17 and the transparent electrode, and therefore may be formed from an alkali-containing lead-free glass material. Similarly, in the structure shown in FIG. 4, the bus electrode 194 is isolated from the dielectric layer 184 and the transparent electrode, and therefore may be formed from an alkali-containing lead-free glass material.

(Embodiment 2)
In the second embodiment, various manufacturing methods for forming the front plate of FIGS. 1 to 4 of the first embodiment will be described.

  FIG. 5 is a conceptual cross-sectional view showing a process of forming the front plate of the discharge cell related to the PDP according to the second embodiment of the present invention. The cross-sectional conceptual diagram showing the process of creating the front plate 2 shown in FIG. 5 is shown upside down from the front plate of FIG. The same reference numerals are given to the same components as those in FIG. 1B, and some of them are omitted for the sake of brevity.

FIG. 5A shows the surface of the glass substrate of the front plate. As shown in FIG. 5B, on the surface without the glass substrate, the relative permittivity is smaller than that of the glass substrate 10, for example, [B ₂ O _A dielectric layer is formed by forming a transparent glass material containing a material such as _3- ZnO-SiO ₂ ] in a paste at a predetermined location on the glass substrate 10 by screen printing and firing it at a predetermined temperature. 18 is formed.

  In FIG.5 (c), what paste-formed bus electrode material is formed in the predetermined place on the dielectric material layer 18 with the screen printing method on the surface of the dielectric material layer which has covered the surface of the glass substrate. Then, in order to skip the organic solvent contained in the paste of the bus electrode material, baking is performed at a predetermined temperature.

  FIG. 5D shows the front plate after firing, and the bus electrode material is embedded in the dielectric layer covering the surface of the glass substrate without forming a groove or the like.

Next, in FIG. 5E, transparent electrodes 151 and 161 made of ITO or the like are formed on at least a part of the surface of the bus electrode 19 embedded in the dielectric layer 18 and at least a part of the surface of the dielectric layer 18. A film having a thickness of about 1000 mm is formed as a pair of display electrodes 4 having a discharge gap by photolithography. Then, a lead-free glass powder containing a material such as [SiO ₂ —Bi ₂ O ₃ —B ₂ O ₃ ] is dispersed and kneaded together with ethyl cellulose, a binder, etc. to make a glass paste. The formed glass paste is formed by applying a certain thickness so as to cover the display electrode 4 and baking by a die coating method, a coater printing method, or a screen printing method. Next, a protective film 8 containing MgO which is a metal oxide film is formed on the dielectric layer 17 by an electron beam evaporation method or a sputtering method.

  In FIG. 5, the method of embedding the bus electrode in the dielectric layer covering the surface of the glass substrate has been described by only screen printing and firing. Another method will be described with reference to FIG.

  In FIG. 6A, after the dielectric layer 18 is formed by coating and firing, a resist pattern 50 having a stripe hole 51 having a predetermined width is formed on the surface of the dielectric layer 18 by photolithography. 6B, the surface of the glass substrate is etched with a mixed etching solution (not shown) containing hydrofluoric acid to form a groove in the stripe hole 51 portion. A predetermined groove depth can be obtained by adjusting the etching time and the etching solution concentration.

  Next, a bus electrode material paste is printed in the groove formed in FIG. 6C, and in FIG. 6D, the resist pattern is peeled off by the wrist-off method, whereby the bus electrode is formed in the groove of the dielectric layer 18. Only 19 remains.

  In FIG. 6, although the etching method is used as the step of forming the groove on the inner surface of the dielectric layer covering the surface of the glass substrate, the sand blasting method, the etching method, and the laser beam processing method in the first embodiment are used. It is also possible to form a deformed groove shape or the like by a method such as these or a combination of these methods.

  Further, in the above, the step of forming the transparent electrode is a step including a step of covering the bus electrode embedded in the groove and at least a part of the dielectric layer covering the surface of the glass substrate. As described above, in the process of forming the transparent electrode, the bus electrode 192 is embedded in the dielectric layer 182 deformed together with the transparent electrodes 152 and 162 as shown in FIG. And a step of forming the dielectric layer 10 so that the surface of the dielectric layer 10 becomes flat. Further, as shown in FIG. 3, a part of the bus electrode 193 is embedded in the dielectric layer 183, and transparent electrodes 153 and 163 are arranged and formed on the side of the electrode part where the bus electrode 193 is not embedded. The present invention can also be implemented in a similar manner by including a step of forming the surfaces of the electrodes 153 and 163 on the discharge space side and the surface of the bus electrode 193 so as to be substantially flat with the surface of the dielectric layer 183. Further, as shown in FIG. 4, a part of the transparent electrodes 154 and 164 that are the pair of display electrodes 4 is provided on both side walls and the bottom side of the dielectric layer 184, and the bus electrode 194 is mounted on the transparent electrode. The bus electrode 194 is isolated from the dielectric layer 184 by the transparent electrodes 154 and 164. In addition, the present invention can be implemented in the same manner even if the dielectric layer 17 and the protective film 8 are sequentially formed on the surfaces of the transparent electrodes 154 and 164, the bus electrode 194, and the dielectric layer 184.

  By the above, since at least the bus electrode can be embedded in the dielectric layer covering the surface of the glass substrate, it is effective in reducing reactive power that does not contribute to the discharge, and the bus electrode and the transparent electrode are discharged to the transparent electrode. Since the surface on the space side and the surface of the glass substrate are formed to be substantially flat, the film thickness distribution of the dielectric layer can be reduced, and the dielectric layer that improves the withstand voltage and prevents dielectric breakdown is formed. be able to.

  In the above description, the film thickness of the transparent electrode has been described as about 1000 mm. However, the resistance value varies depending on the type of the transparent electrode material, and may be used as a display electrode of the PDP, and similarly in the range of 100 mm to 0.5 μm. It can be implemented.

  In the above description, the MgO film is used as the protective film. However, metal oxides such as BaO, CaO, SrO, MgNO, and ZnO may be used.

  The plasma display panel according to the present invention has at least two dielectric layers as a front plate, and the dielectric constant of the dielectric layer covering the inner surface of the glass substrate is smaller than the dielectric constant of the glass substrate. By embedding the bus electrode in the dielectric layer covering the surface of the glass substrate, it has the effect of reducing reactive power that does not directly contribute to the discharge, and there is a difference in the thickness of the dielectric layer on the discharge space side. Reduced plasma display panels with improved withstand voltage and improved display quality and reliability, such as large televisions, high-definition televisions or large display devices, such as video equipment industry, advertising equipment industry, industrial equipment And other industrial fields, and its industrial applicability is very wide and large.

Sectional conceptual diagram which shows the structure of the discharge cell of PDP in Embodiment 1 of this invention Sectional conceptual diagram which shows another structure in the front plate of the discharge cell in Embodiment 1 of this invention. Sectional conceptual diagram which shows another structure in the front plate of the discharge cell in Embodiment 1 of this invention. Sectional conceptual diagram which shows another structure in the front plate of the discharge cell in Embodiment 1 of this invention. Sectional conceptual diagram which shows the process of forming the front plate of the discharge cell concerning PDP of Embodiment 2 of this invention. Sectional conceptual diagram which shows another process of forming the front plate of the discharge cell concerning PDP of Embodiment 2 of this invention. Schematic sectional view showing a discharge cell structure as a discharge unit of a conventional surface discharge AC type PDP

Explanation of symbols

DESCRIPTION OF SYMBOLS 1,71 Discharge cell 2 Front plate 3 Back plate 4 Display electrode 5 Scan electrode 6 Sustain electrode 7, 13, 17, 18, 182, 183, 184 Dielectric layer 8 Protective film 10, 11 Glass substrate 12 Data electrode 14 Partition 15 Phosphor layer 18, 83, 182, 183, 184 Groove 9, 19, 192, 193, 194 Bus electrode 50, 61 Resist pattern 51 Striped hole 75, 76, 151, 152, 153, 161, 162, 163 164 Transparent electrode 89 Ag electrode

Claims (17)

A plasma display panel in which a front plate and a back plate are arranged to face each other with a discharge space interposed therebetween,
The front plate has at least two dielectric layers,
The dielectric constant of the dielectric layer covering the surface of the glass substrate is smaller than the dielectric constant of the glass substrate,
A plurality of display electrode pairs are disposed in a state where at least a part thereof is embedded in a dielectric layer covering the surface of the glass substrate,
The plasma display panel is configured such that the display electrode is isolated from the glass substrate by a dielectric layer covering the surface of the glass substrate. 2. The dielectric layer according to claim 1, wherein the dielectric layer covering the surface of the glass substrate has a relative dielectric constant smaller than that of the dielectric layer facing the discharge space. The plasma display panel as described. The display electrode pair is composed of a transparent electrode and a narrower bus electrode,
The bus electrode is embedded in the dielectric layer covering the surface of the glass substrate;
2. The plasma display panel according to claim 1, wherein the transparent electrode is disposed so as to cover at least a part of the surface of the dielectric layer covering the surface of the bus electrode and the glass substrate. . 2. The plasma display panel according to claim 1, wherein both the transparent electrode and the bus electrode are formed so as to be at least partially embedded in the dielectric layer covering a surface of the glass substrate. 2. The plasma display panel according to claim 1, wherein the bus electrode is partially embedded in the dielectric layer covering a surface of the glass substrate, and the transparent electrode is formed and arranged beside the bus electrode. The transparent electrode is at least partially embedded in the dielectric layer covering the surface of the glass substrate, the bus electrode is formed on the transparent electrode, the bus electrode is formed by the transparent electrode, and the glass substrate The plasma display panel according to claim 1, wherein the plasma display panel has a structure isolated from the dielectric layer covering the surface of the plasma display panel. The plasma display panel according to claim 1, wherein the thickness of the dielectric layer covering the surface of the glass substrate is smaller than the thickness of the dielectric layer facing the discharge space. The thickness of the dielectric layer covering the surface of the glass substrate is 1 to 15 μm, and the thickness of the dielectric layer facing the discharge space is 10 to 50 μm. The plasma display panel as described. The dielectric layer covering the surface of the glass substrate has a relative dielectric constant of 1 to 5, and the dielectric layer facing the discharge space has a relative dielectric constant of 5 to 15. The plasma display panel according to claim 1. A method of manufacturing a plasma display panel in which a front plate and a back plate are arranged to face each other with a discharge space interposed therebetween,
Forming the front plate comprises forming at least two dielectric layers on the front plate;
And a step of forming at least a part of a plurality of display electrodes in the dielectric layer covering the glass substrate. Forming the display electrode includes embedding at least part of a dielectric layer covering a surface of the glass substrate;
The plasma display according to claim 10, wherein the step of forming the transparent electrode includes a step of forming the transparent electrode so as to cover at least a part of the dielectric layer covering a surface of the bus electrode and the glass substrate. Panel manufacturing method. In the step of forming the display electrode and the transparent electrode, both the bus electrode and the transparent electrode having a narrower width than the bus electrode are formed so as to be embedded at least partially in the dielectric layer covering the surface of the glass substrate. The manufacturing method of the plasma display panel of Claim 10 including a process. The step of forming the bus electrode includes a step of forming at least a part of the dielectric layer covering the surface of the glass substrate;
The method of manufacturing a plasma display panel according to claim 10, wherein the step of forming the transparent electrode includes a step of forming the transparent electrode next to the bus electrode. Forming the transparent electrode includes forming the transparent electrode so as to be embedded in the dielectric layer covering a surface of the glass substrate;
The step of forming the bus electrode includes the step of forming the bus electrode on the transparent electrode so that the bus electrode has a structure isolated from the dielectric layer covering the surface of the glass substrate. The manufacturing method of the plasma display panel of Claim 10 containing. The step of forming the dielectric layer covering the surface of the glass substrate so as to embed at least part of the display electrode pair is performed by at least one of a sandblasting method, an etching method, and a laser processing method. The manufacturing method of the plasma display panel of Claim 10 including the process of forming a groove | channel in the said dielectric material layer which has covered the surface of the glass substrate. The step of forming the display electrode pair so as to be embedded in the groove portion of the dielectric layer covering the surface of the glass substrate is at least one of a screen printing method, a vacuum deposition method, a sputtering method, a plating method, and a CVD method. The method of manufacturing a plasma display panel according to claim 10, wherein the method includes a seed method. The step of embedding at least the bus electrode in the dielectric layer covering the surface of the glass substrate forms the dielectric layer so as to cover the surface of the glass substrate, and the surface of the glass substrate is A step of forming the bus electrode so as to be embedded in the dielectric layer covering the surface of the glass substrate by applying a paste on the dielectric layer covering the paste by a screen printing method and firing the paste. The manufacturing method of the plasma display panel of Claim 10 which has these.

Images