JP2006319266A - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
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- JP2006319266A JP2006319266A JP2005142886A JP2005142886A JP2006319266A JP 2006319266 A JP2006319266 A JP 2006319266A JP 2005142886 A JP2005142886 A JP 2005142886A JP 2005142886 A JP2005142886 A JP 2005142886A JP 2006319266 A JP2006319266 A JP 2006319266A
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 154
- 239000000758 substrate Substances 0.000 claims abstract description 170
- 229920005989 resin Polymers 0.000 claims abstract description 86
- 239000011347 resin Substances 0.000 claims abstract description 86
- 239000011368 organic material Substances 0.000 claims abstract description 72
- 230000002093 peripheral effect Effects 0.000 claims description 10
- 230000002708 enhancing effect Effects 0.000 abstract 1
- 229910000679 solder Inorganic materials 0.000 description 23
- 239000003990 capacitor Substances 0.000 description 16
- 239000003351 stiffener Substances 0.000 description 8
- 230000006872 improvement Effects 0.000 description 7
- 239000000463 material Substances 0.000 description 6
- 230000000694 effects Effects 0.000 description 5
- 239000010410 layer Substances 0.000 description 5
- 229920001187 thermosetting polymer Polymers 0.000 description 4
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 3
- 229910052782 aluminium Inorganic materials 0.000 description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 3
- 230000008901 benefit Effects 0.000 description 3
- 229910052802 copper Inorganic materials 0.000 description 3
- 239000010949 copper Substances 0.000 description 3
- 239000000919 ceramic Substances 0.000 description 2
- 230000009466 transformation Effects 0.000 description 2
- 230000009471 action Effects 0.000 description 1
- -1 aluminum and copper Chemical class 0.000 description 1
- 230000033228 biological regulation Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000002542 deteriorative effect Effects 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 230000017525 heat dissipation Effects 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 230000001105 regulatory effect Effects 0.000 description 1
- 230000002787 reinforcement Effects 0.000 description 1
- 238000010008 shearing Methods 0.000 description 1
- 238000004088 simulation Methods 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L25/0657—Stacked arrangements of devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73253—Bump and layer connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1532—Connection portion the connection portion being formed on the die mounting surface of the substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16195—Flat cap [not enclosing an internal cavity]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19106—Disposition of discrete passive components in a mirrored arrangement on two different side of a common die mounting substrate
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Wire Bonding (AREA)
Abstract
【解決手段】有機材料系基板11と、この一方の面のほぼ中央にフリップチップ接続された半導体チップ12と、半導体チップ12と有機材料系基板との隙間を充填して設けられた樹脂15と、有機材料系基板11を挟んで半導体チップ12に対向する有機材料系基板11の他方の面に設けられ、半導体チップ12とほぼ同じ主面面積を有するチップ部材20とを具備する。または、半導体チップ12のフリップチップ接続の面とは反対側の面に固定されたリッド部材と、リッド部材の有機材料系基板11に固定される部位の付近から延設され、有機材料系基板11の厚み方向にその厚みを超えるように突起して設けられた基板支持部材11dとを具備する。基板支持部材11dは、有機材料系基板に直接設けられてもよい。
【選択図】図1
Description
Claims (5)
- 有機材料系基板と、
前記有機材料系基板の一方の面のほぼ中央にフリップチップ接続された半導体チップと、
前記フリップチップ接続された半導体チップと前記有機材料系基板との隙間を充填して設けられた樹脂と、
前記有機材料系基板を挟んで前記フリップチップされた半導体チップに対向する前記有機材料系基板の他方の面に設けられ、該半導体チップとほぼ同じ主面面積を有するチップ部材と
を具備することを特徴とする半導体装置。 - 有機材料系基板と、
前記有機材料系基板の一方の面のほぼ中央にフリップチップ接続された半導体チップと、
前記フリップチップ接続された半導体チップと前記有機材料系基板との隙間を充填して設けられた樹脂と、
前記有機材料系基板の前記半導体チップがフリップチップ接続された面の、該半導体チップが位置する領域の外側周縁領域に固定され、かつ、前記フリップチップ接続された半導体チップの該フリップチップ接続の面とは反対側の面にも固定されたリッド部材と、
前記リッド部材の前記有機材料系基板に固定される部位の付近から延設され、前記有機材料系基板の厚み方向にその厚みを超えるように突起して設けられた基板支持部材と
を具備することを特徴とする半導体装置。 - 有機材料系基板と、
前記有機材料系基板の一方の面のほぼ中央にフリップチップ接続された半導体チップと、
前記フリップチップ接続された半導体チップと前記有機材料系基板との隙間を充填して設けられた樹脂と、
前記有機材料系基板の前記半導体チップがフリップチップ接続された面の、該半導体チップが位置する領域の外側周縁領域に固定され、かつ、前記フリップチップ接続された半導体チップの該フリップチップ接続の面とは反対側の面にも固定されたリッド部材と、
前記有機材料系基板の前記半導体チップがフリップチップ接続された面とは反対の側の面に突起して設けられた基板支持部材と
を具備することを特徴とする半導体装置。 - 前記有機材料系基板を挟んで前記フリップチップされた半導体チップに対向する前記有機材料系基板の他方の面に設けられ、該半導体チップとほぼ同じ主面面積を有するチップ部材さらに具備することを特徴とする請求項2または3記載の半導体装置
- 前記チップ部材と前記有機材料系基板との隙間を充填して設けられた第2の樹脂をさらに具備することを特徴とする請求項1または4記載の半導体装置。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005142886A JP4768314B2 (ja) | 2005-05-16 | 2005-05-16 | 半導体装置 |
US11/433,424 US7521787B2 (en) | 2005-05-16 | 2006-05-15 | Semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005142886A JP4768314B2 (ja) | 2005-05-16 | 2005-05-16 | 半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2006319266A true JP2006319266A (ja) | 2006-11-24 |
JP4768314B2 JP4768314B2 (ja) | 2011-09-07 |
Family
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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JP2005142886A Expired - Fee Related JP4768314B2 (ja) | 2005-05-16 | 2005-05-16 | 半導体装置 |
Country Status (2)
Country | Link |
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US (1) | US7521787B2 (ja) |
JP (1) | JP4768314B2 (ja) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7696006B1 (en) | 2006-08-29 | 2010-04-13 | Xilinx, Inc. | Composite flip-chip package with encased components and method of fabricating same |
WO2011121779A1 (ja) * | 2010-03-31 | 2011-10-06 | 富士通株式会社 | マルチチップモジュール、プリント配線基板ユニット、マルチチップモジュールの製造方法およびプリント配線基板ユニットの製造方法 |
JP2014220278A (ja) * | 2013-05-01 | 2014-11-20 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
JP2015050384A (ja) * | 2013-09-03 | 2015-03-16 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20090056044A (ko) * | 2007-11-29 | 2009-06-03 | 삼성전자주식회사 | 반도체 소자 패키지 및 이를 제조하는 방법 |
US7473618B1 (en) * | 2008-04-22 | 2009-01-06 | International Business Machines Corporation | Temporary structure to reduce stress and warpage in a flip chip organic package |
US7731079B2 (en) * | 2008-06-20 | 2010-06-08 | International Business Machines Corporation | Cooling apparatus and method of fabrication thereof with a cold plate formed in situ on a surface to be cooled |
JP6356450B2 (ja) * | 2014-03-20 | 2018-07-11 | 株式会社東芝 | 半導体装置および電子回路装置 |
JP1579162S (ja) * | 2016-08-05 | 2020-06-15 | ||
US11569156B2 (en) | 2019-10-27 | 2023-01-31 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor device, electronic device including the same, and manufacturing method thereof |
DE102020108575B4 (de) | 2019-10-27 | 2023-07-06 | Taiwan Semiconductor Manufacturing Co., Ltd. | Halbleiter-bauelement, elektronische vorrichtung mit diesem und verfahren zu deren herstellung |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
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JP2001110926A (ja) * | 1999-10-13 | 2001-04-20 | Nec Corp | フリップチップパッケージ |
JP2001210674A (ja) * | 2000-01-28 | 2001-08-03 | Hitachi Ltd | ベアチップicの実装方法 |
JP2001326322A (ja) * | 2000-05-17 | 2001-11-22 | Matsushita Electric Ind Co Ltd | 半導体実装対象中間構造体及び半導体装置の製造方法 |
JP2001339037A (ja) * | 2000-05-26 | 2001-12-07 | Matsushita Electric Ind Co Ltd | 半導体素子の実装構造体 |
JP2004063532A (ja) * | 2002-07-25 | 2004-02-26 | Kyocera Corp | 半導体素子収納用パッケージおよび半導体装置 |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
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JP2001035960A (ja) | 1999-07-21 | 2001-02-09 | Mitsubishi Electric Corp | 半導体装置および製造方法 |
JP3414342B2 (ja) * | 1999-11-25 | 2003-06-09 | 日本電気株式会社 | 集積回路チップの実装構造および実装方法 |
US7323767B2 (en) * | 2002-04-25 | 2008-01-29 | Micron Technology, Inc. | Standoffs for centralizing internals in packaging process |
US20050077080A1 (en) * | 2003-10-14 | 2005-04-14 | Adesoji Dairo | Ball grid array (BGA) package having corner or edge tab supports |
-
2005
- 2005-05-16 JP JP2005142886A patent/JP4768314B2/ja not_active Expired - Fee Related
-
2006
- 2006-05-15 US US11/433,424 patent/US7521787B2/en active Active
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2001110926A (ja) * | 1999-10-13 | 2001-04-20 | Nec Corp | フリップチップパッケージ |
JP2001210674A (ja) * | 2000-01-28 | 2001-08-03 | Hitachi Ltd | ベアチップicの実装方法 |
JP2001326322A (ja) * | 2000-05-17 | 2001-11-22 | Matsushita Electric Ind Co Ltd | 半導体実装対象中間構造体及び半導体装置の製造方法 |
JP2001339037A (ja) * | 2000-05-26 | 2001-12-07 | Matsushita Electric Ind Co Ltd | 半導体素子の実装構造体 |
JP2004063532A (ja) * | 2002-07-25 | 2004-02-26 | Kyocera Corp | 半導体素子収納用パッケージおよび半導体装置 |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7696006B1 (en) | 2006-08-29 | 2010-04-13 | Xilinx, Inc. | Composite flip-chip package with encased components and method of fabricating same |
WO2011121779A1 (ja) * | 2010-03-31 | 2011-10-06 | 富士通株式会社 | マルチチップモジュール、プリント配線基板ユニット、マルチチップモジュールの製造方法およびプリント配線基板ユニットの製造方法 |
JPWO2011121779A1 (ja) * | 2010-03-31 | 2013-07-04 | 富士通株式会社 | マルチチップモジュール、プリント配線基板ユニット、マルチチップモジュールの製造方法およびプリント配線基板ユニットの製造方法 |
JP2014220278A (ja) * | 2013-05-01 | 2014-11-20 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
JP2015050384A (ja) * | 2013-09-03 | 2015-03-16 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
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Publication number | Publication date |
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US7521787B2 (en) | 2009-04-21 |
US20060255472A1 (en) | 2006-11-16 |
JP4768314B2 (ja) | 2011-09-07 |
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