JP2006303419A - セラミック基板 - Google Patents

セラミック基板 Download PDF

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Publication number
JP2006303419A
JP2006303419A JP2005343890A JP2005343890A JP2006303419A JP 2006303419 A JP2006303419 A JP 2006303419A JP 2005343890 A JP2005343890 A JP 2005343890A JP 2005343890 A JP2005343890 A JP 2005343890A JP 2006303419 A JP2006303419 A JP 2006303419A
Authority
JP
Japan
Prior art keywords
layer
silver
nickel
metal
plating layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2005343890A
Other languages
English (en)
Japanese (ja)
Other versions
JP2006303419A5 (enExample
Inventor
Hisashi Wakako
久 若子
Makoto Nagai
誠 永井
Atsushi Uchida
敦士 内田
Masahito Morita
雅仁 森田
Kazuo Kimura
賀津雄 木村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Niterra Co Ltd
Original Assignee
NGK Spark Plug Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NGK Spark Plug Co Ltd filed Critical NGK Spark Plug Co Ltd
Priority to JP2005343890A priority Critical patent/JP2006303419A/ja
Publication of JP2006303419A publication Critical patent/JP2006303419A/ja
Publication of JP2006303419A5 publication Critical patent/JP2006303419A5/ja
Pending legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1301—Thyristor

Landscapes

  • Led Device Packages (AREA)
JP2005343890A 2004-12-03 2005-11-29 セラミック基板 Pending JP2006303419A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2005343890A JP2006303419A (ja) 2004-12-03 2005-11-29 セラミック基板

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2004350927 2004-12-03
JP2005084449 2005-03-23
JP2005343890A JP2006303419A (ja) 2004-12-03 2005-11-29 セラミック基板

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2009252854A Division JP5133963B2 (ja) 2004-12-03 2009-11-04 セラミック基板

Publications (2)

Publication Number Publication Date
JP2006303419A true JP2006303419A (ja) 2006-11-02
JP2006303419A5 JP2006303419A5 (enExample) 2009-02-19

Family

ID=37471303

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2005343890A Pending JP2006303419A (ja) 2004-12-03 2005-11-29 セラミック基板

Country Status (1)

Country Link
JP (1) JP2006303419A (enExample)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014120778A (ja) * 2012-12-14 2014-06-30 Lg Innotek Co Ltd 発光素子パッケージ
US9461224B2 (en) 2008-06-24 2016-10-04 Sharp Kabushiki Kaisha Light-emitting apparatus
JP2016187051A (ja) * 2008-06-24 2016-10-27 シャープ株式会社 発光装置
CN108610083A (zh) * 2018-05-28 2018-10-02 潮州三环（集团）股份有限公司 一种陶瓷封装体
CN113972310A (zh) * 2020-07-22 2022-01-25 斯坦雷电气株式会社 半导体发光装置
CN115295504A (zh) * 2022-07-25 2022-11-04 德阳三环科技有限公司 一种陶瓷封装基座

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9461224B2 (en) 2008-06-24 2016-10-04 Sharp Kabushiki Kaisha Light-emitting apparatus
JP2016187051A (ja) * 2008-06-24 2016-10-27 シャープ株式会社 発光装置
US9960332B2 (en) 2008-06-24 2018-05-01 Sharp Kabushiki Kaisha Light-emitting apparatus
JP2014120778A (ja) * 2012-12-14 2014-06-30 Lg Innotek Co Ltd 発光素子パッケージ
CN108610083A (zh) * 2018-05-28 2018-10-02 潮州三环（集团）股份有限公司 一种陶瓷封装体
CN113972310A (zh) * 2020-07-22 2022-01-25 斯坦雷电气株式会社 半导体发光装置
CN113972310B (zh) * 2020-07-22 2025-08-26 斯坦雷电气株式会社 半导体发光装置
CN115295504A (zh) * 2022-07-25 2022-11-04 德阳三环科技有限公司 一种陶瓷封装基座

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