JP2006278808A - Multiple unit wiring board - Google Patents

Multiple unit wiring board Download PDF

Info

Publication number
JP2006278808A
JP2006278808A JP2005096832A JP2005096832A JP2006278808A JP 2006278808 A JP2006278808 A JP 2006278808A JP 2005096832 A JP2005096832 A JP 2005096832A JP 2005096832 A JP2005096832 A JP 2005096832A JP 2006278808 A JP2006278808 A JP 2006278808A
Authority
JP
Japan
Prior art keywords
frame
wiring board
region
metallized layer
wiring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2005096832A
Other languages
Japanese (ja)
Other versions
JP4566046B2 (en
Inventor
Genta Taniguchi
源太 谷口
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP2005096832A priority Critical patent/JP4566046B2/en
Publication of JP2006278808A publication Critical patent/JP2006278808A/en
Application granted granted Critical
Publication of JP4566046B2 publication Critical patent/JP4566046B2/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Landscapes

  • Structure Of Printed Boards (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a highly electrically reliable multiple unit wiring board in which the outer peripheral side of a thin and wide-area mother board is prevented from warping and the mountability of electronic components is excellent in a ceramic substrate. <P>SOLUTION: The multiple unit wiring board comprises the mother board 101 where rectangular wiring board regions 103 are longitudinally and laterally arrayed and formed, and a waste margin region 102 is formed around the wiring board regions 103; a wiring conductor 107 formed on the surface of the wiring board regions 103; and a frame-like metallization layer formed on the surface of the waste margin region 102. The frame-like metallization layer comprises a first frame-like metallization layer 104 formed at the outer peripheral edge of the waste margin region 102, and a second frame-like metallization layer 105 formed between the wiring board regions 103 and the first frame-like metallization layer 104. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

本発明は、広面積の母基板の中央部に各々が半導体素子や水晶振動子等の電子部品を搭載するための小型の配線基板となる多数の配線基板領域を縦横の並びに配列形成して成る多数個取り配線基板に関するものである。   The present invention is formed by arranging a large number of wiring board regions in a central portion of a large-area mother board, each of which is a small wiring board for mounting electronic components such as semiconductor elements and crystal resonators, vertically and horizontally. The present invention relates to a multi-piece wiring board.

従来、例えば半導体素子や圧電振動子等の電子部品を収納するための電子部品収納用パッケージに用いられる小型の配線基板は、酸化アルミニウム質焼結体等のセラミック材料から成り、表面にタングステン等の金属材料から成る配線導体が形成された四角平板状のセラミック絶縁層を複数層、上下に積層した構造である。   2. Description of the Related Art Conventionally, for example, a small wiring board used for an electronic component storage package for storing an electronic component such as a semiconductor element or a piezoelectric vibrator is made of a ceramic material such as an aluminum oxide sintered body. This is a structure in which a plurality of rectangular flat ceramic insulating layers on which wiring conductors made of a metal material are formed are stacked one above the other.

この配線基板に電子部品を収納し、電子部品の電極を配線導体の露出部分に半田やボンディングワイヤ等を介して電気的に接続することにより電子装置が形成される。   An electronic device is formed by housing an electronic component on the wiring board and electrically connecting the electrode of the electronic component to an exposed portion of the wiring conductor via solder, a bonding wire, or the like.

ところで、このような配線基板は、近時の電子装置の小型化・薄型化の要求に伴い、その大きさが数mm角程度、また、その厚みが0.5mm程度以下の極めて小さく薄いものとなってきており、多数個の配線基板の取り扱いを容易とするために、また配線基板および電子装置の製作を効率よくするために1枚の広面積の母基板中から多数個の配線基板を同時集約的に得るようになした、いわゆる多数個取り配線基板の形態で製作されている。   By the way, according to the recent demand for downsizing and thinning of electronic devices, such a wiring board is extremely small and thin with a size of about several mm square and a thickness of about 0.5 mm or less. In order to facilitate the handling of a large number of wiring boards, and to make the production of wiring boards and electronic devices efficient, a large number of wiring boards are simultaneously selected from one large-area mother board. It is manufactured in the form of a so-called multi-cavity wiring board that has been obtained intensively.

このような多数個取り配線基板の一例を図2に示す。多数個取り配線基板は、主面の中央部に四角形状等の配線基板領域203が縦横に配列形成されるとともに外周部に枠状の捨て代領域202が形成された母基板201と、各配線基板領域203に形成された配線導体(図示せず)とを具備した構造である。   An example of such a multi-piece wiring board is shown in FIG. The multi-cavity wiring board includes a mother board 201 in which square-shaped wiring board regions 203 are arranged vertically and horizontally in the central portion of the main surface and a frame-shaped discard margin region 202 is formed in the outer periphery, and each wiring This structure has a wiring conductor (not shown) formed in the substrate region 203.

各配線基板領域203の主面(上面)には、電子部品(図示せず)を搭載するための搭載部(図示せず)が形成されており、配線導体は、その一部が配線基板領域203の搭載部、またはその周辺に露出するとともに、他の一部が配線基板領域203の搭載部と対向する主面(下面)や側面等に露出するようにして形成されている。   A mounting portion (not shown) for mounting an electronic component (not shown) is formed on the main surface (upper surface) of each wiring board region 203, and a part of the wiring conductor is a wiring board region. It is formed so that it is exposed to the mounting portion of 203 or the periphery thereof, and the other part is exposed to the main surface (lower surface) or the side surface facing the mounting portion of the wiring board region 203.

各配線基板領域203の搭載部に電子部品(図示せず)を搭載した後、個々の配線基板領域203に分割することにより多数個の製品としての電子装置が形成される。   After mounting an electronic component (not shown) on the mounting portion of each wiring board region 203, it is divided into individual wiring board regions 203, thereby forming an electronic device as a large number of products.

このような多数個取り配線基板においては、分割を容易とするために、母基板201の主面に、配線基板領域203同士の境界、および配線基板領域203と捨て代領域202との境界に沿って分割溝が形成される場合もある。   In such a multi-piece wiring board, in order to facilitate division, the main surface of the mother board 201 is aligned with the boundary between the wiring board areas 203 and the boundary between the wiring board area 203 and the disposal margin area 202. In some cases, a dividing groove may be formed.

このような多数個取り基板は、例えば、酸化アルミニウム等の原料粉末を有機溶剤,バインダーとともにシート状に成形して複数のセラミックグリーンシートを作製し、次に、セラミックグリーンシートに金型等で打抜き加工を施して、例えば、搭載部が凹部からなる場合であれば、搭載部を形成するための開口部等を形成し、次に、このセラミックグリーンシートに、配線導体や枠状メタライズ層204等となるタングステン等の金属ペーストを印刷し、その後、セラミックグリーンシートを積層し、高温で焼成することにより製作される。
特開2004−23051号公報
Such a multi-piece substrate is made of, for example, a raw material powder such as aluminum oxide in a sheet shape together with an organic solvent and a binder to produce a plurality of ceramic green sheets, and then punched into the ceramic green sheets with a mold or the like For example, if the mounting portion is formed of a recess, an opening for forming the mounting portion is formed, and then a wiring conductor, a frame-like metallized layer 204, etc. are formed on the ceramic green sheet. It is manufactured by printing a metal paste such as tungsten and then laminating ceramic green sheets and firing at a high temperature.
Japanese Patent Laid-Open No. 2004-23051

しかしながら、このような従来の多数個取り配線基板においては、近時の電子装置の小型化・薄型化の要求に伴い、各配線基板領域の大きさが、数mm角程度の極めて小さなものとなってきており、同時に配線基板の厚みも0.5mm以下と非常に薄くなってきている。多数個取り配線基板としての生産性の改善の要求に伴い、セラミックグリーンシートの面積を広く取り、母基板の1枚あたりの配線基板の生産数を増加させるために配線基板領域の取り個数を増加させる動きがある。   However, in such a conventional multi-cavity wiring board, the size of each wiring board region is extremely small, about several mm square, in accordance with the recent demand for miniaturization and thinning of electronic devices. At the same time, the thickness of the wiring board has become very thin, 0.5 mm or less. In response to demands for improving productivity as multi-piece wiring boards, increase the number of wiring board areas in order to increase the number of production of wiring boards per mother board by increasing the area of ceramic green sheets There is a movement to make.

このように、セラミックグリーンシートの厚みが薄くなったり、面積が広くなったりすると、広面積となった母基板を焼成した際に配線導体となるメタライズペーストの塗布面積が大きい配線基板領域側と、配線導体がほとんど形成されずメタライズペーストの塗布面積が小さい捨て代領域側との焼成時の収縮の違いにより捨て代領域の幅方向に反って応力が作用し、母基板の外周側(捨て代領域や、それに近接する配線基板領域)が反るという問題点が発生するようになってきた。   In this way, when the thickness of the ceramic green sheet is reduced or the area is increased, the wiring substrate region side having a large application area of the metallized paste that becomes the wiring conductor when the mother substrate having a large area is baked, Due to the difference in shrinkage during firing from the disposal area side where the coating area of the metallized paste is small and the area where the metallized paste is applied is small, stress acts against the width direction of the disposal area and the outer peripheral side of the mother board (the disposal area) In addition, there is a problem that the wiring board region adjacent to the substrate warps.

特に、電子部品をフリップチップ実装するために小型化・薄型化が進んだ母基板においては、このように母基板の外周側が反るという問題点が顕著であった。   In particular, in the mother board that has been reduced in size and thickness for flip-chip mounting of electronic components, the problem that the outer peripheral side of the mother board is warped in this way is remarkable.

また、この多数個取り配線基板の各配線基板領域に電子部品を搭載する場合、例えばフリップチップ実装を行うための母基板が反っていると、電子部品の下面に形成された電極と各配線基板領域の配線導体とを半田バンプで接合する際に、全ての接続用の配線導体に接続できず、実装不良が発生し易くなる。   In addition, when electronic components are mounted on each wiring board region of the multi-cavity wiring board, for example, if a mother board for performing flip chip mounting is warped, electrodes formed on the lower surface of the electronic component and each wiring board When the wiring conductors in the region are joined by solder bumps, connection to all the wiring conductors for connection cannot be made, and mounting defects are likely to occur.

そこで、電子部品の良好な実装性を確保するために、母基板の下面の全面を吸引テーブルにより吸着し、母基板の反りを補正した状態にする技術が使用されている。この場合においても、吸引前に母基板の外周側が反っていると母基板の下面の全面を吸引テーブルにより吸着しても母基板と吸引テーブルとの間に若干の隙間が生じてしまい、母基板の反りを適切に補正することが出来ないという問題点もあった。   Therefore, in order to ensure good mountability of electronic components, a technique is used in which the entire lower surface of the mother board is sucked by a suction table so that the warpage of the mother board is corrected. Even in this case, if the outer peripheral side of the mother board is warped before the suction, even if the entire lower surface of the mother board is sucked by the suction table, a slight gap is generated between the mother board and the suction table. There was also a problem that it was not possible to properly correct the warpage.

本発明は、かかる従来の問題点に鑑み完成されたものであり、その目的は、薄く広面積の母基板の外周側が反ることが防止された、例えば電子部品の(実装性)が良好で電気的な信頼性の高い配線基板を提供することにある。   The present invention has been completed in view of such conventional problems, and the object thereof is to prevent the outer peripheral side of a thin and large-area mother board from being warped, for example, the (mountability) of an electronic component is good. An object is to provide a wiring board with high electrical reliability.

本発明の多数個取り配線基板は、四角形状の配線基板領域が縦横に配列形成され、該配線基板領域を取り囲むようにして捨て代領域が形成された母基板と、前記配線基板領域の表面に形成された配線導体と、前記捨て代領域の表面に形成された枠状メタライズ層とを備え、該枠状メタライズ層が、前記捨て代領域の外周縁部に形成された第1の枠状メタライズ層と、前記配線基板領域と前記第1の枠状メタライズ層との間に形成された第2の枠状メタライズ層とから成ることを特徴とするものである。   The multi-cavity wiring board according to the present invention includes a mother board in which rectangular wiring board areas are arranged vertically and horizontally, and a disposal margin area is formed so as to surround the wiring board area, and a surface of the wiring board area. A first frame-shaped metallization formed on the outer peripheral edge of the discard margin region, comprising: a formed wiring conductor; and a frame-shaped metallization layer formed on a surface of the discard margin region. And a second frame-like metallization layer formed between the wiring board region and the first frame-like metallization layer.

また、本発明の多数個取り配線基板は、好ましくは、前記第1の枠状メタライズ層および前記第2の枠状メタライズ層が同じ厚みで形成されていることを特徴とするものである。   Further, the multi-piece wiring board of the present invention is preferably characterized in that the first frame-like metallized layer and the second frame-like metallized layer are formed with the same thickness.

また、本発明の多数個取り配線基板は、好ましくは、前記第1の枠状メタライズ層と前記第2の枠状メタライズ層との間に、凹部が形成されていることを特徴とするものである。   The multi-piece wiring board of the present invention is preferably characterized in that a recess is formed between the first frame-like metallized layer and the second frame-like metallized layer. is there.

また、本発明の多数個取り配線基板は、好ましくは、前記第1の枠状メタライズ層と前記第2の枠状メタライズ層とが、電気的に接続されていることを特徴とするものである。   The multi-piece wiring board of the present invention is preferably characterized in that the first frame-like metallized layer and the second frame-like metallized layer are electrically connected. .

本発明の多数個取り配線基板によれば、四角形状の配線基板領域が縦横に配列形成され、配線基板領域を取り囲むようにして捨て代領域が形成された母基板と、配線基板領域の表面に形成された配線導体と、捨て代領域の表面に形成された枠状メタライズ層とを備え、枠状メタライズ層が、捨て代領域の外周縁部に形成された第1の枠状メタライズ層と、配線基板領域と第1の枠状メタライズ層との間に形成された第2の枠状メタライズ層とから成ることから、メタライズ層が形成されない捨て代領域の表面の第1の枠状メタライズ層および第2の枠状メタライズ層により、捨て代領域の焼成時の収縮を、母基板の外周縁部に形成される第1の枠状メタライズ層から第2の枠状メタライズ層までの外周捨て代領域と、第2の枠状メタライズ層から母基板の最外周の配線基板領域までの内周捨て代領域との2つの領域により、徐々に抑制(メタライズ層がセラミックよりも焼成時の収縮が小さい)することができ、母基板の外周縁部から最外周の配線基板領域にかけて、配線基板領域側と捨て代領域側との焼成時の収縮の違いを緩和して、母基板の外周側が反ることを防止することができる。   According to the multi-cavity wiring board of the present invention, a rectangular wiring board region is formed in an array in the vertical and horizontal directions, and a discarding area is formed so as to surround the wiring board region, and on the surface of the wiring board region. A wiring metal formed, and a frame-like metallization layer formed on the surface of the disposal margin region, the frame-like metallization layer is a first frame-like metallization layer formed on the outer peripheral edge of the disposal margin region; Since it comprises a second frame-like metallization layer formed between the wiring board region and the first frame-like metallization layer, the first frame-like metallization layer on the surface of the disposal margin region where the metallization layer is not formed and Due to the second frame-shaped metallization layer, the shrinkage at the time of firing of the discard margin region is reduced, and the peripheral discard margin region from the first frame-shaped metallization layer formed on the outer peripheral edge of the mother substrate to the second frame-shaped metallization layer And a second frame metallization layer Can be gradually suppressed (the metallized layer has a smaller shrinkage during firing than ceramic) by the two areas of the inner peripheral abandon area up to the outermost wiring board area of the mother board. The difference in shrinkage at the time of firing between the wiring substrate region side and the disposal margin region side from the peripheral part to the outermost wiring substrate region can be alleviated, and the outer peripheral side of the mother substrate can be prevented from warping.

また、本発明の多数個取り配線基板によれば、好ましくは、前記第1の枠状メタライズ層および前記第2の枠状メタライズ層が同じ厚みで形成されていることから、次のような効果がある。すなわち、母基板を吸引テーブルに真空吸引により吸着し、電子部品を配線基板領域に搭載する場合において、母基板の外周部で吸引テーブルと母基板の下面との間を第1および第2の枠状メタライズ層で2重に塞ぐことができるので、外周部との隙間から吸引圧力が漏れることを効果的に防止して母基板のずれ等を防ぐことができ、電子部品を容易に、位置精度を高めて搭載することができる。   Further, according to the multi-cavity wiring board of the present invention, preferably, the first frame-like metallized layer and the second frame-like metallized layer are formed with the same thickness. There is. That is, when the mother board is sucked onto the suction table by vacuum suction and the electronic component is mounted on the wiring board region, the first and second frames are provided between the suction table and the lower surface of the mother board at the outer peripheral portion of the mother board. Since the metallized layer can be double-blocked, it is possible to effectively prevent the suction pressure from leaking through the gap with the outer peripheral part, prevent the mother board from being displaced, etc. Can be mounted with a higher height.

また、第1の枠状メタライズ層と第2の枠状メタライズ層との厚みが同じとなるように形成されていることから、両方で同様な収縮抑制作用を得ることができるので、第1の枠状メタライズ層と第2の枠状メタライズ層との間で極端に抑制作用が異なるようなことが防止されて、さらに確実に母基板の反りを抑制できる。   In addition, since the first frame-shaped metallized layer and the second frame-shaped metallized layer are formed so as to have the same thickness, the same shrinkage suppressing action can be obtained in both, so that the first It is possible to prevent the suppressive action from being extremely different between the frame-like metallized layer and the second frame-like metallized layer, and more reliably suppress the warp of the mother substrate.

また、本発明の多数個取り配線基板によれば、好ましくは、第1の枠状メタライズ層と第2の枠状メタライズ層との間に、凹部が形成されていることから、次のような効果がある。すなわち、電子部品の良好な実装性を確保するために、母基板の下面の全面を吸引テーブルにより吸着する場合、この第1の枠状メタライズ層と第2の枠状メタライズ層との間に形成された複数の凹部が吸引時の低圧保持容器として作用することから、凹部の分だけ吸引圧力を保持する効果を大きくすることができ、さらに強く吸引テーブルに母基板を吸引固定することができる。   Further, according to the multi-cavity wiring board of the present invention, preferably, since a recess is formed between the first frame-shaped metallized layer and the second frame-shaped metallized layer, the following effective. That is, in order to secure good mountability of the electronic component, when the entire lower surface of the mother board is sucked by the suction table, it is formed between the first frame-shaped metallized layer and the second frame-shaped metallized layer. Since the plurality of recessed portions act as a low-pressure holding container during suction, the effect of holding the suction pressure by the amount of the recessed portion can be increased, and the mother substrate can be more strongly sucked and fixed to the suction table.

また、本発明の多数個取り配線基板によれば、好ましくは、第1の枠状メタライズ層と第2の枠状メタライズ層とが、電気的に接続されていることから、
例えば、各配線基板領域の配線導体にめっき層を電解めっき法で被着させるような場合、各配線基板領域の主面に形成された配線導体に、均等にめっき層を被着させるための電流を供給することができ、各配線基板領域の配線導体に均一にめっき層を被着させることができる。すなわち、第2の枠状メタライズ層を配線基板領域の配線導体と電気的に接続させておくとともに、外部の電源から第1の枠状メタライズ層にめっき用の電流を供給することにより、第1および第2の枠状メタライズ層を介して配線導体に電流が供給される。この場合、第1および第2の枠状メタライズ層がいわゆる補助陰極として機能するため、めっき層の厚さのばらつきを抑えることができる。
Further, according to the multi-cavity wiring board of the present invention, preferably, the first frame-shaped metallized layer and the second frame-shaped metallized layer are electrically connected,
For example, when a plating layer is deposited on the wiring conductor in each wiring board region by electrolytic plating, the current for uniformly depositing the plating layer on the wiring conductor formed on the main surface of each wiring board region And a plating layer can be uniformly applied to the wiring conductor in each wiring board region. That is, the second frame-like metallized layer is electrically connected to the wiring conductor in the wiring board region, and a current for plating is supplied to the first frame-like metallized layer from an external power source. A current is supplied to the wiring conductor via the second frame-like metallization layer. In this case, since the first and second frame-like metallized layers function as so-called auxiliary cathodes, variations in the thickness of the plating layer can be suppressed.

よって、電子部品の搭載性、電気的な信頼性に優れた電子装置となる配線基板を製作可能な多数個取り配線基板を提供することができる。   Therefore, it is possible to provide a multi-piece wiring board capable of manufacturing a wiring board that becomes an electronic device excellent in mountability of electronic components and electrical reliability.

次に、本発明の多数個取り配線基板を添付の図面を基に説明する。図1は本発明の多数個取り配線基板の実施の形態の一例を示す平面図である。この図において101は母基板、102は捨て代領域、103は配線基板領域、104は第1の枠状メタライズ層、105は第2の枠状メタライズ層である。   Next, a multi-piece wiring board according to the present invention will be described with reference to the accompanying drawings. FIG. 1 is a plan view showing an example of an embodiment of a multi-piece wiring board according to the present invention. In this figure, 101 is a mother board, 102 is a margin area, 103 is a wiring board area, 104 is a first frame metallization layer, and 105 is a second frame metallization layer.

そして、主として母基板101、捨て代領域102、配線基板領域103、第1の枠状メタライズ層104および第2の枠状メタライズ層105で本発明の多数個取り配線基板が構成されている。   The mother substrate 101, the discard margin region 102, the wiring substrate region 103, the first frame-like metallized layer 104, and the second frame-like metallized layer 105 constitute the multi-cavity wiring substrate of the present invention.

母基板101は、酸化アルミニウム質焼結体や窒化アルミニウム質焼結体,ムライト質焼結体,ガラスセラミックス等のセラミック材料から成るセラミック層を積層して成る。また、各配線基板領域103は、例えば一辺の長さが1.5〜5mm程度で厚みが0.2〜2mm程度の四角形状である。そして、各配線基板領域103の主面(上側主面)中央部に電子部品を収納し搭載するための搭載部(図示せず)が設けられている。搭載部は、例えば、配線基板領域103の中央部に複数の配線導体107を形成し、その搭載部を電子部品を搭載するための面とすること等により設けられる。   The mother substrate 101 is formed by laminating ceramic layers made of ceramic materials such as an aluminum oxide sintered body, an aluminum nitride sintered body, a mullite sintered body, and glass ceramics. Each wiring board region 103 has, for example, a rectangular shape having a side length of about 1.5 to 5 mm and a thickness of about 0.2 to 2 mm. A mounting portion (not shown) for storing and mounting electronic components is provided in the central portion of the main surface (upper main surface) of each wiring board region 103. The mounting portion is provided, for example, by forming a plurality of wiring conductors 107 in the central portion of the wiring board region 103 and using the mounting portion as a surface for mounting electronic components.

搭載される電子部品(図示せず)は、IC,LSI等の半導体集積回路素子、LD(半導体レーザ),LED(発光ダイオード),PD(フォトダイオード),CCD,ラインセンサ,イメージセンサ等の光半導体素子、圧電振動子,水晶振動子等の振動子、その他の種々の電子部品である。   Electronic components (not shown) to be mounted are semiconductor integrated circuit elements such as IC and LSI, LD (semiconductor laser), LED (light emitting diode), PD (photodiode), CCD, line sensor, image sensor, etc. These are semiconductor elements, vibrators such as piezoelectric vibrators and crystal vibrators, and other various electronic components.

また、母基板101の外周部に形成されている捨て代領域102は、多数個取り配線基板の取り扱いを容易としたり、後述するように、配線導体107の露出表面にめっき層を被着させる際に、配線導体107にめっき用電流を供給するための配線の引き回しを容易にしたりする機能をなす。   In addition, the disposal allowance region 102 formed on the outer peripheral portion of the mother board 101 facilitates handling of the multi-piece wiring board, or attaches a plating layer to the exposed surface of the wiring conductor 107 as will be described later. In addition, the wiring conductor 107 has a function of facilitating the routing of the wiring for supplying the plating current.

このような母基板101は、例えば酸化アルミニウム質焼結体から成る場合であれば、酸化アルミニウムやガラス粉末等の原料粉末をシート状に成形したセラミックグリーンシートを複数枚準備するとともに縦横に区画して配線基板領域103を設け、次に、このセラミックグリーンシートの一部のものについて金型等を用いて適当な打ち抜き加工を施した後に積層するとともに、焼成することによって作製される。   If such a mother substrate 101 is made of, for example, an aluminum oxide sintered body, a plurality of ceramic green sheets obtained by forming a raw material powder such as aluminum oxide or glass powder into a sheet shape are prepared and partitioned vertically and horizontally. Then, a wiring board region 103 is provided, and then a part of the ceramic green sheet is subjected to an appropriate punching process using a mold or the like and then laminated and fired.

各配線基板領域103の表面には、配線導体107が形成されており、この配線導体107は、搭載部に搭載される電子部品の電極とボンディングワイヤや半田等を介して電気的に接続し、これを配線基板領域103の下面や側面に導出する導電路として機能する。配線導体107は、母基板101の表面だけでなく、一部が内部(セラミック層の層間等)に形成されていてもよい。   A wiring conductor 107 is formed on the surface of each wiring board region 103, and the wiring conductor 107 is electrically connected to an electrode of an electronic component mounted on the mounting portion via a bonding wire, solder, or the like, This functions as a conductive path leading to the lower surface or side surface of the wiring board region 103. The wiring conductor 107 may be formed not only on the surface of the mother board 101 but also partially inside (such as between ceramic layers).

配線導体107は、タングステンやモリブデン,銅,銀等の金属材料から成り、例えば、タングステンから成る場合であれば、タングステンの金属ペーストを母基板101となるグリーンシートに所定の配線導体107のパターンで印刷しておくことにより形成される。   The wiring conductor 107 is made of a metal material such as tungsten, molybdenum, copper, or silver. For example, if the wiring conductor 107 is made of tungsten, a metal paste of tungsten is applied to a green sheet that becomes the mother substrate 101 in a predetermined pattern of the wiring conductor 107. It is formed by printing.

また、捨て代領域102の表面には、枠状メタライズ層が形成されており、この枠状メタライズ層は、捨て代領域102の外周縁部に形成された第1の枠状メタライズ層104と、配線基板領域103と第1の枠状メタライズ層104との間に形成された第2の枠状メタライズ層105とから成る。   Further, a frame-shaped metallized layer is formed on the surface of the discard margin region 102, and the frame-shaped metallization layer includes a first frame-shaped metallization layer 104 formed on the outer peripheral edge of the discard margin region 102; It consists of a second frame-like metallization layer 105 formed between the wiring board region 103 and the first frame-like metallization layer 104.

第1および第2の枠状メタライズ層104、105は、配線導体103と同様の金属材料からなり、例えば、上述したようなタングステンのペーストを、母基板101となるグリーンシートの表面に枠状のパターンで印刷しておくことにより形成される。   The first and second frame-like metallized layers 104 and 105 are made of the same metal material as that of the wiring conductor 103. For example, the above-described tungsten paste is formed into a frame-like shape on the surface of the green sheet serving as the mother substrate 101. It is formed by printing with a pattern.

本発明の多数個取り配線基板は、このような構造としたことから、第1の枠状メタライズ層104および第2の枠状メタライズ層105により、捨て代領域102の焼成時の収縮を、母基板101の外周縁部に形成される第1の枠状メタライズ層104から第2の枠状メタライズ層105までの外周捨て代領域と、第2の枠状メタライズ層から母基板の最外周の配線基板領域までの内周捨て代領域との2つの領域により、徐々に抑制(メタライズ層がセラミックよりも焼成時の収縮が小さい)することができ、母基板101の外周縁部から最外周の配線基板領域103にかけて、配線基板領域103側と捨て代領域102側との焼成時の収縮の違いを緩和して、母基板101の外周側が反ることを防止することができる。   Since the multi-cavity wiring board of the present invention has such a structure, the first frame-like metallized layer 104 and the second frame-like metallized layer 105 cause the shrinkage during firing of the disposal margin region 102 to be reduced. Outer peripheral margin area from the first frame-shaped metallized layer 104 to the second frame-shaped metallized layer 105 formed on the outer peripheral edge of the substrate 101, and the outermost wiring of the mother substrate from the second frame-shaped metallized layer The two regions, the inner peripheral abandon margin region up to the substrate region, can be gradually suppressed (the metallized layer has a smaller shrinkage during firing than the ceramic), and the outermost peripheral wiring from the outer peripheral portion of the mother substrate 101 Over the substrate region 103, the difference in shrinkage during firing between the wiring substrate region 103 side and the disposal margin region 102 side can be alleviated, and the outer peripheral side of the mother substrate 101 can be prevented from warping.

また、配線導体107の表面には、酸化腐食を防止するとともに、半田やボンディングワイヤを接続する際の半田の濡れ性、ボンディングワイヤのボンディング性等の特性を向上させるために、ニッケルや金等のめっき(図示せず)が被着される。   Further, the surface of the wiring conductor 107 is made of nickel, gold or the like in order to prevent oxidative corrosion and to improve characteristics such as solder wettability when bonding a solder or bonding wire and bonding property of the bonding wire. Plating (not shown) is applied.

配線導体107に対するめっきの被着は、例えば電解めっき法により行なわれる。接続用の導体は、配線導体103と同様の金属材料を用い、同様の方法で形成することができる。   The plating is applied to the wiring conductor 107 by, for example, an electrolytic plating method. The connecting conductor can be formed by using the same metal material as that of the wiring conductor 103 and by the same method.

そして、各配線基板領域103に電子部品(図示せず)を搭載した後、個々の配線基板領域103に分割することにより多数個の製品としての電子装置が形成される。103への電子部品の搭載は、多数個取り配線基板を個々の配線基板領域103に分割して個片の配線基板とした後に行ってもよい。   An electronic component (not shown) is mounted on each wiring board region 103 and then divided into individual wiring board regions 103 to form an electronic device as a large number of products. The electronic components may be mounted on the circuit board 103 after the multi-piece wiring board is divided into individual wiring board regions 103 to form individual wiring boards.

配線基板領域103への電子部品の搭載は、例えば、母基板101を、真空吸引による吸着機構を備えた吸引テーブル上に位置決め載置して吸着させた後、各配線基板領域103に電子部品を順次位置合わせして搭載し、ガラス、ろう材、接着剤等の接合材、ボンディングワイヤ、金属バンプ等の導電性接続材を介して、電子部品を配線基板領域103に電気的、機械的に接続することにより行なわれる。   For example, the electronic component is mounted on the wiring board region 103 by positioning and sucking the mother board 101 on a suction table having a suction mechanism by vacuum suction, and then placing the electronic component on each wiring board region 103. Mounted by sequentially aligning and electrically connecting electronic components to the wiring board region 103 through conductive connection materials such as bonding materials such as glass, brazing material and adhesive, bonding wires, and metal bumps. It is done by doing.

母基板101は、配線基板領域103同士の境界や、捨て代領域102の各配線基板領域103の境界線の延長線上に分割用のアライメントマーク(図示せず)が形成されており、このアライメントマークに沿って母基板101をスライシング加工等で分割することにより、母基板101は各配線基板領域103ごとに個片状に分割される。   In the mother board 101, alignment marks (not shown) for division are formed on the boundaries between the wiring board areas 103 and on the extended lines of the wiring board areas 103 of the disposal allowance area 102. Then, the mother board 101 is divided into individual pieces for each wiring board region 103 by dividing the mother board 101 by slicing or the like.

また、本発明の多数個取り配線基板は、第1の枠状メタライズ層104および第2の枠状メタライズ層105が同じ厚みで形成されていることが好ましい。   In the multi-cavity wiring board of the present invention, it is preferable that the first frame-like metallized layer 104 and the second frame-like metallized layer 105 are formed with the same thickness.

このような構造とすることにより、次のような効果がある。すなわち、電子部品の良好な実装性を確保するために、母基板101の下面の全面を吸引テーブルに真空吸引により吸着し、母基板101の反りを補正する場合において、母基板101の外周部で、吸引テーブルと母基板101の下面との間を第1の枠状メタライズ層104、および第2の枠状メタライズ層105で2重に塞ぐことができるので、外周部との隙間から吸引圧力が漏れることを効果的に防止して、良好に母基板101の反りを補正することができる。   By adopting such a structure, the following effects are obtained. That is, in order to ensure good mountability of the electronic component, the entire lower surface of the mother board 101 is sucked to the suction table by vacuum suction, and the warpage of the mother board 101 is corrected at the outer periphery of the mother board 101. Since the first frame-like metallized layer 104 and the second frame-like metallized layer 105 can be doubly sealed between the suction table and the lower surface of the mother substrate 101, the suction pressure is generated from the gap with the outer peripheral part. Leakage can be effectively prevented and the warp of the mother substrate 101 can be corrected well.

また、第1枠状メタライズ層104と第2の枠状メタライズ層105との厚みが同じとなるように形成されていることから、両方で同様な収縮抑制作用を得ることができるので、第1の枠状メタライズ層104と第2の枠状メタライズ層105との間で極端に抑制作用が異なるようなことが防止されて、さらに確実に母基板101の反りを抑制できる。   In addition, since the first frame-like metallized layer 104 and the second frame-like metallized layer 105 are formed so as to have the same thickness, the same shrinkage suppressing action can be obtained in both cases. Thus, it is possible to prevent the suppressive action from being extremely different between the frame-shaped metallized layer 104 and the second frame-shaped metallized layer 105, and it is possible to more reliably suppress the warp of the mother substrate 101.

第1の枠状メタライズ層104および第2の枠状メタライズ層105を母基板101の表面に形成する方法としては、例えば、各配線導体が形成された絶縁層となるセラミックグリーンシートの外周部にめっき用導通端子106となり、各配線導体と接続される貫通孔を設けて、この貫通孔の内壁にメタライズペーストを塗布するとともに、母基板101の主面を形成するためのセラミックグリーンシートの表面に、第1の枠状メタライズ層104および第2の枠状メタライズ層105および貫通孔の周囲を取り囲むように形成されるメタライズ層を同時に従来周知のスクリーン印刷法により形成することができる。このように、第1の枠状メタライズ層104および第2の枠状メタライズ層105および貫通孔の周囲を取り囲むように形成されるメタライズ層を同時に形成することで、ほぼ同じ厚みでこれらのメタライズ層を形成することができる。さらに、これらの複数のセラミックグリーンシートを積層・密着させた後、積層体の各辺を貫通孔が二分割されるように切断することにより、母基板101となる積層体を得ることができる。   As a method for forming the first frame-like metallized layer 104 and the second frame-like metallized layer 105 on the surface of the mother substrate 101, for example, on the outer periphery of a ceramic green sheet that becomes an insulating layer on which each wiring conductor is formed. Conductive terminals for plating 106 are provided, and through holes connected to the respective wiring conductors are provided. Metallized paste is applied to the inner walls of the through holes, and the surface of the ceramic green sheet for forming the main surface of the mother board 101 is provided. The first frame-like metallized layer 104, the second frame-like metallized layer 105, and the metallized layer formed so as to surround the periphery of the through hole can be simultaneously formed by a conventionally known screen printing method. Thus, by simultaneously forming the first frame-like metallized layer 104, the second frame-like metallized layer 105, and the metallized layer formed so as to surround the through hole, these metallized layers have substantially the same thickness. Can be formed. Furthermore, after laminating and adhering the plurality of ceramic green sheets, each side of the laminated body is cut so that the through hole is divided into two, whereby the laminated body serving as the mother substrate 101 can be obtained.

また、本発明の多数個取り配線基板は、第1の枠状メタライズ層104と第2の枠状メタライズ層105との間に、凹部108が形成されていることが好ましい。このような構成の多数個取り配線基板の実施の形態の例を図2の平面図および断面図に示す。   In the multi-cavity wiring board of the present invention, it is preferable that a recess 108 is formed between the first frame-like metallized layer 104 and the second frame-like metallized layer 105. An example of an embodiment of a multi-piece wiring board having such a configuration is shown in a plan view and a sectional view of FIG.

このような構造とすることにより、次のような効果がある。すなわち、電子部品の良好な実装性を確保するために、母基板101の下面の全面を吸引テーブルにより吸着し、母基板101の反りを補正する場合、この第1の枠状メタライズ層104と第2の枠状メタライズ層105との間に形成された複数の凹部108が吸引時の低圧保持容器として作用することから、凹部108の分だけ吸引圧力を保持する効果を大きくすることができ、さらに効果的に吸引テーブルに母基板101を吸引固定することができる。   By adopting such a structure, the following effects are obtained. That is, in order to secure good mountability of the electronic component, when the entire lower surface of the mother board 101 is sucked by the suction table and the warpage of the mother board 101 is corrected, the first frame-like metallized layer 104 and the first Since the plurality of recesses 108 formed between the two frame-shaped metallized layers 105 act as a low-pressure holding container during suction, the effect of holding the suction pressure by the amount of the recesses 108 can be increased. The mother substrate 101 can be effectively sucked and fixed to the suction table.

本発明の実施の形態の例を示す図3では、凹部108の形状を長方形としたが、母基板101の厚みや形状にあわせて円形や楕円形としても、母基板101を吸引固定する際に吸引時の低圧保持容器として作用する効果が同一であれば特に問題はない。   In FIG. 3 showing an example of the embodiment of the present invention, the shape of the recess 108 is rectangular. However, when the mother substrate 101 is suction-fixed even if it is circular or elliptical according to the thickness or shape of the mother substrate 101. There is no particular problem as long as the effect of acting as a low-pressure holding container at the time of suction is the same.

また、本発明の多数個取り配線基板は、第1の枠状メタライズ層104と第2の枠状メタライズ層105とが、電気的に接続されていることが好ましい。   Further, in the multi-piece wiring board of the present invention, it is preferable that the first frame-shaped metallized layer 104 and the second frame-shaped metallized layer 105 are electrically connected.

このような構造とすることにより、次のような効果がある。例えば、各配線基板領域103の配線導体107にめっき層を電解めっき法で被着させるような場合、各配線基板領域103の主面に形成された配線導体107に、均等にめっき層を被着させるための電流を供給することができ、各配線基板領域103の配線導体107に均一にめっき層を被着させることができる。すなわち、第2の枠状メタライズ層105を配線基板領域103の配線導体107と電気的に接続させておくとともに、外部の電源から第1の枠状メタライズ層104にめっき用の電流を供給することにより、第1の枠状メタライズ層104および第2の枠状メタライズ層105を介して配線導体107に電流が供給される。この場合、第1の枠状メタライズ層104および第2の枠状メタライズ層105がいわゆる補助陰極として機能するため、めっき層の厚さのばらつきを抑えることができる。   By adopting such a structure, the following effects are obtained. For example, when a plating layer is deposited on the wiring conductor 107 in each wiring board region 103 by electrolytic plating, the plating layer is evenly deposited on the wiring conductor 107 formed on the main surface of each wiring board region 103. Therefore, a plating layer can be uniformly applied to the wiring conductor 107 of each wiring board region 103. That is, the second frame-shaped metallized layer 105 is electrically connected to the wiring conductor 107 in the wiring board region 103, and a plating current is supplied from the external power source to the first frame-shaped metallized layer 104. As a result, a current is supplied to the wiring conductor 107 via the first frame-like metallized layer 104 and the second frame-like metallized layer 105. In this case, since the first frame-like metallized layer 104 and the second frame-like metallized layer 105 function as so-called auxiliary cathodes, variations in the thickness of the plating layer can be suppressed.

また、本発明の多数個取り配線基板において、母基板101は四角形状であり、第1の枠状メタライズ層104は、母基板101の最外周の端面に接するように形成されていることが望ましい。焼成時の収縮の影響を最も受け易い捨て代領域102の最外周部に接して第1の枠状メタライズ層104を形成することにより、さらに有効に配線基板領域103側と捨て代領域102側との焼成時の収縮の違いを緩和して、母基板101の外周側が反ることを防止することができる。   Further, in the multi-cavity wiring board of the present invention, it is desirable that the mother board 101 has a quadrangular shape, and the first frame-like metallized layer 104 is formed so as to be in contact with the outermost end face of the mother board 101. . By forming the first frame-like metallized layer 104 in contact with the outermost peripheral portion of the disposal margin region 102 that is most susceptible to shrinkage during firing, the wiring substrate region 103 side and the disposal margin region 102 side are more effectively provided. Thus, the difference in shrinkage during firing can be alleviated and the outer peripheral side of the mother substrate 101 can be prevented from warping.

また、本発明の多数個取り配線基板において、第1の枠状メタライズ層104および第2の枠状メタライズ層105は、母基板101の表裏面に対象に形成されていることが望ましい。このように、表裏面に対象に形成することにより母基板101の厚み方向における母基板101側と第1および第2の枠状メタライズ層との焼成時の収縮の違いをさらに有効に緩和して、母基板101の外周側が反ることを防止することができる。   Moreover, in the multi-piece wiring board of the present invention, it is desirable that the first frame-shaped metallized layer 104 and the second frame-shaped metallized layer 105 are formed on the front and back surfaces of the mother substrate 101. Thus, by forming the target on the front and back surfaces, the difference in shrinkage during firing between the mother substrate 101 side and the first and second frame-like metallized layers in the thickness direction of the mother substrate 101 is further effectively reduced. The outer peripheral side of the mother board 101 can be prevented from warping.

よって、電子部品の搭載性、電気的な信頼性に優れた電子装置となる配線基板を製作可能な多数個取り配線基板を提供することができる。   Therefore, it is possible to provide a multi-piece wiring board capable of manufacturing a wiring board that becomes an electronic device excellent in mountability of electronic components and electrical reliability.

なお、本発明は以上の実施の形態の例に限定されるものではなく、本発明の要旨を逸脱しない範囲で種々の変更を加えても差し支えない。例えば、この例ではめっき用導通端子を半円状としたが、四角形状や半楕円状の構成のめっき用導通端子としてもよい。   It should be noted that the present invention is not limited to the above embodiments, and various modifications may be made without departing from the scope of the present invention. For example, in this example, the conductive terminal for plating is semicircular, but it may be a conductive terminal for plating having a rectangular or semi-elliptical configuration.

本発明の多数個取り配線基板の実施の形態の一例を示す平面図および断面図である。It is the top view and sectional drawing which show an example of embodiment of the multi-piece wiring board of this invention. 本発明の多数個取り配線基板の他の実施の形態の一例を示す平面図および断面図である。It is the top view and sectional drawing which show an example of other embodiment of the multi-piece wiring board of this invention. 従来の多数個取り配線基板を示す平面図および断面図である。It is the top view and sectional drawing which show the conventional multi-piece wiring board.

符号の説明Explanation of symbols

101・・・・・母基板
102・・・・・捨て代領域
103・・・・・配線基板領域
104・・・・・第1の枠状メタライズ層
105・・・・・第2の枠状メタライズ層
106・・・・・分割溝
107・・・・・配線導体
108・・・・・凹部
DESCRIPTION OF SYMBOLS 101 ... Mother board | substrate 102 ... Discard allowance area | region 103 ... Wiring board area | region 104 ... 1st frame-shaped metallization layer 105 ... 2nd frame shape Metallized layer 106 ... Dividing groove 107 ... Wiring conductor 108 ... Recess

Claims (4)

四角形状の配線基板領域が縦横に配列形成され、該配線基板領域を取り囲むようにして捨て代領域が形成された母基板と、前記配線基板領域の表面に形成された配線導体と、前記捨て代領域の表面に形成された枠状メタライズ層とを備え、該枠状メタライズ層が、前記捨て代領域の外周縁部に形成された第1の枠状メタライズ層と、前記配線基板領域と前記第1の枠状メタライズ層との間に形成された第2の枠状メタライズ層とから成ることを特徴とする多数個取り配線基板。 A rectangular wiring board region is arranged in a vertical and horizontal direction, a mother board on which a disposal margin area is formed so as to surround the wiring board area, a wiring conductor formed on a surface of the wiring board area, and the disposal margin A frame-like metallization layer formed on the surface of the region, the frame-like metallization layer comprising a first frame-like metallization layer formed on an outer peripheral edge of the discard margin region, the wiring board region, and the first A multi-cavity wiring board comprising a second frame-shaped metallization layer formed between one frame-shaped metallization layer. 前記第1の枠状メタライズ層および前記第2の枠状メタライズ層が同じ厚みで形成されていることを特徴とする請求項1記載の多数個取り配線基板。 The multi-piece wiring board according to claim 1, wherein the first frame-shaped metallized layer and the second frame-shaped metallized layer are formed with the same thickness. 前記第1の枠状メタライズ層と前記第2の枠状メタライズ層との間に、凹部が形成されていることを特徴とする請求項1または請求項2記載の多数個取り配線基板。 The multi-cavity wiring board according to claim 1, wherein a recess is formed between the first frame-like metallized layer and the second frame-like metallized layer. 前記第1の枠状メタライズ層と前記第2の枠状メタライズ層とが、電気的に接続されていることを特徴とする請求項1乃至請求項3のいずれかに記載の多数個取り配線基板。 4. The multi-piece wiring board according to claim 1, wherein the first frame-shaped metallized layer and the second frame-shaped metallized layer are electrically connected. 5. .
JP2005096832A 2005-03-30 2005-03-30 Multiple wiring board Expired - Fee Related JP4566046B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2005096832A JP4566046B2 (en) 2005-03-30 2005-03-30 Multiple wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2005096832A JP4566046B2 (en) 2005-03-30 2005-03-30 Multiple wiring board

Publications (2)

Publication Number Publication Date
JP2006278808A true JP2006278808A (en) 2006-10-12
JP4566046B2 JP4566046B2 (en) 2010-10-20

Family

ID=37213234

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2005096832A Expired - Fee Related JP4566046B2 (en) 2005-03-30 2005-03-30 Multiple wiring board

Country Status (1)

Country Link
JP (1) JP4566046B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009076721A (en) * 2007-09-21 2009-04-09 Shinko Electric Ind Co Ltd Multilayer wiring board
JP2015106570A (en) * 2013-11-28 2015-06-08 京セラ株式会社 Multi-piece wiring board, wiring board and electronic apparatus

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0715144A (en) * 1993-06-16 1995-01-17 Toshiba Corp Ceramic multilayer printed circuit board for multi-chip module
JPH10107437A (en) * 1996-09-30 1998-04-24 Kyocera Corp Manufacturing method of circuit board
JP2000165003A (en) * 1998-11-25 2000-06-16 Kyocera Corp Multiple-piece yielding wiring board
JP2001015638A (en) * 1999-06-30 2001-01-19 Mitsumi Electric Co Ltd Substrate of ic package
JP2004023051A (en) * 2002-06-20 2004-01-22 Kyocera Corp Multi-wiring board
JP2004103727A (en) * 2002-09-06 2004-04-02 Murata Mfg Co Ltd Method for manufacturing laminated ceramic electronic part, and electronic part array
JP2005209761A (en) * 2004-01-21 2005-08-04 Sumitomo Metal Electronics Devices Inc Multi-molded wiring board

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0715144A (en) * 1993-06-16 1995-01-17 Toshiba Corp Ceramic multilayer printed circuit board for multi-chip module
JPH10107437A (en) * 1996-09-30 1998-04-24 Kyocera Corp Manufacturing method of circuit board
JP2000165003A (en) * 1998-11-25 2000-06-16 Kyocera Corp Multiple-piece yielding wiring board
JP2001015638A (en) * 1999-06-30 2001-01-19 Mitsumi Electric Co Ltd Substrate of ic package
JP2004023051A (en) * 2002-06-20 2004-01-22 Kyocera Corp Multi-wiring board
JP2004103727A (en) * 2002-09-06 2004-04-02 Murata Mfg Co Ltd Method for manufacturing laminated ceramic electronic part, and electronic part array
JP2005209761A (en) * 2004-01-21 2005-08-04 Sumitomo Metal Electronics Devices Inc Multi-molded wiring board

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009076721A (en) * 2007-09-21 2009-04-09 Shinko Electric Ind Co Ltd Multilayer wiring board
JP2015106570A (en) * 2013-11-28 2015-06-08 京セラ株式会社 Multi-piece wiring board, wiring board and electronic apparatus

Also Published As

Publication number Publication date
JP4566046B2 (en) 2010-10-20

Similar Documents

Publication Publication Date Title
WO2014119729A1 (en) Substrate for mounting electronic element, electronic device, and imaging module
JP6483800B2 (en) Light emitting element mounting package, light emitting device, and light emitting module
US11315844B2 (en) Electronic device mounting board, electronic package, and electronic module
JP6626735B2 (en) Electronic component mounting board, electronic device and electronic module
JP5738109B2 (en) Multiple wiring board
JP4566046B2 (en) Multiple wiring board
JP4458974B2 (en) Multiple wiring board
JP2008187198A (en) Multi-piece wiring substrate and wiring substrate, and manufacturing method therefor
JP2004254251A (en) Surface mounting type piezoelectric vibrator and insulating package
JP3538774B2 (en) Wiring board
JPWO2019017441A1 (en) Electronic component storage package, electronic device and electronic module
JP4484543B2 (en) Multiple wiring board
JP4272506B2 (en) Multiple wiring board
JP2004221514A (en) Multi-piece wiring substrate
JP2005317590A (en) Multiple wiring board
JP4272560B2 (en) Multiple wiring board
JP4594253B2 (en) Multiple wiring board
JP4557786B2 (en) Multiple wiring board
JP4733061B2 (en) Plural wiring base, wiring base and electronic device, and division method of multiple wiring base
JP4562473B2 (en) Manufacturing method of electronic component storage package
JP2006128299A (en) Taking-many-pieces type wiring board and electronic device
JP2006179847A (en) Package for housing electronic component and electronic device
JP2007043061A (en) Multi-pattern wiring board
JP2005302957A (en) Multiple wiring board
JP2004023051A (en) Multi-wiring board

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20080118

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20100414

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20100420

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20100616

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20100706

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20100803

R150 Certificate of patent or registration of utility model

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130813

Year of fee payment: 3

LAPS Cancellation because of no payment of annual fees