JP2006276253A - Organic electroluminescence pixel circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To effectively compensate fluctuation of a threshold voltage of a driver transistor. <P>SOLUTION: A drive controlling transistor T5 is inserted between the driver transistor T4 for applying a drive current corresponding to a gate potential Vg from a power supply PVdd to an organic electroluminescence element EL and the organic electroluminescence element EL and a short-circuiting transistor T3 is provided which controls whether or not the driver transistor T4 is to be diode-connected. A selection transistor T1 for controlling whether or not a data signal from a data line DL is to be supplied to the control terminal of the driver transistor T4 is placed, and a capacitor Cs is inserted between the selection transistor T1 and the control terminal of the driver transistor T4 and a connection between a terminal of the capacitor Cs on the side of the selection transistor T1 and the power supply PVdd is switched on and off by a potential controlling transistor T2. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to an organic EL pixel circuit that controls a drive current supplied to an organic EL element in accordance with a data signal.

  An EL display device using an electroluminescence (hereinafter referred to as EL) element, which is a self-luminous element, as a light-emitting element for each pixel is advantageous in that it is self-luminous and thin and consumes less power. It attracts attention as a display device that replaces a display device such as a device (LCD) or CRT.

  In particular, an active matrix EL display device in which a switching element such as a thin film transistor (TFT) for individually controlling an EL element is provided in each pixel and the EL element is controlled for each pixel enables high-definition display.

  In this active matrix EL display device, a plurality of gate lines extend in a row (horizontal) direction on a substrate, a plurality of data lines and a power supply line extend in a column (vertical) direction, and each pixel is an organic EL. An element, a selection TFT, a driving TFT, and a storage capacitor are provided. The selection TFT is turned on by selecting the gate line, the data voltage (voltage video signal) on the data line is charged to the holding capacitor, and the driving TFT is turned on with this voltage, and the power from the power supply line is supplied to the organic EL element. It is flowing.

Special Table 2002-514320

  However, in such a pixel circuit, if the threshold voltage of the driving TFTs of the pixel circuits arranged in a matrix varies, there is a problem that the luminance varies and the display quality deteriorates. In addition, it is difficult to make the characteristics of the TFTs constituting the pixel circuit of the entire display panel the same, and it is difficult to prevent the ON / OFF threshold value from varying.

  Therefore, it is desirable to prevent the influence on the display of the variation in threshold value in the driving TFT.

  Here, various proposals have conventionally been made on a circuit for preventing the influence on the fluctuation of the threshold value of the TFT (for example, Patent Document 1).

  However, this proposal requires a circuit for compensating for threshold fluctuation. Therefore, when such a circuit is used, there is a problem that the number of elements of the pixel circuit increases and the aperture ratio becomes small. In addition, when a circuit for compensation is added, there is a problem that a peripheral circuit for driving the pixel circuit needs to be changed.

  The present invention provides a pixel circuit that can effectively compensate for fluctuations in the threshold voltage of a driving transistor.

  The present invention includes a drive transistor that causes a drive current corresponding to a potential at a control end to flow from a power source to an organic EL element, a drive control transistor that is controlled by a light emission set line and that turns on and off the drive current of the drive transistor, and the drive transistor A short-circuit transistor that controls whether or not a diode is connected, a selection transistor that controls whether or not to supply a data signal from a data line to the control terminal of the drive transistor, and the control of the selection transistor and the drive transistor And a potential control transistor for turning on and off the connection between the capacitor and the light emitting set line.

  A control line connected to a control terminal of the selection transistor and configured to control on / off of the selection transistor; the control line is also connected to a control terminal of the potential control transistor; and the selection transistor, The potential control transistors are preferably turned on and off in a complementary manner.

  Further, it is preferable that a control terminal of the short-circuit transistor is connected to the control line, and the selection transistor and the short-circuit transistor are simultaneously turned on / off.

  The light emission set line is set to a voltage for turning off the light emission control transistor after the selection transistor is turned on by the control line, and the voltage for turning on the light emission control transistor after the selection transistor is turned off by the control line. Is preferably set to

  As described above, according to the present invention, the control terminal voltage of the drive transistor is set according to the data voltage and the threshold voltage of the drive transistor by turning on the short-circuit transistor while the selection transistor is turned on. can do. Therefore, a driving current corresponding to the data voltage can be supplied to the organic EL element regardless of the fluctuation of the threshold voltage of the driving transistor.

  One end of the potential control transistor is connected to the light emission set line. Since the light emission set line is set with a voltage from a predetermined power source, the voltage is basically not affected by the current flowing through the organic EL element and is stable. Therefore, the control terminal voltage of the driving transistor can be set accurately.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

  FIG. 1 shows a configuration of a pixel circuit according to the embodiment. The data line DL extends in the vertical direction and supplies a data signal (data voltage Vsig) about the display luminance of the pixel to the pixel circuit. One data line DL is provided for one column of pixels, and sequentially supplies the data voltage Vsig of the pixel to the pixels in the vertical direction.

  The data line DL is connected to the drain of an n-channel selection transistor T1, and the source of the selection transistor T1 is connected to one end of a capacitor Cs. The gate of the selection transistor T1 is connected to a gate line GL extending in the horizontal direction. The gate line GL is connected to the gate of the selection transistor T1 of each pixel circuit in the horizontal direction.

  The gate of the p-channel potential control transistor T2 is connected to the gate line GL. Accordingly, the potential control transistor T2 is turned off when the selection transistor T1 is on, and the potential control transistor T2 is turned on when the selection transistor T1 is off. The source of the potential control transistor T2 is connected to the light emission set line ES, and the drain is connected to the capacitor Cs and the source of the selection transistor T1.

  The other end of the capacitor Cs is connected to the gate of the p-channel drive transistor T4. The source of the drive transistor T4 is connected to the power supply line PVdd, and the drain is connected to the drain of the n-channel drive control transistor T5. The source of the drive control transistor T5 is connected to the anode of the organic EL element EL, and the gate is connected to the light emission set line ES extending in the horizontal direction. The cathode of the organic EL element EL is connected to a low voltage cathode power source CV. The power supply line PVdd also extends in the vertical direction, and supplies the power supply voltage PVdd to each pixel in the vertical direction.

  Further, the drain of the n-channel short-circuit transistor T3 is connected to the gate of the drive transistor T4, the source of the short-circuit transistor T3 is connected to the drain of the drive transistor T4, and the gate is connected to the gate line GL. Yes.

  Thus, in this embodiment, the data line DL and the power supply line PVdd are arranged in the vertical direction, and the gate line GL and the light emission set line ES are arranged in the horizontal direction.

  Next, the operation of this pixel circuit will be described.

  As shown in FIG. 2, this pixel circuit includes (i) discharge (GL = H level, ES = H level), (in accordance with the state (H level, L level) of the gate line GL and the light emission set line ES. ii) Reset (GL = H level, ES = L level), (iii) Potential fixed (GL = L level, ES = L level), (iv) Light emission (GL = L level, ES = H level) There is a state and repeats this. That is, the data voltage is set dot-sequentially to each data line, and (i) discharge is performed in a state where the data on the data line DL is valid, and then (ii) the charging voltage of the capacitor Cs is determined by resetting. In (iii), the gate voltage Vg is fixed, and (v) the organic EL element EL emits light with a driving current corresponding to the fixed gate voltage.

  Further, as shown in the drawing, the data in the data line DL becomes valid before (i) the discharge process, and (iii) becomes invalid after the fixing process. Therefore, valid data is set in the data line from (i) the discharge process to (iii) the fixing process.

  Hereinafter, each state will be described.

(I) Discharge (GL = H level, ES = H level)
First, in a state where the data voltage Vsig is supplied to the data line DL, both the gate line GL and the light emission set line ES are set to the H level. As a result, the selection transistor T1, the drive control transistor T5, and the short-circuit transistor T3 are turned on, and the potential control transistor T2 is turned off. Therefore, as shown in FIG. 3, with the voltage Vn = Vsig on the selection transistor T1 side of the capacitor Cs, the current from the power supply line PVdd passes through the drive transistor T4, the drive control transistor T5, and the organic EL element EL, and the cathode power supply CV. As a result, the charge held at the gate of the drive transistor T4 is extracted. As a result, the gate voltage Vg of the drive transistor T4 becomes a predetermined low voltage.

(Ii) Reset (GL = H level, ES = L level)
The light emission set line ES is changed to L level (low level) from the above discharge state. As a result, as shown in FIG. 4, the drive control transistor T5 is turned off, and the gate voltage Vg = Vg0 = PVdd− | Vtp | of the drive transistor T4 is reset. Here, Vtp is the threshold voltage of the drive transistor T4. That is, since the gate of the drive transistor T4 is short-circuited between the gate and the drain by the short circuit transistor T3 in a state where the source is connected to the power source PVdd, the gate voltage of the drive transistor T4 from the power source PVdd is | It is set to a voltage lower by Vtp | and turned off. At this time, the potential Vn of the capacitor Cs on the selection transistor T1 side is Vsig, and the capacitor Cs is charged with a voltage of | Vsig− (PVdd− | Vtp |) |.

(Iii) Potential fixed (GL = L level, ES = L level)
Next, the gate line GL is set to L level, the selection transistor T1 and the short-circuit transistor T3 are turned off, and the potential control transistor T2 is turned on. At this time, the voltage of the light emission set line ES is at the L level and is set to the same voltage as the L level voltage VVBB of the gate line GL. Therefore, if Vsig>Vn> VVBB and the selection transistor T1 is not turned off, the potential control transistor T2 is not turned on. Thus, since the potential control transistor T2 is turned on after the selection transistor T1 is turned off, the voltage charged in the capacitor Cs is maintained, and the data voltage is not destroyed.

Then, when the selection transistor T1 is turned off and the potential control transistor T2 is turned on, as shown in FIG. 5, the gate of the drive transistor T4 is disconnected from the drain, while when the potential control transistor T2 is turned on, Vn Is a voltage _obtained by adding the threshold voltage | V _tpT2 | of the potential control transistor T2 to the light emission set line ES = VVBB (Vn≈VVBB + IV _tpT2 |).

(Iv) Light emission (GL = L level, ES = H level)
Next, by setting the light emission set line ES to the H level, the drive control transistor T5 is turned on as shown in FIG. Further, when the potential of the light emission set line ES is set to PVdd, the gate potential of the drive transistor T4 is shifted by PVdd−VVBB. Note that the voltage shift amount at this time is affected by the gate capacitance Cp of the drive transistor T4.

  In this way, the voltage is shifted and the drive control transistor T5 is turned on, so that the drive current from the drive transistor T4 flows to the organic EL element EL. The drive current at this time is the drain current of the drive transistor T4, which is determined by the gate voltage of the drive transistor T4. This drain current is not related to the threshold voltage Vtp of the drive transistor T4. It is possible to suppress fluctuations in the amount of light emission accompanying fluctuations in threshold voltage.

  The drain of the potential control transistor T2 is connected to the light emission set line ES. The light emission set line ES is set to the power supply voltage PVdd when it is at the H level. This light emission set line ES is independent of the power supply line PVdd that supplies current to the organic EL element EL. Receive the supply. Therefore, the voltage of the light emission set line ES hardly varies depending on the drive current of the organic EL element EL in each pixel. Therefore, it is possible to prevent the display from being disturbed due to the shift voltage supplied to one end of the capacitor Cs via the potential control transistor T2.

  For example, the voltage shift amount ΔVg is expressed by ΔVg = Cs (Vsig−PVdd) / (Cs + Cp) as described later, and includes PVdd. Therefore, when PVdd fluctuates, ΔVg changes, but in the present embodiment, this change is suppressed. In particular, when the number of pixels increases, this change in PVdd causes the occurrence of crosstalk and luminance gradient. However, according to the present embodiment, the influence on the display can be suppressed.

  This will be described with reference to FIG.

  As described above, (ii) After resetting, Vn (= Vsig) is a value between Vsig (max) and Vsig (min), and Vg is driven from PVdd, as indicated by ◯ in the figure. The voltage Vg0 is reduced by the threshold voltage Vtp of the transistor T4. That is, Vg = Vg0 = PVdd + Vtp (Vtp <0) and Vn = Vsig.

  Then, after the potential set of (iii) is fixed, when the light emission set line ES becomes the H level (PVdd), Vn changes from Vsig to PVdd. Therefore, the change amount ΔVg takes into account the capacitances of Cs and Cp. , ΔVg = Cs (PVdd−Vsig) / (Cs + Cp).

  Therefore, Vn and Vg are Vn = PVdd, Vg = Vtp + ΔVg = PVdd + Vtp + Cs (PVdd−Vsig) / (Cs + Cp), as indicated by ● in the figure.

  Here, since Vgs = Vg−PVdd, Vgs = Vtp + Cs (PVdd−Vsig) / (Cs + Cp).

On the other hand, the drain current I is expressed as I = (1/2) β (Vgs−Vtp) ^2. By substituting the above equation, the drain current I is expressed as follows.
I = (1/2) β {Vtp + Cs (PVdd−Vsig) / (Cs + Cp) −Vtp} ²
= (1/2) β {Cs (PVdd−Vsig) / (Cs + Cp)} ²
= (1/2) βα (Vsig-PVdd) ²
Here, α = {Cs / (Cs + Cp)} ² , β is the driving transistor T4 amplification factor, β = μεGw / Gl,
μ is the carrier mobility, ε is the dielectric constant, Gw is the gate width, and Gl is the gate length.

  Thus, Vtp is not included in the expression of the drain current I, and is proportional to the square of Vsig−PVdd. Therefore, it is possible to achieve light emission according to the data voltage Vsig by eliminating the influence of the variation in threshold voltage of the drive transistor T4.

  In the above description, only the operation for one pixel has been described. Actually, the display panel has pixels arranged in a matrix, and for each of them, the data voltage Vsig corresponding to the corresponding luminance signal is supplied to cause each organic EL element to emit light. That is, as shown in FIG. 8, the display panel is provided with a horizontal switch circuit HSR and a vertical switch VSR, and these outputs change the states of the data line DL, gate line GL, and other light emission set lines ES. Be controlled. In particular, one gate line GL is associated with each pixel in the horizontal direction, and the gate lines GL are sequentially activated one by one by the vertical switch VSR. Next, in one horizontal period in which one gate line GL is activated, the horizontal switch HSR supplies data voltages to all the data lines DL in a dot-sequential manner, and this writes data to the pixel circuits for one horizontal line. . Each pixel circuit emits light according to the data voltage written until after one vertical period.

  Next, a data writing procedure for each pixel in one horizontal line will be described with reference to FIG.

  First, after the L level of the enable signal ENB indicating the start of one horizontal period, the data voltage Vsig is sequentially written to all the data lines DL. That is, a capacitor or the like is connected to the data line DL, and the data voltage Vsig is held in the data line DL by setting a voltage signal. Therefore, the data voltage Vsig for the pixels in each column is sequentially set to the corresponding data line DL, thereby setting the data voltage Vsig to all the data lines DL.

  Then, at the stage where this data setting is completed, Hout is set to H level and the gate line GL is activated to H level, and operation is performed for each pixel in the one horizontal direction described above, and data writing and light emission in each pixel are performed. Done.

  In this way, a normal video signal (data voltage Vsig) is sequentially written to all the data lines DL during the period up to the middle of one horizontal period, and this is simultaneously set to all the pixels as described above to emit light. be able to.

  Next, another method will be described with reference to FIG. In this example, first, the light emission set line ES is set to L level, and the gate line GL is set to H level (activated). In this state, the data voltage Vsig is sequentially set to the data line DL. When the data voltage Vsig is set to all the data lines DL, the light emission set line ES is set to the H level, the above-described discharge is performed, and thereafter the same operation is performed.

  Next, a modified example will be described.

  FIG. 11 shows a configuration of the first modification. In the first modification, the selection transistor T1 and the short-circuit transistor T3 are p-channel, and the potential control transistor T2 is n-channel. In such a configuration, the same operation as in the embodiment can be performed by setting the H level and L level of the gate line GL opposite to those in the above-described embodiment.

  FIG. 12 shows a configuration of the second modification. In the second modification, the capacitance set line CS is connected to the gate of the potential control transistor T2. In this example, the potential control transistor T2 is an n-channel transistor. As described above, the capacitor control line T2, which is a dedicated line for turning on and off the potential control transistor T2, is provided. By setting the capacitance set line CS to H level = VVDD and L level = VVBB, Vn = VVBB can be obtained when the potential control transistor T2 is turned on. In the embodiment such as FIG. 1, the potential control transistor T2 is a p-channel, and when the potential control transistor T2 is turned on, the gate voltage is VVBB, which is the same as the L level of the light emission set line ES = VVBB. Voltage. Therefore, when the potential control transistor T2 is turned on, Vn = VVBB + | VtpT2 |. In the second modification, Vn = VVBB can be achieved, and more stable operation is possible. In FIG. 10, the voltage of the capacitor set line CS in this example is also shown as when the second modification is driven.

  In the above embodiment, the various voltages are preferably set as follows. The power supply line PVdd is PVdd, the light emission set line ES is H level = PVdd, L level = VVBB, the gate line GL is H level = VVDD, L level = VVBB, and the capacitance set line Cs is H level = VVDD, L level = VVBB, It is preferable to set the cathode power supply CV = CV, PVdd = 8V, VVDD = 10V, VVBB = −2V, and CV = −2V.

It is a figure which shows the structure of the pixel circuit which concerns on embodiment. It is a chart figure explaining operation. It is a figure explaining a discharge process. It is a figure explaining a reset process. It is a figure explaining an electric potential fixing process. It is a figure explaining a light emission process. It is a figure explaining the state of the potential change in a potential fixing process from reset. It is a figure which shows the whole structure of a panel. It is a figure which shows the example of a timing of a data set. It is a figure which shows the other timing example of a data set. It is a figure explaining the structure of the modification 1. FIG. FIG. 10 is a diagram showing a configuration of Modification 2.

Explanation of symbols

  Cs capacitor, CS capacitance set line, CV cathode power supply, Cp parasitic capacitance, DL data line, EL organic EL element, ES light emission set line, GL gate line, HSR horizontal switch, PVdd power supply voltage, T1 selection transistor, T2 potential control transistor , T3 short-circuit transistor, T4 drive transistor, T5 drive control transistor, VSR vertical switch, Vg drive transistor gate voltage, Vsig data voltage.

Claims (4)

A drive transistor for causing a drive current corresponding to the potential of the control terminal to flow from the power source to the organic EL element;
A drive control transistor which is controlled by a light emission set line and which turns on and off the drive current of the drive transistor;
A short-circuit transistor that controls whether or not the drive transistor is diode-connected;
A selection transistor for controlling whether to supply a data signal from a data line to the control terminal of the driving transistor;
A capacitor inserted between the selection transistor and the control terminal of the drive transistor;
A potential control transistor for turning on and off the connection between the selection transistor side of the capacitor and the light emitting set line;
An organic EL pixel circuit comprising: The circuit of claim 1, wherein
A control line connected to a control terminal of the selection transistor and controlling on / off of the selection transistor;
An organic EL pixel circuit, wherein a control terminal of the potential control transistor is also connected to the control line, and the selection transistor and the potential control transistor are complementarily turned on and off. The circuit of claim 2, wherein
The organic EL pixel circuit, wherein a control terminal of the short-circuit transistor is connected to the control line, and the selection transistor and the short-circuit transistor are turned on and off simultaneously. The circuit according to any one of claims 1 to 3,
The light emission set line is set to a voltage for turning off the light emission control transistor after the selection transistor is turned on by the control line, and set to a voltage for turning on the light emission control transistor after the selection transistor is turned off by the control line. An organic EL pixel circuit.

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