JP2006253724A - Iii-group nitride compound semiconductor light emitting element - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To drastically enhance the productivity of a light emitting element by preventing a reflective layer from being detached. <P>SOLUTION: On the rear surface (surface 11b of a substrate) of the substrate 11, a reflective layer 10 is formed, on which an extended portion 10a is formed, making approximately one round about an outer circumference in the vicinity of a sapphire substrate of the side wall 21a of a light emitting element. Thereby, since the adhesion of the reflective layer 10 in the vicinity of the outer circumference of a reflective layer formation surface (substrate 11b of the surface) to the substrate is drastically reinforced by forming the extended portion 10a, the reflective layer 10a is not detached from the vicinity of the outer circumference of the reflective layer formation surface as a starting point. Consequently, even if a process is prepared to fix the light emitting element 100 on a pressure-sensitive adhesive sheet by sticking the pressure-sensitive adhesive sheet to the reflective layer 10, no defective products is generated having a detached reflective layer. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a group III nitride compound semiconductor light-emitting device and a method for manufacturing the same, and more particularly to a reflective layer formed on the back surface of a substrate of the light-emitting device in consideration of a reflection effect and the method for forming the same.

In view of the reflection effect and the like, Group III nitride compound semiconductor light emitting devices in which a reflective layer is formed on the back surface of the substrate, or conventional techniques related to the manufacturing method thereof, are generally described in Patent Documents 1 to 4 below. Are known.
Japanese Patent Laid-Open No. 11-126924 JP-A-11-126925 JP-A-5-129658 JP 11-261112 A

However, in these prior arts, since the adhesion of the reflective layer formed on the back surface of the light emitting element to the substrate is not sufficiently ensured, the reflective layer is produced during manufacture or use of the light emitting element. May peel from the substrate.
In addition, a manufacturing method including a step of fixing the light emitting element (or a semiconductor wafer as an aggregate of the light emitting elements) on the pressure sensitive adhesive sheet by attaching the pressure sensitive adhesive sheet to the reflective layer particularly during the manufacture of the light emitting element is adopted. In some cases, a part or all of the reflective layer adheres to the pressure-sensitive adhesive sheet side and is often peeled off from the substrate, resulting in a problem that the productivity (yield) of the light-emitting element is not improved.

  The present invention has been made to solve the above-described problems, and its object is to significantly improve the productivity of semiconductor light-emitting elements by preventing the above-mentioned peeling phenomenon of the reflective layer. .

In order to solve the above problems, the following means are effective.
That is, the first means includes a metal that reflects light emitted from the light emitting layer in a light emitting device in which a plurality of semiconductor layers made of a group III nitride compound semiconductor are stacked on an insulating substrate by crystal growth. The reflective layer is formed on the back surface of the insulating substrate, and an extended portion formed by extending a part of the reflective layer to a part of the side wall of the insulating substrate is provided. The reflective layer is formed on the side wall of the light emitting element. It is to provide a short-circuit prevention groove that restricts the expansion of.

  Further, the second means is the same as the first means, wherein the extended portion is formed over substantially the entire circumference of the reflection layer forming surface, and the short-circuit prevention groove is formed over substantially the entire circumference of the side wall. Is to form.

  The third means is that in the first means, the reflective layer has a multilayer structure including at least one metal layer.

The fourth means is that, in the third means, the extension portion is formed by only a part of the layers constituting the multilayer structure.
The above-described problems can be solved by the above means.

  Since the adhesion between the reflective layer near the outer periphery of the reflective layer forming surface and the substrate is greatly reinforced by the formation of the extended portion, the reflective layer does not peel off from the vicinity of the outer peripheral surface of the reflective layer forming surface. For this reason, even if the process which affixes an adhesive sheet on a reflective layer and fixes a light emitting element on an adhesive sheet is provided, the defective product which has reflective layer peeling does not generate | occur | produce.

  Thereby, the quality and productivity of the semiconductor light emitting device provided with the reflective layer in order to increase the light emission efficiency can be greatly improved.

  In addition, by forming the short-circuit prevention groove, the metal layer (reflective layer) constituting the reflective layer does not extend to the semiconductor layer. Thereby, the short circuit with a reflective layer and a semiconductor layer can be prevented reliably.

  The reflective layer may have a multi-layer structure, and the extended portion may be formed by extending at least one layer constituting the reflective layer (extended to the side wall of the light emitting element). . Further, when the reflective layer has a multilayer structure, at least one of the layers may be formed of a metal layer that reflects light efficiently.

  In addition, it is desirable that the extended portion is formed over the entire outer periphery of the reflective layer forming surface, but the extended portion does not necessarily have to be formed over the entire outer periphery. Even in such a case, the productivity can be improved as compared with the conventional case due to the above-described action.

  In addition, it is desirable that the short-circuit prevention groove is provided on each of the side walls that form the extended portion. However, the reflective layer deposition conditions such as the shape of the light-emitting element and the arrangement method of the element during vapor deposition Depending on (expansion portion forming conditions) and the like, the short-circuit prevention groove may not necessarily be formed over the entire side wall forming the expansion portion. Also in these cases, the above-mentioned actions and effects can be obtained.

In addition, the arrangement interval of the plurality of light emitting elements in the extension portion forming step is preferably about 0.1 μm to 500 μm. More preferably, the arrangement interval of the light emitting elements is ideally about 1 μm to 50 μm.
If this interval is too narrow, the above-mentioned extended portion becomes too small and the reflective layer is easily peeled off. In addition, if the distance is too wide, the number of semiconductor chips (light emitting elements) that can be arranged on the arrangement surface is reduced, and the productivity is not sufficiently improved when mass producing the light emitting elements.

In addition, when the reflective layer or the extended portion is formed by vapor deposition or the like, the material of the reflective layer is supplied radially and linearly from the material divergence source, but the above-mentioned arrangement surface is rotated and the position sufficiently separated from the rotation axis. By disposing the diverging position of the vapor deposition source or the like at the (eccentric position), the extended portion can be easily formed over the entire side wall of each light emitting element. However, since this rotational movement may be a relative movement between the divergence position of the reflective layer material and the arrangement surface on which the light emitting elements are arranged, it is arbitrary to move the divergence position or the arrangement surface. Thus, for example, both may be exercised. Moreover, you may replace this rotational motion with the rotational motion whose movable range is about 200-300 degrees, for example.
Such an angle changing means makes it possible to easily and accurately form the extended portion over the entire circumference of the side wall of the light emitting element.

Moreover, when a metal layer formed of aluminum (Al), silver (Ag), or the like is used for the reflective layer, a high reflectance can be obtained. In addition, rhodium (Rh), ruthenium (Ru), platinum (Pt), gold (Au), copper (Cu), palladium (Pd), chromium (Cr), nickel (Ni), cobalt (Co), titanium (Ti), indium (In), molybdenum (Mo), or The reflective layer may be formed from an alloy containing at least one of these metal elements.
In addition to the metal, the reflective layer may be formed of a half mirror, a white inorganic film such as SiO ₂ , a white paint, or the like.

  Moreover, the film thickness of these reflective layers should just be 5 nm or more and 20 micrometers or less. However, the more desirable range of this film thickness is about 30 to 1000 nm, more preferably about 50 to 500 nm, although it depends somewhat on the type of metal. If this film thickness is too thin, the reflectance will be low, and if it is too thick, the film formation costs (cost of metal materials, film formation time, etc.) will be higher than necessary.

In addition, for example, a reflective layer in a form (multilayer structure) in which a reflective layer formed of aluminum, silver, or the like is sandwiched between _two alumina (Al ₂ O ₃ ) layers or the like may be formed. Alumina can be used as a material having excellent translucency, corrosion resistance, and adhesion to metals, sapphire substrates, etc., so by adopting the multilayer structure as described above, reflectance, adhesion, and It is also possible to form an excellent reflective layer over the entire corrosion resistance.

In addition to alumina, TiO ₂ , MgO, MgCO ₃ , Ta ₂ O ₅ , ZnO, In ₂ can be used as materials excellent in adhesion to metals, sapphire substrates, and the like, translucency, and corrosion resistance. Metal oxides such as O ₃ , SiO ₂ , SnO ₂ , ZrO ₂ , ceramics, and the like can be used.

Semiconductor crystal growth substrates include sapphire, spinel, silicon, silicon carbide, zinc oxide, gallium phosphide, gallium arsenide, magnesium oxide, manganese oxide, lithium gallium oxide (LiGaO ₂ ), molybdenum sulfide (MoS), etc. Materials can be used.

In addition, the above operation / effect is at least a binary system and a ternary system represented by Al _x Ga _y In _1-xy N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ x + y ≦ 1). Alternatively, it can be obtained for a group III nitride compound semiconductor light emitting element / light receiving element such as an LED in which a semiconductor layer made of a quaternary semiconductor is stacked. Furthermore, a part of the group III element may be replaced by boron (B) or thallium (Tl), and part or all of the nitrogen (N) may be phosphorus (P), arsenic (As), It may be replaced with antimony (Sb) or bismuth (Bi).

  Hereinafter, the present invention will be described based on specific examples. However, the present invention is not limited to the following examples.

  FIG. 1 is a schematic cross-sectional view of a group III nitride compound semiconductor light emitting device 100 (hereinafter sometimes referred to as “semiconductor light emitting device 100” or simply “device 100”) according to the first embodiment. FIG. The light emitting element 100 has a great feature in the structure of the reflective layer 10 for reflecting light formed on the back surface 11b of the substrate 11 made of sapphire.

  More specifically, the structure of the semiconductor light emitting device 100 of the first embodiment is as follows.

That is, the substrate 11 is formed in a substantially square shape. A buffer layer 12 made of aluminum nitride (AlN) and having a thickness of about 25 nm is provided on the substrate 11, and a high carrier concentration n ⁺ layer made of silicon (Si) -doped GaN and having a thickness of about 4.0 μm. 13 (n-type contact layer 13) is formed. On this high carrier concentration n ⁺ layer 13 (n-type contact layer 13), an n-type cladding layer 14 made of Si-doped n-type GaN and having a thickness of about 0.5 μm is formed.

Then, a multiple quantum well (MQW) in which a well layer 151 made of Ga _0.8 In _0.2 N having a thickness of about 35 mm and a barrier layer 152 made of GaN having a thickness of about 35 mm are alternately stacked on the n-type cladding layer 14. A light emitting layer 15 having a structure is formed. The barrier layer 151 has four layers, and the well layer 152 has five layers. A p-type cladding layer 16 made of p-type Al _0.15 Ga _0.85 N and having a thickness of about 50 nm is formed on the light emitting layer 15. Further, a p-type contact layer 17 made of p-type GaN and having a thickness of about 100 nm is formed on the p-type cladding layer 16.

Further, a translucent positive electrode 18A by metal vapor deposition is formed on the p-type contact layer 17, and a negative electrode 18B is formed on the n ⁺ layer 13. The translucent positive electrode 18A is composed of about 15 mm thick cobalt (Co) bonded to the p-type contact layer 17 and about 60 mm thick gold (Au) bonded to Co. The negative electrode 18B is made of vanadium (V) having a thickness of about 200 mm and aluminum (Al) or an Al alloy having a thickness of about 1.8 μm. On part of the positive electrode 18A, an electrode pad 20 made of vanadium (V) and Au, Al, or an alloy thereof having a film thickness of about 1.5 μm is formed.

  In addition, the back surface 11b of the substrate 11 is provided with an extended portion 10a extending over the entire circumference of the side wall 21a of the light emitting element in the vicinity of the sapphire substrate, as will be described in detail later. Layer 10 is formed.

Next, a method for manufacturing the light emitting element 100 will be described.
The light emitting device 100 was manufactured by vapor phase growth by metal organic chemical vapor deposition (hereinafter abbreviated as “MOVPE”). The gases used were ammonia (NH ₃ ), carrier gas (H ₂ , N ₂ ), trimethylgallium (Ga (CH ₃ ) ₃ ) (hereinafter referred to as “TMG”), trimethylaluminum (Al (CH ₃ ) ₃ ) (Hereinafter referred to as “TMA”), trimethylindium (In (CH ₃ ) ₃ ) (hereinafter referred to as “TMI”), silane (SiH ₄ ) and cyclopentadienyl magnesium (Mg (C ₅ H ₅ ) ₂ ) (Hereinafter referred to as “CP ₂ Mg”).

First, a single crystal substrate 11 having an a-plane cleaned by organic cleaning and heat treatment as a main surface is mounted on a susceptor mounted in a reaction chamber of a MOVPE apparatus. Next, the substrate 11 was baked at a temperature of 1100 ° C. while flowing H ₂ into the reaction chamber at normal pressure.
Next, the temperature of the substrate 11 was lowered to 400 ° C., and H ₂ , NH ₃ and TMA were supplied to form the AlN buffer layer 12 with a film thickness of about 25 nm.

Next, the temperature of the substrate 11 is kept at 1150 ° C., H ₂ , NH ₃ , TMG and silane are supplied, and a high carrier concentration n made of GaN having a film thickness of about 4.0 μm and an electron concentration of 2 × 10 ¹⁸ / cm ^{3. A +} layer 13 was formed.
Next, the temperature of the substrate 11 is maintained at 1150 ° C., and N ₂ or H ₂ , NH ₃ , TMG, TMA and silane are supplied, and the film thickness is about 0.5 μm and the electron concentration is 1 × 10 ¹⁸ / cm ³ . A clad layer 14 made of was formed.

After forming the cladding layer 14, subsequently, N ₂ or H ₂ , NH ₃ , TMG and TMI were supplied to form a well layer 151 made of Ga _0.8 In _0.2 N having a thickness of about 35 mm. Next, N ₂ or H ₂ , NH ₃ and TMG were supplied to form a barrier layer 152 made of GaN having a thickness of about 35 mm. Further, the well layer 151 and the barrier layer 152 were repeatedly formed under the same conditions, and the light emitting layer 15 having the MQW structure was formed.

Next, the temperature of the substrate 11 is maintained at 1100 ° C., N ₂ or H ₂ , NH ₃ , TMG, TMA, and CP ₂ Mg are supplied, and the p-type Al is doped with magnesium (Mg) with a film thickness of about 50 nm. _A clad layer 16 made of _0.15 Ga _0.85 N was formed.
Next, the temperature of the substrate 11 is maintained at 1100 ° C., and N ₂ or H ₂ , NH ₃ , TMG and CP ₂ Mg are supplied, and the contact layer 17 made of p-type GaN doped with Mg is about 100 nm thick. Formed.

Next, an etching mask is formed on the contact layer 17, the mask in a predetermined region is removed, and the portions of the contact layer 17, the cladding layer 16, the light emitting layer 15, the cladding layer 14, and n ⁺ that are not covered with the mask. A part of the layer 13 was etched by reactive ion etching with a gas containing chlorine to expose the surface of the n ⁺ layer 13.
Next, an electrode 18B for the n ⁺ layer 13 and a translucent electrode 18A for the contact layer 17 were formed by the following procedure.

(1) A photoresist is applied, a window is formed in a predetermined region on the exposed surface of the n ⁺ layer 13 by photolithography, and after evacuation to a high vacuum of the order of 10 ⁻⁶ Torr or less, vanadium having a film thickness of about 200 mm (V) and Al having a film thickness of about 1.8 μm were deposited. Next, the photoresist is removed. As a result, an electrode 18B is formed on the exposed surface of the n ⁺ layer 13.
(2) Next, a photoresist is uniformly applied on the surface, and the photoresist in the electrode forming portion on the contact layer 17 is removed by photolithography to form a window portion.
(3) After evacuating the photoresist and the exposed contact layer 17 to a high vacuum of the order of 10 ⁻⁶ Torr or less, a Co film having a film thickness of about 15 mm is formed on the photoresist and the exposed contact layer 17. A film of about 60 mm thick Au is deposited.

(4) Next, the sample is taken out from the vapor deposition apparatus, Co and Au deposited on the photoresist are removed by a lift-off method, and a translucent electrode 18A is formed on the contact layer 17.
(5) Next, in order to form an electrode pad 20 for bonding on a part of the translucent electrode 18A, a photoresist is uniformly applied, and the photoresist in the portion where the electrode pad 20 is formed is applied. Open the window. Next, vanadium (V) and Au, Al, or an alloy thereof were deposited to a thickness of about 1.5 μm by vapor deposition, and deposited on the photoresist by the lift-off method in the same manner as in the step (4). The electrode pad 20 is formed by removing the film made of vanadium (V) and Au, Al, or an alloy thereof.

(6) Thereafter, the sample atmosphere is evacuated with a vacuum pump, O ₂ gas is supplied to set the pressure to a dozen Pa, and in this state, the atmosphere temperature is set to about 550 ° C., and heating is performed for about 3 minutes. The cladding layer 16 was reduced in p-type resistance, alloyed with the contact layer 17 and the electrode 18A, and alloyed with the n ⁺ layer 13 and the electrode 18B.

  In this manner, an assembly (hereinafter referred to as “semiconductor wafer 200”) of a large number of semiconductor chips (light-emitting elements 100 having no reflection layer, side walls (separation grooves), etc.) connected by sharing one sapphire substrate. Is manufactured).

Hereinafter, a method for separating the semiconductor light emitting element 100 and a method for forming the reflective layer 10 will be described with reference to FIGS.
First, the semiconductor wafer 200 manufactured as described above is diced from the surface side where the electrodes are formed to a depth reaching the substrate 11 to form the separation groove 21 (separation groove formation step). The depth of the separation groove with respect to the substrate (depth from the upper surface of the substrate) may be about 10 μm to 20 μm.

  Next, using the polishing machine, the substrate surface 11b of the semiconductor wafer 200 that is half-separated into each light emitting element unit by the separation groove 21 as described above is polished to thin the substrate 11 (thinning step). . Since the thinned semiconductor wafer 200 has the thinnest substrate 11 in the portion of the separation groove 21, the separation groove 21 can be visually recognized when viewed from the substrate surface 11b side.

  Next, the pressure-sensitive adhesive sheet 24 supported by the stainless steel support ring 60 is attached to the surface on which the electrodes are formed, and the configuration shown in FIG. 2 is obtained (attachment step). That is, FIG. 2 is a schematic plan view of the semiconductor wafer 200 (hereinafter referred to as “semiconductor wafer 201”) having the adhesive sheet 24 after the attaching step.

  Next, the substrate surface 11b side is scribed along the separation groove 21 using a scriber to form a dividing line (scribe line) 25 (scribe process). FIG. 3 shows a cross-sectional configuration after forming the dividing line. That is, FIG. 3 is a schematic cross-sectional view showing a cross-sectional shape of the semiconductor wafer 201 of the first embodiment after the scribing process.

  Next, a load is applied to the vicinity of the dividing line by a braking device to separate the semiconductor wafer 201 into units of chips (break process), and the adhesive sheet 24 is stretched approximately isotropically in the vertical and horizontal directions (expanded). The process shown in FIG. That is, FIG. 4 is a schematic cross-sectional view of the semiconductor wafer 201 after the expanding process. At this time, the width of the gap 25a between the chips was about 10 μm.

Next, the reflective layer 10 is laminated on the substrate surface 11b by vapor deposition.
FIG. 5 is a schematic plan view of the semiconductor wafer 201 after the expansion process (before the vapor deposition process) in FIG. 4 as viewed from the substrate side (substrate surface 11b side). After execution of the above expanding process, as shown in FIG. 5, the semiconductor wafer 201 is slightly expanded vertically and horizontally.

  Hereinafter, as shown in FIG. 5, the substrate surface 11 b is assumed to be an xy plane (z = 0), and a right-handed coordinate system in which the origin O is placed at the center of the support ring 60 is used. Also, let θ be the extra latitude (polar distance) measured from the positive z-axis direction, and let φ be the longitude measured from the xz plane (y = 0) to the yz plane (x = 0). At this time, it is desirable that the position coordinates (r, θ, φ) of the vapor deposition source by polar coordinate display be set so as to satisfy the following expressions (1) to (3).

  Here, r is the distance from the origin O of the vapor deposition source, and R is the radius of the support ring 60. Further, unlike the example of FIG. 5, when the size of the semiconductor wafer 201 is significantly smaller than the size of the support ring 60, the formula (1) does not necessarily have to be satisfied.

r ≧ R (1)
π / 30 ≦ θ ≦ π / 3 (2)
0 ≦ φ ≦ 2π (3)

  For example, first, the position of the vapor deposition source is fixed at (r, θ, φ) = (4R, π / 4, 0). Then, with the support ring 60 fixed in the coordinate system, the position of the vapor deposition source is rotated once (0 ≦ φ ≦ 2π) around the z axis. If the reflective layer 10 is formed on the substrate surface 11b of each light emitting element 100 by the vacuum vapor deposition process while moving the position of the vapor deposition source using such an angle varying means, the expansion portion 10a is also simultaneously formed with the structure shown in FIG. In this manner, the light emitting element 100 can be formed over the entire circumference of the side wall 21a.

  However, such a rotational movement is meaningful in that the reflective layer forming surface (substrate surface 11b) and the vapor deposition source move relatively, so that the vapor deposition source remains fixed in the coordinate system and the support ring 60 is moved. May be rotated about the z axis as a rotation axis. Equivalent actions and effects can be obtained by such a method.

As described above, the reflective layer 10 including the extended portion 10a shown in FIG. 1 was formed (reflective layer forming step).
Thus, by forming the extended portion 10a on the side wall 21a of the element, the reflective layer 10 is strongly adhered to the substrate 11 even in the vicinity of the periphery of the reflective layer forming surface (substrate surface 11b). Even when an adhesive sheet was attached to the side having the substrate 10 (substrate surface 11 b), the reflective layer 10 did not peel from the lower surface (substrate surface 11 b) of the substrate 11. Thereby, generation | occurrence | production of the inferior goods by peeling off the reflection layer 10 during manufacture was eliminated completely, and productivity improved significantly.

  The formation of the reflective layer 10 is preferably performed after the stretching process (expanding process), but the vapor deposition (reflective layer forming process) is performed after the break process, omitting the expanding process. May be.

  For example, if the width and depth of the dividing line 25 (scribe line) are each about 1 μm or more, the reflective layer of the light emitting device 100 can be obtained without performing the stretching process (expanding process) after the break process as described above. The degree of adhesion of the reflective layer 10 (expansion portion 10a) with the substrate in the vicinity of the outer periphery of the formation surface (substrate surface 11b) can be improved to such an extent that at least a delamination prevention effect can be obtained.

Further, in order to prevent a short circuit due to the expansion of the extended portion 10a, at least a part of the side wall 21a of the light emitting element 100 may be formed with a short circuit preventing groove for limiting the expansion. FIG. 6 is a schematic cross-sectional view of the group III nitride compound semiconductor light emitting device 101 of the second embodiment provided with such a short-circuit prevention groove H.
In this way, by forming the short-circuit prevention groove H, the metal layer (expansion portion 10a) constituting the reflection layer 10 does not extend to the vicinity of the semiconductor layer in the light emitting element side wall 21a. Thereby, the short circuit with a reflective layer and an electrode can be prevented reliably.

  The short-circuit prevention grooves H are preferably provided at all locations where the extended portion 10a is formed. However, the reflection layer formation such as the shape of the light-emitting element and the arrangement method of the element during vapor deposition is preferably performed. Depending on the film conditions (expansion part formation conditions) and the like, it is not always necessary to form the short-circuit prevention groove over the entire part where the extension part is formed.

  In each of the above embodiments, the reflective layer 10 of the light emitting elements 100 and 101 has a single layer structure, but the reflective layer formed on the substrate surface has a multilayer structure having at least one metal layer. It may be configured. Moreover, you may employ | adopt the structure which makes this metal layer itself multilayer structure. With these configurations, it is possible to further improve the adhesion between the substrate and the reflective layer while ensuring high reflectivity and strong corrosion resistance of the reflective layer.

Further, in each of the above embodiments, the light emitting elements 100 and 101 have the substrate 11, but the substrate is not necessary because it is not an essential component of the present invention. The reflective layer 10, a half mirror in addition to the metal layer, SiO ₂ or the like white inorganic film can also be formed from a white coating or the like.

In each of the above embodiments, the light emitting layer 15 of the light emitting elements 100 and 101 has an MQW structure, but a single layer made of SQW, Ga _0.8 In _0.2 N, or the like, or a quaternary element having an arbitrary mixed crystal ratio, A ternary or binary AlGaInN may be used. Further, Mg is used as the p-type impurity, but group II elements such as beryllium (Be) and zinc (Zn) can be used.

  In addition, the present invention can be used for a light receiving element as well as an LED or LD light emitting element.

1 is a schematic cross-sectional view of a group III nitride compound semiconductor light emitting device 100 according to a first embodiment of the present invention. The typical top view which looked at semiconductor wafer 201 after the pasting process (before scribe process) of the 1st example of the present invention from the substrate side (board surface 11b side). The typical sectional view of semiconductor wafer 201 explaining the scribing process of the 1st example of the present invention. The typical sectional view of semiconductor wafer 201 explaining the break process and the expansion process of the 1st example of the present invention. The typical top view which looked at the semiconductor wafer 201 after the expansion process (before vapor deposition process) of 1st Example of this invention from the board | substrate side (board | substrate surface 11b side). FIG. 3 is a schematic cross-sectional view of a group III nitride compound semiconductor light emitting device 101 according to a second embodiment of the present invention.

Explanation of symbols

100, 101 ... LED (Group III nitride compound semiconductor light emitting device)
DESCRIPTION OF SYMBOLS 201 ... Semiconductor wafer fixed on the adhesive sheet 10 ... Reflective layer (example of single layer structure)
DESCRIPTION OF SYMBOLS 10a ... Extension part 11 ... Board | substrate 11b ... Board | substrate surface 12 ... Buffer layer 13 ... N-type contact layer 14 ... N-type clad layer 15 ... Light emitting layer (MQW light emitting layer)
DESCRIPTION OF SYMBOLS 16 ... p-type cladding layer 17 ... p-type contact layer 18A ... Positive electrode metal layer 18B ... Negative electrode metal layer 21 ... Separation groove 21a ... Side wall of light emitting element 24 ... Adhesive sheet 25 ... Dividing line (scribe line)
25a: Gap (interval) between light emitting elements

Claims (4)

In a light emitting device in which a plurality of semiconductor layers made of a group III nitride compound semiconductor are stacked on an insulating substrate by crystal growth,
A reflective layer containing a metal that reflects light emitted from the light emitting layer is formed on the back surface of the insulating substrate;
The reflective layer has an extended part formed by extending a part thereof to a part of a side wall of the insulating substrate;
The Group III nitride compound semiconductor light-emitting device, wherein the side wall has a short-circuit preventing groove for limiting the expansion. The extended portion is formed over substantially the entire circumference of the reflective layer forming surface,
2. The group III nitride compound semiconductor light-emitting element according to claim 1, wherein the short-circuit prevention groove is formed over substantially the entire circumference of the side wall. 3. The group III nitride compound semiconductor light-emitting element according to claim 1, wherein the reflective layer has a multilayer structure including at least one metal layer. The group III nitride compound semiconductor light-emitting device according to claim 3, wherein the extended portion is formed by only a part of the layers constituting the multilayer structure.

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