WO2007034834A1 - Nitride semiconductor light-emitting device and method for manufacturing same - Google Patents

Nitride semiconductor light-emitting device and method for manufacturing same Download PDF

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Publication number
WO2007034834A1
WO2007034834A1 PCT/JP2006/318641 JP2006318641W WO2007034834A1 WO 2007034834 A1 WO2007034834 A1 WO 2007034834A1 JP 2006318641 W JP2006318641 W JP 2006318641W WO 2007034834 A1 WO2007034834 A1 WO 2007034834A1
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Prior art keywords
layer
nitride
semiconductor light
based semiconductor
type semiconductor
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PCT/JP2006/318641
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French (fr)
Japanese (ja)
Inventor
Hiroshi Osawa
Takashi Hodota
Original Assignee
Showa Denko K.K.
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Priority claimed from JP2005272424A external-priority patent/JP5047482B2/en
Priority claimed from JP2005272574A external-priority patent/JP4920223B2/en
Application filed by Showa Denko K.K. filed Critical Showa Denko K.K.
Priority to EP06810337.3A priority Critical patent/EP1928031B1/en
Priority to CN2006800342708A priority patent/CN101268560B/en
Priority to US12/067,227 priority patent/US7939845B2/en
Publication of WO2007034834A1 publication Critical patent/WO2007034834A1/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/40Materials therefor
    • H01L33/405Reflective materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0093Wafer bonding; Removal of the growth substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26Materials of the light emitting region
    • H01L33/30Materials of the light emitting region containing only elements of group III and group V of the periodic system
    • H01L33/32Materials of the light emitting region containing only elements of group III and group V of the periodic system containing nitrogen
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/38Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/40Materials therefor
    • H01L33/42Transparent materials

Definitions

  • Nitride-based semiconductor light-emitting device and manufacturing method thereof Nitride-based semiconductor light-emitting device and manufacturing method thereof
  • the present invention relates to a nitride-based semiconductor light-emitting device and a method for manufacturing the same.
  • GaN-based compound semiconductor materials have attracted attention as semiconductor materials for short-wavelength light emitting devices.
  • GaN-based compound semiconductors include sapphire single crystals, various oxide substrates and III-V compounds, and metal organic vapor phase chemical reaction method (MO CVD method) and molecular beam epitaxy method (MBE). Method).
  • a sapphire single crystal substrate can form a good nitride semiconductor on it by forming a buffer layer such as A1N or AlGaN that has a lattice constant more than 10% different from that of GaN. Widely used.
  • a buffer layer such as A1N or AlGaN that has a lattice constant more than 10% different from that of GaN.
  • an n-type semiconductor layer, a light emitting layer, and a p-type semiconductor layer are stacked in this order. Since the sapphire substrate is an insulator, the element structure generally includes a positive electrode formed on the p-type semiconductor layer and a negative electrode formed on the n-type semiconductor layer.
  • a face-up method that uses a transparent electrode such as ITO as the positive electrode to extract light from the p-type semiconductor side
  • a flip-chip method that uses a highly reflective film such as Ag as the positive electrode to extract light from the sapphire substrate. is there.
  • the sapphire single crystal substrate has several problems because it is a generally used force insulator.
  • the n-type semiconductor layer is exposed by removing the light-emitting layer by etching or the like to form the negative electrode, the area of the light-emitting layer is reduced only by the negative electrode portion, and the output is reduced accordingly.
  • the current flow is in the horizontal direction, creating a high current density locally, and the element generates heat.
  • the thermal conductivity of the sapphire substrate is low, the generated heat does not diffuse and the temperature of the device rises.
  • a conductive substrate is bonded to an element in which an n-type semiconductor layer, a light emitting layer, and a p-type semiconductor layer are stacked in this order on a sapphire single crystal substrate, and then the sapphire single crystal substrate
  • a method is disclosed in which the positive electrode and the negative electrode are arranged one above the other (for example, Patent Document 1).
  • Patent Document 2 a method of manufacturing by a method in which a conductive substrate is not bonded is disclosed (for example, Patent Document 2).
  • Methods for bonding conductive substrates include a method of using a low-melting-point metal compound such as AuSn as an adhesive, activated bonding in which the bonding surface is activated and bonded using argon plasma or the like in a vacuum, etc. There is a way. In these methods, the adhesion surface is required to be extremely smooth, and when there is a foreign substance such as a particle, the portion floats, and there is a possibility that the adhesion cannot be performed satisfactorily. It was difficult.
  • a low-melting-point metal compound such as AuSn
  • Patent Document 1 Japanese Patent No. 3511970
  • Patent Document 2 JP 2004-47704 A
  • Patent Document 3 Japanese Patent Laid-Open No. 2003-309286 Disclosure of the invention
  • the present invention has been made in view of the above circumstances, and has excellent strength characteristics of a support substrate, and a semiconductor device with improved light extraction efficiency with less reflected light from the support substrate and a method for manufacturing the same
  • the purpose is to provide.
  • the present inventors have at least an n-type semiconductor layer, a light emitting layer, a P-type semiconductor layer, a metal film layer, and a metal plate laminated in this order.
  • the structure is partially formed on the metal film layer and the metallic metal plate-type semiconductor layer, thereby providing excellent substrate strength and low reflected light, that is, light extraction efficiency.
  • the inventors have found that it is possible to produce a good device, and have completed the present invention.
  • the effect of the present invention is further exhibited by forming the metal film layer and the metal sheet in a lattice shape.
  • the present invention relates to the following.
  • a nitride-based semiconductor light-emitting device in which at least an n-type semiconductor layer, a light-emitting layer, a p-type semiconductor layer, a metal film layer, and a metal plating plate are laminated on a substrate, the metal film layer, A nitride-based semiconductor light-emitting device, wherein a metallic metal plate is partially formed on the P-type semiconductor layer.
  • nitride-based semiconductor light-emitting device in which at least an n-type semiconductor layer, a light-emitting layer, a p-type semiconductor layer, a metal film layer, and a metal metal plate are laminated on a substrate, the metal film layer and the metal metal plate.
  • the area of the metal film layer and the metal plate formed on the p-type semiconductor layer is in the range of 10 to 90% in terms of the area ratio with respect to the upper surface of the P-type semiconductor layer.
  • n-type semiconductor layer, the light-emitting layer, and the p-type semiconductor layer formed on the substrate are divided into element units in advance, and any one of (1) to (3) A nitride semiconductor light emitting device according to claim 1.
  • the ohmic contact layer has a thickness of 0. Inn!
  • a nitride-based semiconductor light-emitting device according to any one of (1) to (10), wherein a metal adhesion layer is formed between the metal film layer and the metal metal plate.
  • a nitride-based semiconductor light-emitting device including a stacking step of stacking at least an n-type semiconductor layer, a light-emitting layer, a p-type semiconductor layer, a metal film layer, and a metallic metal plate on a substrate, The method for producing a nitride-based semiconductor light-emitting device, wherein the metal film layer and the metal plate are partially formed on the p-type semiconductor layer.
  • the n-type semiconductor layer is attached to the substrate via a notch layer.
  • the present inventors have found that at least an n-type semiconductor layer, a light emitting layer, a p-type semiconductor layer, a metal film layer, and a metal plate are laminated in this order.
  • the metal film layer and the metal plating plate are partially formed on the P-type semiconductor layer, and the metal film layer and the metal film layer are formed on the p-type semiconductor layer.
  • the metal film layer and the plated metal plate are formed on the P-type semiconductor layer so as to intersect in plan view, and the metal film layer and the plated metal plate are not formed on the p-type semiconductor layer.
  • the second aspect of the present invention relates to the following.
  • a nitride-based semiconductor light-emitting device in which at least an n-type semiconductor layer, a light-emitting layer, a p-type semiconductor layer, a metal film layer, and a metal plating plate are stacked in this order on a substrate, the metal film layer And the plating metal plate is partially formed on the p-type semiconductor layer, and the metal film layer and the plating metal plate are formed on the p-type semiconductor layer.
  • the metal film layer and the metal plate that are formed on the p-type semiconductor layer are provided in an intersecting state in plan view, and the metal film layer and the metal plate are arranged on the p-type semiconductor layer.
  • the nitride-based semiconductor light-emitting device according to (1) wherein the light-transmitting material layer is provided on a small portion where a metal plate is formed.
  • (3) The translucent material layer is laminated on the p-type semiconductor layer, and the translucent material layer is partially surrounded by at least the metal film layer and a metal plate.
  • the translucent material layer is laminated on the p-type semiconductor layer via a transparent electrode, and the translucent material layer is at least partially surrounded by the metal film layer and the metal plate.
  • nitride-based material according to any one of (1) to (4), wherein the light-transmitting material layer is made of any one of a light-transmitting resin, a silica-based material, and a titania-based material.
  • Semiconductor light emitting device is made of any one of a light-transmitting resin, a silica-based material, and a titania-based material.
  • ohmic contact layer is made of a single metal of Pt, Ru, Os, Rh, Ir, Pd, Ag, or Z or an alloying force thereof.
  • the film thickness of the ohmic contact layer is 0.
  • a nitride-based semiconductor light-emitting device according to any one of (1) to (13), wherein a metal adhesion layer is formed between the metal film layer and the metal metal plate.
  • the plating adhesion layer contains 50 wt% or more of the same composition as the main component occupying 50 wt% or more of the plating forming the plating metal plate Semiconductor light emitting device.
  • a method for manufacturing a nitride-based semiconductor light-emitting element including a stacking step of stacking at least an n-type semiconductor layer, a light-emitting layer, a p-type semiconductor layer, a metal film layer, and a metal alloy plate on a substrate, In the stacking step, the metal film layer and the plating metal plate are partially formed on the p-type semiconductor layer, and the metal film layer and the plating metal plate are formed on the p-type semiconductor layer.
  • a method for producing a nitride-based semiconductor light-emitting device comprising: forming a light-transmitting material layer on the inner portion.
  • the stacking step is performed by attaching the n-type semiconductor layer on a substrate via a nofer layer, and after the stacking step is completed, the substrate and the buffer layer are removed, thereby removing the n-type semiconductor layer.
  • the metal film layer in the structure in which at least an n-type semiconductor layer, a light-emitting layer, a p-type semiconductor layer, a metal film layer, and a metal plate are laminated in this order, the metal film layer , And metal plate force
  • the structure is partially formed on the p-type semiconductor layer.
  • the effect of the present invention can be further exerted by forming the metal film layer and the metallic metal plate in a lattice shape.
  • the nitride-based semiconductor light-emitting device of the present invention in a structure in which at least an n-type semiconductor layer, a light-emitting layer, a P-type semiconductor layer, a metal film layer, and a metal plate are stacked in this order, The metal film layer and the metal plate are partially formed on the P-type semiconductor layer, and the metal film layer and the metal plate are formed on the p-type semiconductor layer.
  • the light transmitting material layer is formed on the part.
  • the light emission output of the nitride-based semiconductor light-emitting device is improved. This is because the critical angle is increased by using a material having a high refractive index of 1.4 to 2.6 as the translucent material. This is because it is more totally reflected. Note that the upper limit is 2.6, because the refractive index of GaN is 2.6, so there is no need to increase it further. If you make it bigger. Translucent material force It becomes difficult to extract light.
  • a nitride-based semiconductor light-emitting device having excellent substrate strength and low reflected light, that is, high light extraction efficiency and high light emission output can be obtained by the above configuration.
  • the nitride-based semiconductor light-emitting device of the present invention particularly has a metal film layer and a metal plate formed on the P-type semiconductor layer so as to intersect each other in plan view, and on the p-type semiconductor layer.
  • the effect of the present invention is further exhibited by forming the translucent material layer in the portion where the metal film layer and the metal plate are formed.
  • FIG. 1 is a view showing an example of a nitride-based compound semiconductor light-emitting device of the present invention, and is a schematic view showing a cross-sectional structure.
  • FIG. 2 is a diagram for explaining a method for producing a nitride-based compound semiconductor light-emitting device of the present invention, and is a schematic diagram showing a cross-sectional structure.
  • FIG. 3 is a plan view showing a state before division of the nitride-based compound semiconductor light-emitting device of the present invention.
  • FIG. 4 is a plan view showing a state before division of the nitride-based compound semiconductor light-emitting device of the present invention.
  • FIG. 5 is a view showing an example of the nitride-based compound semiconductor light-emitting device of the present invention, and is a schematic view showing a cross-sectional structure.
  • FIG. 6 is a diagram for explaining a method for producing a nitride-based compound semiconductor light-emitting device of the present invention, and is a schematic diagram showing a cross-sectional structure.
  • FIG. 7 is a plan view showing a state before division of the nitride-based compound semiconductor light-emitting device of the present invention.
  • FIG. 8 is a plan view showing a state before division of the nitride-based compound semiconductor light-emitting device of the present invention.
  • FIG. 9 is a plan view showing a state before division of the nitride-based compound semiconductor light-emitting device of the present invention.
  • Nitride-based semiconductor light emitting device 101, 201 ⁇ Sapphire substrate (substrate), 102, 202 ⁇ Buffer layer, 103, 203 ⁇ ⁇ -type semiconductor layer, 104, 204 ⁇ ⁇ Luminescent layer, 105, 205 ⁇ ⁇ type semiconductor layer, 106, 206 ⁇ Transparent electrode, 107, 207 ⁇ Omic contact layer, 108, 208 ⁇ Reflective layer, 1 09, 209 ⁇ Plating adhesion layer, 110, 210 ⁇ plating metal plate, 111 ⁇ positive electrode, 114, 214 ⁇ translucent material layer
  • FIGS. 1 to 4 are diagrams for explaining a nitride-based semiconductor light-emitting device of this embodiment.
  • FIG. 1 shows a ⁇ -type semiconductor layer, a light-emitting layer, and a ⁇ -type semiconductor layer.
  • FIG. 2 is a schematic cross-sectional view showing an example of the nitride-based semiconductor light-emitting device of the present invention in which an ohmic contact layer, a reflective layer, and a plating adhesion layer are formed thereon, and a plating metal plate is formed thereon. is there.
  • FIG. 2 is a diagram for explaining an example of a method for manufacturing a nitride-based semiconductor light-emitting device.
  • FIG. 1 A nitride-based semiconductor layer is formed before the upper and lower electrode arrangement type structure as shown in FIG.
  • a nitride-based semiconductor layer is formed.
  • the two-dot chain lines shown in FIGS. 1 and 2 indicate the ohmic contact layer, the reflective layer, the plating adhesion layer, the plating metal plate, and the positive electrode (positive electrode 111 in FIG. 1) formed in a crossing state in plan view.
  • Show a part of 3 and 4 are plan views for explaining a method for manufacturing a nitride-based semiconductor light-emitting device, and the nitride-based semiconductor light-emitting device of the present invention is divided into device units along dicing lines DL1, DL2. can get.
  • the nitride-based semiconductor light-emitting device 1 of the present embodiment includes an n-type semiconductor layer 103, a light-emitting layer 104, a p-type semiconductor layer 105, a transparent electrode 106, an ohmic contact layer 107 (metal film layer), a reflective layer 108, A plating adhesion layer 109 and a plating metal plate 110 are laminated in this order (vertical direction in FIG. 1).
  • the reflective layer 108 and the plating adhesion layer are formed on the transparent electrode 106.
  • the layer 109 and the metal plating plate 110 are laminated in this order, and these layers are partially formed on the p-type semiconductor layer 105 so as to cross in a cross shape. That is, when viewed from the direction of the cross-sectional line A—A shown in FIG. 3, the ohmic contact layer 107, the reflective layer 108, and the adhesion adhesion layer in the horizontal width direction (left-right direction in FIG. 1) of the example shown in FIG. Each width force of 109 and metal plating plate 110 is formed to be narrower than the width of transparent electrode 106, for example, about 30%.
  • each layer of the ohmic contact layer 107, the reflective layer 108, the adhesive adhesion layer 109, and the metallic metal plate 110 (the vertical direction in FIG. 1) is almost the same as the width of the transparent electrode 106. Is formed.
  • the horizontal width and vertical width of the ohmic contact layer 107, the reflective layer 108, the plating adhesion layer 109, and the plating metal plate 110 shown in FIG. The relationship is the same as described above.
  • the negative electrode 113 is formed on the lower surface of the n-type semiconductor layer 103 via the transparent electrode 112, and the positive electrode 111 is formed on the upper surface of the metal plating plate 110. It is schematically configured.
  • a buffer layer 202 is formed on a sapphire substrate (substrate) 201, and an n-type semiconductor layer 203, a light-emitting layer 204, and a p-type semiconductor layer 205 are stacked via the buffer layer 202 to form a nitride-based semiconductor layer.
  • a transparent electrode 206 is formed on the nitride-based semiconductor thus formed (that is, on the p-type semiconductor layer 205).
  • These n-type semiconductor layer 203, light-emitting layer 204, p-type semiconductor layer 205, and transparent electrode 206 have the same width as shown in FIG. In addition, the vertical width is almost the same size.
  • an ohmic contact layer 207 and a reflective layer 208 are laminated in this order.
  • the ohmic contact layer 207 and the reflective layer 208 of this embodiment are partially formed on the transparent electrode 206 in a lattice pattern in plan view so as to intersect each element vertically and horizontally as in the example shown in FIG. Form.
  • the pattern formation of the ohmic contact layer 207 and the reflective layer 208 is performed using a known photolithography technique or a lift-off technique described later by using a resist material.
  • the plating metal plate 210 is formed by applying plating.
  • the metal plate 210 according to the present embodiment is formed by forming an insulating protective film on portions other than the ohmic contact layer 207 and the reflective layer 208 to be plated, or by performing a plating or a thick film resist material for plating. Using this, only the pattern of the ohmic contact layer 207 and the reflective layer 208 is measured by a known photolithography technique or lift-off technique. Before the plating process, it is preferable to form the plating adhesion layer 209 in order to improve the adhesion between the plating metal plate 210 and the reflective layer 208 (metal film layer). Further, the adhesion adhesion layer 209 may be omitted.
  • the sapphire substrate 201 is peeled off, and the buffer layer 202 is further removed.
  • a positive electrode 111 and a negative electrode 112 shown in FIG. 1 are formed by forming a positive electrode and a negative electrode. Then, by dividing the metal plate 210 along the dicing lines DL1 and DL2 as shown in FIG. 3, the nitride semiconductor light emitting device 1 shown in FIG. 1 can be obtained.
  • the nitride-based semiconductor light-emitting device of this embodiment includes an ohmic contact layer 107, a reflective layer 108, and a mesh adhesion layer 109 that are stacked on a p-type semiconductor layer 105 via a transparent electrode 106.
  • Each layer of the metal plating plate 110 is partially formed so as to cross the upper surface 105a of the p-type semiconductor layer 105 via the transparent electrode 106 in a cross shape.
  • the area of the ohmic contact layer 107, the reflective layer 108, the plating adhesion layer 109, and the plating metal plate 110 that is, the area of the bottom 107a of the ohmic contact layer 107 is 10% of the area of the upper surface 105a of the p-type semiconductor layer 105. It is preferable that the area ratio is in a range of ⁇ 90%.
  • the bottom 107a of the ohmic contact layer 107 is formed with respect to the upper surface 105a of the p-type semiconductor layer 105, that is, the same size as the upper surface 105a.
  • Transparent electrode 1 The width of the upper surface 106a of 06 is about 30% in the width direction (left and right direction in FIG. 1).
  • a metallic metal plate 210 which is formed in a lattice shape in a plan view intersecting vertically and horizontally for each element.
  • the contact layer 207 and the reflective layer 208 are formed with a width of about 30% in each of the vertical and horizontal directions on each element, and the area ratio of each element unit on the p-type semiconductor layer 205, that is, the area ratio on the transparent electrode 206 About 50%.
  • the nitride-based semiconductor light-emitting device of the present invention intersects the metal plate 310 and the ohmic contact layer 307 formed in a lattice shape in plan view by intersecting each device vertically and horizontally.
  • the portion 320 may have a shape having a bulging portion 311 where the intersecting portion slightly swells in a substantially circular shape when viewed from above.
  • a sapphire single crystal (Al 2 O 3) is used for the sapphire substrate 201 used in the above manufacturing process!
  • LiGaO single crystal LiGaO single crystal, oxide single crystal such as MgO single crystal, Si single crystal, SiC single crystal, Ga
  • a known substrate material such as As single crystal can be used without any limitation. If a conductive substrate such as SiC is used, it is possible to fabricate a device in which the positive and negative electrodes are arranged one above the other without using the substrate peeling. In that case, the buffer layer 202, which is an insulator, should be used. Therefore, the crystal of the nitride-based semiconductor layer grown on the sapphire substrate 201 deteriorates, and a good semiconductor element cannot be formed. In the present invention, the sapphire substrate 201 is peeled even when conductive SiC or Si is used.
  • the noffer layer 202 is generally used to improve the crystallinity of A1N or AlGaN isotropic GaN having an intermediate lattice constant.
  • A1N and AlGaN are used without any limitation.
  • the nitride-based semiconductor has a heterojunction structure including, for example, an n-type semiconductor layer 103, a light emitting layer 104, and a p-type semiconductor layer 105.
  • semiconductors represented by the general formula Al In Ga _ _ N (0 ⁇ x ⁇ l, 0 ⁇ y ⁇ l, x + y ⁇ l) as nitride-based semiconductor layers.
  • Nitride semiconductors represented by the general formula Al InyGa__ (0 ⁇ ⁇ 1, 0 ⁇ y ⁇ l, x + y ⁇ 1) can be used without any limitation.
  • the growth method of the nitride-based semiconductor is not particularly limited, and organometallic chemical vapor deposition (MO CVD), hydride vapor deposition (HPVE), molecular beam epitaxy (MBE), etc. All methods known to grow system semiconductors can be applied.
  • MO CVD organometallic chemical vapor deposition
  • HPVE hydride vapor deposition
  • MBE molecular beam epitaxy
  • a preferred growth method is the MOCVD method, which has the advantages of film thickness controllability and mass productivity.
  • Trimethylgallium (TMG) or triethylgallium (TEG) as the Ga source trimethylaluminum (TMA) or triethylaluminum (TEA) as the A1 source, trimethylindium (TMI) or triethylindium (TEI) as the In source, Ammonia (NH 3), hydrazine (NH 2), etc. are used as the N source that is a Group V material.
  • n-type has monosilane (SiH) or disilane (SiH).
  • germane (GeH) as the Ge source
  • a known technique such as an etching method or a laser cutting method can be used without any limitation.
  • the laser lift-off method it is preferable that the sapphire substrate 101 is not damaged when the nitride-based semiconductor is divided from the viewpoint of good substrate peeling. Therefore, when dividing by the etching method, it is preferable to use a method in which the etching rate is low for the nitride substrate 101 and the etching rate is low for the sapphire substrate 101.
  • dividing with a laser it is preferable to use a laser with a wavelength of 300 to 400 nm because of the difference in absorption wavelength between GaN and sapphire.
  • a platinum group such as Pt, Ru, Os, Rh, Ir, and Pd, or Ag. More preferred are Pt, Ir, Rh and Ru, with Pt being particularly preferred.
  • the use of Ag for the ohmic contact layer 106 is preferred for obtaining good reflection, but the contact resistance is larger than Pt. Therefore, for applications that do not require much contact resistance Can also use Ag.
  • the ohmic contact layer 107 can be made of Ti, V, Cr, Co, Ni, Zr, Nb, Mo, Hf, Ta, W, etc. in addition to the above materials!
  • the thickness of the ohmic contact layer 107 is preferably 0.1 nm or more in order to stably obtain a low contact resistance. More preferably, it is 1 nm or more, and uniform contact resistance can be obtained. Further, on the ohmic contact layer 107, a reflective layer 108 having an Ag alloy isotropic force may be provided on the ohmic contact layer 107. Pt, Ir, Rh, Ru, OS, Pd, etc. have lower reflectivity from visible light to ultraviolet region than Ag alloy. Therefore, light from the light emitting layer 104 is not sufficiently reflected, and it is difficult to obtain an element with high light emission output.
  • the ohmic contact layer 107 is thinly formed so that light can be sufficiently transmitted, and the reflection layer 108 made of an Ag alloy or the like is formed to obtain reflected light, good ohmic contact can be obtained and output can be obtained. It is possible to manufacture a device having a high height.
  • the film thickness of the ohmic contact layer 107 is preferably 30 nm or less. More preferably, it is 10 nm or less.
  • the method for forming the ohmic contact layer 107 and the reflective layer 108 is not particularly limited, and a known sputtering method or vapor deposition method can be used.
  • the thickness of the reflective layer 108 is preferably 0.1 nm or more in order to obtain good reflectance. More preferably, it is lnm or more, and good reflectance can be obtained. In addition, Ag alloy is prone to migration, so it is better to make it thinner, although it can be protected by glazing. Therefore, the film thickness is more preferably 200 nm or less.
  • the method for forming the reflective layer 108 is not particularly limited, and a known sputtering method or vapor deposition method can be used.
  • a known sputtering method or vapor deposition method can be used.
  • the sputtering method since the sputtered particles collide with the substrate surface with high energy to form a film, a film having high adhesion can be obtained. Therefore, it is more preferable to use the sputtering method.
  • the transparent electrode 106 known materials such as ITO (In Sn—O alloy), IZO (In—Zn—O alloy), AZO (Zn —Al—O alloy) can be used without any limitation. .
  • the thickness of the transparent electrode 106 is preferably set to lOOnm or more in order to stably obtain a low contact resistance. Light is also absorbed by the transparent electrode 106, so if it is too thick, the output will decrease. Therefore, the transparent electrode 106 is preferably 1 ⁇ m or less.
  • the transparent electrode 106 is preferably formed on the entire surface on the p-type semiconductor layer 105 from the viewpoint of current diffusion.
  • a method for forming the transparent electrode 106 is not particularly limited, and a known sputtering method or vapor deposition method can be used. Furthermore, annealing at a temperature of 100 ° C to 300 ° C after film formation is effective in reducing transmittance and sheet resistance.
  • a plating adhesion layer 109 may be formed immediately below the plating metal plate 110, that is, between the plating metal plate 110 and the reflective layer 108.
  • the adhesion of the plating adhesion layer 109 is improved if it contains a large amount of substances mainly contained in the plating composition depending on the plating used for the plating metal plate 110.
  • the plating adhesion layer 109 preferably contains 50% by weight or more of the same composition as the main component occupying 50% by weight or more of the plating metal plate 110.
  • NiP plating when used for the plating metal plate 110, it is preferable to use a Ni-based alloy for the plating adhesion layer. More preferably, a NiP alloy is used.
  • a Cu plating for the plating metal plate 110 when using a Cu plating for the plating metal plate 110, it is preferable to use a Cu-based alloy for the plating adhesion layer. More preferably, Cu is used.
  • the thickness of the adhesion adhesion layer 109 is preferably 0.1 nm or more in order to obtain good adhesion. More preferably, it is 1 nm or more, and uniform adhesion can be obtained.
  • the thickness of the adhesion adhesion layer 109 is not particularly limited, but is preferably 2 ⁇ m or less from the viewpoint of productivity.
  • the method for forming the adhesion adhesion layer 109 is not particularly limited, and a known sputtering method or vapor deposition method can be used. In the sputtering method, the sputtered particles have high energy and collide with the substrate surface to form a film, so that a film with high adhesion can be obtained. Therefore, it is more preferable to use the sputtering method.
  • Either the electroless plating or the electrolytic plating can be used for the plating metal plate 110.
  • the thickness of the metal plating plate 110 is preferably 10 m or more in order to maintain the strength as a substrate. Further, if the plating metal plate 110 is too thick, peeling of the plating tends to occur and the productivity is lowered, so that the thickness is preferably 200 m or less.
  • an electroless plating treatment method using a nickel bath such as nickel sulfate or nickel chloride and a phosphorus source such as hypophosphite is used as the plating bath.
  • a commercially available product suitable as a plating bath for use in the electroless plating method is Muden HDX manufactured by Uemura Kogyo. It is preferable that ⁇ of the plating bath when performing the electroless plating treatment is 4 to 10 and the temperature is 30 to 95 ° C.
  • an electrolytic plating treatment method using a Cu source such as copper sulfate as a plating bath can be employed.
  • the pH of the plating bath during the electro plating treatment is preferably 2 or less under strong acid conditions.
  • the temperature is more preferably 10 to 50 ° C, more preferably room temperature (25 ° C).
  • the current density is preferably 0.5 to 10 AZdm2, more preferably 2 to 4 AZdm2.
  • a leveling agent to smooth the surface. Examples of commercially available products used for the leveling agent include ETN-1A and ETN-1B manufactured by Uemura Kogyo.
  • Heat treatment is preferably performed to improve the adhesion of the metal sheet 110 obtained as described above.
  • the heat treatment temperature should be in the range of 100 to 300 ° C. This is preferable from the viewpoint of improving adhesion. If the heat treatment temperature is at least the above range, the adhesiveness may be further improved, but the ohmic property may be lowered.
  • the ohmic contact layer 107, the reflective layer 108 (metal film layer), and the metal plating plate 110 are connected to the p-type semiconductor layer 105. There are several methods that can be used to form partly.
  • a known film is used as a method of partially forming the ohmic contact layer 107 and the reflective layer 108. Photolithographic techniques and lift-off techniques can be used.
  • An insulating protective film is formed on portions other than the ohmic contact layer 107 and the reflective layer 108 to be plated. Since the plating does not grow on the insulator, it is formed only on the nominated optical contact layer 107 and the reflective layer 108.
  • the portion occupied by these layers on the P-type semiconductor layer 105 should be reduced as much as possible. It is necessary that 110 has a shape that balances the contradictory properties of maintaining strength as a substrate.
  • the pattern of the ohmic contact layer 107, the reflective layer 108, and the metal plating plate 110 can be formed in a cross shape as shown in FIGS. 3 and 4 as much as possible on the p-type semiconductor layer 105. This is preferable in terms of maintaining the substrate strength while reducing the amount.
  • the pattern of the ohmic contact layer 107, the reflective layer 108, and the metal plating plate 110 is not limited to the shape shown in FIGS. Any shape such as line shape, comb shape, annular shape, annular shape, L shape, Y shape, etc. may be used. be able to.
  • the area of the portion where the metal pad is attached is formed wide.
  • the metal pad it is preferable for the metal pad to be attached that the intersecting portion 320 of the metal plate 310 at the center of the element is formed to have a substantially circular shape with a bulging portion 311 in plan view. Better!/,.
  • the sapphire substrate (see the sapphire substrate 201 in FIG. 2) is peeled off.
  • a known technique such as a polishing method, an etching method, or a laser lift-off method can be used without any limitation.
  • the buffer layer (Fig. 2
  • the n-type semiconductor layer 103 is exposed, and a negative electrode (not shown) is formed on the n-type semiconductor layer 103.
  • the negative electrode those of various known compositions and structures can be used without any limitation.
  • the positive electrode various structures using materials such as Au, Al, Ni, and Cu are known, and these known materials can be used without any limitation.
  • FIG. 5 to 8 are diagrams for explaining the nitride-based semiconductor light-emitting device of this embodiment.
  • FIG. 5 shows an n-type semiconductor layer, a light-emitting layer, and a p-type semiconductor layer formed thereon, and FIG.
  • the nitride of the present invention in which an ohmic contact layer, a reflective layer, and a plating adhesion layer are partially formed, a plating metal plate is formed thereon, and a translucent material layer is partially formed on the p-type semiconductor layer
  • FIG. 3 is a schematic cross-sectional view showing an example of a semiconductor light emitting device.
  • FIG. 6 is a diagram for explaining an example of a method for manufacturing a nitride-based semiconductor light-emitting device.
  • FIG. 5 shows a part of the positive electrode formed on the plating metal plate, and the two-dot chain line shown in FIG. 6 indicates the ohmic contact layer, the reflective layer, the plating adhesion layer, A part of the metal plate is shown.
  • FIG. 7 to 9 are plan views for explaining a method for manufacturing a nitride semiconductor light-emitting device, in which a plurality of nitride-based semiconductor light-emitting devices formed on a substrate are arranged along dicing lines DL 1 and DL2.
  • the nitride-based semiconductor light-emitting device of the present invention can be obtained.
  • the nitride-based semiconductor light-emitting device 1 of the present embodiment includes an n-type semiconductor layer 103, a light-emitting layer 104, a p-type semiconductor layer 105, a transparent electrode 106, an ohmic contact layer 107 (metal film layer), a reflective layer 108, The plating adhesion layer 109 and the plating metal plate 110 are laminated in this order (the vertical direction in FIG. 5). In the nitride semiconductor light emitting device 1, the reflective layer 108 and the plating adhesion are formed on the transparent electrode 106.
  • the layer 109 and the metal plating plate 110 are laminated in this order, and these layers are partially formed on the p-type semiconductor layer 105 so as to intersect in a cross shape in plan view.
  • Snow when viewed from the direction of the cross-sectional line A—A shown in FIG. 7, the ohmic contact layer 107, the reflective layer 108, and the adhesion adhesion layer 109 in the horizontal width direction (left-right direction in FIG. 5) of the example shown in FIG. Further, each width of the metal plate 110 is formed to be about 30% of the width of the transparent electrode 106.
  • each layer of the ohmic contact layer 107, the reflective layer 108, the plating adhesion layer 109, and the plating metal plate 110 (the vertical direction in FIG. 5) is 100% of the width of the transparent electrode 106. It is formed. Also, when viewed from the direction of the cross-sectional line BB shown in FIG. 7, the horizontal width and the vertical width of the ohmic contact layer 107, the reflective layer 108, the plating adhesion layer 109, and the plating metal plate 110 shown in FIG. The relationship is the same as described above.
  • the transparent material layer 114 is formed on the transparent electrode 106 in a portion where the ohmic contact layer 107, the reflective layer 108, the plating adhesion layer 109, and the plating metal plate 110 are not formed. Yes.
  • the negative electrode 113 is formed on the lower surface of the n-type semiconductor layer 103 via the transparent electrode 112, and the positive electrode 111 is formed on the upper surface of the metal plating plate 110. It is schematically configured.
  • a buffer layer 202 is formed on a sapphire substrate (substrate) 201, and an n-type semiconductor layer 203, a light-emitting layer 204, and a p-type semiconductor layer 205 are stacked via the buffer layer 202 to form a nitride-based semiconductor layer.
  • a transparent electrode 206 is formed on the nitride-based semiconductor thus formed (that is, on the p-type semiconductor layer 205).
  • the n-type semiconductor layer 203, the light emitting layer 204, the p-type semiconductor layer 205, and the transparent electrode 206 are formed to have the same horizontal width as shown in FIG. 6, and also to the same vertical size.
  • an ohmic contact layer 207 and a reflective layer 208 are formed by laminating in this order.
  • the ohmic contact layer 207 and the reflective layer 208 according to the present embodiment are partially formed on the transparent electrode 206 in a lattice-like pattern in plan view so as to intersect each other vertically and horizontally.
  • the pattern formation of the ohmic contact layer 207 and the reflective layer 208 is performed by using a known photolithography technique or a lift-off technique described later by using a resist material.
  • the plating metal plate 210 is formed by applying plating.
  • the metal plate 210 of the present embodiment is formed by forming an insulating protective film on a portion other than the portion where the ohmic contact layer 207 and the reflective layer 208 to be plated are to be formed, or for the plating.
  • the thick film resist material is used, and only the pattern of the ohmic contact layer 207 and the reflective layer 208 is measured by a known photolithography technique or lift-off technique.
  • the translucent material layer 214 is formed in a portion where the ohmic contact layer 207, the reflective layer 208, the metal adhesion layer 209, and the metal metal plate 210 are not formed.
  • an ohmic contact layer 207, a reflection layer 208, a plating adhesion layer 209, and a plating metal plate 210 formed in a cross shape are formed on the transparent electrode 206, and a gap is formed in the portion. Without forming the translucent material layer 214.
  • the sapphire substrate 201 is peeled off, and the buffer layer 202 is further removed.
  • a positive electrode 111 and a negative electrode 112 shown in FIG. 5 are formed by forming a positive electrode and a negative electrode. Then, by dividing the metal plate 210 along the dicing lines DL1 and DL2 as shown in FIG. 7, the nitride semiconductor light emitting device 1 shown in FIG. 5 can be obtained.
  • the nitride-based semiconductor light-emitting device of this embodiment includes an ohmic contact layer 107, a reflective layer 108, a mesh layer laminated on a p-type semiconductor layer 105 with a transparent electrode 106 interposed therebetween.
  • Each layer of the adhesion layer 109 and the metal plating plate 110 is partially formed so as to intersect with the upper surface 105a of the p-type semiconductor layer 105 via the transparent electrode 106 in a cross shape.
  • the translucent material layer 114 is formed in a portion where the ohmic contact layer 107, the reflection layer 108, the plating adhesion layer 109 and the plating metal plate 110 are formed.
  • the area of the ohmic contact layer 107, the reflective layer 108, the plating adhesion layer 109, and the plating metal plate 110 is equal to the area of the upper surface 105a of the p-type semiconductor layer 105.
  • the area ratio is preferably in the range of 10 to 90%.
  • the transparent electrode in which the bottom 107a of the ohmic contact layer 107 is formed with respect to the upper surface 105a of the p-type semiconductor layer 105 that is, the same size as the upper surface 105a.
  • the width is about 30% in the width direction (left and right direction in FIG. 5) with respect to the upper surface 106a of 106.
  • the ohmic contact layer 207, and the reflective layer 208 are formed with a width of about 30% in each of the vertical and horizontal directions on each element, and the area ratio of each element unit on the p-type semiconductor layer 205, that is, the transparent electrode 206
  • the upper area ratio is about 50%.
  • the nitride-based semiconductor light-emitting device of the present invention crosses the metal plate 310 and the ohmic contact layer 307 formed in a lattice shape in plan view by crossing each device in the vertical and horizontal directions.
  • the portion 320 may have a shape having a bulging portion 311 where the intersecting portion slightly swells in a substantially circular shape when viewed from above.
  • a sapphire single crystal (Al 2 O 3) is used for the sapphire substrate 201 used in the above manufacturing process!
  • LiGaO single crystal LiGaO single crystal, oxide single crystal such as MgO single crystal, Si single crystal, SiC single crystal, Ga
  • a known substrate material such as As single crystal can be used without any limitation. If a conductive substrate such as SiC is used, it is possible to fabricate a device in which the positive and negative electrodes are arranged one above the other without using the substrate peeling. In that case, the buffer layer 202, which is an insulator, should be used. Therefore, the crystal of the nitride-based semiconductor layer grown on the sapphire substrate 201 deteriorates, and a good semiconductor element cannot be formed. In the present invention, the sapphire substrate 201 is peeled even when conductive SiC or Si is used.
  • the nota layer 202 is generally used to improve the crystallinity of A1N or AlGaN isotropic GaN having an intermediate lattice constant.
  • A1N and AlGaN are used without any limitation.
  • the nitride-based semiconductor has a heterojunction structure including, for example, an n-type semiconductor layer 103, a light emitting layer 104, and a p-type semiconductor layer 105.
  • nitride-based semiconductor layers many semiconductors represented by the general formula Al In Ga N (0 ⁇ x ⁇ 1, 0 ⁇ y ⁇ 1, x + y ⁇ 1) are known. Even in the light, nitride-based semiconductors represented by the general formula Al In Ga _ _ ⁇ (0 ⁇ ⁇ 1, 0 ⁇ y ⁇ l, x + y ⁇ 1) can be used without any limitation.
  • the growth method of the nitride-based semiconductor is not particularly limited, and organometallic chemical vapor deposition (MO CVD), hydride vapor deposition (HPVE), molecular beam epitaxy (MBE), etc. All methods known to grow system semiconductors can be applied.
  • MO CVD organometallic chemical vapor deposition
  • HPVE hydride vapor deposition
  • MBE molecular beam epitaxy
  • a preferred growth method is the MOCVD method, which has the advantages of film thickness controllability and mass productivity.
  • Trimethylgallium (TMG) or triethylgallium (TEG) as the Ga source trimethylaluminum (TMA) or triethylaluminum (TEA) as the A1 source, trimethylindium (TMI) or triethylindium (TEI) as the In source, Ammonia (NH 3), hydrazine (NH 2), etc. are used as the N source that is a Group V material.
  • n-type has monosilane (SiH) or disilane (SiH).
  • germane (GeH) as the Ge source
  • a known technique such as an etching method or a laser cutting method can be used without any limitation.
  • the laser lift-off method it is preferable that the sapphire substrate 101 is not damaged when the nitride-based semiconductor is divided from the viewpoint of good substrate peeling. Therefore, when dividing by the etching method, it is preferable to use a method in which the etching rate is low for the nitride substrate 101 and the etching rate is low for the sapphire substrate 101.
  • dividing with a laser it is preferable to use a laser with a wavelength of 300 to 400 nm because of the difference in absorption wavelength between GaN and sapphire.
  • the ohmic contact layer 107 As a material for the ohmic contact layer 107, from the viewpoint of contact resistance with the p-type semiconductor layer 105, it is preferable to use a platinum group such as Pt, Ru, Os, Rh, Ir, and Pd, or Ag. More preferred are Pt, Ir, Rh and Ru, with Pt being particularly preferred.
  • Pt, Ir, Rh and Ru More preferred are Pt, Ir, Rh and Ru, with Pt being particularly preferred.
  • the use of Ag for the ohmic contact layer 106 is preferred for obtaining good reflection, but the contact resistance is larger than Pt. Therefore, Ag can be used for applications that do not require much contact resistance.
  • the ohmic contact layer 107 can be made of Ti, V, Cr, Co, Ni, Zr, Nb, Mo, Hf, Ta, W, etc. in addition to the above materials!
  • the thickness of the ohmic contact layer 107 is preferably 0.1 nm or more in order to stably obtain a low contact resistance. More preferably, it is 1 nm or more, and uniform contact resistance can be obtained. Further, on the ohmic contact layer 107, a reflective layer 108 having an Ag alloy isotropic force may be provided. Pt, Ir, Rh, Ru, OS, Pd, etc. have lower reflectivity from visible light to ultraviolet region than Ag alloy. Therefore, light from the light emitting layer 104 is not sufficiently reflected, and it is difficult to obtain an element with high light emission output.
  • the ohmic contact layer 107 is thinly formed so that light can be sufficiently transmitted, and the reflection layer 108 made of an Ag alloy or the like is formed to obtain reflected light, good ohmic contact can be obtained and output can be obtained. It is possible to manufacture a device having a high height.
  • the film thickness of the ohmic contact layer 107 is preferably 30 nm or less. More preferably, it is 10 nm or less.
  • the method for forming the ohmic contact layer 107 and the reflective layer 108 is not particularly limited, and a known sputtering method or vapor deposition method can be used.
  • the thickness of the reflective layer 108 is preferably 0.1 nm or more in order to obtain good reflectance. More preferably, it is lnm or more, and good reflectance can be obtained. In addition, Ag alloy is prone to migration, so it is better to make it thinner, although it can be protected by glazing. Therefore, the film thickness is more preferably 200 nm or less.
  • the method for forming the reflective layer 108 is not particularly limited, and a known sputtering method or vapor deposition method can be used.
  • a known sputtering method or vapor deposition method can be used.
  • the sputtering method since the sputtered particles collide with the substrate surface with high energy to form a film, a film having high adhesion can be obtained. Therefore, it is more preferable to use the sputtering method.
  • any known material such as ITO (In—Sn—O alloy), IZO (In—Zn—O alloy), AZO (Zn—Al—O alloy) may be used without any limitation. it can.
  • the thickness of the transparent electrode 106 is preferably set to lOOnm or more in order to stably obtain a low contact resistance. Light is also absorbed by the transparent electrode 106, so if it is too thick, the output will decrease. Therefore, the transparent electrode 106 is preferably 1 ⁇ m or less.
  • the transparent electrode 106 is preferably formed on the entire surface on the p-type semiconductor layer 105 from the viewpoint of current diffusion.
  • a method for forming the transparent electrode 106 is not particularly limited, and a known sputtering method or vapor deposition method can be used. Furthermore, annealing at a temperature of 100 ° C to 300 ° C after film formation is effective in reducing transmittance and sheet resistance.
  • a plating adhesion layer 109 may be formed directly below the plating metal plate 110, that is, between the plating metal plate 110 and the reflective layer 108.
  • the adhesion of the plating adhesion layer 109 is improved if it contains a large amount of substances mainly contained in the plating composition depending on the plating used for the plating metal plate 110.
  • the plating adhesion layer 109 preferably contains 50% by weight or more of the same composition as the main component occupying 50% by weight or more of the plating metal plate 110.
  • NiP plating for the plating metal plate 110
  • a Ni-based alloy for the plating adhesion layer. More preferably, a NiP alloy is used.
  • Cu plating for the plating metal plate 110
  • Cu-based alloy for the plating adhesion layer. More preferably, Cu is used.
  • the thickness of the adhesion adhesion layer 109 is preferably 0.1 nm or more in order to obtain good adhesion. More preferably, it is 1 nm or more, and uniform adhesion can be obtained.
  • the thickness of the adhesion adhesion layer 109 is not particularly limited, but is preferably 2 ⁇ m or less from the viewpoint of productivity.
  • the method for forming the adhesion adhesion layer 109 is not particularly limited, and a known sputtering method or vapor deposition method can be used. In the sputtering method, the sputtered particles have high energy and collide with the substrate surface to form a film, so that a film with high adhesion can be obtained. Therefore, it is more preferable to use the sputtering method.
  • plating metal plate 110 either an electroless plating or an electrolytic plating can be used.
  • electroless plating it is preferable to use NiP alloy plating as the material.
  • electrolytic plating it is preferable to use Cu as the material.
  • the thickness of the metal plating plate 110 is preferably 10 m or more in order to maintain the strength as a substrate. Further, if the plating metal plate 110 is too thick, peeling of the plating tends to occur and the productivity is lowered, so that the thickness is preferably 200 m or less.
  • an electroless plating treatment method using a nickel bath such as nickel sulfate or nickel chloride and a phosphorus source such as hypophosphite is used as the plating bath.
  • a commercially available product suitable as a plating bath for use in the electroless plating method is Muden HDX manufactured by Uemura Kogyo. It is preferable that ⁇ of the plating bath when performing the electroless plating treatment is 4 to 10 and the temperature is 30 to 95 ° C.
  • an electrolytic plating treatment method using a Cu source such as copper sulfate can be employed as a plating bath.
  • the pH of the plating bath during electroplating treatment is preferably 2 or less under strong acid conditions.
  • the temperature is more preferably 10 to 50 ° C, more preferably room temperature (25 ° C).
  • Current density is more preferably carried out in the preferred instrument 2 ⁇ 4AZdm 2 be implemented by 0. 5 ⁇ 1 OAZdm 2.
  • Heat treatment is preferably performed to improve the adhesion of the metal sheet 110 obtained as described above.
  • the heat treatment temperature should be in the range of 100 to 300 ° C. This is preferable from the viewpoint of improving adhesion. If the heat treatment temperature is at least the above range, the adhesiveness may be further improved, but the ohmic property may be lowered.
  • the ohmic contact layer 107, the reflective layer 108 (metal film layer), the metal plating plate 110, and the p-type semiconductor layer 105 As a method of forming partly, V The law can be considered.
  • a known photolithography technique and a lift-off technique can be used as a method for partially forming the ohmic contact layer 107 and the reflective layer 108.
  • An insulating protective film is formed on portions other than the ohmic contact layer 107 and the reflective layer 108 to be plated. Since the plating does not grow on the insulator, it is formed only on the nominated optical contact layer 107 and the reflective layer 108.
  • the portion occupied by these layers on the P-type semiconductor layer 105 should be reduced as much as possible. It is necessary that 110 has a shape that balances the contradictory properties of maintaining strength as a substrate.
  • the pattern of the ohmic contact layer 107, the reflective layer 108, and the metal plating plate 110 can be formed in a cross shape as shown in FIGS. 7 to 5 so that the portion that occupies as much as possible on the p-type semiconductor layer 105 is minimized. However, it is preferable in terms of maintaining the substrate strength.
  • the pattern of the ohmic contact layer 107, the reflective layer 108, and the metal plating plate 110 is not limited to the shape shown in FIGS. 7 and 8, but on the transparent electrode 106, a lattice shape, a mesh shape, or a cross shape. Any shape such as line shape, comb shape, annular shape, annular shape, L shape, Y shape, etc. may be used. be able to.
  • the area of the portion where the metal pad is attached is formed wide.
  • the metal pad it is preferable for the metal pad to be attached that the intersecting portion 320 of the metal plate 310 at the center of the element is formed to have a substantially circular shape with a bulging portion 311 in plan view. Better!/,.
  • translucent material forming the translucent material layer 114 it is preferable to use translucent resin, silica-based material, titania-based material, or the like.
  • translucent resin polymethylmetatalate resin, polycarbonate resin, polyimide resin, epoxy resin, silicon resin, etc.
  • Known materials can be used without any limitation.
  • a known method such as a spin coating method or an injection molding method can be used for the translucent resin coating method without any limitation, but the spin coating method is preferably used from the viewpoint of productivity.
  • the silica-based material may be a silica-based material having translucency such as silica sol, methylsiloxane-based, high-methylsiloxane-based, hydrogen-methylmethylsiloxane-based, phosphorus-doped silicate-based, polysilazane-based, etc.
  • known materials can be used without any limitation.
  • the silica-based material After applying the silica-based material, it is preferable to perform beta at a temperature of 100 ° C to 500 ° C in terms of improving rigidity and removing moisture and organic components contained in the silica-based material.
  • a known method such as a spin coating method, a spray method, or a dip coating method can be used without any limitation, but the spin coating method is preferably used from the viewpoint of productivity.
  • any known material can be used without any limitation as long as it has a light-transmitting property such as titazole or phosphoric acid titer.
  • beta it is preferable to apply beta at a temperature of 100 ° C to 500 ° C after application of the titer-based material in terms of improving rigidity and removing moisture and organic components contained in the titer-based material.
  • a known method such as spin coating, spraying, dip coating or the like can be used without any limitation. From the viewpoint of productivity, the spin coating method is preferably used. Better!/,.
  • the reason for providing the translucent material layer 114 is that the translucent material layer 114 is formed on the p-type semiconductor layer 105 (transparent electrode 106) using a translucent material having a high refractive index.
  • the light extraction efficiency of the nitride-based semiconductor light-emitting device can be improved. Therefore, it is preferable that the translucent material layer 114 is formed on the p-type semiconductor layer 105 or on the p-type semiconductor layer 105 via the transparent electrode 106.
  • the refractive index of the translucent material layer 114 is preferably in the range of 1.4 to 2.6 in terms of improving the light extraction efficiency of the nitride semiconductor light emitting device.
  • the translucent material layer 114 preferably has a transmittance of 80% or more in a wavelength range of 350 nm to 550 nm.
  • the translucent material layer has an ohmic contact layer 207, a reflective layer 208, a metal adhesion layer 209, and a metal metal on the transmission electrode 206. It is preferable to form the plate 210 without a gap in a portion where the plate 210 is not formed. As a result, it is possible to achieve both the improvement of the light extraction efficiency by the translucent material layer 214 and the improvement of the substrate strength by the metal plating plate 210.
  • silica-based materials, titania-based materials and the like used for the light-transmitting material layer are originally difficult to form a thick film, but on the transmissive electrode 206, the ohmic contact layer 207, the reflective layer 208, By adopting a structure provided in close contact with the adhesion layer 209 and the metal plating plate 210, a thick film of 5 m or more can be formed.
  • the film thickness of the translucent material layer needs to be 1 ⁇ m or more in order to improve the light extraction efficiency.
  • the transmissive electrode 206 since it is provided on the transmissive electrode 206 so as to be in close contact with the ohmic contact layer 207, the reflective layer 208, the plating adhesion layer 209, and the plating metal plate 210, the maximum thickness range of the plating metal plate 210 is maximized.
  • the value must be 200 ⁇ m or less
  • the sapphire substrate (see the sapphire substrate 201 in FIG. 6) is peeled off.
  • a known technique such as a polishing method, an etching method, or a laser lift-off method can be used without any limitation.
  • the buffer layer (see the buffer layer 202 in FIG. 6) is removed by a polishing method, an etching method, etc., the n-type semiconductor layer 103 is exposed, and an unillustrated on the n-type semiconductor layer 103 is removed.
  • a negative electrode is formed.
  • the negative electrode those of various known compositions and structures can be used without any limitation.
  • the positive electrode various structures using materials such as Au, Al, Ni, and Cu are known, and these known materials can be used without any limitation.
  • a nitride-based semiconductor light-emitting device as shown in the schematic cross-sectional view of FIG. 1 was produced.
  • a 5 m thick Si-doped n-type GaN contact layer, a 30 nm thick n-type InO. IGaO. 9N cladding layer, and a thickness on a sapphire substrate via a buffer layer (thickness lOnm) that also has an A1N force 30nm Si-doped GaN barrier layer and 2.5nm InO. 2GaO. 8N well layer is stacked 5 times, and finally a multi-well structure light emitting layer with barrier layer, 50nm thickness Mg-doped p-type AIO .07GaO. 93N cladding layer, 150nm thick Mg-doped p-type GaN contact layer in sequence.
  • a transparent electrode 106 made of ITO (Sn02: 10 wt%) having a thickness of 300 nm was formed on the ⁇ -type semiconductor layer 105 by a vapor deposition method. Then, annealing was performed for 1 hour at a temperature of 300 ° C. in an oxygen atmosphere.
  • an ohmic contact layer 107 having a Pt layer force with a thickness of 1.5 nm and a reflective layer 108 made of an Ag layer with a thickness of 30 nm were formed in this order by sputtering. Further, a plating adhesion layer 109 made of a 30 nm thick NiP alloy (Ni: 80 at%, P: 20 at%) was formed by sputtering.
  • the ohmic contact layer 107 (Pt layer), the reflective layer 108 (Ag layer), and the adhesion adhesion layer 109 (Ni P alloy layer) are shown in FIG. 3 using a known photolithography technique and lift-off technique. Patterned like a cross.
  • the turn width W is 30 ⁇ m
  • a resist material made of Si02 was formed in a lOOnm film on portions other than the metal film layer made up of the ohmic contact layer 107, the reflective layer 108, and the metal adhesion layer 109.
  • This resist material was patterned by a known photolithography technique and a lift-off technique.
  • the surface of the adhesion layer 109 that also has NiP alloy strength is immersed in a nitric acid aqueous solution (5N). Then, it was treated at a temperature of 25 ° C. for 30 seconds to remove the oxide film.
  • an electroless plating having a NiP alloy strength of 50 m was formed on the plating adhesion layer 109 using a plating bath (Nimden HDX-7G, manufactured by Uemura Kogyo Co., Ltd.) to obtain a plating metal plate 110.
  • the treatment conditions were pH 4.6, temperature 90 ° C, and treatment time 3 hours.
  • this metal sheet 110 was washed with water and dried, and then annealed for 1 hour at 250 ° C. using a clean oven.
  • the sapphire substrate and the buffer layer were separated by a polishing method to expose the n-type semiconductor layer 103.
  • a transparent layer made of ITO (SnO: 10 wt%) having a thickness of 400 nm is formed on the surface of the n-type semiconductor layer 103.
  • a bright electrode was deposited by vapor deposition.
  • a negative electrode made of Cr (40 nm), Ti (100 nm), and Au (lOOOnm) was formed on the central portion of the ITO surface by vapor deposition.
  • a known photolithography technique and lift-off technique were used as the pattern of the negative electrode.
  • a positive electrode made of Au (lOOOnm) was formed by vapor deposition.
  • the nitride-based semiconductor element of the present invention having a 350 / zm square was obtained by dicing.
  • the obtained nitride-based semiconductor light-emitting device was mounted in a TO-18 can package, and the light emission output at an applied current of 20 mA was measured by a tester.
  • the light emission output was 2 OmW.
  • a conventional nitride is formed in the same manner as in Example 1 except that a transparent electrode made of ITO is not formed, and an ohmic contact layer, a reflective layer, and a metal plating plate are formed on the entire surface of the p-type semiconductor layer.
  • a semiconductor device was fabricated.
  • the fabricated nitride semiconductor light emitting device was mounted in a TO-18 can package, and the light emission output at an applied current of 20 mA was measured with a tester.
  • the light emission output was 18 mW.
  • the ohmic contact layer, the reflective layer, and the metal plating plate are partially formed on the p-type semiconductor layer.
  • the nitride-based semiconductor light-emitting device of the present invention (Example 1) formed on the entire surface of the p-type semiconductor layer provided an ohmic contact layer, a reflective layer, and a metal plating plate, while emitting light of 20 mW.
  • the conventional nitride-based semiconductor light-emitting device (Comparative Example 1) formed in 1) has an emission output of 18 mW, and an output difference of about 10% was confirmed.
  • the nitride-based semiconductor light-emitting device of the present invention shown in Example 1 has the above-described configuration and the area of the reflective layer 108 is made smaller than the area of the p-type semiconductor layer 105. This is thought to be due to the fact that light is absorbed in the light-emitting layer 104 when the light is reflected through the light-emitting layer 104 and is incident on the light-emitting layer 104, thereby reducing the light emission efficiency and improving the output from the back surface of the device. .
  • a nitride-based semiconductor light-emitting element as shown in the schematic cross-sectional view of FIG. 5 was produced.
  • a 0.07 a N clad layer and a 150 nm thick Mg-doped p-type GaN contact layer were sequentially stacked.
  • a transparent film made of ITO (SnO: 10wt%) with a thickness of 300nm is formed.
  • the bright electrode 106 was formed by vapor deposition. Then, annealing was performed for 1 hour at a temperature of 300 ° C. in an oxygen atmosphere.
  • an ohmic contact layer 107 having a Pt layer force with a thickness of 1.5 nm and a reflective layer 108 made of an Ag layer with a thickness of 30 nm were formed in this order by sputtering. Further, a plating adhesion layer 109 made of a 30 nm thick NiP alloy (Ni: 80 at%, P: 20 at%) was formed by sputtering.
  • the ohmic contact layer 107 (Pt layer), the reflective layer 108 (Ag layer), and the adhesion adhesion layer 109 (Ni P alloy layer) are shown in FIG. 7 using a known photolithography technique and lift-off technique. Patterned like a grid.
  • the turn width W is 30 ⁇ m
  • the surface of the adhesion layer 109 having NiP alloy strength was immersed in an aqueous nitric acid solution (5N) and treated at a temperature of 25 ° C. for 30 seconds to remove the oxide film.
  • an electroless plating having a NiP alloy strength of 50 m was formed on the plating adhesion layer 109 using a plating bath (Nimden HDX-7G, manufactured by Uemura Kogyo Co., Ltd.) to obtain a plating metal plate 110.
  • the treatment conditions were pH 4.6, temperature 90 ° C, and treatment time 3 hours.
  • this metal sheet 110 was washed with water and dried, and then annealed for 1 hour at 250 ° C. using a clean oven.
  • liquid translucent resin manufactured by Shin-Etsu Chemical Co., Ltd., silicon resin SCR-1011, refractive index 1.5
  • silicon resin SCR-1011 refractive index 1.5
  • it is applied without any gap to the part other than the metal film layer composed of the Meat adhesion layer 109, dried for 1 hour at 100 ° C and for 5 hours at 150 ° C to cure the resin, A light-sensitive material layer 114 was formed.
  • the sapphire substrate and the buffer layer were separated by a polishing method to expose the n-type semiconductor layer 103.
  • a transparent layer made of ITO (SnO: 10 wt%) having a thickness of 400 nm is formed on the surface of the n-type semiconductor layer 103.
  • a bright electrode was deposited by vapor deposition.
  • a negative electrode made of Cr (40 nm), Ti (100 nm), and Au (lOOOnm) was formed on the central portion of the ITO surface by vapor deposition.
  • a known photolithography technique and lift-off technique were used as the pattern of the negative electrode.
  • a positive electrode made of Au (lOOOnm) was formed by vapor deposition.
  • the nitride-based semiconductor element of the present invention having a 350 / zm square was obtained by dicing.
  • the obtained nitride semiconductor light emitting device was mounted in a TO-18 can package, and the light emission output at an applied current of 20 mA was measured by a tester.
  • the light emission output was 2 lmW.
  • a nitride-based semiconductor device of the present invention was obtained by performing the same treatment as in Example 2 except that titania sol was used instead of silicon resin as the material of the translucent material layer 114.
  • titasol was dried and solidified by treatment for 1 hour at 150 ° C and 3 hours at 300 ° C. At this time, the refractive index of the titazole was 2.2.
  • the obtained nitride semiconductor light emitting device was mounted in a TO-18 can package, and the light emission output at an applied current of 20 mA was measured by a tester. The light emission output was 22 mW.
  • a nitride-based semiconductor light-emitting device was fabricated in the same manner as in Example 2 except that the light-transmitting substance layer was not formed.
  • the fabricated nitride semiconductor light emitting device was mounted in a TO-18 can package, and the light emission output at an applied current of 20 mA was measured with a tester.
  • the light emission output was 2 OmW.
  • the nitride-based semiconductor light-emitting device of Example 2 provided with the material layer had a light output of 21 mW.
  • the nitride-based semiconductor light-emitting device of Example 3 that uses titasol resin instead of silicon resin as the material of the translucent material layer has a light emission output of 22 mW.
  • the nitride-based semiconductor light-emitting element shown in Comparative Example 2 in which no translucent material layer was formed had a light emission output of 20 mW.
  • the refractive index when the light-transmitting material layer is not provided is 1, it can be seen that the light extraction efficiency is improved as the refractive index of the light-transmitting material layer is increased. This is because the use of a material having a high refractive index of 1.4 to 2.6 as the translucent material increases the critical angle and makes it more difficult to totally reflect. Note that the upper limit is 2.6 because the refractive index of GaN is 2.6, so there is no need to increase it further. If it is larger than this, it will be difficult to extract light from the translucent material.
  • the nitride-based semiconductor light-emitting device of the present invention is excellent in light extraction efficiency.
  • the nitride-based semiconductor light-emitting device provided by the present invention has excellent characteristics and stability and is useful as a material for light-emitting diodes and lamps.

Abstract

Disclosed is a semiconductor device which is improved in outcoupling efficiency since reflection by the supporting substrate is reduced. This semiconductor device is also excellent in strength characteristics of a supporting substrate. Also disclosed is a method for manufacturing such a semiconductor device. Specifically disclosed is a nitride semiconductor device wherein at least an n-type semiconductor layer, a light-emitting layer, a p-type semiconductor layer, a metal film layer and a plated metal plate are sequentially arranged in this order on a substrate. This nitride semiconductor device is characterized in that the metal film layer and the plated metal plate are partially formed on the p-type semiconductor layer. Also disclosed is a nitride semiconductor device having a structure wherein at least an n-type semiconductor layer, a light-emitting layer, a p-type semiconductor layer, a metal film layer and a plated metal plate are sequentially arranged in this order, which device is characterized in that the metal film layer and the plated metal plate are partially formed on the p-type semiconductor layer and a light-transmitting material layer is formed on the p-type semiconductor layer in a region where the metal film layer and the plated metal plate are not formed.

Description

明 細 書  Specification
窒化物系半導体発光素子及びその製造方法  Nitride-based semiconductor light-emitting device and manufacturing method thereof
技術分野  Technical field
[0001] 本発明は窒化物系半導体発光素子、及びその製造方法に関する。  [0001] The present invention relates to a nitride-based semiconductor light-emitting device and a method for manufacturing the same.
本願は、 2005年 9月 20曰に、日本に出願された特願 2005— 272424号、及び 2 005年 9月 20日に、日本に出願された特願 2005— 272574号に基づき優先権を主 張し、その内容をここに援用する。  This application is based on Japanese Patent Application No. 2005-272424 filed in Japan on September 20, 2005, and Japanese Patent Application No. 2005-272574 filed in Japan on September 20, 2005. The contents are used here.
背景技術  Background art
[0002] 近年、短波長光発光素子用の半導体材料として GaN系化合物半導体材料が注目 を集めている。 GaN系化合物半導体は、サファイア単結晶をはじめとして、種々の酸 化物基板や III一 V族化合物を基板として、その上に有機金属気相化学反応法 (MO CVD法)や分子線エピタキシー法 (MBE法)等によって形成される。  In recent years, GaN-based compound semiconductor materials have attracted attention as semiconductor materials for short-wavelength light emitting devices. GaN-based compound semiconductors include sapphire single crystals, various oxide substrates and III-V compounds, and metal organic vapor phase chemical reaction method (MO CVD method) and molecular beam epitaxy method (MBE). Method).
サファイア単結晶基板は、 GaNとは格子定数が 10%以上も異なる力 A1Nや AlGa Nなどのバッファ層を形成することにより、その上に良好な窒化物半導体を形成する ことができ、一般的に広く用いられている。サファイア単結晶基板を用いた場合、 n型 半導体層、発光層、 p型半導体層が、この順で積層される。サファイア基板は絶縁体 であるので、その素子構造は一般的に、 p型半導体層上に形成された正極と n型半 導体層上に形成された負極が存在することになる。 ITOなどの透明電極を正極に使 用して p型半導体側から光を取り出すフェイスアップ方式、 Agなどの高反射膜を正極 に使用してサファイア基板側力も光を取り出すフリップチップ方式の 2種類がある。  A sapphire single crystal substrate can form a good nitride semiconductor on it by forming a buffer layer such as A1N or AlGaN that has a lattice constant more than 10% different from that of GaN. Widely used. When a sapphire single crystal substrate is used, an n-type semiconductor layer, a light emitting layer, and a p-type semiconductor layer are stacked in this order. Since the sapphire substrate is an insulator, the element structure generally includes a positive electrode formed on the p-type semiconductor layer and a negative electrode formed on the n-type semiconductor layer. There are two types: a face-up method that uses a transparent electrode such as ITO as the positive electrode to extract light from the p-type semiconductor side, and a flip-chip method that uses a highly reflective film such as Ag as the positive electrode to extract light from the sapphire substrate. is there.
[0003] このように、サファイア単結晶基板は一般的に広く用いられている力 絶縁体である ためにいくつかの問題点がある。  [0003] As described above, the sapphire single crystal substrate has several problems because it is a generally used force insulator.
第一に、負極を形成するために発光層をエッチングなどにより除去して n型半導体 層を露出させることから負極の部分だけ発光層の面積が減ってしまい、その分、出力 が低下する。  First, since the n-type semiconductor layer is exposed by removing the light-emitting layer by etching or the like to form the negative electrode, the area of the light-emitting layer is reduced only by the negative electrode portion, and the output is reduced accordingly.
第二に、正極と負極が同一面にあるために電流の流れが水平方向になってしま ヽ 、局部的に電流密度の高いところができ、素子が発熱してしまう。 第三に、サファイア基板の熱伝導率は低いので、発生した熱が拡散せず素子の温 度が上昇してしまう。 Second, since the positive electrode and the negative electrode are on the same plane, the current flow is in the horizontal direction, creating a high current density locally, and the element generates heat. Third, since the thermal conductivity of the sapphire substrate is low, the generated heat does not diffuse and the temperature of the device rises.
[0004] 以上の問題を解決するため、サファイア単結晶基板上に n型半導体層、発光層、 p 型半導体層がこの順で積層した素子に導電性基板を接着し、その後、サファイア単 結晶基板を除去して、正極と負極を上下に配置させる方法が開示されている(例え ば、特許文献 1)。  In order to solve the above problems, a conductive substrate is bonded to an element in which an n-type semiconductor layer, a light emitting layer, and a p-type semiconductor layer are stacked in this order on a sapphire single crystal substrate, and then the sapphire single crystal substrate A method is disclosed in which the positive electrode and the negative electrode are arranged one above the other (for example, Patent Document 1).
また、導電性基板を接着させるのではなぐメツキによって作製する方法が開示され ている(例えば、特許文献 2)。  In addition, a method of manufacturing by a method in which a conductive substrate is not bonded is disclosed (for example, Patent Document 2).
[0005] 導電性基板を接着させる方法には、 AuSnなどの低融点金属化合物を接着材とす る方法や、真空中でアルゴンプラズマ等を用いて接合面を活性化させ接着する活性 化接合等の方法がある。これらの方法では、接着面が極めて平滑であることが要求さ れ、パーティクルなどの異物がある場合にその部分が浮いてしまい、良好に接着でき なくなる虞がある等、均一な接着面を形成することは困難であった。  [0005] Methods for bonding conductive substrates include a method of using a low-melting-point metal compound such as AuSn as an adhesive, activated bonding in which the bonding surface is activated and bonded using argon plasma or the like in a vacuum, etc. There is a way. In these methods, the adhesion surface is required to be extremely smooth, and when there is a foreign substance such as a particle, the portion floats, and there is a possibility that the adhesion cannot be performed satisfactorily. It was difficult.
[0006] メツキによって基板を作製する場合、異物による影響がほとんど無い点で有利であ る力 p型半導体側がメツキにより覆われてしまうため、光取り出し効率が低下してしま 光取り出し効率を向上させるため、メツキ処理の前に、ォーミック接触層上に高反射 率を持つ Agなどを成膜する手法が一般的に用いられるが、この方法では、ほとんど の反射光が発光層を通過しなければならないため、発光層での光吸収が問題になる この際の反射光の発生を出来る限り防止するため、支持基板に透明性基板を用い た半導体素子が提案されている (例えば、特許文献 3)。  [0006] When a substrate is manufactured by plating, it is advantageous in that it is hardly affected by foreign matter. Since the p-type semiconductor side is covered by the plating, the light extraction efficiency is reduced. The light extraction efficiency is improved. For this reason, a method of depositing Ag or the like having high reflectivity on the ohmic contact layer is generally used before the plating process, but in this method, most of the reflected light must pass through the light emitting layer. Therefore, light absorption in the light emitting layer becomes a problem. In order to prevent generation of reflected light at this time as much as possible, a semiconductor element using a transparent substrate as a support substrate has been proposed (for example, Patent Document 3).
[0007] し力しながら、支持基板に透明性基板を用いる場合、例えば、 SOG (スピンオンガ ラス)では 5 μ m程度が厚膜の限界であるので十分な強度を持った基板が作成でき ないという問題があった。 [0007] However, when a transparent substrate is used as the support substrate, for example, in SOG (spin-on-glass), a thickness of about 5 μm is the limit of the thick film, so that a substrate with sufficient strength cannot be produced. There was a problem.
特許文献 1:特許第 3511970号公報  Patent Document 1: Japanese Patent No. 3511970
特許文献 2 :特開 2004— 47704号公報  Patent Document 2: JP 2004-47704 A
特許文献 3:特開 2003 - 309286号公報 発明の開示 Patent Document 3: Japanese Patent Laid-Open No. 2003-309286 Disclosure of the invention
発明が解決しょうとする課題  Problems to be solved by the invention
[0008] 本発明は上記事情に鑑みてなされたもので、支持基板の強度特性に優れるととも に、該支持基板からの反射光が少なぐ光取り出し効率を向上させた半導体素子及 びその製造方法を提供することを目的とする。  The present invention has been made in view of the above circumstances, and has excellent strength characteristics of a support substrate, and a semiconductor device with improved light extraction efficiency with less reflected light from the support substrate and a method for manufacturing the same The purpose is to provide.
課題を解決するための手段  Means for solving the problem
[0009] 本発明者等は、上記問題を解決するため鋭意努力検討した結果、少なくとも n型半 導体層、発光層、 P型半導体層、金属膜層、金属板がこの順序で積層されてなる窒 化物系半導体発光素子において、金属膜層、及びメツキ金属板力 ¾型半導体層上に 部分的に形成された構成とすることにより、基板強度に優れ、且つ反射光が少ない、 即ち光取り出し効率が良い素子を作製することが可能なことを見出し、本発明を完成 した。さらに、金属膜層、及びメツキ金属板を格子状にすることにより、本発明の効果 はより一層発揮される。  As a result of diligent efforts to solve the above problems, the present inventors have at least an n-type semiconductor layer, a light emitting layer, a P-type semiconductor layer, a metal film layer, and a metal plate laminated in this order. In the nitride-based semiconductor light-emitting device, the structure is partially formed on the metal film layer and the metallic metal plate-type semiconductor layer, thereby providing excellent substrate strength and low reflected light, that is, light extraction efficiency. However, the inventors have found that it is possible to produce a good device, and have completed the present invention. Furthermore, the effect of the present invention is further exhibited by forming the metal film layer and the metal sheet in a lattice shape.
即ち本発明は以下に関する。  That is, the present invention relates to the following.
[0010] (1)基板上に少なくとも n型半導体層、発光層、 p型半導体層、金属膜層、メツキ金属 板が積層されてなる窒化物系半導体発光素子において、前記金属膜層、及び前記 メツキ金属板が前記 P型半導体層上に部分的に形成されていることを特徴とする窒化 物系半導体発光素子。  [0010] (1) In a nitride-based semiconductor light-emitting device in which at least an n-type semiconductor layer, a light-emitting layer, a p-type semiconductor layer, a metal film layer, and a metal plating plate are laminated on a substrate, the metal film layer, A nitride-based semiconductor light-emitting device, wherein a metallic metal plate is partially formed on the P-type semiconductor layer.
(2)基板上に少なくとも n型半導体層、発光層、 p型半導体層、金属膜層、メツキ金属 板が積層されてなる窒化物系半導体発光素子において、前記金属膜層、及び前記 メツキ金属板が前記 P型半導体層上に平面視交差状態に形成されていることを特徴 とする(1)に記載の窒化物系半導体発光素子。  (2) In a nitride-based semiconductor light-emitting device in which at least an n-type semiconductor layer, a light-emitting layer, a p-type semiconductor layer, a metal film layer, and a metal metal plate are laminated on a substrate, the metal film layer and the metal metal plate The nitride-based semiconductor light-emitting device according to (1), wherein the nitride-based semiconductor light-emitting device is formed on the P-type semiconductor layer so as to intersect in plan view.
(3)前記 p型半導体層上に形成される前記金属膜層及びメツキ金属板の面積が、前 記 P型半導体層上面に対する面積比で 10〜90%の範囲内であることを特徴とする( 1)または (2)に記載の窒化物系半導体発光素子。  (3) The area of the metal film layer and the metal plate formed on the p-type semiconductor layer is in the range of 10 to 90% in terms of the area ratio with respect to the upper surface of the P-type semiconductor layer. The nitride-based semiconductor light-emitting device according to (1) or (2).
(4)前記基板上に形成される前記 n型半導体層、発光層及び p型半導体層が、あら 力じめ素子単位に分割されていることを特徴とする(1)〜(3)の何れかに記載の窒化 物系半導体発光素子。 (5)前記 p型半導体層上に透明電極が備えられて!/、ることを特徴とする(1)〜 (4)の 何れかに記載の窒化物系半導体発光素子。 (4) The n-type semiconductor layer, the light-emitting layer, and the p-type semiconductor layer formed on the substrate are divided into element units in advance, and any one of (1) to (3) A nitride semiconductor light emitting device according to claim 1. (5) The nitride-based semiconductor light-emitting device according to any one of (1) to (4), wherein a transparent electrode is provided on the p-type semiconductor layer! /.
(6)前記金属膜層がォーミック接触層を含むことを徴とする(1)〜(5)の何れかに記 載の窒化物系半導体発光素子。  (6) The nitride-based semiconductor light-emitting device according to any one of (1) to (5), wherein the metal film layer includes an ohmic contact layer.
(7)前記ォーミック接触層が、 Pt、 Ru、 Os、 Rh、 Ir、 Pd、 Agの単体金属、及び Z又 は、それらの合金力 なることを特徴とする(1)〜(6)の何れかに記載の窒化物系半 導体発光素子。  (7) Any of (1) to (6), wherein the ohmic contact layer is made of a single metal of Pt, Ru, Os, Rh, Ir, Pd, Ag, or an alloy force of Z or an alloy thereof. A nitride semiconductor light-emitting device according to claim 1.
(8)前記ォーミック接触層の膜厚が 0. Inn!〜 30nmの範囲内であることを特徴とす る(1)〜(7)の何れかに記載の窒化物系半導体発光素子。  (8) The ohmic contact layer has a thickness of 0. Inn! The nitride-based semiconductor light-emitting device according to any one of (1) to (7), which is in a range of ˜30 nm.
(9)前記メツキ金属板の膜厚が 10 μ m〜200 μ mの範囲内であることを特徴とする( 1)〜(8)の何れかに記載の窒化物系半導体発光素子。  (9) The nitride-based semiconductor light-emitting device according to any one of (1) to (8), wherein a thickness of the metal plating plate is in a range of 10 μm to 200 μm.
(10)前記メツキ金属板力 NiP合金、 Cu、または Cu合金カゝらなることを特徴とする( 1)〜(9)の何れかに記載の窒化物系半導体発光素子。  (10) The nitride-based semiconductor light-emitting element according to any one of (1) to (9), wherein the metal sheet strength is NiP alloy, Cu, or Cu alloy.
(11)前記金属膜層と前記メツキ金属板との間にメツキ密着層が形成されて ヽることを 特徴とする(1)〜(10)の何れかに記載の窒化物系半導体発光素子。  (11) A nitride-based semiconductor light-emitting device according to any one of (1) to (10), wherein a metal adhesion layer is formed between the metal film layer and the metal metal plate.
(12)前記メツキ密着層が、前記メツキ金属板をなすメツキの 50重量%以上を占める 主成分と同一の組成を 50重量%以上含有することを特徴とする(11)に記載の窒化 物系半導体発光素子。  (12) The nitride system according to (11), wherein the plating adhesion layer contains 50 wt% or more of the same composition as the main component occupying 50 wt% or more of the plating forming the plating metal plate Semiconductor light emitting device.
(13)前記メツキ密着層力 NiP合金または Cu合金カゝらなることを特徴とする(11)ま たは(12)に記載の窒化物系半導体発光素子。  (13) The nitride-based semiconductor light-emitting device according to (11) or (12), wherein the adhesion adhesion layer strength is NiP alloy or Cu alloy.
(14)基板上に少なくとも n型半導体層、発光層、 p型半導体層、金属膜層、メツキ金 属板を積層する積層工程を有する窒化物系半導体発光素子の製造方法において、 前記積層工程において、前記金属膜層及び前記メツキ金属板を、前記 p型半導体層 上に部分的に形成することを特徴とする窒化物系半導体発光素子の製造方法。(14) In the method for manufacturing a nitride-based semiconductor light-emitting device including a stacking step of stacking at least an n-type semiconductor layer, a light-emitting layer, a p-type semiconductor layer, a metal film layer, and a metallic metal plate on a substrate, The method for producing a nitride-based semiconductor light-emitting device, wherein the metal film layer and the metal plate are partially formed on the p-type semiconductor layer.
(15)前記積層工程において、前記金属膜層及び前記金属板を、個々に平面視ライ ン状で交差状態に形成することを特徴とする(14)に記載の窒化物系半導体発光素 子の製造方法。 (15) The nitride-based semiconductor light-emitting device according to (14), wherein, in the stacking step, the metal film layer and the metal plate are individually formed in a planar view in a crossed state. Production method.
(16)前記積層工程は、前記 n型半導体層を、ノ ッファ層を介して基板上に取り付け て行われ、前記積層工程終了後に、前記基板およびバッファ層を除去することにより(16) In the stacking step, the n-type semiconductor layer is attached to the substrate via a notch layer. By removing the substrate and the buffer layer after completion of the stacking step.
、前記 n型半導体層を露出させることを特徴とする(14)又は(15)に記載の窒化物系 半導体発光素子の製造方法。 The method for producing a nitride-based semiconductor light-emitting device according to (14) or (15), wherein the n-type semiconductor layer is exposed.
(17)前記基板をレーザによって除去することを特徴とする(16)に記載の窒化物系 半導体発光素子の製造方法。  (17) The method for manufacturing a nitride-based semiconductor light-emitting element according to (16), wherein the substrate is removed by a laser.
(18)前記メツキ金属板を形成した後、 100°C〜300°Cの温度で熱処理することを特 徴とする(14)〜(17)の何れかに記載の窒化物系半導体発光素子の製造方法。  (18) The nitride-based semiconductor light-emitting device according to any one of (14) to (17), characterized in that after forming the metal plate, heat treatment is performed at a temperature of 100 ° C to 300 ° C. Production method.
[0012] また、本発明者等は、上記問題を解決するため鋭意努力検討した結果、少なくとも n型半導体層、発光層、 p型半導体層、金属膜層、金属板がこの順序で積層されて なる窒化物系半導体発光素子において、前記金属膜層及び前記メツキ金属板が、 前記 P型半導体層上に部分的に形成されており、前記 p型半導体層上において、前 記金属膜層及び前記メツキ金属板が形成されていない部分に透光性物質層が形成 された構成とすることにより、基板強度に優れ、且つ反射光が少ない、即ち光取り出 し効率が良い素子を作製することが可能なことを見出し、本発明を完成した。さらに、 金属膜層及びメツキ金属板を前記 P型半導体層上において平面視交差状態に形成 し、前記 p型半導体層上にお!ヽて前記金属膜層及び前記メツキ金属板が形成されて いない部分に前記透光性物質層を形成することにより、本発明の効果はより一層発 揮される。  Further, as a result of diligent efforts to solve the above problems, the present inventors have found that at least an n-type semiconductor layer, a light emitting layer, a p-type semiconductor layer, a metal film layer, and a metal plate are laminated in this order. In the nitride-based semiconductor light-emitting device, the metal film layer and the metal plating plate are partially formed on the P-type semiconductor layer, and the metal film layer and the metal film layer are formed on the p-type semiconductor layer. By adopting a structure in which a light-transmitting substance layer is formed in a portion where no metal plate is formed, an element having excellent substrate strength and low reflected light, that is, high light extraction efficiency can be manufactured. As a result, the present invention was completed. Further, the metal film layer and the plated metal plate are formed on the P-type semiconductor layer so as to intersect in plan view, and the metal film layer and the plated metal plate are not formed on the p-type semiconductor layer. By forming the translucent material layer in the portion, the effect of the present invention is further exhibited.
即ち本発明第 2は以下に関する。  That is, the second aspect of the present invention relates to the following.
[0013] (1)基板上に少なくとも n型半導体層、発光層、 p型半導体層、金属膜層、メツキ金属 板がこの順序で積層されてなる窒化物系半導体発光素子において、前記金属膜層 及び前記メツキ金属板が、前記 p型半導体層上に部分的に形成されており、前記 p型 半導体層上にぉ ヽて、前記金属膜層及び前記メツキ金属板が形成されて ヽな 、部 分に透光性物質層が形成されていることを特徴とする窒化物系半導体発光素子。 (2)前記 p型半導体層上に形成される前記金属膜層及び前記メツキ金属板が、平面 視交差状態に設けられており、前記 p型半導体層上において、前記金属膜層及び前 記メツキ金属板が形成されて ヽな ヽ部分に前記透光性物質層が設けられて ヽること を特徴とする(1)に記載の窒化物系半導体発光素子。 (3)前記透光性物質層が前記 p型半導体層上に積層され、前記透光性物質層が少 なくとも前記金属膜層とメツキ金属板によって部分的に囲われていることを特徴とする (1)又は(2)に記載の窒化物系半導体発光素子。 (1) In a nitride-based semiconductor light-emitting device in which at least an n-type semiconductor layer, a light-emitting layer, a p-type semiconductor layer, a metal film layer, and a metal plating plate are stacked in this order on a substrate, the metal film layer And the plating metal plate is partially formed on the p-type semiconductor layer, and the metal film layer and the plating metal plate are formed on the p-type semiconductor layer. A nitride-based semiconductor light-emitting device, wherein a light-transmitting material layer is formed on the substrate. (2) The metal film layer and the metal plate that are formed on the p-type semiconductor layer are provided in an intersecting state in plan view, and the metal film layer and the metal plate are arranged on the p-type semiconductor layer. The nitride-based semiconductor light-emitting device according to (1), wherein the light-transmitting material layer is provided on a small portion where a metal plate is formed. (3) The translucent material layer is laminated on the p-type semiconductor layer, and the translucent material layer is partially surrounded by at least the metal film layer and a metal plate. The nitride semiconductor light emitting device according to (1) or (2).
(4)前記透光性物質層が、透明電極を介して p型半導体層上に積層され、前記透光 性物質層が少なくとも前記金属膜層とメツキ金属板によって部分的に囲われているこ とを特徴とする(1)又は(2)に記載の窒化物系半導体発光素子。  (4) The translucent material layer is laminated on the p-type semiconductor layer via a transparent electrode, and the translucent material layer is at least partially surrounded by the metal film layer and the metal plate. The nitride-based semiconductor light-emitting device according to (1) or (2), wherein
(5)前記透光性物質層が、透光性榭脂、シリカ系物質又はチタニア系物質の何れか からなることを特徴とする(1)〜 (4)の何れかに記載の窒化物系半導体発光素子。 (5) The nitride-based material according to any one of (1) to (4), wherein the light-transmitting material layer is made of any one of a light-transmitting resin, a silica-based material, and a titania-based material. Semiconductor light emitting device.
(6)前記透光性物質層の屈折率が 1. 4〜2. 6の範囲内であることを特徴とする(1) 〜(5)の何れかに記載の窒化物系半導体発光素子。 (6) The nitride-based semiconductor light-emitting element according to any one of (1) to (5), wherein a refractive index of the translucent material layer is in a range of 1.4 to 2.6.
(7)前記透光性物質層の膜厚が 10 m〜200 mの範囲内であることを特徴とする (1)〜(6)の何れかに記載の窒化物系半導体発光素子。  (7) The nitride-based semiconductor light-emitting element according to any one of (1) to (6), wherein the translucent material layer has a thickness in a range of 10 m to 200 m.
(8)前記基板上に形成される n型半導体層、発光層、 p型半導体層があらかじめ素子 単位に分割されていることを特徴とする(1)〜(7)の何れかに記載の窒化物系半導 体発光素子。  (8) The nitridation according to any one of (1) to (7), wherein an n-type semiconductor layer, a light-emitting layer, and a p-type semiconductor layer formed on the substrate are previously divided into element units. Physical semiconductor light emitting device.
(9)前記金属膜層がォーミック接触層を含むことを特徴する(1)〜(8)の何れかに記 載の窒化物系半導体発光素子。  (9) The nitride-based semiconductor light-emitting device according to any one of (1) to (8), wherein the metal film layer includes an ohmic contact layer.
(10)前記ォーミック接触層が、 Pt、 Ru、 Os、 Rh、 Ir、 Pd、 Agの単体金属、及び Z又 は、それらの合金力 なることを特徴とする(1)〜(9)の何れかに記載の窒化物系半 導体発光素子。  (10) Any one of (1) to (9), wherein the ohmic contact layer is made of a single metal of Pt, Ru, Os, Rh, Ir, Pd, Ag, or Z or an alloying force thereof. A nitride semiconductor light-emitting device according to claim 1.
(11)前記ォーミック接触層の膜厚が 0. Inn!〜 30nmの範囲内であることを特徴とす る(1)〜(10)の何れかに記載の窒化物系半導体発光素子。  (11) The film thickness of the ohmic contact layer is 0. Inn! The nitride-based semiconductor light-emitting device according to any one of (1) to (10), wherein the nitride-based semiconductor light-emitting device is in a range of ˜30 nm.
(12)前記メツキ金属板の膜厚が 10 m〜200 mの範囲内であることを特徴とする (1)〜(11)の何れかに記載の窒化物系半導体発光素子。  (12) The nitride-based semiconductor light-emitting element according to any one of (1) to (11), wherein a thickness of the metal plating plate is in a range of 10 m to 200 m.
(13)前記メツキ金属板力 NiP合金、 Cu、または Cu合金カゝらなることを特徴とする( 1)〜(12)の何れかに記載の窒化物系半導体発光素子。  (13) The nitride-based semiconductor light-emitting element according to any one of (1) to (12), wherein the metal plating strength is NiP alloy, Cu, or Cu alloy.
(14)前記金属膜層と前記メツキ金属板との間にメツキ密着層が形成されていることを 特徴とする(1)〜(13)の何れかに記載の窒化物系半導体発光素子。 (15)前記メツキ密着層が、前記メツキ金属板をなすメツキの 50重量%以上を占める 主成分と同一の組成を 50重量%以上含有することを特徴とする(14)に記載の窒化 物系半導体発光素子。 (14) A nitride-based semiconductor light-emitting device according to any one of (1) to (13), wherein a metal adhesion layer is formed between the metal film layer and the metal metal plate. (15) The nitride system according to (14), wherein the plating adhesion layer contains 50 wt% or more of the same composition as the main component occupying 50 wt% or more of the plating forming the plating metal plate Semiconductor light emitting device.
(16)前記メツキ密着層が NiP合金力 なることを特徴とする( 14)又は( 15)に記載の 窒化物系半導体発光素子。  (16) The nitride-based semiconductor light-emitting element according to (14) or (15), wherein the adhesion adhesion layer has NiP alloy power.
[0014] (17)基板上に少なくとも n型半導体層、発光層、 p型半導体層、金属膜層、メツキ金 属板を積層する積層工程を有する窒化物系半導体発光素子の製造方法において、 前記積層工程において、前記金属膜層及び前記メツキ金属板を、前記 p型半導体層 上に部分的に形成し、前記 p型半導体層上において、前記金属膜層及び前記メツキ 金属板が形成されて ヽな ヽ部分に透光性物質層を形成することを特徴とする窒化物 系半導体発光素子の製造方法。  (17) In the method for manufacturing a nitride-based semiconductor light-emitting element including a stacking step of stacking at least an n-type semiconductor layer, a light-emitting layer, a p-type semiconductor layer, a metal film layer, and a metal alloy plate on a substrate, In the stacking step, the metal film layer and the plating metal plate are partially formed on the p-type semiconductor layer, and the metal film layer and the plating metal plate are formed on the p-type semiconductor layer. A method for producing a nitride-based semiconductor light-emitting device, comprising: forming a light-transmitting material layer on the inner portion.
(18)前記積層工程において、前記金属膜層及び前記金属板を、個々に平面視ライ ン状で交差状態に形成することを特徴とする(17)に記載の窒化物系半導体発光素 子の製造方法。  (18) The nitride-based semiconductor light-emitting device according to (17), wherein, in the stacking step, the metal film layer and the metal plate are individually formed in a cross-sectional shape in a planar view. Production method.
(19)前記積層工程は、前記 n型半導体層を、ノ ッファ層を介して基板上に取り付け て行われ、前記積層工程終了後に、前記基板およびバッファ層を除去することにより 、前記 n型半導体層を露出させることを特徴とする(17)又は(18)に記載の窒化物系 半導体発光素子の製造方法。  (19) The stacking step is performed by attaching the n-type semiconductor layer on a substrate via a nofer layer, and after the stacking step is completed, the substrate and the buffer layer are removed, thereby removing the n-type semiconductor layer. The method for producing a nitride-based semiconductor light-emitting device according to (17) or (18), wherein the layer is exposed.
(20)前記基板をレーザによって除去することを特徴とする(19)に記載の窒化物系 半導体発光素子の製造方法。  (20) The method for producing a nitride-based semiconductor light-emitting device according to (19), wherein the substrate is removed by a laser.
(21)前記メツキ金属板を形成した後、 100°C〜300°Cの温度で熱処理することを特 徴とする(17)〜(20)の何れかに記載の窒化物系半導体発光素子の製造方法。  (21) The nitride-based semiconductor light-emitting device according to any one of (17) to (20), characterized in that after forming the metal plate, heat treatment is performed at a temperature of 100 ° C to 300 ° C. Production method.
[0015] 本発明の窒化物系半導体発光素子によれば、少なくとも n型半導体層、発光層、 p 型半導体層、金属膜層、金属板がこの順序で積層されてなる構造において、金属膜 層、及びメツキ金属板力 p型半導体層上に部分的に形成された構成としている。 これにより、基板強度に優れ、且つ反射光が少ない、即ち光取り出し効率が良い素 子を得ることができる。特に、金属膜層、及びメツキ金属板を格子状にすることにより、 本発明の効果はより一層発揮される。 [0016] また、本発明の窒化物系半導体発光素子によれば、少なくとも n型半導体層、発光 層、 P型半導体層、金属膜層、金属板がこの順序で積層されてなる構造において、前 記金属膜層及び前記メツキ金属板が、前記 P型半導体層上に部分的に形成されて おり、前記 p型半導体層上において、前記金属膜層及び前記メツキ金属板が形成さ れて 、な 、部分に透光性物質層が形成された構成として 、る。 According to the nitride-based semiconductor light-emitting device of the present invention, in the structure in which at least an n-type semiconductor layer, a light-emitting layer, a p-type semiconductor layer, a metal film layer, and a metal plate are laminated in this order, the metal film layer , And metal plate force The structure is partially formed on the p-type semiconductor layer. As a result, it is possible to obtain an element having excellent substrate strength and low reflected light, that is, good light extraction efficiency. In particular, the effect of the present invention can be further exerted by forming the metal film layer and the metallic metal plate in a lattice shape. [0016] Further, according to the nitride-based semiconductor light-emitting device of the present invention, in a structure in which at least an n-type semiconductor layer, a light-emitting layer, a P-type semiconductor layer, a metal film layer, and a metal plate are stacked in this order, The metal film layer and the metal plate are partially formed on the P-type semiconductor layer, and the metal film layer and the metal plate are formed on the p-type semiconductor layer. The light transmitting material layer is formed on the part.
上記構成により、窒化物系半導体発光素子の発光出力が向上するが、これは、透 光性物質に、屈折率が 1. 4〜2. 6と高い物質を使用することによって臨界角が大き くなり、より全反射しに《なるからである。なお、上限が 2. 6なのは、 GaNの屈折率が 2. 6であるのでこれ以上大きくする必要がない。これ以上大きくすると。透光性物質 力 光を取り出すことが難しくなる。  With the above configuration, the light emission output of the nitride-based semiconductor light-emitting device is improved. This is because the critical angle is increased by using a material having a high refractive index of 1.4 to 2.6 as the translucent material. This is because it is more totally reflected. Note that the upper limit is 2.6, because the refractive index of GaN is 2.6, so there is no need to increase it further. If you make it bigger. Translucent material force It becomes difficult to extract light.
本発明では、上記構成により、基板強度に優れるとともに、且つ反射光が少ない、 即ち光取り出し効率が良く発光出力が高い窒化物系半導体発光素子を得ることがで きる。  According to the present invention, a nitride-based semiconductor light-emitting device having excellent substrate strength and low reflected light, that is, high light extraction efficiency and high light emission output can be obtained by the above configuration.
また、本発明の窒化物系半導体発光素子は、特に金属膜層及びメツキ金属板を前 記 P型半導体層上にお!、て平面視交差状態に形成し、前記 p型半導体層上におい て前記金属膜層及び前記メツキ金属板が形成されて 、な 、部分に前記透光性物質 層を形成することにより、本発明の効果はより一層発揮される。  The nitride-based semiconductor light-emitting device of the present invention particularly has a metal film layer and a metal plate formed on the P-type semiconductor layer so as to intersect each other in plan view, and on the p-type semiconductor layer. The effect of the present invention is further exhibited by forming the translucent material layer in the portion where the metal film layer and the metal plate are formed.
図面の簡単な説明  Brief Description of Drawings
[0017] [図 1]本発明の窒化物系化合物半導体発光素子の一例を示す図であり、断面構造を 示した模式図である。  FIG. 1 is a view showing an example of a nitride-based compound semiconductor light-emitting device of the present invention, and is a schematic view showing a cross-sectional structure.
[図 2]本発明の窒化物系化合物半導体発光素子の製造方法を説明する図であり、断 面構造を示した模式図である。  FIG. 2 is a diagram for explaining a method for producing a nitride-based compound semiconductor light-emitting device of the present invention, and is a schematic diagram showing a cross-sectional structure.
[図 3]本発明の窒化物系化合物半導体発光素子の分割前の状態を示す平面図であ る。  FIG. 3 is a plan view showing a state before division of the nitride-based compound semiconductor light-emitting device of the present invention.
[図 4]本発明の窒化物系化合物半導体発光素子の分割前の状態を示す平面図であ る。  FIG. 4 is a plan view showing a state before division of the nitride-based compound semiconductor light-emitting device of the present invention.
[図 5]本発明の窒化物系化合物半導体発光素子の一例を示す図であり、断面構造を 示した模式図である。 [図 6]本発明の窒化物系化合物半導体発光素子の製造方法を説明する図であり、断 面構造を示した模式図である。 FIG. 5 is a view showing an example of the nitride-based compound semiconductor light-emitting device of the present invention, and is a schematic view showing a cross-sectional structure. FIG. 6 is a diagram for explaining a method for producing a nitride-based compound semiconductor light-emitting device of the present invention, and is a schematic diagram showing a cross-sectional structure.
[図 7]本発明の窒化物系化合物半導体発光素子の分割前の状態を示す平面図であ る。  FIG. 7 is a plan view showing a state before division of the nitride-based compound semiconductor light-emitting device of the present invention.
[図 8]本発明の窒化物系化合物半導体発光素子の分割前の状態を示す平面図であ る。  FIG. 8 is a plan view showing a state before division of the nitride-based compound semiconductor light-emitting device of the present invention.
[図 9]本発明の窒化物系化合物半導体発光素子の分割前の状態を示す平面図であ る。  FIG. 9 is a plan view showing a state before division of the nitride-based compound semiconductor light-emitting device of the present invention.
符号の説明  Explanation of symbols
[0018] 1…窒化物系半導体発光素子、 101、 201· ··サファイア基板 (基板)、 102、 202· ··バ ッファ層、 103、 203· ··η型半導体層、 104、 204· ··発光層、 105、 205· ··ρ型半導体 層、 106、 206· ··透明電極、 107、 207· ··ォーミック接触層、 108、 208· ··反射層、 1 09、 209· ··メツキ密着層、 110、 210· ··メツキ金属板、 111· ··正電極、 114、 214· ·· 透光性物質層  [0018] 1 ... Nitride-based semiconductor light emitting device, 101, 201 ··· Sapphire substrate (substrate), 102, 202 ··· Buffer layer, 103, 203 ··· η-type semiconductor layer, 104, 204 ··· · Luminescent layer, 105, 205 ··· ρ type semiconductor layer, 106, 206 ··· Transparent electrode, 107, 207 ··· Omic contact layer, 108, 208 ··· Reflective layer, 1 09, 209 ··· Plating adhesion layer, 110, 210 ··· plating metal plate, 111 ··· positive electrode, 114, 214 ··· translucent material layer
発明を実施するための最良の形態  BEST MODE FOR CARRYING OUT THE INVENTION
[0019] 以下、本発明の窒化物系半導体発光素子の実施形態について、図面を参照して 説明する。 Hereinafter, embodiments of the nitride-based semiconductor light-emitting device of the present invention will be described with reference to the drawings.
ただし、本発明は以下の各実施形態に限定されるものではなぐ例えばこれら実施 形態の構成要素同士を適宜組み合わせても良 、。  However, the present invention is not limited to the following embodiments. For example, the components of these embodiments may be appropriately combined.
[0020] 実施の形態 (その 1) 図 1〜図 4は、本実施形態の窒化物系半導体発光素子を説明 する図であり、図 1は、 η型半導体層、発光層、 ρ型半導体層を形成し、その上にォー ミック接触層、反射層、メツキ密着層を形成し、その上にメツキ金属板を形成した、本 発明の窒化物系半導体発光素子の一例を示す断面模式図である。図 2は、窒化物 系半導体発光素子の製造方法の一例を説明する図であり、本実施形態では、図 1に 示すような上下電極配置型の構造とする前に、図 2に示すような窒化物系半導体層 を形成する。なお、図 1及び図 2に示す 2点鎖線は、平面視交差状態に形成されてい るォーミック接触層、反射層、メツキ密着層、メツキ金属板、及び正電極(図 1の正電 極 111)の一部分を示して 、る。 図 3及び図 4は、窒化物系半導体発光素子の製造方法を説明する平面図であり、 ダイシングライン DL1、 DL2に沿って素子単位に分割することで、本発明の窒化物 系半導体発光素子が得られる。 Embodiment (No. 1) FIGS. 1 to 4 are diagrams for explaining a nitride-based semiconductor light-emitting device of this embodiment. FIG. 1 shows a η-type semiconductor layer, a light-emitting layer, and a ρ-type semiconductor layer. FIG. 2 is a schematic cross-sectional view showing an example of the nitride-based semiconductor light-emitting device of the present invention in which an ohmic contact layer, a reflective layer, and a plating adhesion layer are formed thereon, and a plating metal plate is formed thereon. is there. FIG. 2 is a diagram for explaining an example of a method for manufacturing a nitride-based semiconductor light-emitting device. In this embodiment, before the upper and lower electrode arrangement type structure as shown in FIG. A nitride-based semiconductor layer is formed. The two-dot chain lines shown in FIGS. 1 and 2 indicate the ohmic contact layer, the reflective layer, the plating adhesion layer, the plating metal plate, and the positive electrode (positive electrode 111 in FIG. 1) formed in a crossing state in plan view. Show a part of 3 and 4 are plan views for explaining a method for manufacturing a nitride-based semiconductor light-emitting device, and the nitride-based semiconductor light-emitting device of the present invention is divided into device units along dicing lines DL1, DL2. can get.
[0021] 本実施形態の窒化物系半導体発光素子 1は、 n型半導体層 103、発光層 104、 p 型半導体層 105、透明電極 106、ォーミック接触層 107 (金属膜層)、反射層 108、メ ツキ密着層 109、メツキ金属板 110が、この順序で積層(図 1の上下方向)されてなる また、窒化物系半導体発光素子 1において、透明電極 106上に、反射層 108、メッ キ密着層 109、メツキ金属板 110が、この順序で積層されており、これら各層が p型半 導体層 105上において、十字状に交差して部分的に形成されている。すなわち、図 3に示す断面線 A— Aの方向から見た場合には、図 1に示す例の横幅方向(図 1の左 右方向)で、ォーミック接触層 107、反射層 108、メツキ密着層 109及びメツキ金属板 110の各幅力 透明電極 106の幅より狭ぐ例えば一例として約 30%になるように形 成されている。また、ォーミック接触層 107、反射層 108、メツキ密着層 109及びメッ キ金属板 110の各層の縦幅方向(図 1の紙面垂直方向)は、透明電極 106の幅とほ ぼ同じになるように形成されている。また、図 3に示す断面線 B— Bの方向力も見た場 合も、図 1に示すォーミック接触層 107、反射層 108、メツキ密着層 109及びメツキ金 属板 110の横幅及び縦幅が、上述と同様の関係とされている。 [0021] The nitride-based semiconductor light-emitting device 1 of the present embodiment includes an n-type semiconductor layer 103, a light-emitting layer 104, a p-type semiconductor layer 105, a transparent electrode 106, an ohmic contact layer 107 (metal film layer), a reflective layer 108, A plating adhesion layer 109 and a plating metal plate 110 are laminated in this order (vertical direction in FIG. 1). In the nitride semiconductor light emitting device 1, the reflective layer 108 and the plating adhesion layer are formed on the transparent electrode 106. The layer 109 and the metal plating plate 110 are laminated in this order, and these layers are partially formed on the p-type semiconductor layer 105 so as to cross in a cross shape. That is, when viewed from the direction of the cross-sectional line A—A shown in FIG. 3, the ohmic contact layer 107, the reflective layer 108, and the adhesion adhesion layer in the horizontal width direction (left-right direction in FIG. 1) of the example shown in FIG. Each width force of 109 and metal plating plate 110 is formed to be narrower than the width of transparent electrode 106, for example, about 30%. In addition, the vertical width direction of each layer of the ohmic contact layer 107, the reflective layer 108, the adhesive adhesion layer 109, and the metallic metal plate 110 (the vertical direction in FIG. 1) is almost the same as the width of the transparent electrode 106. Is formed. In addition, when the directional force of the cross-sectional line BB shown in FIG. 3 is also seen, the horizontal width and vertical width of the ohmic contact layer 107, the reflective layer 108, the plating adhesion layer 109, and the plating metal plate 110 shown in FIG. The relationship is the same as described above.
そして、本実施形態では、 n型半導体層 103の下面に、透明電極 112を介して負電 極 113が形成され、メツキ金属板 110の上面に正電極 111が形成されることにより、 上下電極配置型に概略構成されている。  In the present embodiment, the negative electrode 113 is formed on the lower surface of the n-type semiconductor layer 103 via the transparent electrode 112, and the positive electrode 111 is formed on the upper surface of the metal plating plate 110. It is schematically configured.
[0022] 次に、本発明の窒化物系半導体発光素子を作製する際の手順について、図 2及び 図 3に示す例を用いて以下に説明する。 Next, the procedure for producing the nitride-based semiconductor light-emitting device of the present invention will be described below using the examples shown in FIGS.
まず、サファイア基板 (基板) 201上にバッファ層 202を形成し、そのバッファ層 202 を介して、 n型半導体層 203、発光層 204、 p型半導体層 205を積層して窒化物系半 導体層を形成する。このようにして形成された窒化物系半導体の上 (つまり、 p型半導 体層 205上)に、透明電極 206を形成する。これらの n型半導体層 203、発光層 204 、 p型半導体層 205及び透明電極 206は、横幅を図 2に示すようにほぼ同一サイズに 形成し、また、縦幅についてもほぼ同一サイズに形成する。 次いで、透明電極 206 上に、ォーミック接触層 207及び反射層 208を、この順序で積層して形成する。本実 施形態のォーミック接触層 207及び反射層 208は、図 3に示す例のように、各素子単 位で縦横に交差するようにして、平面視格子状のパターンで透明電極 206上に部分 的に形成する。ォーミック接触層 207及び反射層 208のパターン形成は、レジスト材 料を使用することにより、後述する公知のフォトリソグラフィー技術、又はリフトオフ技 術等を用いて行う。 First, a buffer layer 202 is formed on a sapphire substrate (substrate) 201, and an n-type semiconductor layer 203, a light-emitting layer 204, and a p-type semiconductor layer 205 are stacked via the buffer layer 202 to form a nitride-based semiconductor layer. Form. A transparent electrode 206 is formed on the nitride-based semiconductor thus formed (that is, on the p-type semiconductor layer 205). These n-type semiconductor layer 203, light-emitting layer 204, p-type semiconductor layer 205, and transparent electrode 206 have the same width as shown in FIG. In addition, the vertical width is almost the same size. Next, on the transparent electrode 206, an ohmic contact layer 207 and a reflective layer 208 are laminated in this order. The ohmic contact layer 207 and the reflective layer 208 of this embodiment are partially formed on the transparent electrode 206 in a lattice pattern in plan view so as to intersect each element vertically and horizontally as in the example shown in FIG. Form. The pattern formation of the ohmic contact layer 207 and the reflective layer 208 is performed using a known photolithography technique or a lift-off technique described later by using a resist material.
そして、メツキを施すことによってメツキ金属板 210を形成する。本実施形態のメツキ 金属板 210の形成は、メツキを施すォーミック接触層 207及び反射層 208以外の部 分に絶縁性の保護膜を形成してメツキを行うか、またはメツキ用の厚膜レジスト材料を 使用し、公知のフォトリソグラフィー技術もしくはリフトオフ技術によって、ォーミック接 触層 207及び反射層 208のパターンにのみメツキを行う。なお、メツキ処理前に、メッ キ金属板 210と反射層 208 (金属膜層)との密着性を向上させるため、メツキ密着層 2 09を形成することが好ましい。また、メツキ密着層 209は省略しても良い。  Then, the plating metal plate 210 is formed by applying plating. The metal plate 210 according to the present embodiment is formed by forming an insulating protective film on portions other than the ohmic contact layer 207 and the reflective layer 208 to be plated, or by performing a plating or a thick film resist material for plating. Using this, only the pattern of the ohmic contact layer 207 and the reflective layer 208 is measured by a known photolithography technique or lift-off technique. Before the plating process, it is preferable to form the plating adhesion layer 209 in order to improve the adhesion between the plating metal plate 210 and the reflective layer 208 (metal film layer). Further, the adhesion adhesion layer 209 may be omitted.
次いで、サファイア基板 201を剥離し、さらにバッファ層 202を除去する。次いで、 正電極及び負電極を形成することにより、図 1に示す正電極 111及び負電極 112を 形成する。そして、図 3に示すようなダイシングライン DL1、 DL2に沿ってメツキ金属 板 210を素子単位で分割することにより、図 1に示す窒化物系半導体発光素子 1を 得ることができる。  Next, the sapphire substrate 201 is peeled off, and the buffer layer 202 is further removed. Next, a positive electrode 111 and a negative electrode 112 shown in FIG. 1 are formed by forming a positive electrode and a negative electrode. Then, by dividing the metal plate 210 along the dicing lines DL1 and DL2 as shown in FIG. 3, the nitride semiconductor light emitting device 1 shown in FIG. 1 can be obtained.
本実施形態の窒化物系半導体発光素子は、図 1に示すように、 p型半導体層 105 上に透明電極 106を介して積層されているォーミック接触層 107、反射層 108、メッ キ密着層 109及びメツキ金属板 110の各層が、 p型半導体層 105の上面 105aに対 し、透明電極 106を介して、十字状に交差するように、部分的に形成されている。 また、ォーミック接触層 107、反射層 108、メツキ密着層 109及びメツキ金属板 110 の面積、即ちォーミック接触層 107の底部 107aの面積は、 p型半導体層 105の上面 105aの面積に対して、 10〜90%の範囲内の面積比であることが好ましい。図 1の断 面図に示す例では、上述したように、ォーミック接触層 107の底部 107aが、 p型半導 体層 105の上面 105aに対して、つまり、該上面 105aと同寸に形成された透明電極 1 06の上面 106aに対して幅方向(図 1左右方向)で約 30%の幅に形成されている。ま た、図 3の平面図に示す例では、透明電極 206 (p型半導体層 205)上において、各 素子単位で縦横に交差して平面視格子状に形成されたメツキ金属板 210、ォーミツ ク接触層 207及び反射層 208が、各素子上において縦横各約 30%の幅で形成され ており、 p型半導体層 205上の各素子単位の面積比で、つまり、透明電極 206上の 面積比で約 50%とされている。 As shown in FIG. 1, the nitride-based semiconductor light-emitting device of this embodiment includes an ohmic contact layer 107, a reflective layer 108, and a mesh adhesion layer 109 that are stacked on a p-type semiconductor layer 105 via a transparent electrode 106. Each layer of the metal plating plate 110 is partially formed so as to cross the upper surface 105a of the p-type semiconductor layer 105 via the transparent electrode 106 in a cross shape. In addition, the area of the ohmic contact layer 107, the reflective layer 108, the plating adhesion layer 109, and the plating metal plate 110, that is, the area of the bottom 107a of the ohmic contact layer 107 is 10% of the area of the upper surface 105a of the p-type semiconductor layer 105. It is preferable that the area ratio is in a range of ˜90%. In the example shown in the sectional view of FIG. 1, as described above, the bottom 107a of the ohmic contact layer 107 is formed with respect to the upper surface 105a of the p-type semiconductor layer 105, that is, the same size as the upper surface 105a. Transparent electrode 1 The width of the upper surface 106a of 06 is about 30% in the width direction (left and right direction in FIG. 1). In addition, in the example shown in the plan view of FIG. 3, on the transparent electrode 206 (p-type semiconductor layer 205), a metallic metal plate 210, which is formed in a lattice shape in a plan view intersecting vertically and horizontally for each element, The contact layer 207 and the reflective layer 208 are formed with a width of about 30% in each of the vertical and horizontal directions on each element, and the area ratio of each element unit on the p-type semiconductor layer 205, that is, the area ratio on the transparent electrode 206 About 50%.
なお、図 4に示すように、本発明の窒化物系半導体発光素子は、各素子単位で縦 横に交差して平面視格子状に形成されたメツキ金属板 310及びォーミック接触層 30 7の交差部 320を、交差部分が若干、上面視略円形状に膨らんだ膨出部 311を有す る形状としても良い。  As shown in FIG. 4, the nitride-based semiconductor light-emitting device of the present invention intersects the metal plate 310 and the ohmic contact layer 307 formed in a lattice shape in plan view by intersecting each device vertically and horizontally. The portion 320 may have a shape having a bulging portion 311 where the intersecting portion slightly swells in a substantially circular shape when viewed from above.
[0024] 前述の製造工程にお!/、て用いるサファイア基板 201には、サファイア単結晶 (Al O  [0024] A sapphire single crystal (Al 2 O 3) is used for the sapphire substrate 201 used in the above manufacturing process!
2 2
; A面、 C面、 M面、 R面)、スピネル単結晶(AgAl O )、 ZnO単結晶、 LiAlO単結; A face, C face, M face, R face), spinel single crystal (AgAl 2 O 3), ZnO single crystal, LiAlO single bond
3 2 4 2 晶、 LiGaO単結晶、 MgO単結晶などの酸化物単結晶、 Si単結晶、 SiC単結晶、 Ga 3 2 4 2 crystal, LiGaO single crystal, oxide single crystal such as MgO single crystal, Si single crystal, SiC single crystal, Ga
2  2
As単結晶などの公知の基板材料を何ら制限無く用いることができる。 SiCなどの導電 性基板を用いれば、正極と負極を上下に配置させた素子の作製は、基板剥離を行 わなくとも可能である力 その場合には絶縁体であるバッファ層 202を使用することが できなくなるので、サファイア基板 201上に成長する窒化物系半導体層の結晶が劣 化してしまい、良好な半導体素子を形成することができない。本発明においては、導 電性の SiC、 Siを用いた場合でもサファイア基板 201の剥離を行う。  A known substrate material such as As single crystal can be used without any limitation. If a conductive substrate such as SiC is used, it is possible to fabricate a device in which the positive and negative electrodes are arranged one above the other without using the substrate peeling. In that case, the buffer layer 202, which is an insulator, should be used. Therefore, the crystal of the nitride-based semiconductor layer grown on the sapphire substrate 201 deteriorates, and a good semiconductor element cannot be formed. In the present invention, the sapphire substrate 201 is peeled even when conductive SiC or Si is used.
[0025] ノ ッファ層 202は、例えば、サファイア単結晶基板と GaNの格子定数が 10%以上 も異なるため、その中間の格子定数を有する A1Nや AlGaN等力 GaNの結晶性を 向上させるために一般的に使用されており、本発明にお ヽても A1Nや AlGaNが何ら 制限なく用いられる。 [0025] Since the lattice constant of the sapphire single crystal substrate differs from that of the GaN by 10% or more, for example, the noffer layer 202 is generally used to improve the crystallinity of A1N or AlGaN isotropic GaN having an intermediate lattice constant. In the present invention, A1N and AlGaN are used without any limitation.
[0026] 窒化物系半導体は、例えば n型半導体層 103、発光層 104、 p型半導体層 105か らなるヘテロ接合構造で構成される。窒化物系半導体層としては、一般式 Al In Ga _ _ N (0≤x< l、0≤y< l、x+y< l)で表される半導体が多数知られており、本発 明においても一般式 Al InyGa _ _ Ν (0≤χ< 1、 0≤y< l、 x+yく 1)で表される 窒化物系半導体が何ら制限なく用 、られる。 [0027] 窒化物系半導体の成長方法は特に限定されず、有機金属化学気相成長法 (MO CVD)、ハイドライド気相成長法 (HPVE)、分子線エピタキシー法 (MBE)等、 ΠΙ族 窒化物系半導体を成長させることが知られている全ての方法を適用できる。好ましい 成長方法としては、膜厚制御性、量産性の観点力 MOCVD法である。 The nitride-based semiconductor has a heterojunction structure including, for example, an n-type semiconductor layer 103, a light emitting layer 104, and a p-type semiconductor layer 105. There are many known semiconductors represented by the general formula Al In Ga _ _ N (0≤x <l, 0≤y <l, x + y <l) as nitride-based semiconductor layers. Nitride semiconductors represented by the general formula Al InyGa__ (0≤χ <1, 0≤y <l, x + y <1) can be used without any limitation. [0027] The growth method of the nitride-based semiconductor is not particularly limited, and organometallic chemical vapor deposition (MO CVD), hydride vapor deposition (HPVE), molecular beam epitaxy (MBE), etc. All methods known to grow system semiconductors can be applied. A preferred growth method is the MOCVD method, which has the advantages of film thickness controllability and mass productivity.
[0028] MOCVD法では、キャリアガスとして水素 (H )または窒素(N )、 III族原料である  [0028] In the MOCVD method, hydrogen (H) or nitrogen (N) as a carrier gas is a group III material
2 2  twenty two
Ga源としてトリメチルガリウム (TMG)またはトリェチルガリウム (TEG)、 A1源としてトリ メチルアルミニウム (TMA)またはトリェチルアルミニウム (TEA)、 In源としてトリメチ ルインジウム (TMI)またはトリェチルインジウム (TEI)、 V族原料である N源としては アンモニア(NH )、ヒドラジン (N H )などが用いられる。  Trimethylgallium (TMG) or triethylgallium (TEG) as the Ga source, trimethylaluminum (TMA) or triethylaluminum (TEA) as the A1 source, trimethylindium (TMI) or triethylindium (TEI) as the In source, Ammonia (NH 3), hydrazine (NH 2), etc. are used as the N source that is a Group V material.
3 2 4  3 2 4
また、ドーパントとしては、 n型には Si原料としてモノシラン(SiH )またはジシラン(S  In addition, as a dopant, n-type has monosilane (SiH) or disilane (S
4  Four
i H )を、 Ge原料としてゲルマン (GeH )を用い、 p型には Mg原料としては例えばビ i H), germane (GeH) as the Ge source, and p-type
2 6 4 2 6 4
スシクロペンタジェニルマグネシウム(Cp Mg)またはビスェチルシクロペンタジェ二  Sucyclopentagenyl magnesium (Cp Mg) or bisethylcyclopentadenyl
2  2
ノレマグネシウム((EtCp) Mg)を用いる。  Noregnesium ((EtCp) Mg) is used.
2  2
[0029] 窒化物系半導体をサファイア基板上で分割する方法としては、エッチング法、レー ザカッティング法など公知の技術を何ら制限なく用いることが出来る。レーザリフトォ フ法を用いる場合、窒化物系半導体を分割する際に、サファイア基板 101にダメージ を与えないようにすることが、良好な基板剥離を行う点で好ましい。従って、エツチン グ法で分割する場合、窒化物系半導体に対してはエッチングレートが早ぐサフアイ ァ基板 101に対してはエッチングレートが遅 、手法を用いることが好まし 、。レーザ で分割する場合は、 GaNとサファイアに対する吸収波長の違いから、 300〜400nm の波長を持ったレーザを用いることが好まし 、。  [0029] As a method of dividing the nitride-based semiconductor on the sapphire substrate, a known technique such as an etching method or a laser cutting method can be used without any limitation. When the laser lift-off method is used, it is preferable that the sapphire substrate 101 is not damaged when the nitride-based semiconductor is divided from the viewpoint of good substrate peeling. Therefore, when dividing by the etching method, it is preferable to use a method in which the etching rate is low for the nitride substrate 101 and the etching rate is low for the sapphire substrate 101. When dividing with a laser, it is preferable to use a laser with a wavelength of 300 to 400 nm because of the difference in absorption wavelength between GaN and sapphire.
[0030] ォーミック接触層 107に要求される性能としては、 p型半導体層 105との接触抵抗 が小さいことが必須である。  [0030] As the performance required for the ohmic contact layer 107, it is essential that the contact resistance with the p-type semiconductor layer 105 is small.
ォーミック接触層 107の材料としては、 p型半導体層 105との接触抵抗の観点から、 Pt、 Ru、 Os、 Rh、 Ir、 Pd等の白金族、または Agを用いることが好ましい。さらに好ま しくは、 Pt、 Ir、 Rh及び Ruであり、 Ptが特に好ましい。  As a material for the ohmic contact layer 107, from the viewpoint of contact resistance with the p-type semiconductor layer 105, it is preferable to use a platinum group such as Pt, Ru, Os, Rh, Ir, and Pd, or Ag. More preferred are Pt, Ir, Rh and Ru, with Pt being particularly preferred.
ォーミック接触層 106に Agを用いることは、良好な反射を得るためには好ま 、が 、接触抵抗は Ptよりも大きい。したがって、接触抵抗がそれほど要求されない用途に は Agを用いることも可能である。 The use of Ag for the ohmic contact layer 106 is preferred for obtaining good reflection, but the contact resistance is larger than Pt. Therefore, for applications that do not require much contact resistance Can also use Ag.
但し、 p型半導体層 105上に透明電極 106があら力じめ形成される場合は、透明電 極 106と p型半導体層 105間の接触抵抗が大きぐ透明電極 106とォーミック接触層 107との接触抵抗は小さくなるので、ォーミック接触層 107としては上記の材料以外 に Ti、 V、 Cr、 Co、 Ni、 Zr、 Nb、 Mo、 Hf、 Ta、 Wなどを用!/、ること、できる。  However, when the transparent electrode 106 is formed on the p-type semiconductor layer 105 by force, the contact resistance between the transparent electrode 106 and the p-type semiconductor layer 105 is large. Since the contact resistance is reduced, the ohmic contact layer 107 can be made of Ti, V, Cr, Co, Ni, Zr, Nb, Mo, Hf, Ta, W, etc. in addition to the above materials!
[0031] ォーミック接触層 107の厚さは、低接触抵抗を安定して得るために 0. lnm以上と することが好ましい。さらに好ましくは lnm以上であり、均一な接触抵抗が得られる。 また、ォーミック接触層 107上には、 Ag合金等力もなる反射層 108を設けても良い 。 Pt、 Ir、 Rh、 Ru、 OS、 Pd等は、 Ag合金と比較すると可視光から紫外領域の反射 率が低い。したがって、発光層 104からの光が十分に反射せず、発光出力の高い素 子を得ることが難しい。この場合、ォーミック接触層 107を、光が十分に透過するよう に薄く形成し、 Ag合金等からなる反射層 108を形成して反射光を得る方が、良好な ォーミック接触が得られ、かつ出力の高い素子を作製することができる。この場合の ォーミック接触層 107の膜厚は 30nm以下とすることが好ましい。さらに好ましくは 10 nm以下である。 [0031] The thickness of the ohmic contact layer 107 is preferably 0.1 nm or more in order to stably obtain a low contact resistance. More preferably, it is 1 nm or more, and uniform contact resistance can be obtained. Further, on the ohmic contact layer 107, a reflective layer 108 having an Ag alloy isotropic force may be provided. Pt, Ir, Rh, Ru, OS, Pd, etc. have lower reflectivity from visible light to ultraviolet region than Ag alloy. Therefore, light from the light emitting layer 104 is not sufficiently reflected, and it is difficult to obtain an element with high light emission output. In this case, if the ohmic contact layer 107 is thinly formed so that light can be sufficiently transmitted, and the reflection layer 108 made of an Ag alloy or the like is formed to obtain reflected light, good ohmic contact can be obtained and output can be obtained. It is possible to manufacture a device having a high height. In this case, the film thickness of the ohmic contact layer 107 is preferably 30 nm or less. More preferably, it is 10 nm or less.
ォーミック接触層 107および反射層 108の成膜方法にっ 、ては、特に制限されるこ とはなく公知のスパッタ法ゃ蒸着法を用いることができる。  The method for forming the ohmic contact layer 107 and the reflective layer 108 is not particularly limited, and a known sputtering method or vapor deposition method can be used.
[0032] 反射層 108には Ag合金を用いることが好ま 、。 [0032] It is preferable to use an Ag alloy for the reflective layer 108.
反射層 108の膜厚は、良好な反射率を得るためには 0. lnm以上とすることが好ま しい。さらに好ましくは lnm以上であり、良好な反射率が得られる。また、 Ag合金は マイグレーションを起こしやすいので、メツキにより保護するとはいえ、より薄い方が好 ましい。したがって、膜厚は 200nm以下とすることがより好ましい。  The thickness of the reflective layer 108 is preferably 0.1 nm or more in order to obtain good reflectance. More preferably, it is lnm or more, and good reflectance can be obtained. In addition, Ag alloy is prone to migration, so it is better to make it thinner, although it can be protected by glazing. Therefore, the film thickness is more preferably 200 nm or less.
反射層 108の成膜方法については、特に制限されることはなく公知のスパッタ法ゃ 蒸着法を用いることができる。スパッタ法はスパッタ粒子が高エネルギーを持って基 板表面に衝突して成膜されるので、密着力の高い膜を得ることができる。したがって、 スパッタ法を用いることがより好まし 、。  The method for forming the reflective layer 108 is not particularly limited, and a known sputtering method or vapor deposition method can be used. In the sputtering method, since the sputtered particles collide with the substrate surface with high energy to form a film, a film having high adhesion can be obtained. Therefore, it is more preferable to use the sputtering method.
[0033] 透明電極 106には、 ITO (In Sn— O合金)、 IZO (In— Zn— O合金)、 AZO (Zn — Al— O合金)等、公知の材料をなんら制限無く用いることができる。 透明電極 106の厚さは、低接触抵抗を安定して得るために lOOnm以上とすること が好ましい。透明電極 106にも光は吸収されるので、厚くなりすぎると出力が低下しし まう。このため、透明電極 106は 1 μ m以下とすることが好ましい。 For the transparent electrode 106, known materials such as ITO (In Sn—O alloy), IZO (In—Zn—O alloy), AZO (Zn —Al—O alloy) can be used without any limitation. . The thickness of the transparent electrode 106 is preferably set to lOOnm or more in order to stably obtain a low contact resistance. Light is also absorbed by the transparent electrode 106, so if it is too thick, the output will decrease. Therefore, the transparent electrode 106 is preferably 1 μm or less.
また、透明電極 106は、 p型半導体層上 105上の全面に形成されることが電流拡散 の点で好ましい。  The transparent electrode 106 is preferably formed on the entire surface on the p-type semiconductor layer 105 from the viewpoint of current diffusion.
透明電極 106の成膜方法については、特に制限されることはなく公知のスパッタ法 や蒸着法を用いることができる。さらに、成膜後、 100°C〜300°Cの温度でァニール することが、透過率やシート抵抗の低減に有効である。  A method for forming the transparent electrode 106 is not particularly limited, and a known sputtering method or vapor deposition method can be used. Furthermore, annealing at a temperature of 100 ° C to 300 ° C after film formation is effective in reducing transmittance and sheet resistance.
[0034] なお、密着性向上のため、メツキ金属板 110の直下、即ちメツキ金属板 110と反射 層 108との間にメツキ密着層 109を形成しても良い。メツキ密着層 109の材料は、メッ キ金属板 110に使用するメツキによって異なってくる力 メツキ成分に主に含まれる物 質を多く含んでいたほうが密着性を向上させる。例えば、メツキ密着層 109は、メツキ 金属板 110の 50重量%以上を占める主成分と同一の組成を、 50重量%以上含有 する構成とすることが好まし 、。  In order to improve the adhesion, a plating adhesion layer 109 may be formed immediately below the plating metal plate 110, that is, between the plating metal plate 110 and the reflective layer 108. The adhesion of the plating adhesion layer 109 is improved if it contains a large amount of substances mainly contained in the plating composition depending on the plating used for the plating metal plate 110. For example, the plating adhesion layer 109 preferably contains 50% by weight or more of the same composition as the main component occupying 50% by weight or more of the plating metal plate 110.
[0035] また、メツキ金属板 110に NiPメツキを用いる場合、メツキ密着層には Ni系合金を用 いることが好ましい。さらに好ましくは NiP合金を用いることである。また、メツキ金属板 110に Cuメツキを用いる場合、メツキ密着層には Cu系合金を用いることが好ま 、。 さらに好ましくは Cuを用 、ることである。  [0035] Further, when NiP plating is used for the plating metal plate 110, it is preferable to use a Ni-based alloy for the plating adhesion layer. More preferably, a NiP alloy is used. In addition, when using a Cu plating for the plating metal plate 110, it is preferable to use a Cu-based alloy for the plating adhesion layer. More preferably, Cu is used.
メツキ密着層 109の厚さは、良好な密着性を得るために 0. lnm以上とすることが好 ましい。さらに好ましくは lnm以上であり、均一な密着性が得られる。メツキ密着層 10 9の厚さに特に上限はないが、生産性の観点から 2 μ m以下にすることが好ましい。 メツキ密着層 109の成膜方法については、特に制限されることはなく公知のスパッタ 法や蒸着法を用いることができる。スパッタ法は、スパッタ粒子が高エネルギーを持つ て基板表面に衝突して成膜されるので、密着性の高い膜を得ることができる。したが つて、スパッタ法を用いることがより好ましい。  The thickness of the adhesion adhesion layer 109 is preferably 0.1 nm or more in order to obtain good adhesion. More preferably, it is 1 nm or more, and uniform adhesion can be obtained. The thickness of the adhesion adhesion layer 109 is not particularly limited, but is preferably 2 μm or less from the viewpoint of productivity. The method for forming the adhesion adhesion layer 109 is not particularly limited, and a known sputtering method or vapor deposition method can be used. In the sputtering method, the sputtered particles have high energy and collide with the substrate surface to form a film, so that a film with high adhesion can be obtained. Therefore, it is more preferable to use the sputtering method.
[0036] メツキ金属板 110には、無電解メツキ、電解メツキのどちらでも用いることができる。  [0036] Either the electroless plating or the electrolytic plating can be used for the plating metal plate 110.
無電解メツキの場合、材料としては NiP合金メッキを用いることが好ましぐ電解メツキ の場合、材料としては Cuを用いることが好ましい。 メツキ金属板 110の厚さは、基板としての強度を保っために 10 m以上とすること が好ましい。また、メツキ金属板 110が厚すぎるとメツキの剥離が起こりやすくなり、か つ生産性も低くなるので 200 m以下とすることが好ましい。 In the case of electroless plating, it is preferable to use NiP alloy plating as the material. In the case of electrolytic plating, it is preferable to use Cu as the material. The thickness of the metal plating plate 110 is preferably 10 m or more in order to maintain the strength as a substrate. Further, if the plating metal plate 110 is too thick, peeling of the plating tends to occur and the productivity is lowered, so that the thickness is preferably 200 m or less.
メツキを実施する際は、窒化物系半導体発光素子の表面を、汎用の中性洗剤等を 用いて、予め脱脂洗浄しておくことが好ましい。また、硝酸などの酸を用いてメツキ密 着層等の表面に化学エッチングを施すことにより、メツキ密着層上の自然酸ィ匕膜を除 去するのが好ましい。  When carrying out the measurement, it is preferable to degrease and clean the surface of the nitride-based semiconductor light-emitting element in advance using a general-purpose neutral detergent or the like. Further, it is preferable to remove the natural acid film on the adhesion adhesion layer by performing chemical etching on the surface of the adhesion adhesion layer using an acid such as nitric acid.
NiPメツキ等のメツキ処理方法としては、メツキ浴として、例えば、硫酸ニッケル、塩 化ニッケルなどのニッケル源と、次亜リン酸塩などのリン源を含むものを用いた無電 解メツキ処理法を採用することができる。無電解メツキ法に用いられるメツキ浴として好 適な市販品としては、上村工業製の-ムデン HDXなどがある。無電解メツキ処理を 行う際のメツキ浴の ρΗは 4〜 10、温度は 30〜95°Cとすることが好ましい。  As a plating treatment method for NiP plating, etc., an electroless plating treatment method using a nickel bath such as nickel sulfate or nickel chloride and a phosphorus source such as hypophosphite is used as the plating bath. can do. A commercially available product suitable as a plating bath for use in the electroless plating method is Muden HDX manufactured by Uemura Kogyo. It is preferable that ρΗ of the plating bath when performing the electroless plating treatment is 4 to 10 and the temperature is 30 to 95 ° C.
[0037] Cuまたは Cu合金のメツキ処理方法としては、メツキ浴として、例えば硫酸銅などの Cu源を用いる電解メツキ処理法を採用することができる。電気メツキ処理を行う際のメ ツキ浴の pHは 2以下の強酸条件下で実施することが好ましい。温度は 10〜50°Cと することが好ましぐ常温(25°C)で実施することがより好ましい。電流密度は 0. 5〜1 0AZdm2で実施することが好ましく、 2〜4AZdm2で実施することがより好まし 、。 また、表面を平滑ィ匕させるためにレべリング剤を添加することがより好ましい。レベリ ング剤に用いられる市販品としては、例えば上村工業製の ETN— 1— Aや ETN— 1 Bなどが用いられる。 [0037] As a plating treatment method for Cu or Cu alloy, an electrolytic plating treatment method using a Cu source such as copper sulfate as a plating bath can be employed. The pH of the plating bath during the electro plating treatment is preferably 2 or less under strong acid conditions. The temperature is more preferably 10 to 50 ° C, more preferably room temperature (25 ° C). The current density is preferably 0.5 to 10 AZdm2, more preferably 2 to 4 AZdm2. Further, it is more preferable to add a leveling agent to smooth the surface. Examples of commercially available products used for the leveling agent include ETN-1A and ETN-1B manufactured by Uemura Kogyo.
[0038] 上述のようにして得られたメツキ金属板 110の密着性を向上させるため、熱処理を 行うことが好ましい。熱処理温度は 100〜300°Cの範囲とすること力 密着性向上の 点から好ましい。熱処理温度を上述の範囲以上とすると、密着性がさらに向上する可 能性はあるものの、ォーミック性が低下してしまう虞がある。  [0038] Heat treatment is preferably performed to improve the adhesion of the metal sheet 110 obtained as described above. The heat treatment temperature should be in the range of 100 to 300 ° C. This is preferable from the viewpoint of improving adhesion. If the heat treatment temperature is at least the above range, the adhesiveness may be further improved, but the ohmic property may be lowered.
[0039] ォーミック接触層 107及び反射層 108 (金属膜層)、メツキ金属板 110を、 p型半導 体層 105
Figure imgf000018_0001
ヽて部分的に形成する方法としては、 Vヽくつかの方 法が考えられる。
[0039] The ohmic contact layer 107, the reflective layer 108 (metal film layer), and the metal plating plate 110 are connected to the p-type semiconductor layer 105.
Figure imgf000018_0001
There are several methods that can be used to form partly.
ォーミック接触層 107及び反射層 108を部分的に形成する方法としては、公知のフ オトリソグラフィー技術、及びリフトオフ技術を用いることができる。 As a method of partially forming the ohmic contact layer 107 and the reflective layer 108, a known film is used. Photolithographic techniques and lift-off techniques can be used.
[0040] メツキ金属板 110を部分的に形成する方法としては、以下の 2つの方法が主として 考えられる。  [0040] The following two methods are mainly conceivable as a method of partially forming the metallic metal plate 110.
(1)メツキを施すォーミック接触層 107及び反射層 108以外の部分に、絶縁性の保 護膜を形成する。メツキは絶縁体上には成長しないので、ノターンィ匕されたォーミツ ク接触層 107及び反射層 108上にのみ形成される。  (1) An insulating protective film is formed on portions other than the ohmic contact layer 107 and the reflective layer 108 to be plated. Since the plating does not grow on the insulator, it is formed only on the nominated optical contact layer 107 and the reflective layer 108.
(2)メツキ用の厚膜レジスト材料を使用して、公知のフォトリソグラフィー技術およびリ フトオフ技術を用いる。  (2) Using a thick film resist material for plating, a known photolithography technique and a lift-off technique are used.
[0041] ォーミック接触層 107、反射層 108、メツキ金属板 110のパターン形状にっ 、ては、 これら各層が P型半導体層 105上にぉ 、て占める部分をできるだけ減らすことと、メッ キ金属板 110が基板としての強度を保つこととの相反する性質のバランスをとつた形 状とすることが必要である。  [0041] According to the pattern shape of the ohmic contact layer 107, the reflective layer 108, and the metal plating plate 110, the portion occupied by these layers on the P-type semiconductor layer 105 should be reduced as much as possible. It is necessary that 110 has a shape that balances the contradictory properties of maintaining strength as a substrate.
ォーミック接触層 107、反射層 108、メツキ金属板 110のパターンは、図 3及び図 4 に示すような十字状に形成することが、 p型半導体層 105上にお ヽて占める部分をで きるだけ少なくしながら基板強度を保つ点で好ましい。  The pattern of the ohmic contact layer 107, the reflective layer 108, and the metal plating plate 110 can be formed in a cross shape as shown in FIGS. 3 and 4 as much as possible on the p-type semiconductor layer 105. This is preferable in terms of maintaining the substrate strength while reducing the amount.
し力しながら、ォーミック接触層 107、反射層 108、メツキ金属板 110のパターンは、 図 3及び図 4に示すような形状に限るものではなぐ透明電極 106上において格子状 、あるいは網目状、クロスライン状、櫛歯状、円環状、角環状、 L字状、 Y字状等、い ずれの形状であっても良ぐ上述の基板強度や後述する金属パッド取付性を考慮し ながら適宜決定することができる。  However, the pattern of the ohmic contact layer 107, the reflective layer 108, and the metal plating plate 110 is not limited to the shape shown in FIGS. Any shape such as line shape, comb shape, annular shape, annular shape, L shape, Y shape, etc. may be used. be able to.
[0042] また、ボンディング用のワイヤーを着けやすくするために、金属パッドが装着される 部分の面積を広く形成することが好ましい。例えば、図 4に示すように、素子中心部の メツキ金属板 310の交差部 320を、膨出部 311を有した平面視略円形状として大きく 形成することが、金属パッド装着のためには好まし!/、。  [0042] Further, in order to make it easy to attach the bonding wire, it is preferable that the area of the portion where the metal pad is attached is formed wide. For example, as shown in FIG. 4, it is preferable for the metal pad to be attached that the intersecting portion 320 of the metal plate 310 at the center of the element is formed to have a substantially circular shape with a bulging portion 311 in plan view. Better!/,.
[0043] メツキ金属板 110の形成後、サファイア基板(図 2のサファイア基板 201参照)の剥 離を行う。サファイア基板を剥離する方法としては、研磨法、エッチング法、レーザリ フトオフ法など公知の技術を何ら制限なく用いることが出来る。  [0043] After the metal plating plate 110 is formed, the sapphire substrate (see the sapphire substrate 201 in FIG. 2) is peeled off. As a method for peeling the sapphire substrate, a known technique such as a polishing method, an etching method, or a laser lift-off method can be used without any limitation.
サファイア基板を剥離した後、研磨法、エッチング法などによりバッファ層(図 2のバ ッファ層 202参照)を除去し、 n型半導体層 103を露出させ、該 n型半導体層 103上 に図示略の負極を形成する。負極としては、公知の各種組成及び構造のものを、何 ら制限なく用いることが出来る。 After the sapphire substrate is peeled off, the buffer layer (Fig. 2 The n-type semiconductor layer 103 is exposed, and a negative electrode (not shown) is formed on the n-type semiconductor layer 103. As the negative electrode, those of various known compositions and structures can be used without any limitation.
また、正極としては、 Au、 Al、 Ni及び Cu等の材料を用いた各種構造が公知であり 、これら公知の材料を何ら制限なく用いることが出来る。  As the positive electrode, various structures using materials such as Au, Al, Ni, and Cu are known, and these known materials can be used without any limitation.
[0044] 実施の形態 (その 2) また、以下、本発明の窒化物系半導体発光素子のその他の実 施形態について、図面を参照して説明する。  Embodiment (No. 2) Further, hereinafter, other embodiments of the nitride-based semiconductor light-emitting device of the present invention will be described with reference to the drawings.
[0045] 図 5〜図 8は、本実施形態の窒化物系半導体発光素子を説明する図であり、図 5は 、 n型半導体層、発光層、 p型半導体層を形成し、その上にォーミック接触層、反射 層、メツキ密着層を部分的に形成し、その上にメツキ金属板を形成するとともに、 p型 半導体層上に部分的に透光性物質層を形成した本発明の窒化物系半導体発光素 子の一例を示す断面模式図である。図 6は、窒化物系半導体発光素子の製造方法 の一例を説明する図であり、本実施形態では、図 5に示すような上下電極配置型の 構造とする前に、図 6に示すような窒化物系半導体層を形成する。なお、図 5に示す 2点鎖線は、平面視交差状態に形成されて!ヽるメツキ金属板上に形成された正電極 の一部分を示しており、図 6に示す 2点鎖線は、平面視交差状態に形成されているォ 一ミック接触層、反射層、メツキ密着層及びメツキ金属板の一部分を示している。 図 7〜9は、窒化物系半導体発光素子の製造方法を説明する平面図であり、基板 上に複数並べて形成した窒化物系半導体発光素子に対し、ダイシングライン DL 1、 DL2に沿って素子単位に分割することで、本発明の窒化物系半導体発光素子が得 られる。  5 to 8 are diagrams for explaining the nitride-based semiconductor light-emitting device of this embodiment. FIG. 5 shows an n-type semiconductor layer, a light-emitting layer, and a p-type semiconductor layer formed thereon, and FIG. The nitride of the present invention in which an ohmic contact layer, a reflective layer, and a plating adhesion layer are partially formed, a plating metal plate is formed thereon, and a translucent material layer is partially formed on the p-type semiconductor layer FIG. 3 is a schematic cross-sectional view showing an example of a semiconductor light emitting device. FIG. 6 is a diagram for explaining an example of a method for manufacturing a nitride-based semiconductor light-emitting device. In this embodiment, before the structure of the upper and lower electrode arrangement type as shown in FIG. A nitride-based semiconductor layer is formed. In addition, the two-dot chain line shown in Fig. 5 is formed in an intersecting state in plan view! 6 shows a part of the positive electrode formed on the plating metal plate, and the two-dot chain line shown in FIG. 6 indicates the ohmic contact layer, the reflective layer, the plating adhesion layer, A part of the metal plate is shown. FIGS. 7 to 9 are plan views for explaining a method for manufacturing a nitride semiconductor light-emitting device, in which a plurality of nitride-based semiconductor light-emitting devices formed on a substrate are arranged along dicing lines DL 1 and DL2. By dividing into the above, the nitride-based semiconductor light-emitting device of the present invention can be obtained.
[0046] 本実施形態の窒化物系半導体発光素子 1は、 n型半導体層 103、発光層 104、 p 型半導体層 105、透明電極 106、ォーミック接触層 107 (金属膜層)、反射層 108、メ ツキ密着層 109、メツキ金属板 110が、この順序で積層(図 5の上下方向)されてなる また、窒化物系半導体発光素子 1において、透明電極 106上に、反射層 108、メッ キ密着層 109、メツキ金属板 110が、この順序で積層されており、これら各層が p型半 導体層 105上において、平面視十字状に交差して部分的に形成されている。すなわ ち、図 7に示す断面線 A— Aの方向から見た場合には、図 5に示す例の横幅方向(図 5の左右方向)で、ォーミック接触層 107、反射層 108、メツキ密着層 109及びメツキ 金属板 110の各幅が、透明電極 106の幅の約 30%になるように形成されている。ま た、ォーミック接触層 107、反射層 108、メツキ密着層 109及びメツキ金属板 110の各 層の縦幅方向(図 5の紙面垂直方向)は、透明電極 106の幅の 100%になるように形 成されている。また、図 7に示す断面線 B— Bの方向から見た場合も、図 5に示すォー ミック接触層 107、反射層 108、メツキ密着層 109及びメツキ金属板 110の横幅及び 縦幅が、上述と同様の関係とされている。 The nitride-based semiconductor light-emitting device 1 of the present embodiment includes an n-type semiconductor layer 103, a light-emitting layer 104, a p-type semiconductor layer 105, a transparent electrode 106, an ohmic contact layer 107 (metal film layer), a reflective layer 108, The plating adhesion layer 109 and the plating metal plate 110 are laminated in this order (the vertical direction in FIG. 5). In the nitride semiconductor light emitting device 1, the reflective layer 108 and the plating adhesion are formed on the transparent electrode 106. The layer 109 and the metal plating plate 110 are laminated in this order, and these layers are partially formed on the p-type semiconductor layer 105 so as to intersect in a cross shape in plan view. Snow In other words, when viewed from the direction of the cross-sectional line A—A shown in FIG. 7, the ohmic contact layer 107, the reflective layer 108, and the adhesion adhesion layer 109 in the horizontal width direction (left-right direction in FIG. 5) of the example shown in FIG. Further, each width of the metal plate 110 is formed to be about 30% of the width of the transparent electrode 106. In addition, the vertical width direction of each layer of the ohmic contact layer 107, the reflective layer 108, the plating adhesion layer 109, and the plating metal plate 110 (the vertical direction in FIG. 5) is 100% of the width of the transparent electrode 106. It is formed. Also, when viewed from the direction of the cross-sectional line BB shown in FIG. 7, the horizontal width and the vertical width of the ohmic contact layer 107, the reflective layer 108, the plating adhesion layer 109, and the plating metal plate 110 shown in FIG. The relationship is the same as described above.
また、本実施形態では、透明電極 106上において、ォーミック接触層 107、反射層 108、メツキ密着層 109及びメツキ金属板 110が形成されていない部分に、透光性物 質層 114が形成されている。  Further, in the present embodiment, the transparent material layer 114 is formed on the transparent electrode 106 in a portion where the ohmic contact layer 107, the reflective layer 108, the plating adhesion layer 109, and the plating metal plate 110 are not formed. Yes.
そして、本実施形態では、 n型半導体層 103の下面に、透明電極 112を介して負電 極 113が形成され、メツキ金属板 110の上面に正電極 111が形成されることにより、 上下電極配置型に概略構成されている。  In the present embodiment, the negative electrode 113 is formed on the lower surface of the n-type semiconductor layer 103 via the transparent electrode 112, and the positive electrode 111 is formed on the upper surface of the metal plating plate 110. It is schematically configured.
次に、本発明の窒化物系半導体発光素子を作製する際の手順について、図 6、図 7及び図 8に示す例を用いて以下に説明する。  Next, the procedure for fabricating the nitride-based semiconductor light-emitting device of the present invention will be described below using the examples shown in FIGS.
まず、サファイア基板 (基板) 201上にバッファ層 202を形成し、そのバッファ層 202 を介して、 n型半導体層 203、発光層 204、 p型半導体層 205を積層して窒化物系半 導体層を形成する。このようにして形成された窒化物系半導体の上 (つまり、 p型半導 体層 205上)に、透明電極 206を形成する。これらの n型半導体層 203、発光層 204 、 p型半導体層 205及び透明電極 206は、横幅を図 6に示すように同一サイズに形成 し、また、縦幅についても同一サイズに形成する。  First, a buffer layer 202 is formed on a sapphire substrate (substrate) 201, and an n-type semiconductor layer 203, a light-emitting layer 204, and a p-type semiconductor layer 205 are stacked via the buffer layer 202 to form a nitride-based semiconductor layer. Form. A transparent electrode 206 is formed on the nitride-based semiconductor thus formed (that is, on the p-type semiconductor layer 205). The n-type semiconductor layer 203, the light emitting layer 204, the p-type semiconductor layer 205, and the transparent electrode 206 are formed to have the same horizontal width as shown in FIG. 6, and also to the same vertical size.
次いで、透明電極 206上に、ォーミック接触層 207及び反射層 208を、この順序で 積層して形成する。本実施形態のォーミック接触層 207及び反射層 208は、図 7に 示す例のように、各素子単位で縦横に交差するようにして、平面視格子状のパターン で透明電極 206上に部分的に形成する。ォーミック接触層 207及び反射層 208のパ ターン形成は、レジスト材料を使用することにより、後述する公知のフォトリソグラフィ 一技術、又はリフトオフ技術等を用いて行う。 そして、メツキを施すことによってメツキ金属板 210を形成する。本実施形態のメツキ 金属板 210の形成は、メツキを施すォーミック接触層 207及び反射層 208を形成す るべき部分以外の部分に絶縁性の保護膜を形成してメツキを行うか、またはメツキ用 の厚膜レジスト材料を使用し、公知のフォトリソグラフィー技術もしくはリフトオフ技術 によって、ォーミック接触層 207及び反射層 208のパターンにのみメツキを行う。なお 、メツキ処理前に、メツキ金属板 210と反射層 208 (金属膜層)との密着性を向上させ るため、メツキ密着層 209を形成することが好ましい。また、メツキ密着層 209は省略 しても良い。 Next, on the transparent electrode 206, an ohmic contact layer 207 and a reflective layer 208 are formed by laminating in this order. As in the example shown in FIG. 7, the ohmic contact layer 207 and the reflective layer 208 according to the present embodiment are partially formed on the transparent electrode 206 in a lattice-like pattern in plan view so as to intersect each other vertically and horizontally. Form. The pattern formation of the ohmic contact layer 207 and the reflective layer 208 is performed by using a known photolithography technique or a lift-off technique described later by using a resist material. Then, the plating metal plate 210 is formed by applying plating. The metal plate 210 of the present embodiment is formed by forming an insulating protective film on a portion other than the portion where the ohmic contact layer 207 and the reflective layer 208 to be plated are to be formed, or for the plating. The thick film resist material is used, and only the pattern of the ohmic contact layer 207 and the reflective layer 208 is measured by a known photolithography technique or lift-off technique. Before the plating process, it is preferable to form the plating adhesion layer 209 in order to improve the adhesion between the plating metal plate 210 and the reflective layer 208 (metal film layer). Further, the adhesion adhesion layer 209 may be omitted.
[0048] 次いで、図 8に示すように、透明電極 206上において、ォーミック接触層 207、反射 層 208、メツキ密着層 209及びメツキ金属板 210が形成されていない部分に、透光性 物質層 214を形成する。図 8に示す例では、透明電極 206上において、十字状に形 成されたォーミック接触層 207、反射層 208、メツキ密着層 209及びメツキ金属板 21 0が形成されて 、な 、部分に、隙間無く透光性物質層 214を形成して 、る。  Next, as shown in FIG. 8, on the transparent electrode 206, the translucent material layer 214 is formed in a portion where the ohmic contact layer 207, the reflective layer 208, the metal adhesion layer 209, and the metal metal plate 210 are not formed. Form. In the example shown in FIG. 8, an ohmic contact layer 207, a reflection layer 208, a plating adhesion layer 209, and a plating metal plate 210 formed in a cross shape are formed on the transparent electrode 206, and a gap is formed in the portion. Without forming the translucent material layer 214.
次いで、サファイア基板 201を剥離し、さらにバッファ層 202を除去する。次いで、 正電極及び負電極を形成することにより、図 5に示す正電極 111及び負電極 112を 形成する。そして、図 7に示すようなダイシングライン DL1、 DL2に沿ってメツキ金属 板 210を素子単位で分割することにより、図 5に示す窒化物系半導体発光素子 1を 得ることができる。  Next, the sapphire substrate 201 is peeled off, and the buffer layer 202 is further removed. Next, a positive electrode 111 and a negative electrode 112 shown in FIG. 5 are formed by forming a positive electrode and a negative electrode. Then, by dividing the metal plate 210 along the dicing lines DL1 and DL2 as shown in FIG. 7, the nitride semiconductor light emitting device 1 shown in FIG. 5 can be obtained.
[0049] 本実施形態の窒化物系半導体発光素子は、図 5に示すように、 p型半導体層 105 上に透明電極 106を介して積層されているォーミック接触層 107、反射層 108、メッ キ密着層 109及びメツキ金属板 110の各層が、 p型半導体層 105の上面 105aに対 し、透明電極 106を介して、十字状に交差するように、部分的に形成されている。 また、透明電極 106上において、ォーミック接触層 107、反射層 108、メツキ密着層 109及びメツキ金属板 110が形成されて ヽな 、部分に、透光性物質層 114が形成さ れている。  As shown in FIG. 5, the nitride-based semiconductor light-emitting device of this embodiment includes an ohmic contact layer 107, a reflective layer 108, a mesh layer laminated on a p-type semiconductor layer 105 with a transparent electrode 106 interposed therebetween. Each layer of the adhesion layer 109 and the metal plating plate 110 is partially formed so as to intersect with the upper surface 105a of the p-type semiconductor layer 105 via the transparent electrode 106 in a cross shape. Further, on the transparent electrode 106, the translucent material layer 114 is formed in a portion where the ohmic contact layer 107, the reflection layer 108, the plating adhesion layer 109 and the plating metal plate 110 are formed.
[0050] なお、ォーミック接触層 107、反射層 108、メツキ密着層 109及びメツキ金属板 110 の面積、即ちォーミック接触層 107の底部 107aの面積は、 p型半導体層 105の上面 105aの面積に対して、 10〜90%の範囲内の面積比であることが好ましい。 図 5の断面図に示す例では、上述したように、ォーミック接触層 107の底部 107aが 、 p型半導体層 105の上面 105aに対して、つまり、該上面 105aと同寸に形成された 透明電極 106の上面 106aに対して幅方向(図 5左右方向)で約 30%の幅に形成さ れている。また、図 7及び図 8の平面図に示す例では、透明電極 206 (p型半導体層 2 05)上において、各素子単位で縦横に交差して平面視格子状に形成されたメツキ金 属板 210、ォーミック接触層 207及び反射層 208が、各素子上において縦横各約 30 %の幅で形成されており、 p型半導体層 205上の各素子単位の面積比で、つまり、透 明電極 206上の面積比で約 50%とされている。 [0050] The area of the ohmic contact layer 107, the reflective layer 108, the plating adhesion layer 109, and the plating metal plate 110, that is, the area of the bottom 107a of the ohmic contact layer 107 is equal to the area of the upper surface 105a of the p-type semiconductor layer 105. Thus, the area ratio is preferably in the range of 10 to 90%. In the example shown in the cross-sectional view of FIG. 5, as described above, the transparent electrode in which the bottom 107a of the ohmic contact layer 107 is formed with respect to the upper surface 105a of the p-type semiconductor layer 105, that is, the same size as the upper surface 105a. The width is about 30% in the width direction (left and right direction in FIG. 5) with respect to the upper surface 106a of 106. Further, in the examples shown in the plan views of FIGS. 7 and 8, on the transparent electrode 206 (p-type semiconductor layer 205), a metal plate that is formed in a lattice shape in plan view intersecting each element vertically and horizontally. 210, the ohmic contact layer 207, and the reflective layer 208 are formed with a width of about 30% in each of the vertical and horizontal directions on each element, and the area ratio of each element unit on the p-type semiconductor layer 205, that is, the transparent electrode 206 The upper area ratio is about 50%.
また、図 9に示すように、本発明の窒化物系半導体発光素子は、各素子単位で縦 横に交差して平面視格子状に形成されたメツキ金属板 310及びォーミック接触層 30 7の交差部 320を、交差部分が若干、上面視略円形状に膨らんだ膨出部 311を有す る形状としても良い。  Further, as shown in FIG. 9, the nitride-based semiconductor light-emitting device of the present invention crosses the metal plate 310 and the ohmic contact layer 307 formed in a lattice shape in plan view by crossing each device in the vertical and horizontal directions. The portion 320 may have a shape having a bulging portion 311 where the intersecting portion slightly swells in a substantially circular shape when viewed from above.
[0051] 前述の製造工程にお!/、て用いるサファイア基板 201には、サファイア単結晶 (Al O  [0051] A sapphire single crystal (Al 2 O 3) is used for the sapphire substrate 201 used in the above manufacturing process!
2 2
; A面、 C面、 M面、 R面)、スピネル単結晶(AgAl O )、 ZnO単結晶、 LiAlO単結; A face, C face, M face, R face), spinel single crystal (AgAl 2 O 3), ZnO single crystal, LiAlO single bond
3 2 4 2 晶、 LiGaO単結晶、 MgO単結晶などの酸化物単結晶、 Si単結晶、 SiC単結晶、 Ga 3 2 4 2 crystal, LiGaO single crystal, oxide single crystal such as MgO single crystal, Si single crystal, SiC single crystal, Ga
2  2
As単結晶などの公知の基板材料を何ら制限無く用いることができる。 SiCなどの導電 性基板を用いれば、正極と負極を上下に配置させた素子の作製は、基板剥離を行 わなくとも可能である力 その場合には絶縁体であるバッファ層 202を使用することが できなくなるので、サファイア基板 201上に成長する窒化物系半導体層の結晶が劣 化してしまい、良好な半導体素子を形成することができない。本発明においては、導 電性の SiC、 Siを用いた場合でもサファイア基板 201の剥離を行う。  A known substrate material such as As single crystal can be used without any limitation. If a conductive substrate such as SiC is used, it is possible to fabricate a device in which the positive and negative electrodes are arranged one above the other without using the substrate peeling. In that case, the buffer layer 202, which is an insulator, should be used. Therefore, the crystal of the nitride-based semiconductor layer grown on the sapphire substrate 201 deteriorates, and a good semiconductor element cannot be formed. In the present invention, the sapphire substrate 201 is peeled even when conductive SiC or Si is used.
[0052] ノ ッファ層 202は、例えば、サファイア単結晶基板と GaNの格子定数が 10%以上 も異なるため、その中間の格子定数を有する A1Nや AlGaN等力 GaNの結晶性を 向上させるために一般的に使用されており、本発明にお ヽても A1Nや AlGaNが何ら 制限なく用いられる。 [0052] For example, since the lattice constants of the sapphire single crystal substrate and the GaN differ by 10% or more, the nota layer 202 is generally used to improve the crystallinity of A1N or AlGaN isotropic GaN having an intermediate lattice constant. In the present invention, A1N and AlGaN are used without any limitation.
[0053] 窒化物系半導体は、例えば n型半導体層 103、発光層 104、 p型半導体層 105か らなるヘテロ接合構造で構成される。窒化物系半導体層としては、一般式 Al In Ga N (0≤x< 1、 0≤y< 1、 x+y< 1)で表される半導体が多数知られており、本発 明においても一般式 Al In Ga _ _ Ν (0≤χ< 1、 0≤y< l、 x+yく 1)で表される窒 化物系半導体が何ら制限なく用 、られる。 The nitride-based semiconductor has a heterojunction structure including, for example, an n-type semiconductor layer 103, a light emitting layer 104, and a p-type semiconductor layer 105. As nitride-based semiconductor layers, many semiconductors represented by the general formula Al In Ga N (0≤x <1, 0≤y <1, x + y <1) are known. Even in the light, nitride-based semiconductors represented by the general formula Al In Ga _ _ Ν (0≤χ <1, 0≤y <l, x + y く 1) can be used without any limitation.
[0054] 窒化物系半導体の成長方法は特に限定されず、有機金属化学気相成長法 (MO CVD)、ハイドライド気相成長法 (HPVE)、分子線エピタキシー法 (MBE)等、 ΠΙ族 窒化物系半導体を成長させることが知られている全ての方法を適用できる。好ましい 成長方法としては、膜厚制御性、量産性の観点力 MOCVD法である。  [0054] The growth method of the nitride-based semiconductor is not particularly limited, and organometallic chemical vapor deposition (MO CVD), hydride vapor deposition (HPVE), molecular beam epitaxy (MBE), etc. All methods known to grow system semiconductors can be applied. A preferred growth method is the MOCVD method, which has the advantages of film thickness controllability and mass productivity.
[0055] MOCVD法では、キャリアガスとして水素 (H )または窒素(N )、 III族原料である  [0055] In the MOCVD method, hydrogen (H 2) or nitrogen (N 2) as a carrier gas is a group III material
2 2  twenty two
Ga源としてトリメチルガリウム (TMG)またはトリェチルガリウム (TEG)、 A1源としてトリ メチルアルミニウム (TMA)またはトリェチルアルミニウム (TEA)、 In源としてトリメチ ルインジウム (TMI)またはトリェチルインジウム (TEI)、 V族原料である N源としては アンモニア(NH )、ヒドラジン (N H )などが用いられる。  Trimethylgallium (TMG) or triethylgallium (TEG) as the Ga source, trimethylaluminum (TMA) or triethylaluminum (TEA) as the A1 source, trimethylindium (TMI) or triethylindium (TEI) as the In source, Ammonia (NH 3), hydrazine (NH 2), etc. are used as the N source that is a Group V material.
3 2 4  3 2 4
また、ドーパントとしては、 n型には Si原料としてモノシラン(SiH )またはジシラン(S  In addition, as a dopant, n-type has monosilane (SiH) or disilane (S
4  Four
i H )を、 Ge原料としてゲルマン (GeH )を用い、 p型には Mg原料としては例えばビ i H), germane (GeH) as the Ge source, and p-type
2 6 4 2 6 4
スシクロペンタジェニルマグネシウム(Cp Mg)またはビスェチルシクロペンタジェ二  Sucyclopentagenyl magnesium (Cp Mg) or bisethylcyclopentadenyl
2  2
ノレマグネシウム((EtCp) Mg)を用いる。  Noregnesium ((EtCp) Mg) is used.
2  2
[0056] 窒化物系半導体をサファイア基板上で分割する方法としては、エッチング法、レー ザカッティング法など公知の技術を何ら制限なく用いることが出来る。レーザリフトォ フ法を用いる場合、窒化物系半導体を分割する際に、サファイア基板 101にダメージ を与えないようにすることが、良好な基板剥離を行う点で好ましい。従って、エツチン グ法で分割する場合、窒化物系半導体に対してはエッチングレートが早ぐサフアイ ァ基板 101に対してはエッチングレートが遅 、手法を用いることが好まし 、。レーザ で分割する場合は、 GaNとサファイアに対する吸収波長の違いから、 300〜400nm の波長を持ったレーザを用いることが好まし 、。  [0056] As a method of dividing the nitride-based semiconductor on the sapphire substrate, a known technique such as an etching method or a laser cutting method can be used without any limitation. When the laser lift-off method is used, it is preferable that the sapphire substrate 101 is not damaged when the nitride-based semiconductor is divided from the viewpoint of good substrate peeling. Therefore, when dividing by the etching method, it is preferable to use a method in which the etching rate is low for the nitride substrate 101 and the etching rate is low for the sapphire substrate 101. When dividing with a laser, it is preferable to use a laser with a wavelength of 300 to 400 nm because of the difference in absorption wavelength between GaN and sapphire.
[0057] ォーミック接触層 107に要求される性能としては、 p型半導体層 105との接触抵抗 が小さいことが必須である。  As performance required for the ohmic contact layer 107, it is essential that the contact resistance with the p-type semiconductor layer 105 is small.
ォーミック接触層 107の材料としては、 p型半導体層 105との接触抵抗の観点から、 Pt、 Ru、 Os、 Rh、 Ir、 Pd等の白金族、または Agを用いることが好ましい。さらに好ま しくは、 Pt、 Ir、 Rh及び Ruであり、 Ptが特に好ましい。 ォーミック接触層 106に Agを用いることは、良好な反射を得るためには好ま 、が 、接触抵抗は Ptよりも大きい。したがって、接触抵抗がそれほど要求されない用途に は Agを用いることも可能である。 As a material for the ohmic contact layer 107, from the viewpoint of contact resistance with the p-type semiconductor layer 105, it is preferable to use a platinum group such as Pt, Ru, Os, Rh, Ir, and Pd, or Ag. More preferred are Pt, Ir, Rh and Ru, with Pt being particularly preferred. The use of Ag for the ohmic contact layer 106 is preferred for obtaining good reflection, but the contact resistance is larger than Pt. Therefore, Ag can be used for applications that do not require much contact resistance.
但し、 p型半導体層 105上に透明電極 106があら力じめ形成される場合は、透明電 極 106と p型半導体層 105間の接触抵抗が大きぐ透明電極 106とォーミック接触層 107との接触抵抗は小さくなるので、ォーミック接触層 107としては上記の材料以外 に Ti、 V、 Cr、 Co、 Ni、 Zr、 Nb、 Mo、 Hf、 Ta、 Wなどを用!/、ること、できる。  However, when the transparent electrode 106 is formed on the p-type semiconductor layer 105 by force, the contact resistance between the transparent electrode 106 and the p-type semiconductor layer 105 is large. Since the contact resistance is reduced, the ohmic contact layer 107 can be made of Ti, V, Cr, Co, Ni, Zr, Nb, Mo, Hf, Ta, W, etc. in addition to the above materials!
[0058] ォーミック接触層 107の厚さは、低接触抵抗を安定して得るために 0. lnm以上と することが好ましい。さらに好ましくは lnm以上であり、均一な接触抵抗が得られる。 また、ォーミック接触層 107上には、 Ag合金等力もなる反射層 108を設けても良い 。 Pt、 Ir、 Rh、 Ru、 OS、 Pd等は、 Ag合金と比較すると可視光から紫外領域の反射 率が低い。したがって、発光層 104からの光が十分に反射せず、発光出力の高い素 子を得ることが難しい。この場合、ォーミック接触層 107を、光が十分に透過するよう に薄く形成し、 Ag合金等からなる反射層 108を形成して反射光を得る方が、良好な ォーミック接触が得られ、かつ出力の高い素子を作製することができる。この場合の ォーミック接触層 107の膜厚は 30nm以下とすることが好ましい。さらに好ましくは 10 nm以下である。 [0058] The thickness of the ohmic contact layer 107 is preferably 0.1 nm or more in order to stably obtain a low contact resistance. More preferably, it is 1 nm or more, and uniform contact resistance can be obtained. Further, on the ohmic contact layer 107, a reflective layer 108 having an Ag alloy isotropic force may be provided. Pt, Ir, Rh, Ru, OS, Pd, etc. have lower reflectivity from visible light to ultraviolet region than Ag alloy. Therefore, light from the light emitting layer 104 is not sufficiently reflected, and it is difficult to obtain an element with high light emission output. In this case, if the ohmic contact layer 107 is thinly formed so that light can be sufficiently transmitted, and the reflection layer 108 made of an Ag alloy or the like is formed to obtain reflected light, good ohmic contact can be obtained and output can be obtained. It is possible to manufacture a device having a high height. In this case, the film thickness of the ohmic contact layer 107 is preferably 30 nm or less. More preferably, it is 10 nm or less.
ォーミック接触層 107および反射層 108の成膜方法にっ 、ては、特に制限されるこ とはなく公知のスパッタ法ゃ蒸着法を用いることができる。  The method for forming the ohmic contact layer 107 and the reflective layer 108 is not particularly limited, and a known sputtering method or vapor deposition method can be used.
[0059] 反射層 108には Ag合金を用いることが好ま 、。 [0059] It is preferable to use an Ag alloy for the reflective layer 108.
反射層 108の膜厚は、良好な反射率を得るためには 0. lnm以上とすることが好ま しい。さらに好ましくは lnm以上であり、良好な反射率が得られる。また、 Ag合金は マイグレーションを起こしやすいので、メツキにより保護するとはいえ、より薄い方が好 ましい。したがって、膜厚は 200nm以下とすることがより好ましい。  The thickness of the reflective layer 108 is preferably 0.1 nm or more in order to obtain good reflectance. More preferably, it is lnm or more, and good reflectance can be obtained. In addition, Ag alloy is prone to migration, so it is better to make it thinner, although it can be protected by glazing. Therefore, the film thickness is more preferably 200 nm or less.
反射層 108の成膜方法については、特に制限されることはなく公知のスパッタ法ゃ 蒸着法を用いることができる。スパッタ法はスパッタ粒子が高エネルギーを持って基 板表面に衝突して成膜されるので、密着力の高い膜を得ることができる。したがって、 スパッタ法を用いることがより好まし 、。 [0060] 透明電極 106には、 ITO (In— Sn— O合金)、 IZO (In— Zn— O合金)、 AZO (Zn — Al— O合金)等、公知の材料をなんら制限無く用いることができる。 The method for forming the reflective layer 108 is not particularly limited, and a known sputtering method or vapor deposition method can be used. In the sputtering method, since the sputtered particles collide with the substrate surface with high energy to form a film, a film having high adhesion can be obtained. Therefore, it is more preferable to use the sputtering method. [0060] For the transparent electrode 106, any known material such as ITO (In—Sn—O alloy), IZO (In—Zn—O alloy), AZO (Zn—Al—O alloy) may be used without any limitation. it can.
透明電極 106の厚さは、低接触抵抗を安定して得るために lOOnm以上とすること が好ましい。透明電極 106にも光は吸収されるので、厚くなりすぎると出力が低下しし まう。このため、透明電極 106は 1 μ m以下とすることが好ましい。  The thickness of the transparent electrode 106 is preferably set to lOOnm or more in order to stably obtain a low contact resistance. Light is also absorbed by the transparent electrode 106, so if it is too thick, the output will decrease. Therefore, the transparent electrode 106 is preferably 1 μm or less.
また、透明電極 106は、 p型半導体層上 105上の全面に形成されることが電流拡散 の点で好ましい。  The transparent electrode 106 is preferably formed on the entire surface on the p-type semiconductor layer 105 from the viewpoint of current diffusion.
透明電極 106の成膜方法については、特に制限されることはなく公知のスパッタ法 や蒸着法を用いることができる。さらに、成膜後、 100°C〜300°Cの温度でァニール することが、透過率やシート抵抗の低減に有効である。  A method for forming the transparent electrode 106 is not particularly limited, and a known sputtering method or vapor deposition method can be used. Furthermore, annealing at a temperature of 100 ° C to 300 ° C after film formation is effective in reducing transmittance and sheet resistance.
[0061] なお、密着性向上のため、メツキ金属板 110の直下、即ちメツキ金属板 110と反射 層 108との間にメツキ密着層 109を形成しても良い。メツキ密着層 109の材料は、メッ キ金属板 110に使用するメツキによって異なってくる力 メツキ成分に主に含まれる物 質を多く含んでいたほうが密着性を向上させる。例えば、メツキ密着層 109は、メツキ 金属板 110の 50重量%以上を占める主成分と同一の組成を、 50重量%以上含有 する構成とすることが好まし 、。  Note that, in order to improve the adhesion, a plating adhesion layer 109 may be formed directly below the plating metal plate 110, that is, between the plating metal plate 110 and the reflective layer 108. The adhesion of the plating adhesion layer 109 is improved if it contains a large amount of substances mainly contained in the plating composition depending on the plating used for the plating metal plate 110. For example, the plating adhesion layer 109 preferably contains 50% by weight or more of the same composition as the main component occupying 50% by weight or more of the plating metal plate 110.
[0062] また、メツキ金属板 110に NiPメツキを用いる場合、メツキ密着層には Ni系合金を用 いることが好ましい。さらに好ましくは NiP合金を用いることである。また、メツキ金属板 110に Cuメツキを用いる場合、メツキ密着層には Cu系合金を用いることが好ま 、。 さらに好ましくは Cuを用 、ることである。  [0062] When using NiP plating for the plating metal plate 110, it is preferable to use a Ni-based alloy for the plating adhesion layer. More preferably, a NiP alloy is used. In addition, when using a Cu plating for the plating metal plate 110, it is preferable to use a Cu-based alloy for the plating adhesion layer. More preferably, Cu is used.
メツキ密着層 109の厚さは、良好な密着性を得るために 0. lnm以上とすることが好 ましい。さらに好ましくは lnm以上であり、均一な密着性が得られる。メツキ密着層 10 9の厚さに特に上限はないが、生産性の観点から 2 μ m以下にすることが好ましい。 メツキ密着層 109の成膜方法については、特に制限されることはなく公知のスパッタ 法や蒸着法を用いることができる。スパッタ法は、スパッタ粒子が高エネルギーを持つ て基板表面に衝突して成膜されるので、密着性の高い膜を得ることができる。したが つて、スパッタ法を用いることがより好ましい。  The thickness of the adhesion adhesion layer 109 is preferably 0.1 nm or more in order to obtain good adhesion. More preferably, it is 1 nm or more, and uniform adhesion can be obtained. The thickness of the adhesion adhesion layer 109 is not particularly limited, but is preferably 2 μm or less from the viewpoint of productivity. The method for forming the adhesion adhesion layer 109 is not particularly limited, and a known sputtering method or vapor deposition method can be used. In the sputtering method, the sputtered particles have high energy and collide with the substrate surface to form a film, so that a film with high adhesion can be obtained. Therefore, it is more preferable to use the sputtering method.
[0063] メツキ金属板 110には、無電解メツキ、電解メツキのどちらでも用いることができる。 無電解メツキの場合、材料としては NiP合金メッキを用いることが好ましぐ電解メツキ の場合、材料としては Cuを用いることが好ましい。 [0063] For the plating metal plate 110, either an electroless plating or an electrolytic plating can be used. In the case of electroless plating, it is preferable to use NiP alloy plating as the material. In the case of electrolytic plating, it is preferable to use Cu as the material.
メツキ金属板 110の厚さは、基板としての強度を保っために 10 m以上とすること が好ましい。また、メツキ金属板 110が厚すぎるとメツキの剥離が起こりやすくなり、か つ生産性も低くなるので 200 m以下とすることが好ましい。  The thickness of the metal plating plate 110 is preferably 10 m or more in order to maintain the strength as a substrate. Further, if the plating metal plate 110 is too thick, peeling of the plating tends to occur and the productivity is lowered, so that the thickness is preferably 200 m or less.
メツキを実施する際は、窒化物系半導体発光素子の表面を、汎用の中性洗剤等を 用いて、予め脱脂洗浄しておくことが好ましい。また、硝酸などの酸を用いてメツキ密 着層等の表面に化学エッチングを施すことにより、メツキ密着層上の自然酸ィ匕膜を除 去するのが好ましい。  When carrying out the measurement, it is preferable to degrease and clean the surface of the nitride-based semiconductor light-emitting element in advance using a general-purpose neutral detergent or the like. Further, it is preferable to remove the natural acid film on the adhesion adhesion layer by performing chemical etching on the surface of the adhesion adhesion layer using an acid such as nitric acid.
NiPメツキ等のメツキ処理方法としては、メツキ浴として、例えば、硫酸ニッケル、塩 化ニッケルなどのニッケル源と、次亜リン酸塩などのリン源を含むものを用いた無電 解メツキ処理法を採用することができる。無電解メツキ法に用いられるメツキ浴として好 適な市販品としては、上村工業製の-ムデン HDXなどがある。無電解メツキ処理を 行う際のメツキ浴の ρΗは 4〜 10、温度は 30〜95°Cとすることが好ましい。  As a plating treatment method for NiP plating, etc., an electroless plating treatment method using a nickel bath such as nickel sulfate or nickel chloride and a phosphorus source such as hypophosphite is used as the plating bath. can do. A commercially available product suitable as a plating bath for use in the electroless plating method is Muden HDX manufactured by Uemura Kogyo. It is preferable that ρΗ of the plating bath when performing the electroless plating treatment is 4 to 10 and the temperature is 30 to 95 ° C.
[0064] Cuまたは Cu合金のメツキ処理方法としては、メツキ浴として、例えば硫酸銅などの Cu源を用いる電解メツキ処理法を採用することができる。電気メツキ処理を行う際のメ ツキ浴の pHは 2以下の強酸条件下で実施することが好ましい。温度は 10〜50°Cと することが好ましぐ常温(25°C)で実施することがより好ましい。電流密度は 0. 5〜1 OAZdm2で実施することが好ましぐ 2〜4AZdm2で実施することがより好ましい。 また、表面を平滑ィ匕させるためにレべリング剤を添加することがより好ましい。レベリ ング剤に用いられる市販品としては、例えば上村工業製の ETN— 1— Aや ETN— 1 Bなどが用いられる。 [0064] As a plating treatment method for Cu or Cu alloy, an electrolytic plating treatment method using a Cu source such as copper sulfate can be employed as a plating bath. The pH of the plating bath during electroplating treatment is preferably 2 or less under strong acid conditions. The temperature is more preferably 10 to 50 ° C, more preferably room temperature (25 ° C). Current density is more preferably carried out in the preferred instrument 2~4AZdm 2 be implemented by 0. 5~1 OAZdm 2. Further, it is more preferable to add a leveling agent to smooth the surface. Examples of commercially available products used for the leveling agent include ETN-1A and ETN-1B manufactured by Uemura Kogyo.
[0065] 上述のようにして得られたメツキ金属板 110の密着性を向上させるため、熱処理を 行うことが好ましい。熱処理温度は 100〜300°Cの範囲とすること力 密着性向上の 点から好ましい。熱処理温度を上述の範囲以上とすると、密着性がさらに向上する可 能性はあるものの、ォーミック性が低下してしまう虞がある。  [0065] Heat treatment is preferably performed to improve the adhesion of the metal sheet 110 obtained as described above. The heat treatment temperature should be in the range of 100 to 300 ° C. This is preferable from the viewpoint of improving adhesion. If the heat treatment temperature is at least the above range, the adhesiveness may be further improved, but the ohmic property may be lowered.
[0066] ォーミック接触層 107及び反射層 108 (金属膜層)、メツキ金属板 110を、 p型半導 体層 105
Figure imgf000027_0001
ヽて部分的に形成する方法としては、 Vヽくつかの方 法が考えられる。
[0066] The ohmic contact layer 107, the reflective layer 108 (metal film layer), the metal plating plate 110, and the p-type semiconductor layer 105
Figure imgf000027_0001
As a method of forming partly, V The law can be considered.
ォーミック接触層 107及び反射層 108を部分的に形成する方法としては、公知のフ オトリソグラフィー技術、及びリフトオフ技術を用いることができる。  As a method for partially forming the ohmic contact layer 107 and the reflective layer 108, a known photolithography technique and a lift-off technique can be used.
[0067] メツキ金属板 110を部分的に形成する方法としては、以下の 2つの方法が主として 考えられる。 [0067] The following two methods are mainly conceivable as a method of partially forming the metallic metal plate 110.
(1)メツキを施すォーミック接触層 107及び反射層 108以外の部分に、絶縁性の保 護膜を形成する。メツキは絶縁体上には成長しないので、ノターンィ匕されたォーミツ ク接触層 107及び反射層 108上にのみ形成される。  (1) An insulating protective film is formed on portions other than the ohmic contact layer 107 and the reflective layer 108 to be plated. Since the plating does not grow on the insulator, it is formed only on the nominated optical contact layer 107 and the reflective layer 108.
(2)メツキ用の厚膜レジスト材料を使用して、公知のフォトリソグラフィー技術およびリ フトオフ技術を用いる。  (2) Using a thick film resist material for plating, a known photolithography technique and a lift-off technique are used.
[0068] ォーミック接触層 107、反射層 108、メツキ金属板 110のパターン形状にっ 、ては、 これら各層が P型半導体層 105上にぉ 、て占める部分をできるだけ減らすことと、メッ キ金属板 110が基板としての強度を保つこととの相反する性質のバランスをとつた形 状とすることが必要である。  [0068] According to the pattern shape of the ohmic contact layer 107, the reflective layer 108, and the metal plating plate 110, the portion occupied by these layers on the P-type semiconductor layer 105 should be reduced as much as possible. It is necessary that 110 has a shape that balances the contradictory properties of maintaining strength as a substrate.
ォーミック接触層 107、反射層 108、メツキ金属板 110のパターンは、図 7〜5に示 すような十字状に形成することが、 p型半導体層 105上にぉ ヽて占める部分をできる だけ少なくしながら基板強度を保つ点で好ましい。  The pattern of the ohmic contact layer 107, the reflective layer 108, and the metal plating plate 110 can be formed in a cross shape as shown in FIGS. 7 to 5 so that the portion that occupies as much as possible on the p-type semiconductor layer 105 is minimized. However, it is preferable in terms of maintaining the substrate strength.
し力しながら、ォーミック接触層 107、反射層 108、メツキ金属板 110のパターンは、 図 7及び図 8に示すような形状に限るものではなぐ透明電極 106上において格子状 、あるいは網目状、クロスライン状、櫛歯状、円環状、角環状、 L字状、 Y字状等、い ずれの形状であっても良ぐ上述の基板強度や後述する金属パッド取付性を考慮し ながら適宜決定することができる。  However, the pattern of the ohmic contact layer 107, the reflective layer 108, and the metal plating plate 110 is not limited to the shape shown in FIGS. 7 and 8, but on the transparent electrode 106, a lattice shape, a mesh shape, or a cross shape. Any shape such as line shape, comb shape, annular shape, annular shape, L shape, Y shape, etc. may be used. be able to.
[0069] また、ボンディング用のワイヤーを着けやすくするために、金属パッドが装着される 部分の面積を広く形成することが好ましい。例えば、図 9に示すように、素子中心部の メツキ金属板 310の交差部 320を、膨出部 311を有した平面視略円形状として大きく 形成することが、金属パッド装着のためには好まし!/、。  [0069] Further, in order to make it easy to attach the bonding wire, it is preferable that the area of the portion where the metal pad is attached is formed wide. For example, as shown in FIG. 9, it is preferable for the metal pad to be attached that the intersecting portion 320 of the metal plate 310 at the center of the element is formed to have a substantially circular shape with a bulging portion 311 in plan view. Better!/,.
[0070] 透光性物質層 114をなす透光性材料としては、透光性榭脂、シリカ系物質、チタ二 ァ系物質等を用いることが好まし 、。 透光性榭脂としては、ポリメチルメタタリレート系榭脂、ポリカーボネート系榭脂、ポリ イミド系榭脂、エポキシ榭脂、シリコン榭脂等、透光性を有している榭脂であれば公 知の材料を何ら制限なく用いることが出来る。 [0070] As the translucent material forming the translucent material layer 114, it is preferable to use translucent resin, silica-based material, titania-based material, or the like. As the translucent resin, polymethylmetatalate resin, polycarbonate resin, polyimide resin, epoxy resin, silicon resin, etc. Known materials can be used without any limitation.
透光性榭脂の塗布方法には、スピンコート法、射出成型法等、公知の方法を何ら 制限無く用いることができるが、生産性の観点からスピンコート法を用いることが好ま しい。  A known method such as a spin coating method or an injection molding method can be used for the translucent resin coating method without any limitation, but the spin coating method is preferably used from the viewpoint of productivity.
[0071] シリカ系物質としては、シリカゾル、メチルシロキサン系、ハイメチルシロキサン系、 水素ィ匕メチルメチルシロキサン系、燐ドープシリケート系、ポリシラザン系等、透光性 を有しているシリカ系物質であれば公知の材料を何ら制限なく用いることが出来る。 また、シリカ系物質の塗布後、加湿条件で処理することが、シリカガラスへの転ィ匕が 容易に進む点で好ましい。  [0071] The silica-based material may be a silica-based material having translucency such as silica sol, methylsiloxane-based, high-methylsiloxane-based, hydrogen-methylmethylsiloxane-based, phosphorus-doped silicate-based, polysilazane-based, etc. For example, known materials can be used without any limitation. In addition, it is preferable to perform the treatment under humidified conditions after the application of the silica-based material from the viewpoint of easy transition to silica glass.
シリカ系物質の塗布後、 100°C〜500°Cの温度でベータすること力 剛性向上、及 びシリカ系物質中に含まれる水分や有機成分等を除去できる点で好ま 、。  After applying the silica-based material, it is preferable to perform beta at a temperature of 100 ° C to 500 ° C in terms of improving rigidity and removing moisture and organic components contained in the silica-based material.
シリカ系物質の塗布には、スピンコート法、スプレー法、ディップコート法等、公知の 方法を何ら制限無く用いることができるが、生産性の観点からスピンコート法を用いる ことが好ましい。  For the application of the silica-based material, a known method such as a spin coating method, a spray method, or a dip coating method can be used without any limitation, but the spin coating method is preferably used from the viewpoint of productivity.
[0072] チタ-ァ系物質としては、チタ-ァゾル、リン酸チタ-ァ等、透光性を有して!/、る物 質であれば公知の材料を何ら制限なく用いることが出来る。  [0072] As the titer-based substance, any known material can be used without any limitation as long as it has a light-transmitting property such as titazole or phosphoric acid titer.
チタ-ァ系物質の塗布後、 100°C〜500°Cの温度でベータすること力 剛性向上、 及びチタ-ァ系物質中に含まれる水分や有機成分等を除去できる点で好ま 、。 チタ-ァ系物質の塗布には、スピンコート法、スプレー法、ディップコート法等、公 知の方法を何ら制限無く用いることができる力 生産性の観点からスピンコート法を用 、ることが好まし!/、。  It is preferable to apply beta at a temperature of 100 ° C to 500 ° C after application of the titer-based material in terms of improving rigidity and removing moisture and organic components contained in the titer-based material. For the application of the titer-based material, a known method such as spin coating, spraying, dip coating or the like can be used without any limitation. From the viewpoint of productivity, the spin coating method is preferably used. Better!/,.
[0073] 透光性物質層 114を設ける理由としては、高屈折率の透光性物質を用いて p型半 導体層 105 (透明電極 106)上に透光性物質層 114を形成することにより、窒化物系 半導体発光素子の光取り出し効率が向上することが挙げられる。従って、透光性物 質層 114は、 p型半導体層 105上、あるいは透明電極 106を介して p型半導体層 10 5上に形成されることが好ましい。 透光性物質層 114の屈折率は、 1. 4〜2. 6の範囲内であることが、窒化物系半導 体発光素子の光取り出し効率を向上させる点で好ま 、。 [0073] The reason for providing the translucent material layer 114 is that the translucent material layer 114 is formed on the p-type semiconductor layer 105 (transparent electrode 106) using a translucent material having a high refractive index. In addition, the light extraction efficiency of the nitride-based semiconductor light-emitting device can be improved. Therefore, it is preferable that the translucent material layer 114 is formed on the p-type semiconductor layer 105 or on the p-type semiconductor layer 105 via the transparent electrode 106. The refractive index of the translucent material layer 114 is preferably in the range of 1.4 to 2.6 in terms of improving the light extraction efficiency of the nitride semiconductor light emitting device.
また、透光性物質層 114は、 350nm〜550nmの波長範囲において、透過率 80% 以上であることが好ましい。  The translucent material layer 114 preferably has a transmittance of 80% or more in a wavelength range of 350 nm to 550 nm.
[0074] 透光性物質層は、図 8に示す例の透光性物質層 214のように、透過電極 206上に おいて、ォーミック接触層 207、反射層 208、メツキ密着層 209及びメツキ金属板 210 が形成されていない部分に隙間無く形成することが好ましい。これにより、透光性物 質層 214による光取り出し効率の向上、及びメツキ金属板 210による基板強度向上 の効果を両立して達成することができる。 [0074] Like the translucent material layer 214 in the example shown in FIG. 8, the translucent material layer has an ohmic contact layer 207, a reflective layer 208, a metal adhesion layer 209, and a metal metal on the transmission electrode 206. It is preferable to form the plate 210 without a gap in a portion where the plate 210 is not formed. As a result, it is possible to achieve both the improvement of the light extraction efficiency by the translucent material layer 214 and the improvement of the substrate strength by the metal plating plate 210.
また、透光性物質層に用いるシリカ系物質、チタニア系物質等は、本来は厚膜を形 成するのが困難であるが、透過電極 206上において、ォーミック接触層 207、反射層 208、メツキ密着層 209及びメツキ金属板 210に密接するような形で設けられた構成 とすることにより、 5 m以上の厚膜を形成することが可能になる。  In addition, silica-based materials, titania-based materials and the like used for the light-transmitting material layer are originally difficult to form a thick film, but on the transmissive electrode 206, the ohmic contact layer 207, the reflective layer 208, By adopting a structure provided in close contact with the adhesion layer 209 and the metal plating plate 210, a thick film of 5 m or more can be formed.
透光性物質層の膜厚は、光取り出し効率を向上されるためには 1 μ m以上であるこ とが必要である。また、透過電極 206上において、ォーミック接触層 207、反射層 20 8、メツキ密着層 209及びメツキ金属板 210と密接するような形で設けられることから、 メツキ金属板 210の最適膜厚範囲の最大値である 200 μ m以下とする必要性がある  The film thickness of the translucent material layer needs to be 1 μm or more in order to improve the light extraction efficiency. In addition, since it is provided on the transmissive electrode 206 so as to be in close contact with the ohmic contact layer 207, the reflective layer 208, the plating adhesion layer 209, and the plating metal plate 210, the maximum thickness range of the plating metal plate 210 is maximized. The value must be 200 μm or less
[0075] メツキ金属板 110の形成後、サファイア基板(図 6のサファイア基板 201参照)の剥 離を行う。サファイア基板を剥離する方法としては、研磨法、エッチング法、レーザリ フトオフ法など公知の技術を何ら制限なく用いることが出来る。 [0075] After the metal plating plate 110 is formed, the sapphire substrate (see the sapphire substrate 201 in FIG. 6) is peeled off. As a method for peeling the sapphire substrate, a known technique such as a polishing method, an etching method, or a laser lift-off method can be used without any limitation.
サファイア基板を剥離した後、研磨法、エッチング法などによりバッファ層(図 6のバ ッファ層 202参照)を除去し、 n型半導体層 103を露出させ、該 n型半導体層 103上 に図示略の負極を形成する。負極としては、公知の各種組成及び構造のものを、何 ら制限なく用いることが出来る。  After peeling off the sapphire substrate, the buffer layer (see the buffer layer 202 in FIG. 6) is removed by a polishing method, an etching method, etc., the n-type semiconductor layer 103 is exposed, and an unillustrated on the n-type semiconductor layer 103 is removed. A negative electrode is formed. As the negative electrode, those of various known compositions and structures can be used without any limitation.
また、正極としては、 Au、 Al、 Ni及び Cu等の材料を用いた各種構造が公知であり 、これら公知の材料を何ら制限なく用いることが出来る。  As the positive electrode, various structures using materials such as Au, Al, Ni, and Cu are known, and these known materials can be used without any limitation.
実施例 [0076] 以下に、本発明を実施例によりさらに詳細に説明するが、本発明はこれらの実施例 にのみ限定されるものではな 、。 Example [0076] Hereinafter, the present invention will be described in more detail with reference to Examples, but the present invention is not limited to these Examples.
[0077] [実施例 1] [0077] [Example 1]
本実施例では、図 1の断面模式図に示すような窒化物系半導体発光素子を作成し た。  In this example, a nitride-based semiconductor light-emitting device as shown in the schematic cross-sectional view of FIG. 1 was produced.
まず、サファイア基板上に、 A1N力もなるバッファ層(厚さ lOnm)を介して、厚さ 5 mの Siドープ n型 GaNコンタクト層、厚さ 30nmの n型 InO. IGaO. 9Nクラッド層、厚 さ 30nmの Siドープ GaN障壁層および厚さ 2. 5nmの InO. 2GaO. 8N井戸層を 5回 積層し、最後に障壁層を設けた多重井戸構造の発光層、厚さ 50nmの Mgドープ p型 AIO. 07GaO. 93Nクラッド層、厚さ 150nmの Mgドープ p型 GaNコンタクト層を順に 責屑し 7こ。  First, a 5 m thick Si-doped n-type GaN contact layer, a 30 nm thick n-type InO. IGaO. 9N cladding layer, and a thickness on a sapphire substrate via a buffer layer (thickness lOnm) that also has an A1N force 30nm Si-doped GaN barrier layer and 2.5nm InO. 2GaO. 8N well layer is stacked 5 times, and finally a multi-well structure light emitting layer with barrier layer, 50nm thickness Mg-doped p-type AIO .07GaO. 93N cladding layer, 150nm thick Mg-doped p-type GaN contact layer in sequence.
[0078] 次いで、 ρ型半導体層 105上に、厚さ 300nmの ITO (Sn02 : 10wt%)からなる透 明電極 106を、蒸着法で成膜して形成した。そして、酸素雰囲気中において、 300°C の温度で 1時間のァニールを行った。  Next, a transparent electrode 106 made of ITO (Sn02: 10 wt%) having a thickness of 300 nm was formed on the ρ-type semiconductor layer 105 by a vapor deposition method. Then, annealing was performed for 1 hour at a temperature of 300 ° C. in an oxygen atmosphere.
次いで、厚さ 1. 5nmの Pt層力もなるォーミック接触層 107と、厚さ 30nmの Ag層か らなる反射層 108を、この順序でスパッタ法により成膜した。さらに、厚さ 30nmの NiP 合金 (Ni: 80at%、 P : 20at%)からなるメツキ密着層 109を、スパッタ法により成膜し た。なお、ォーミック接触層 107 (Pt層)、反射層 108 (Ag層)、メツキ密着層 109 (Ni P合金層)は、公知のフォトリソグラフィー技術、及びリフトオフ技術を用いて、図 3に示 すような十字状にパターン化した。  Next, an ohmic contact layer 107 having a Pt layer force with a thickness of 1.5 nm and a reflective layer 108 made of an Ag layer with a thickness of 30 nm were formed in this order by sputtering. Further, a plating adhesion layer 109 made of a 30 nm thick NiP alloy (Ni: 80 at%, P: 20 at%) was formed by sputtering. The ohmic contact layer 107 (Pt layer), the reflective layer 108 (Ag layer), and the adhesion adhesion layer 109 (Ni P alloy layer) are shown in FIG. 3 using a known photolithography technique and lift-off technique. Patterned like a cross.
この際の、ノ《ターン幅 Wは 30 μ mとし、透明電極の面積 (300 X 300) = 90000 μ m2に対する十字状パターン(面積(30 X 300 + 30 X 270) = 17100 m2)の面積 比は、 17100,90000= 19%とした。 At this time, the turn width W is 30 μm, and the cross-shaped pattern (area (30 X 300 + 30 X 270) = 17100 m 2 ) for the transparent electrode area (300 X 300) = 90000 μm 2 The area ratio was 17100,90000 = 19%.
[0079] 次いで、透明電極 106上において、ォーミック接触層 107、反射層 108、メツキ密着 層 109から構成される金属膜層以外の部分に、 Si02からなるレジスト材料を lOOnm 成膜した。このレジスト材料は、公知のフォトリソグラフィー技術、及びリフトオフ技術 によってパターンィ匕した。 [0079] Next, on the transparent electrode 106, a resist material made of Si02 was formed in a lOOnm film on portions other than the metal film layer made up of the ohmic contact layer 107, the reflective layer 108, and the metal adhesion layer 109. This resist material was patterned by a known photolithography technique and a lift-off technique.
次いで、 NiP合金力もなるメツキ密着層 109の膜表面を、硝酸水溶液(5N)に浸漬 し、温度 25°C、時間 30秒で処理し、酸化皮膜を除去した。 Next, the surface of the adhesion layer 109 that also has NiP alloy strength is immersed in a nitric acid aqueous solution (5N). Then, it was treated at a temperature of 25 ° C. for 30 seconds to remove the oxide film.
次いで、メツキ浴 (上村工業製、ニムデン HDX— 7G)を用いて、メツキ密着層 109 上に 50 mの NiP合金力 なる無電解メツキを形成し、メツキ金属板 110を得た。こ の際の処理条件は、 pH4. 6、温度 90°C、処理時間を 3時間とした。次いで、このメッ キ金属板 110を水洗、乾燥した後、クリーンオーブンを用いて 250°Cの条件下で 1時 間のァニールを行った。  Next, an electroless plating having a NiP alloy strength of 50 m was formed on the plating adhesion layer 109 using a plating bath (Nimden HDX-7G, manufactured by Uemura Kogyo Co., Ltd.) to obtain a plating metal plate 110. The treatment conditions were pH 4.6, temperature 90 ° C, and treatment time 3 hours. Next, this metal sheet 110 was washed with water and dried, and then annealed for 1 hour at 250 ° C. using a clean oven.
[0080] 次いで、サファイア基板及びバッファ層を、研磨法により剥離し n型半導体層 103を 露出させた。  Next, the sapphire substrate and the buffer layer were separated by a polishing method to expose the n-type semiconductor layer 103.
そして、 n型半導体層 103表面に、厚さ 400nmの ITO (SnO: 10wt%)からなる透  A transparent layer made of ITO (SnO: 10 wt%) having a thickness of 400 nm is formed on the surface of the n-type semiconductor layer 103.
2  2
明電極を、蒸着により成膜した。次いで、 ITO表面上の中央部に、 Cr (40nm)、 Ti( 100nm)、 Au (lOOOnm)からなる負極を、蒸着法により成膜した。負電極のパター ンは、公知のフォトリソグラフィー技術及びリフトオフ技術を用いた。  A bright electrode was deposited by vapor deposition. Next, a negative electrode made of Cr (40 nm), Ti (100 nm), and Au (lOOOnm) was formed on the central portion of the ITO surface by vapor deposition. As the pattern of the negative electrode, a known photolithography technique and lift-off technique were used.
また、 p型半導体表面上には、 Au (lOOOnm)からなる図示略の正極を、蒸着法に より成膜した。  On the p-type semiconductor surface, a positive electrode (not shown) made of Au (lOOOnm) was formed by vapor deposition.
次いで、ダイシングにより分割し、 350 /z m角の、本発明の窒化物系半導体素子を 得た。  Subsequently, the nitride-based semiconductor element of the present invention having a 350 / zm square was obtained by dicing.
得られた窒化物系半導体発光素子について、 TO— 18缶パッケージに実装して、 テスターによって印加電流 20mAにおける発光出力を測定したところ、発光出力は 2 OmWであった。  The obtained nitride-based semiconductor light-emitting device was mounted in a TO-18 can package, and the light emission output at an applied current of 20 mA was measured by a tester. The light emission output was 2 OmW.
[0081] [比較例 1] [0081] [Comparative Example 1]
ITOカゝらなる透明電極を成膜せず、ォーミック接触層、反射層、メツキ金属板を p型 半導体層上の全面に成膜した以外は、実施例 1と同様にして、従来の窒化物系半導 体素子を作製した。  A conventional nitride is formed in the same manner as in Example 1 except that a transparent electrode made of ITO is not formed, and an ohmic contact layer, a reflective layer, and a metal plating plate are formed on the entire surface of the p-type semiconductor layer. A semiconductor device was fabricated.
作製した窒化物系半導体発光素子について、 TO— 18缶パッケージに実装して、 テスターによって印加電流 20mAにおける発光出力を測定したところ、発光出力は 1 8mWであった。  The fabricated nitride semiconductor light emitting device was mounted in a TO-18 can package, and the light emission output at an applied current of 20 mA was measured with a tester. The light emission output was 18 mW.
[0082] [評価結果] [0082] [Evaluation results]
上述のように、 p型半導体層上に、ォーミック接触層、反射層、メツキ金属板を部分 的に形成した本発明の窒化物系半導体発光素子 (実施例 1)は、 20mWの発光出力 が得られたのに対し、ォーミック接触層、反射層、メツキ金属板を p型半導体層上の 全面に形成した従来の窒化物系半導体発光素子 (比較例 1)は、発光出力が 18mW であり、約 1割の出力差が確認された。 As described above, the ohmic contact layer, the reflective layer, and the metal plating plate are partially formed on the p-type semiconductor layer. The nitride-based semiconductor light-emitting device of the present invention (Example 1) formed on the entire surface of the p-type semiconductor layer provided an ohmic contact layer, a reflective layer, and a metal plating plate, while emitting light of 20 mW. The conventional nitride-based semiconductor light-emitting device (Comparative Example 1) formed in 1) has an emission output of 18 mW, and an output difference of about 10% was confirmed.
これは、実施例 1に示す本発明の窒化物系半導体発光素子が上述の構成により、 反射層 108の面積を p型半導体層 105の面積に対して小さくして 、るので、反射層 1 08を介して反射されて再度、発光層 104に入射した場合に、発光層 104において光 吸収が起こり、発光効率が低下する問題を解消し、素子裏面からの出力が向上して いるためと考えられる。  This is because the nitride-based semiconductor light-emitting device of the present invention shown in Example 1 has the above-described configuration and the area of the reflective layer 108 is made smaller than the area of the p-type semiconductor layer 105. This is thought to be due to the fact that light is absorbed in the light-emitting layer 104 when the light is reflected through the light-emitting layer 104 and is incident on the light-emitting layer 104, thereby reducing the light emission efficiency and improving the output from the back surface of the device. .
これにより、本発明の窒化物系半導体発光素子が、光取り出し効率に優れているこ とが明らかである。  This clearly shows that the nitride semiconductor light emitting device of the present invention is excellent in light extraction efficiency.
[0083] [実施例 2] [0083] [Example 2]
本実施例では、図 5の断面模式図に示すような窒化物系半導体発光素子を作成し た。  In this example, a nitride-based semiconductor light-emitting element as shown in the schematic cross-sectional view of FIG. 5 was produced.
まず、サファイア基板上に、 A1N力もなるバッファ層(厚さ lOnm)を介して、厚さ 5 mの Siドープ n型 GaNコンタクト層、厚さ 30nmの n型 In Ga Nクラッド層、厚さ 30  First, on a sapphire substrate, a 5 m thick Si-doped n-type GaN contact layer, a 30 nm thick n-type InGaN cladding layer, a thickness of 30 m, via a buffer layer (thickness lOnm) that also has an A1N force
0. 1 0. 9  0. 1 0. 9
nmの Siドープ GaN障壁層および厚さ 2. 5nmの In Ga N井戸層を 5回積層し、  nm Si-doped GaN barrier layer and 2.5 nm InGa N well layer 5 layers,
0. 2 0. 8  0. 2 0. 8
最後に障壁層を設けた多重井戸構造の発光層、厚さ 50nmの Mgドープ p型 Al G  Finally, a multiwell light-emitting layer with a barrier layer, Mg-doped p-type Al G with a thickness of 50 nm
0. 07 a Nクラッド層、厚さ 150nmの Mgドープ p型 GaNコンタクト層を順に積層した。 A 0.07 a N clad layer and a 150 nm thick Mg-doped p-type GaN contact layer were sequentially stacked.
0. 93 0. 93
[0084] 次いで、 p型半導体層 105上に、厚さ 300nmの ITO (SnO : 10wt%)からなる透  [0084] Next, on the p-type semiconductor layer 105, a transparent film made of ITO (SnO: 10wt%) with a thickness of 300nm is formed.
2  2
明電極 106を、蒸着法で成膜して形成した。そして、酸素雰囲気中において、 300°C の温度で 1時間のァニールを行った。  The bright electrode 106 was formed by vapor deposition. Then, annealing was performed for 1 hour at a temperature of 300 ° C. in an oxygen atmosphere.
次いで、厚さ 1. 5nmの Pt層力もなるォーミック接触層 107と、厚さ 30nmの Ag層か らなる反射層 108を、この順序でスパッタ法により成膜した。さらに、厚さ 30nmの NiP 合金 (Ni: 80at%、 P : 20at%)からなるメツキ密着層 109を、スパッタ法により成膜し た。なお、ォーミック接触層 107 (Pt層)、反射層 108 (Ag層)、メツキ密着層 109 (Ni P合金層)は、公知のフォトリソグラフィー技術、及びリフトオフ技術を用いて、図 7に示 すような格子状にパターンィ匕した。 この際の、ノ《ターン幅 Wは 30 μ mとし、透明電極の面積 (300 X 300) = 90000 μ m2に対する十字状パターン(面積(30 X 300 + 30 X 270) = 17100 m2)の面積 比は、 17100,90000= 19%とした。 Next, an ohmic contact layer 107 having a Pt layer force with a thickness of 1.5 nm and a reflective layer 108 made of an Ag layer with a thickness of 30 nm were formed in this order by sputtering. Further, a plating adhesion layer 109 made of a 30 nm thick NiP alloy (Ni: 80 at%, P: 20 at%) was formed by sputtering. The ohmic contact layer 107 (Pt layer), the reflective layer 108 (Ag layer), and the adhesion adhesion layer 109 (Ni P alloy layer) are shown in FIG. 7 using a known photolithography technique and lift-off technique. Patterned like a grid. At this time, the turn width W is 30 μm, and the cross-shaped pattern (area (30 X 300 + 30 X 270) = 17100 m 2 ) for the transparent electrode area (300 X 300) = 90000 μm 2 The area ratio was 17100,90000 = 19%.
[0085] 次いで、透明電極 106上において、ォーミック接触層 107、反射層 108、メツキ密着 層 109から構成される金属膜層以外の部分に、メツキ用の厚膜レジス HAZエレクト口 マテリアルズ社製、 AZ UT21 - HR)を形成した。 [0085] Next, on the transparent electrode 106, on a portion other than the metal film layer composed of the ohmic contact layer 107, the reflective layer 108, and the plating adhesion layer 109, a thick film resist HAZ electoral materials company, AZ UT21-HR).
次いで、 NiP合金力もなるメツキ密着層 109の膜表面を、硝酸水溶液(5N)に浸漬 し、温度 25°C、時間 30秒で処理し、酸化皮膜を除去した。  Next, the surface of the adhesion layer 109 having NiP alloy strength was immersed in an aqueous nitric acid solution (5N) and treated at a temperature of 25 ° C. for 30 seconds to remove the oxide film.
次いで、メツキ浴 (上村工業製、ニムデン HDX— 7G)を用いて、メツキ密着層 109 上に 50 mの NiP合金力 なる無電解メツキを形成し、メツキ金属板 110を得た。こ の際の処理条件は、 pH4. 6、温度 90°C、処理時間を 3時間とした。次いで、このメッ キ金属板 110を水洗、乾燥した後、クリーンオーブンを用いて 250°Cの条件下で 1時 間のァニールを行った。  Next, an electroless plating having a NiP alloy strength of 50 m was formed on the plating adhesion layer 109 using a plating bath (Nimden HDX-7G, manufactured by Uemura Kogyo Co., Ltd.) to obtain a plating metal plate 110. The treatment conditions were pH 4.6, temperature 90 ° C, and treatment time 3 hours. Next, this metal sheet 110 was washed with water and dried, and then annealed for 1 hour at 250 ° C. using a clean oven.
[0086] 次いで、液体状の透光性榭脂 (信越ィ匕学社製、シリコン榭脂 SCR— 1011、屈折 率 1. 5)を、透明電極 106上において、ォーミック接触層 107、反射層 108、メツキ密 着層 109から構成される金属膜層以外の部分に隙間なく塗布し、 100°Cの条件下で 1時間、 150°Cの条件で 5時間乾燥して榭脂を硬化させ、透光性物質層 114を形成 した。  [0086] Next, liquid translucent resin (manufactured by Shin-Etsu Chemical Co., Ltd., silicon resin SCR-1011, refractive index 1.5) is placed on the transparent electrode 106 with an ohmic contact layer 107 and a reflective layer 108. Then, it is applied without any gap to the part other than the metal film layer composed of the Meat adhesion layer 109, dried for 1 hour at 100 ° C and for 5 hours at 150 ° C to cure the resin, A light-sensitive material layer 114 was formed.
[0087] 次いで、サファイア基板及びバッファ層を、研磨法により剥離し n型半導体層 103を 露出させた。  [0087] Next, the sapphire substrate and the buffer layer were separated by a polishing method to expose the n-type semiconductor layer 103.
そして、 n型半導体層 103表面に、厚さ 400nmの ITO (SnO: 10wt%)からなる透  A transparent layer made of ITO (SnO: 10 wt%) having a thickness of 400 nm is formed on the surface of the n-type semiconductor layer 103.
2  2
明電極を、蒸着により成膜した。次いで、 ITO表面上の中央部に、 Cr (40nm)、 Ti( 100nm)、 Au (lOOOnm)からなる負極を、蒸着法により成膜した。負電極のパター ンは、公知のフォトリソグラフィー技術及びリフトオフ技術を用いた。  A bright electrode was deposited by vapor deposition. Next, a negative electrode made of Cr (40 nm), Ti (100 nm), and Au (lOOOnm) was formed on the central portion of the ITO surface by vapor deposition. As the pattern of the negative electrode, a known photolithography technique and lift-off technique were used.
また、 p型半導体表面上には、 Au (lOOOnm)からなる図示略の正極を、蒸着法に より成膜した。  On the p-type semiconductor surface, a positive electrode (not shown) made of Au (lOOOnm) was formed by vapor deposition.
次いで、ダイシングにより分割し、 350 /z m角の、本発明の窒化物系半導体素子を 得た。 得られた窒化物系半導体発光素子について、 TO— 18缶パッケージに実装して、 テスターによって印加電流 20mAにおける発光出力を測定したところ、発光出力は 2 lmWであった。 Subsequently, the nitride-based semiconductor element of the present invention having a 350 / zm square was obtained by dicing. The obtained nitride semiconductor light emitting device was mounted in a TO-18 can package, and the light emission output at an applied current of 20 mA was measured by a tester. The light emission output was 2 lmW.
[0088] [実施例 3] [Example 3]
透光性物質層 114の材料として、シリコン榭脂に替えてチタ-ァゾルを用いた点を 除き、実施例 2と同様の処理を行い、本発明の窒化物系半導体素子を得た。  A nitride-based semiconductor device of the present invention was obtained by performing the same treatment as in Example 2 except that titania sol was used instead of silicon resin as the material of the translucent material layer 114.
チタ-ァゾルは、塗布後、 150°Cの条件で 1時間、 300°Cの条件で 3時間の処理を 行うことにより乾燥、固化させた。この際のチタ-ァゾルの屈折率は 2. 2であった。 得られた窒化物系半導体発光素子について、 TO— 18缶パッケージに実装して、 テスターによって印加電流 20mAにおける発光出力を測定したところ、発光出力は 2 2mWであった。  After application, titasol was dried and solidified by treatment for 1 hour at 150 ° C and 3 hours at 300 ° C. At this time, the refractive index of the titazole was 2.2. The obtained nitride semiconductor light emitting device was mounted in a TO-18 can package, and the light emission output at an applied current of 20 mA was measured by a tester. The light emission output was 22 mW.
[0089] [比較例 2] [0089] [Comparative Example 2]
透光性物質層を形成しな力つた点を除き、実施例 2と同様にして窒化物系半導体 発光素子を作製した。  A nitride-based semiconductor light-emitting device was fabricated in the same manner as in Example 2 except that the light-transmitting substance layer was not formed.
作製した窒化物系半導体発光素子について、 TO— 18缶パッケージに実装して、 テスターによって印加電流 20mAにおける発光出力を測定したところ、発光出力は 2 OmWであった。  The fabricated nitride semiconductor light emitting device was mounted in a TO-18 can package, and the light emission output at an applied current of 20 mA was measured with a tester. The light emission output was 2 OmW.
[0090] [評価結果] [0090] [Evaluation results]
上述のように、 p型半導体層上に、ォーミック接触層、反射層、メツキ金属板を部分 的に形成し、上記各層を形成して!/ヽな 、部分にシリコン榭脂からなる透光性物質層 を設けた実施例 2の窒化物系半導体発光素子は、 21mWの発光出力が得られた。 また、透光性物質層の材料として、シリコン榭脂に替えてチタ-ァゾル榭脂を用い た実施例 3の窒化物系半導体発光素子は、 22mWの発光出力が得られた。  As described above, an ohmic contact layer, a reflective layer, and a metallic metal plate are partially formed on the p-type semiconductor layer, and each of the above layers is formed! The nitride-based semiconductor light-emitting device of Example 2 provided with the material layer had a light output of 21 mW. In addition, the nitride-based semiconductor light-emitting device of Example 3 that uses titasol resin instead of silicon resin as the material of the translucent material layer has a light emission output of 22 mW.
これに対し、透光性物質層を形成していない、比較例 2に示す窒化物系半導体発 光素子は、発光出力は 20mWであった。  In contrast, the nitride-based semiconductor light-emitting element shown in Comparative Example 2 in which no translucent material layer was formed had a light emission output of 20 mW.
[0091] 透光性物質層の材料として、屈折率が 1. 5のシリコン榭脂を用いた実施例 2の窒化 物系半導体発光素子では、透光性物質層を形成していない比較例 2の窒化物系半 導体発光素子と比較して 5%の発光出力の向上が確認された。 また、透光性物質層の材料として、屈折率が 2. 2のチタ-ァゾル榭脂を用いた実施 例 3の窒化物系半導体発光素子では、比較例 2の窒化物系半導体発光素子と比較 して 10%の発光出力の向上が確認された。 [0091] In the nitride-based semiconductor light-emitting device of Example 2 using silicon resin having a refractive index of 1.5 as the material of the light-transmitting material layer, Comparative Example 2 in which the light-transmitting material layer is not formed Compared with the nitride-based semiconductor light-emitting device, the emission output was improved by 5%. In addition, the nitride-based semiconductor light-emitting device of Example 3 that uses titasol resin having a refractive index of 2.2 as the material of the translucent material layer is compared with the nitride-based semiconductor light-emitting device of Comparative Example 2. As a result, a 10% improvement in light output was confirmed.
透光性物質層を設けない場合の屈折率は 1であるため、透光性物質層の屈折率が 上昇するほど、光取り出し効率が向上していることがわかる。これは、透光性物質に、 屈折率が 1. 4〜2. 6と高い物質を使用することにより臨界角が大きくなるため、より全 反射しにくくなるからである。なお、上限が 2. 6なのは、 GaNの屈折率が 2. 6である のでこれ以上大きくする必要がない。これ以上大きくすると、透光性物質から光を取り 出すことが難しくなる。  Since the refractive index when the light-transmitting material layer is not provided is 1, it can be seen that the light extraction efficiency is improved as the refractive index of the light-transmitting material layer is increased. This is because the use of a material having a high refractive index of 1.4 to 2.6 as the translucent material increases the critical angle and makes it more difficult to totally reflect. Note that the upper limit is 2.6 because the refractive index of GaN is 2.6, so there is no need to increase it further. If it is larger than this, it will be difficult to extract light from the translucent material.
上記結果により、本発明の窒化物系半導体発光素子が、光取り出し効率に優れて いることが明らかである。  From the above results, it is clear that the nitride-based semiconductor light-emitting device of the present invention is excellent in light extraction efficiency.
産業上の利用可能性 Industrial applicability
本発明によって提供される窒化物系半導体発光素子は、優れた特性と安定性を有 し、発光ダイオードおよびランプ等の材料として有用である。  The nitride-based semiconductor light-emitting device provided by the present invention has excellent characteristics and stability and is useful as a material for light-emitting diodes and lamps.

Claims

請求の範囲 The scope of the claims
[1] 基板上に少なくとも n型半導体層、発光層、 p型半導体層、金属膜層、メツキ金属板 が積層されてなる窒化物系半導体発光素子において、  [1] In a nitride-based semiconductor light-emitting device in which at least an n-type semiconductor layer, a light-emitting layer, a p-type semiconductor layer, a metal film layer, and a metal plating plate are laminated on a substrate,
前記金属膜層、及び前記メツキ金属板が前記 P型半導体層上に部分的に形成され ていることを特徴とする窒化物系半導体発光素子。  The nitride-based semiconductor light-emitting device, wherein the metal film layer and the metal plate are partially formed on the P-type semiconductor layer.
[2] 基板上に少なくとも n型半導体層、発光層、 p型半導体層、金属膜層、メツキ金属板 が積層されてなる窒化物系半導体発光素子において、 [2] In a nitride-based semiconductor light-emitting device in which at least an n-type semiconductor layer, a light-emitting layer, a p-type semiconductor layer, a metal film layer, and a metal plating plate are laminated on a substrate,
前記金属膜層、及び前記メツキ金属板が前記 P型半導体層上に平面視交差状態 に形成されていることを特徴とする請求項 1に記載の窒化物系半導体発光素子。  2. The nitride-based semiconductor light-emitting element according to claim 1, wherein the metal film layer and the metal plating plate are formed on the P-type semiconductor layer so as to intersect in plan view.
[3] 前記 p型半導体層上に形成される前記金属膜層及びメツキ金属板の面積が、前記[3] The areas of the metal film layer and the metal plate formed on the p-type semiconductor layer are
P型半導体層上面に対する面積比で 10〜90%の範囲内であることを特徴とする請 求項 1に記載の窒化物系半導体発光素子。 The nitride-based semiconductor light-emitting device according to claim 1, wherein the area ratio with respect to the upper surface of the P-type semiconductor layer is in the range of 10 to 90%.
[4] 前記基板上に形成される前記 n型半導体層、発光層及び p型半導体層が、あらか じめ素子単位に分割されていることを特徴とする請求項 1に記載の窒化物系半導体 発光素子。 [4] The nitride system according to [1], wherein the n-type semiconductor layer, the light emitting layer, and the p-type semiconductor layer formed on the substrate are divided into element units in advance. Semiconductor light emitting device.
[5] 前記 p型半導体層上に透明電極が備えられていることを特徴とする請求項 1に記載 の窒化物系半導体発光素子。  5. The nitride-based semiconductor light-emitting element according to claim 1, wherein a transparent electrode is provided on the p-type semiconductor layer.
[6] 前記金属膜層がォーミック接触層を含むことを特徴とする請求項 1に記載の窒化物 系半導体発光素子。 6. The nitride-based semiconductor light-emitting element according to claim 1, wherein the metal film layer includes an ohmic contact layer.
[7] 前記ォーミック接触層が、 Pt、 Ru、 Os、 Rh、 Ir、 Pd、 Agの単体金属、及び Z又は 、それらの合金力 なることを特徴とする請求項 6に記載の窒化物系半導体発光素 子。  [7] The nitride semiconductor according to [6], wherein the ohmic contact layer is composed of a single metal of Pt, Ru, Os, Rh, Ir, Pd, Ag, and Z or an alloy force thereof. Luminescent element.
[8] 前記ォーミック接触層の膜厚が 0. Inn!〜 30nmの範囲内であることを特徴とする 請求項 6に記載の窒化物系半導体発光素子。  [8] The film thickness of the ohmic contact layer is 0. Inn! The nitride-based semiconductor light-emitting element according to claim 6, wherein the nitride-based semiconductor light-emitting element is in a range of ˜30 nm.
[9] 前記メツキ金属板の膜厚が 10 μ m〜200 μ mの範囲内であることを特徴とする請 求項 1に記載の窒化物系半導体発光素子。 [9] The nitride-based semiconductor light-emitting element according to claim 1, wherein the thickness of the plating metal plate is in a range of 10 μm to 200 μm.
[10] 前記メツキ金属板が、 NiP合金、 Cu、または Cu合金カゝらなることを特徴とする請求 項 1に記載の窒化物系半導体発光素子。 10. The nitride-based semiconductor light-emitting element according to claim 1, wherein the metal plating plate is made of NiP alloy, Cu, or Cu alloy.
[11] 前記金属膜層と前記メツキ金属板との間にメツキ密着層が形成されていることを特 徴とする請求項 1に記載の窒化物系半導体発光素子。 11. The nitride-based semiconductor light-emitting element according to claim 1, wherein a metal adhesion layer is formed between the metal film layer and the metal metal plate.
[12] 前記メツキ密着層が、前記メツキ金属板をなすメツキの 50重量%以上を占める主成 分と同一の組成を 50重量%以上含有することを特徴とする請求項 11に記載の窒化 物系半導体発光素子。 12. The nitride according to claim 11, wherein the plating adhesion layer contains 50% by weight or more of the same composition as the main component occupying 50% by weight or more of the plating forming the plating metal plate. -Based semiconductor light emitting device.
[13] 前記メツキ密着層が、 NiP合金、または Cu合金カゝらなることを特徴とする請求項 11 又は請求項 12に記載の窒化物系半導体発光素子。  [13] The nitride-based semiconductor light-emitting element according to [11] or [12], wherein the plating adhesion layer is made of NiP alloy or Cu alloy.
[14] 前記 p型半導体層上にお!ヽて、前記金属膜層及び前記メツキ金属板が形成されて[14] On the p-type semiconductor layer! Then, the metal film layer and the metal plate are formed.
V、な 、部分に透光性物質層が形成されて!、ることを特徴とする請求項 1に記載の窒 化物系半導体発光素子。 2. The nitride-based semiconductor light-emitting device according to claim 1, wherein a translucent material layer is formed on V, and so on.
[15] 前記 p型半導体層上に形成される前記金属膜層及び前記メツキ金属板が、平面視 交差状態に設けられており、 [15] The metal film layer and the metal plate formed on the p-type semiconductor layer are provided in an intersecting state in plan view,
前記 P型半導体層上にお!ヽて、前記金属膜層及び前記メツキ金属板が形成されて The metal film layer and the metal plate are formed on the P-type semiconductor layer.
Vヽな 、部分に前記透光性物質層が設けられて ヽることを特徴とする請求項 14に記 載の窒化物系半導体発光素子。 15. The nitride-based semiconductor light-emitting device according to claim 14, wherein the light-transmitting material layer is provided in a portion that is V-shaped.
[16] 前記透光性物質層が前記 p型半導体層上に積層され、前記透光性物質層が少な くとも前記金属膜層とメツキ金属板によって部分的に囲われていることを特徴とする請 求項 14に記載の窒化物系半導体発光素子。 [16] The translucent material layer is laminated on the p-type semiconductor layer, and the translucent material layer is at least partially surrounded by the metal film layer and a metal plate. 15. The nitride semiconductor light emitting device according to claim 14.
[17] 前記透光性物質層が、透明電極を介して p型半導体層上に積層され、前記透光性 物質層が少なくとも前記金属膜層とメツキ金属板によって部分的に囲われていること を特徴とする請求項 14に記載の窒化物系半導体発光素子。 [17] The translucent material layer is laminated on the p-type semiconductor layer via a transparent electrode, and the translucent material layer is partially surrounded by at least the metal film layer and a metal plate. 15. The nitride-based semiconductor light-emitting device according to claim 14,
[18] 前記透光性物質層が、透光性榭脂、シリカ系物質又はチタニア系物質の何れかか らなることを特徴とする請求項 14に記載の窒化物系半導体発光素子。 [18] The nitride-based semiconductor light-emitting element according to [14], wherein the light-transmitting material layer is made of a light-transmitting resin, a silica-based material, or a titania-based material.
[19] 前記透光性物質層の屈折率が 1. 4〜2. 6の範囲内であることを特徴とする請求項[19] The refractive index of the translucent material layer is in the range of 1.4 to 2.6.
14に記載の窒化物系半導体発光素子。 14. The nitride semiconductor light-emitting device according to 14.
[20] 前記透光性物質層の膜厚が 10 μ m〜200 μ mの範囲内であることを特徴とする請 求項 14に記載の窒化物系半導体発光素子。 [20] The nitride-based semiconductor light-emitting element according to claim 14, wherein the translucent material layer has a thickness in a range of 10 μm to 200 μm.
[21] 前記基板上に形成される n型半導体層、発光層、 p型半導体層があらかじめ素子単 位に分割されていることを特徴とする請求項 14に記載の窒化物系半導体発光素子。 [21] An n-type semiconductor layer, a light-emitting layer, and a p-type semiconductor layer formed on the substrate are previously formed as a single element. 15. The nitride-based semiconductor light-emitting device according to claim 14, wherein the nitride-based semiconductor light-emitting device is divided into units.
[22] 前記金属膜層がォーミック接触層を含むことを特徴する請求項 14に記載の窒化物 系半導体発光素子。 [22] The nitride-based semiconductor light-emitting element according to [14], wherein the metal film layer includes an ohmic contact layer.
[23] 前記ォーミック接触層が、 Pt、 Ru、 Os、 Rh、 Ir、 Pd、 Agの単体金属、及び Z又は 、それらの合金力 なることを特徴とする請求項 22に記載の窒化物系半導体発光素 子。  [23] The nitride-based semiconductor according to [22], wherein the ohmic contact layer is composed of a single metal of Pt, Ru, Os, Rh, Ir, Pd, Ag, and Z or an alloy force thereof. Luminescent element.
[24] 前記ォーミック接触層の膜厚が 0. Inn!〜 30nmの範囲内であることを特徴とする 請求項 22に記載の窒化物系半導体発光素子。  [24] The film thickness of the ohmic contact layer is 0. Inn! 23. The nitride-based semiconductor light-emitting element according to claim 22, wherein the nitride-based semiconductor light-emitting element is in a range of ˜30 nm.
[25] 前記メツキ金属板の膜厚が 10 μ m〜200 μ mの範囲内であることを特徴とする請 求項 14に記載の窒化物系半導体発光素子。 [25] The nitride-based semiconductor light-emitting element according to claim 14, wherein the thickness of the metal sheet is in the range of 10 μm to 200 μm.
[26] 前記メツキ金属板が、 NiP合金、 Cu、または Cu合金カゝらなることを特徴とする請求 項 14に記載の窒化物系半導体発光素子。 26. The nitride-based semiconductor light-emitting element according to claim 14, wherein the metal plating plate is made of NiP alloy, Cu, or Cu alloy.
[27] 前記金属膜層と前記メツキ金属板との間にメツキ密着層が形成されていることを特 徴とする請求項 14に記載の窒化物系半導体発光素子。 27. The nitride-based semiconductor light-emitting element according to claim 14, wherein a metal adhesion layer is formed between the metal film layer and the metal metal plate.
[28] 前記メツキ密着層が、前記メツキ金属板をなすメツキの 50重量%以上を占める主成 分と同一の組成を 50重量%以上含有することを特徴とする請求項 27に記載の窒化 物系半導体発光素子。 28. The nitride according to claim 27, wherein the plating adhesion layer contains 50% by weight or more of the same composition as the main component occupying 50% by weight or more of the plating forming the plating metal plate. -Based semiconductor light emitting device.
[29] 前記メツキ密着層が、 NiP合金または Cu合金カゝらなることを特徴とする請求項 27又 は請求項 28に記載の窒化物系半導体発光素子。  [29] The nitride-based semiconductor light-emitting element according to [27] or [28], wherein the adhesion adhesion layer is made of NiP alloy or Cu alloy.
[30] 基板上に少なくとも n型半導体層、発光層、 p型半導体層、金属膜層、メツキ金属板 を積層する積層工程を有する窒化物系半導体発光素子の製造方法において、 前記積層工程において、前記金属膜層及び前記メツキ金属板を、前記 p型半導体 層上に部分的に形成することを特徴とする窒化物系半導体発光素子の製造方法。 [30] In the method for manufacturing a nitride-based semiconductor light-emitting device including a stacking step of stacking at least an n-type semiconductor layer, a light-emitting layer, a p-type semiconductor layer, a metal film layer, and a metal plating plate on a substrate, A method for producing a nitride-based semiconductor light-emitting device, wherein the metal film layer and the metal plate are partially formed on the p-type semiconductor layer.
[31] 前記積層工程において、前記金属膜層及び前記金属板を、個々に平面視ライン 状で交差状態に形成することを特徴とする請求項 30に記載の窒化物系半導体発光 素子の製造方法。 31. The method for manufacturing a nitride-based semiconductor light-emitting element according to claim 30, wherein, in the stacking step, the metal film layer and the metal plate are individually formed in a cross shape in a line in plan view. .
[32] 前記積層工程は、前記 n型半導体層を、ノ ッファ層を介して基板上に取り付けて行 われ、 前記積層工程終了後に、前記基板およびバッファ層を除去することにより、前記 n 型半導体層を露出させることを特徴とする請求項 30に記載の窒化物系半導体発光 素子の製造方法。 [32] The stacking step is performed by attaching the n-type semiconductor layer on a substrate via a notch layer, 31. The method for manufacturing a nitride-based semiconductor light-emitting element according to claim 30, wherein the n-type semiconductor layer is exposed by removing the substrate and the buffer layer after completion of the stacking step.
[33] 前記基板をレーザによって除去することを特徴とする請求項 32に記載の窒化物系 半導体発光素子の製造方法。  33. The method for manufacturing a nitride-based semiconductor light-emitting element according to claim 32, wherein the substrate is removed by a laser.
[34] 前記メツキ金属板を形成した後、 100°C〜300°Cの温度で熱処理することを特徴と する請求項 30〜33に記載の窒化物系半導体発光素子の製造方法。 [34] The method for producing a nitride-based semiconductor light-emitting element according to any one of [30] to [33], wherein a heat treatment is performed at a temperature of 100 ° C. to 300 ° C. after forming the plated metal plate.
[35] 前記 p型半導体層上にお!ヽて、前記金属膜層及び前記メツキ金属板が形成されて いない部分に透光性物質層を形成する工程をさらに有することを特徴とする請求項 3[35] On the p-type semiconductor layer! The method further comprises the step of forming a translucent material layer in a portion where the metal film layer and the metal plate are not formed.
0に記載の窒化物系半導体発光素子の製造方法。 A method for producing a nitride-based semiconductor light-emitting device according to 0.
[36] 前記積層工程において、前記金属膜層及び前記金属板を、個々に平面視ライン 状で交差状態に形成することを特徴とする請求項 35に記載の窒化物系半導体発光 素子の製造方法。 36. The method for manufacturing a nitride-based semiconductor light-emitting element according to claim 35, wherein, in the stacking step, the metal film layer and the metal plate are individually formed in a cross shape in a line in plan view. .
[37] 前記積層工程は、前記 n型半導体層を、ノ ッファ層を介して基板上に取り付けて行 われ、  [37] The stacking step is performed by attaching the n-type semiconductor layer on a substrate via a notch layer,
前記積層工程終了後に、前記基板およびバッファ層を除去することにより、前記 n 型半導体層を露出させることを特徴とする請求項 35に記載の窒化物系半導体発光 素子の製造方法。  36. The method for manufacturing a nitride-based semiconductor light-emitting element according to claim 35, wherein the n-type semiconductor layer is exposed by removing the substrate and the buffer layer after completion of the stacking step.
[38] 前記基板をレーザによって除去することを特徴とする請求項 37に記載の窒化物系 半導体発光素子の製造方法。  38. The method for manufacturing a nitride-based semiconductor light-emitting element according to claim 37, wherein the substrate is removed with a laser.
[39] 前記メツキ金属板を形成した後、 100°C〜300°Cの温度で熱処理することを特徴と する請求項 35〜38の何れかに記載の窒化物系半導体発光素子の製造方法。 [39] The method for producing a nitride-based semiconductor light-emitting element according to any one of [35] to [38], wherein after forming the plated metal plate, heat treatment is performed at a temperature of 100 ° C to 300 ° C.
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