JP2006236106A - データ処理装置及びデータ処理方法 - Google Patents

データ処理装置及びデータ処理方法 Download PDF

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Publication number
JP2006236106A
JP2006236106A JP2005051370A JP2005051370A JP2006236106A JP 2006236106 A JP2006236106 A JP 2006236106A JP 2005051370 A JP2005051370 A JP 2005051370A JP 2005051370 A JP2005051370 A JP 2005051370A JP 2006236106 A JP2006236106 A JP 2006236106A
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Japan
Prior art keywords
data processing
data
configuration
unit
processing
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Pending
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JP2005051370A
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English (en)
Japanese (ja)
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JP2006236106A5 (enExample
Inventor
Tsutomu Fukatsu
勉 普勝
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Canon Inc
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Canon Inc
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Application filed by Canon Inc filed Critical Canon Inc
Priority to JP2005051370A priority Critical patent/JP2006236106A/ja
Priority to US11/354,383 priority patent/US7613899B2/en
Publication of JP2006236106A publication Critical patent/JP2006236106A/ja
Publication of JP2006236106A5 publication Critical patent/JP2006236106A5/ja
Pending legal-status Critical Current

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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G06F15/8007—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors single instruction multiple data [SIMD] multiprocessors

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Logic Circuits (AREA)
  • Stored Programmes (AREA)
JP2005051370A 2005-02-25 2005-02-25 データ処理装置及びデータ処理方法 Pending JP2006236106A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2005051370A JP2006236106A (ja) 2005-02-25 2005-02-25 データ処理装置及びデータ処理方法
US11/354,383 US7613899B2 (en) 2005-02-25 2006-02-15 Reconfigurable data processing device and method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2005051370A JP2006236106A (ja) 2005-02-25 2005-02-25 データ処理装置及びデータ処理方法

Publications (2)

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JP2006236106A true JP2006236106A (ja) 2006-09-07
JP2006236106A5 JP2006236106A5 (enExample) 2008-04-10

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ID=36933137

Family Applications (1)

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JP2005051370A Pending JP2006236106A (ja) 2005-02-25 2005-02-25 データ処理装置及びデータ処理方法

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US (1) US7613899B2 (enExample)
JP (1) JP2006236106A (enExample)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007257549A (ja) * 2006-03-24 2007-10-04 Toshiba Corp 半導体装置
JP2009037291A (ja) * 2007-07-31 2009-02-19 Toshiba Corp 半導体装置
JP2011154534A (ja) * 2010-01-27 2011-08-11 Fujitsu Semiconductor Ltd リコンフィギュラブル回路および半導体集積回路
US10319436B2 (en) 2015-12-11 2019-06-11 Fujitsu Limited System including programmable integrated circuit including first areas having same shape and second areas formed between first areas, and operation processing device and method for controlling the programmable integrated circuit

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4795025B2 (ja) * 2006-01-13 2011-10-19 キヤノン株式会社 ダイナミックリコンフィギャラブルデバイス、制御方法、及びプログラム
JP7325210B2 (ja) * 2019-04-08 2023-08-14 キヤノン株式会社 情報処理装置及びその制御方法
US20210406007A1 (en) * 2020-06-30 2021-12-30 Western Digital Technologies, Inc. Generating optimized microcode instructions for dynamic programming based on idempotent semiring operations
US20210406009A1 (en) * 2020-06-30 2021-12-30 Western Digital Technologies, Inc. Apparatus for optimized microcode instructions for dynamic programming based on idempotent semiring operations

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11259436A (ja) * 1998-03-10 1999-09-24 Toppan Printing Co Ltd データ並列処理方法
JP2002026721A (ja) * 2000-07-10 2002-01-25 Fuji Xerox Co Ltd 情報処理装置
JP2004054646A (ja) * 2002-07-19 2004-02-19 Sony Corp 画像処理装置およびその方法

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA2129882A1 (en) * 1993-08-12 1995-02-13 Soheil Shams Dynamically reconfigurable interprocessor communication network for simd multiprocessors and apparatus implementing same
US5892962A (en) * 1996-11-12 1999-04-06 Lucent Technologies Inc. FPGA-based processor
FR2795839B1 (fr) * 1999-07-02 2001-09-07 Commissariat Energie Atomique Procede de reconfiguration applicable a un reseau d'elements fonctionnels identiques
US6681341B1 (en) * 1999-11-03 2004-01-20 Cisco Technology, Inc. Processor isolation method for integrated multi-processor systems
US6438737B1 (en) * 2000-02-15 2002-08-20 Intel Corporation Reconfigurable logic for a computer
JP3674515B2 (ja) * 2000-02-25 2005-07-20 日本電気株式会社 アレイ型プロセッサ
JP4411786B2 (ja) 2001-01-19 2010-02-10 ソニー株式会社 演算システム
US6757761B1 (en) * 2001-05-08 2004-06-29 Tera Force Technology Corp. Multi-processor architecture for parallel signal and image processing
US6874079B2 (en) * 2001-07-25 2005-03-29 Quicksilver Technology Adaptive computing engine with dataflow graph based sequencing in reconfigurable mini-matrices of composite functional blocks
US7159099B2 (en) * 2002-06-28 2007-01-02 Motorola, Inc. Streaming vector processor with reconfigurable interconnection switch
US7320064B2 (en) * 2004-07-23 2008-01-15 Honeywell International Inc. Reconfigurable computing architecture for space applications

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11259436A (ja) * 1998-03-10 1999-09-24 Toppan Printing Co Ltd データ並列処理方法
JP2002026721A (ja) * 2000-07-10 2002-01-25 Fuji Xerox Co Ltd 情報処理装置
JP2004054646A (ja) * 2002-07-19 2004-02-19 Sony Corp 画像処理装置およびその方法

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007257549A (ja) * 2006-03-24 2007-10-04 Toshiba Corp 半導体装置
JP2009037291A (ja) * 2007-07-31 2009-02-19 Toshiba Corp 半導体装置
JP2011154534A (ja) * 2010-01-27 2011-08-11 Fujitsu Semiconductor Ltd リコンフィギュラブル回路および半導体集積回路
US9720879B2 (en) 2010-01-27 2017-08-01 Cypress Semiconductor Corporation Reconfigurable circuit having rows of a matrix of registers connected to corresponding ports and a semiconductor integrated circuit
US10319436B2 (en) 2015-12-11 2019-06-11 Fujitsu Limited System including programmable integrated circuit including first areas having same shape and second areas formed between first areas, and operation processing device and method for controlling the programmable integrated circuit

Also Published As

Publication number Publication date
US7613899B2 (en) 2009-11-03
US20060195684A1 (en) 2006-08-31

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