JP2006236106A5 - - Google Patents

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Publication number
JP2006236106A5
JP2006236106A5 JP2005051370A JP2005051370A JP2006236106A5 JP 2006236106 A5 JP2006236106 A5 JP 2006236106A5 JP 2005051370 A JP2005051370 A JP 2005051370A JP 2005051370 A JP2005051370 A JP 2005051370A JP 2006236106 A5 JP2006236106 A5 JP 2006236106A5
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JP
Japan
Prior art keywords
data processing
processing means
data
stage
performs
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2005051370A
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English (en)
Japanese (ja)
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JP2006236106A (ja
Filing date
Publication date
Application filed filed Critical
Priority to JP2005051370A priority Critical patent/JP2006236106A/ja
Priority claimed from JP2005051370A external-priority patent/JP2006236106A/ja
Priority to US11/354,383 priority patent/US7613899B2/en
Publication of JP2006236106A publication Critical patent/JP2006236106A/ja
Publication of JP2006236106A5 publication Critical patent/JP2006236106A5/ja
Pending legal-status Critical Current

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JP2005051370A 2005-02-25 2005-02-25 データ処理装置及びデータ処理方法 Pending JP2006236106A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2005051370A JP2006236106A (ja) 2005-02-25 2005-02-25 データ処理装置及びデータ処理方法
US11/354,383 US7613899B2 (en) 2005-02-25 2006-02-15 Reconfigurable data processing device and method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2005051370A JP2006236106A (ja) 2005-02-25 2005-02-25 データ処理装置及びデータ処理方法

Publications (2)

Publication Number Publication Date
JP2006236106A JP2006236106A (ja) 2006-09-07
JP2006236106A5 true JP2006236106A5 (enExample) 2008-04-10

Family

ID=36933137

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2005051370A Pending JP2006236106A (ja) 2005-02-25 2005-02-25 データ処理装置及びデータ処理方法

Country Status (2)

Country Link
US (1) US7613899B2 (enExample)
JP (1) JP2006236106A (enExample)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4795025B2 (ja) * 2006-01-13 2011-10-19 キヤノン株式会社 ダイナミックリコンフィギャラブルデバイス、制御方法、及びプログラム
JP4861030B2 (ja) * 2006-03-24 2012-01-25 株式会社東芝 半導体装置
JP4950796B2 (ja) * 2007-07-31 2012-06-13 株式会社東芝 半導体装置
JP5711889B2 (ja) * 2010-01-27 2015-05-07 スパンション エルエルシー リコンフィギュラブル回路および半導体集積回路
JP6638362B2 (ja) 2015-12-11 2020-01-29 富士通株式会社 演算処理装置、演算処理システムおよび演算処理方法
JP7325210B2 (ja) * 2019-04-08 2023-08-14 キヤノン株式会社 情報処理装置及びその制御方法
US20210406007A1 (en) * 2020-06-30 2021-12-30 Western Digital Technologies, Inc. Generating optimized microcode instructions for dynamic programming based on idempotent semiring operations
US20210406009A1 (en) * 2020-06-30 2021-12-30 Western Digital Technologies, Inc. Apparatus for optimized microcode instructions for dynamic programming based on idempotent semiring operations

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA2129882A1 (en) * 1993-08-12 1995-02-13 Soheil Shams Dynamically reconfigurable interprocessor communication network for simd multiprocessors and apparatus implementing same
US5892962A (en) * 1996-11-12 1999-04-06 Lucent Technologies Inc. FPGA-based processor
JPH11259436A (ja) * 1998-03-10 1999-09-24 Toppan Printing Co Ltd データ並列処理方法
FR2795839B1 (fr) * 1999-07-02 2001-09-07 Commissariat Energie Atomique Procede de reconfiguration applicable a un reseau d'elements fonctionnels identiques
US6681341B1 (en) * 1999-11-03 2004-01-20 Cisco Technology, Inc. Processor isolation method for integrated multi-processor systems
US6438737B1 (en) * 2000-02-15 2002-08-20 Intel Corporation Reconfigurable logic for a computer
JP3674515B2 (ja) * 2000-02-25 2005-07-20 日本電気株式会社 アレイ型プロセッサ
JP2002026721A (ja) * 2000-07-10 2002-01-25 Fuji Xerox Co Ltd 情報処理装置
JP4411786B2 (ja) 2001-01-19 2010-02-10 ソニー株式会社 演算システム
US6757761B1 (en) * 2001-05-08 2004-06-29 Tera Force Technology Corp. Multi-processor architecture for parallel signal and image processing
US6874079B2 (en) * 2001-07-25 2005-03-29 Quicksilver Technology Adaptive computing engine with dataflow graph based sequencing in reconfigurable mini-matrices of composite functional blocks
US7159099B2 (en) * 2002-06-28 2007-01-02 Motorola, Inc. Streaming vector processor with reconfigurable interconnection switch
JP4264529B2 (ja) * 2002-07-19 2009-05-20 ソニー株式会社 画像処理装置およびその方法
US7320064B2 (en) * 2004-07-23 2008-01-15 Honeywell International Inc. Reconfigurable computing architecture for space applications

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