JP2006222359A - Manufacturing method of light emitting diode array - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a manufacturing method of a light emitting diode array by which necessary chip dimensional accuracy is obtained even in the case of using a standard dicing method and breaking off and cracking of a chip are suppressed. <P>SOLUTION: In a manufacturing method of a lightemitting diode array for dicing along a dicing line formed between respective arrays of the light emitting diode array, half cut 7 by dicing is previously carried out from the rear face of a wafer in the case of dicing the Y-axis of the chip, and full dicing 8 is carried out from the front face of the wafer after this. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a method for manufacturing a light emitting diode array, and more particularly to a method for manufacturing a high density light emitting diode array suitable for an LED printer.

  FIG. 3 is an enlarged view of a part of a semiconductor wafer on which a chip pattern of a general light emitting diode array used for a printer head or the like of an LED printer is formed, and each adjacent to each other with a Y-axis dicing guide 3 as a boundary. A light emitting diode array chip 1 is shown.

  In dicing the light-emitting diode array chip 1 used in the LED printer, the direction perpendicular to the arrangement direction of the light-emitting dots 2 that will be the chip mating surface (hereinafter referred to as the Y-axis) is important, improving chip dimensional accuracy. In order to achieve this, the chip length must be the surface standard. However, the cross-sectional profile of normal dicing is not a perfect vertical shape, but a forward taper shape as shown in FIG. 4 and the chip length is longer on the back surface than on the chip surface, making it impossible to manage the chip length on the basis of the surface. Therefore, the required chip dimensional accuracy cannot be obtained. As an example, when a chip having a thickness of 360 μm is diced, as shown in FIG. 4, the back surface of the chip on one side of the chip becomes approximately 6 μm longer than the front surface due to the forward taper shape (dimension B).

  In this case, the gap amount A between the chip end dots must be 5 μm or less. For 600 DPI, which is a high density light emitting diode array, dicing of chip 1 is virtually impossible.

  Therefore, conventionally, the dicing blade is angled by 1 to 2 degrees with respect to the vertical direction of the wafer, and reverse taper dicing is performed to form a reverse taper shape as shown in FIG. I did it.

  On the other hand, the dicing in the direction parallel to the arrangement direction of the light emitting dots 2 (hereinafter referred to as the X axis) may be standard dicing because the dimensional tolerance is large.

  However, what is most important in dicing the light-emitting diode array chip 1 is that, as shown in FIG. 5, chipping 4 and cracks 5 must be suppressed in order not to deteriorate the characteristics of the light-emitting dots 2 when dicing along the Y axis. However, when reverse taper dicing is performed as shown in FIG. 5, there is a drawback that the number of chips 4 and cracks 5 are clearly increased as compared with normal forward taper dicing.

  In particular, 600 DPI, which is a high-density light emitting diode array that must have a gap amount A of 5 μm or less with respect to the chip tip end, is greatly affected by chipping 4 and cracks 5, which significantly reduces the yield. .

  On the other hand, the design tolerance for the X-axis is large, and the problem of chipping and cracking can be avoided by design.

As a method for solving the problem in dicing the Y-axis, conventionally, there is a method in which a dicing groove is formed on the front surface of the wafer, a notch is formed on the back surface by etching, and then a dicing blade is cut into the dicing groove. It has been proposed (see, for example, Patent Document 1).
Japanese Patent Laid-Open No. 2002-231994

  However, the method of providing the etching groove on the back surface of the substrate using the photolithographic technique of Patent Document 1 cannot form a deep groove. Since a deep groove cannot be formed on the back surface of the substrate, the amount of dicing (depth) from the substrate surface increases, resulting in a problem that the dimensional accuracy of dicing is not achieved, and the number of steps is large and the process is complicated. .

  Accordingly, an object of the present invention is to provide a method for manufacturing a light-emitting diode array that can obtain the necessary chip dimensional accuracy even when a standard dicing method is used and that can suppress chip chipping and cracking. is there.

  In order to achieve the above object, the present invention is configured as follows.

  According to a first aspect of the present invention, there is provided a light emitting diode array manufacturing method in which a plurality of light emitting diode arrays formed on a wafer are diced along dicing guides formed between the arrays. When dicing along the Y-axis, half-cutting is performed in advance from the wafer back surface, and then full dicing is performed from the wafer surface.

  According to a second aspect of the present invention, in the method of manufacturing the light-emitting diode array according to the first aspect, a thick dicing blade having a thickness more than double the Y-axis dicing guide width is used, and the predetermined thickness is cut from the chip surface. Half-dicing is performed from the back surface of the chip so as to leave.

  According to a third aspect of the present invention, in the method for manufacturing a light-emitting diode array according to the second aspect, the predetermined thickness is cut off by 100 to 150 μm from the chip surface.

  According to a fourth aspect of the present invention, in the method of manufacturing the light-emitting diode array according to the second or third aspect, an appropriate dicing blade that matches the dicing guide width of the Y-axis is used from the chip surface to fill the uncut region. Dicing is performed.

  According to a fifth aspect of the present invention, in the method of manufacturing the light-emitting diode array according to the first aspect, the thickness of the dicing blade used for half-cut from the back surface of the Y-axis is 150 to 300 μm, The uncut amount is 100 to 150 μm.

<Key points of the invention>
In the present invention, in order to achieve the above object, half dicing is first performed from the back surface of the chip and then full dicing is performed from the chip surface with respect to one Y-axis dicing guide of the light emitting diode array.

  For dicing, first, a thick dicing blade having a thickness more than double the Y-axis dicing guide width is used, and half dicing is performed from the back surface of the chip so as to leave 100 to 150 μm from the chip surface.

  Next, full dicing of the uncut region is performed using an appropriate dicing blade that matches the dicing guide width from the chip surface.

  Thus, the dicing cross-sectional profile is always dicing with a blade thicker than the chip back surface, so that the chip back surface length is always less than the chip surface length. However, about 100 to 150 μm of the region diced from the chip surface is forward taper dicing, which is slightly longer than the chip surface length, but since the depth length of dicing is small, the influence of the forward taper angle is The required chip size accuracy can be obtained.

  In addition, since the chip surface on which chipping and cracking must be suppressed has a small dicing depth, chipping and cracking can be greatly suppressed as compared with a normal dicing method.

  According to the present invention, the following excellent effects can be obtained.

  According to the present invention, when the Y-axis dicing of an important chip is performed, half-cutting is performed in advance by dicing from the wafer back surface, and then full dicing is performed from the wafer surface for separation. Since the back surface is also half-cut by dicing, it is less troublesome than the case of forming a conventional etching groove. Further, since half-cutting can be deeply performed by dicing from the back surface, the amount of subsequent full dicing from the wafer surface (cutting depth) is reduced, and the accuracy of the entire Y-axis dicing can be improved. .

  In other words, according to the present invention, in the Y-axis dicing, which is important for dicing the light-emitting diode array, half dicing is performed in advance deeper than the back surface of the wafer, and the dicing amount from the wafer surface is kept to the minimum necessary level. Even in the case of dicing with a taper shape, even for a high-density light emitting diode array such as 600 DPI, necessary chip dimensional accuracy can be obtained, and chipping and cracking caused by dicing on the chip surface can be greatly reduced.

  An embodiment of a method for manufacturing a light-emitting diode array according to the present invention will be described with reference to FIGS.

  FIG. 1A is an enlarged cross-sectional view of one Y-axis dicing guide 3 of a semiconductor wafer having a thickness of 360 μm (D1) on which a chip pattern of a 600 DPI light emitting diode array is formed. Each light emitting diode array chip 1 adjacent to each other with the Y-axis dicing guide 3 as a boundary is shown. The width of the Y-axis dicing guide 3 is designed to be 80 μm.

  When cutting a chip by dicing from this wafer, first, as shown in FIG. 1B, the wafer is diced to a depth (D2) of about 240 μm from a position directly below the Y-axis dicing guide 3 with a blade having a thickness of 200 μm (half). Cut 7) is performed to leave a chip surface area of about 120 μm (D3).

  The Y-axis dicing guide 3 on the chip surface and the dicing position on the back surface of the chip are aligned with the orientation flat position of the wafer (wafer helicopter in the case of a square wafer) as a reference and the dicing table is moved at the chip imposition pitch. Positioning. Although the thickness of the blade used for back surface dicing is determined by this alignment accuracy, a thick blade such as the blade used in the present invention is desirable in consideration of surely dicing directly under the Y-axis dicing guide 3.

  Next, the half-diced wafer is attached to a dicing sheet and then set on a dicing table, and full dicing 8 (see FIG. 2) is performed with a 70 μm-thick dicing blade 6 (FIG. 1 (c)). .

  Note that the uncut amount D3 at the time of backside dicing is the minimum necessary uncut amount so that the wafer does not crack when it is attached to the dicing sheet. According to the examination result of the present invention, the wafer size is φ3. "(3 inch) was about 120 μm. Also, the over-dicing amount (D4) when dicing the wafer surface was set to a large value of +100 μm with respect to the thickness of 120 μm, and the dicing shape of the tip of the dicing blade It was set to have no effect.

  For the X-axis dicing, standard full dicing was performed after the Y-axis dicing was completed.

  FIG. 2 shows a dicing sectional shape of the dicing process according to the present invention. As shown in FIG. 2, the chip back surface length is less than the surface length, and the dimensional difference with respect to the chip surface in the region of about 120 μm deep from the chip surface that is the longest as the chip length is about 1 μm, and the chip length is controlled by the chip surface length management. However, sufficient chip dimensional accuracy was obtained. In addition, chip cracks and crack defects could be reduced to about 1/4 compared to conventional angled dicing.

1A and 1B show a method for manufacturing a light-emitting diode array according to the present invention, in which FIG. 1A shows a state where a Y-axis dicing guide is formed, FIG. 2B shows a state where half-cut is performed from the back surface, and FIG. It is sectional drawing which shows the state which performed full dicing from. It is sectional drawing of the chip | tip manufactured with the manufacturing method of the light emitting diode array of this invention. It is sectional drawing of the wafer which shows the manufacturing method of the conventional light emitting diode array. It is sectional drawing of the chip | tip which shows the manufacturing method of the conventional light emitting diode array. It is sectional drawing of the chip | tip which shows the manufacturing method of the conventional light emitting diode array.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Light emitting diode array chip 2 Light emitting dot 3 Y-axis dicing guide 4 Chip of chip 5 Crack of chip 6 Dicing blade 7 Half cut 8 Full dicing A Gap amount (between the light emitting dot at the end and the chip cutting surface)
B Dimensional difference (Dimensional difference on one side between chip surface and chip lower surface)
D1 Wafer thickness D2 Half cut amount D3 Uncut amount during half cut D4 Over dicing amount during wafer surface dicing

Claims (5)

In a method of manufacturing a light-emitting diode array, dicing along a dicing guide formed between each array of light-emitting diode arrays formed on a wafer,
When dicing the Y-axis of the chip,
A method of manufacturing a light-emitting diode array, wherein half-cutting is performed in advance by dicing from the rear surface of the wafer, and then full dicing is performed from the front surface of the wafer. In the manufacturing method of the light emitting diode array of Claim 1,
Using a thick dicing blade having a thickness more than double the dicing guide width of the Y-axis, half dicing is performed from the back surface of the chip so as to leave a predetermined thickness from the chip surface. Production method. In the manufacturing method of the light emitting diode array of Claim 2,
A method of manufacturing a light-emitting diode array, wherein the predetermined thickness is cut off from 100 to 150 μm from the chip surface. In the manufacturing method of the light emitting diode array of Claim 2 or 3,
A method of manufacturing a light-emitting diode array, comprising performing full dicing of the uncut region using a proper dicing blade that matches the dicing guide width of the Y-axis from the chip surface. In the manufacturing method of the light emitting diode array of Claim 1,
A method of manufacturing a light-emitting diode array, characterized in that a thickness of a dicing blade used for half-cut from the back surface of the Y-axis is 150 to 300 μm, and a remaining amount in the depth direction by the half-cut is 100 to 150 μm .

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