JP2006210615A - Multiple pattern wiring board - Google Patents

Multiple pattern wiring board Download PDF

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JP2006210615A
JP2006210615A JP2005020244A JP2005020244A JP2006210615A JP 2006210615 A JP2006210615 A JP 2006210615A JP 2005020244 A JP2005020244 A JP 2005020244A JP 2005020244 A JP2005020244 A JP 2005020244A JP 2006210615 A JP2006210615 A JP 2006210615A
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wiring board
wiring
plating
conductor layer
region
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JP4535893B2 (en
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Miyuki Toku
美由紀 徳
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Kyocera Corp
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Kyocera Corp
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a multipattern wiring board with which a plating layer of constant thickness is coated on a signal wiring in each of wiring board regions. <P>SOLUTION: In a multipattern wiring board 9, a plurality of wiring board regions 1 having a signal wiring 2, respectively, are arrayed into a matrix form, and the wiring board regions 1 are enclosed with a dummy region 3, with a common conductor 4 for plating formed in the dummy region 3 which is electrically connected to the signal wiring 2 of each of wiring board regions 1. A common conductor 9 for plating is electrically connected to the signal wiring 2, with a feeding conductor layer 6 or a ground conductor layer 5 in the wiring board region 1 in-between. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

本発明は、1枚の母基板を分割して複数個の配線基板を得るのに用いられる複数個取り配線基板に関するものである。   The present invention relates to a plurality of wiring boards used for dividing a single mother board to obtain a plurality of wiring boards.

従来より、半導体素子や水晶振動子等の電子部品を収納するための電子部品収納用パッケージに用いられる配線基板として、例えば、酸化アルミニウム質焼結体等のセラミック材料から成る絶縁基体の表面に信号用配線を形成した構造のものが知られており、かかる配線基板上に電子部品等を搭載し、電子部品の電極を信号用配線の所定部位に半田やボンディングワイヤ等を介して電気的に接続することにより電子装置が形成される。   Conventionally, as a wiring board used in an electronic component storage package for storing an electronic component such as a semiconductor element or a crystal resonator, a signal is applied to the surface of an insulating base made of a ceramic material such as an aluminum oxide sintered body. There is a known structure in which wiring for wiring is formed, and electronic components are mounted on such a wiring board, and the electrodes of the electronic components are electrically connected to predetermined portions of the signal wiring via solder, bonding wires, etc. By doing so, an electronic device is formed.

また、このような配線基板は近時の電子装置の小型化の要求に伴い、その大きさが数mm角程度の極めて小さなものとなってきている。そして、このように小さな配線基板は、その製造過程における取り扱いを簡便にするとともに、配線基板および電子装置を効率よく生産するために、比較的面積の大きな1枚の母基板から複数個の配線基板や電子装置を同時集約的に得るようにした、いわゆる複数個取り配線基板の形態で作製されている。   In addition, such a wiring board has become extremely small with a size of about several mm square in accordance with the recent demand for downsizing of electronic devices. Such a small wiring board is easy to handle in the manufacturing process, and in order to efficiently produce the wiring board and the electronic device, a plurality of wiring boards are formed from one mother board having a relatively large area. In other words, it is manufactured in the form of a so-called multiple-wiring board in which electronic devices are obtained simultaneously and collectively.

上述した複数個取り配線基板は、一般に、四角形状等の配線基板領域を行列状に複数配列した領域と、これら配線基板領域を囲繞するように配されたダミー領域と、各配線基板領域に形成された信号用配線とを含んで成り、隣接する配線基板領域間の境界、および配線基板領域とダミー領域との境界に沿って母基板を分割することにより、複数個の配線基板が同時に得られる。   The above-described multiple wiring substrate is generally formed in a region in which a plurality of wiring substrate regions such as a square shape are arranged in a matrix, a dummy region arranged so as to surround these wiring substrate regions, and each wiring substrate region A plurality of wiring boards can be obtained simultaneously by dividing the mother board along the boundary between adjacent wiring board areas and the boundary between the wiring board area and the dummy area. .

また、前記信号用配線の表面には、酸化腐食の防止や、半田やボンディングワイヤの接続強度の向上等のために、ニッケルや金等のめっき層が被着されている。かかるめっき層の形成には、一般に、信号用配線にめっき用電流を供給することによってめっき層を析出させる電解めっき法が採用される。   Further, a plating layer such as nickel or gold is deposited on the surface of the signal wiring in order to prevent oxidative corrosion and improve the connection strength of solder and bonding wires. In general, the plating layer is formed by an electrolytic plating method in which a plating layer is deposited by supplying a plating current to the signal wiring.

上述した電解めっき法における信号用配線への電流供給には、ダミー領域に、配線基板領域の全体を囲繞する枠状のめっき用共通導体を形成しておき、このめっき用共通導体から、配線基板領域の並びの最外周のものにめっき用の引き出し線を介して電流を供給することにより行なわれる。この場合、隣り合う配線基板領域間で信号用配線を互いに電気的に接続しておくことにより、最外周の配線基板領域に供給された電流が、順次、配列の中央側に位置する配線基板領域の信号用配線に供給されるようになっている。
特開2001−168526号公報 特開2000−286294号公報 特開1999−354665号公報
For supplying current to the signal wiring in the above-described electrolytic plating method, a frame-shaped common conductor for plating surrounding the entire wiring board region is formed in the dummy area, and the wiring common board This is done by supplying a current to the outermost periphery of the array of regions through a lead wire for plating. In this case, by electrically connecting the signal wirings between the adjacent wiring board areas, the current supplied to the outermost wiring board area is sequentially placed on the central side of the array. Are supplied to the signal wiring.
JP 2001-168526 A JP 2000-286294 A JP 1999-354665 A

しかしながら、このような複数個取り配線基板においては、めっき用共通導体と直結される、最外周の配線基板領域の信号用配線と、その内側に位置する配線基板領域の信号用配線との間で、めっき層の厚みに大きなバラツキを生じる不都合があった。これは、信号用配線とめっき用共通導体との間の距離が、配列の外周側に位置するものから中央側に位置するものに向かって漸次長くなり、電気抵抗が大きくなるためであり、かかる電気抵抗のバラツキに起因して信号用配線に供給される電流にもバラツキが生じ、その結果、めっき層の厚みが不均一になるという欠点を有していた。   However, in such a multiple wiring board, between the signal wiring in the outermost wiring board area and the signal wiring in the wiring board area located inside the wiring board area directly connected to the common conductor for plating. There is a disadvantage that the plating layer has a large variation in thickness. This is because the distance between the signal wiring and the common conductor for plating gradually increases from the one located on the outer peripheral side of the array toward the one located on the central side, and the electric resistance increases. Due to the variation in electrical resistance, the current supplied to the signal wiring also varies, and as a result, the plating layer has a non-uniform thickness.

本発明は上記欠点に鑑み案出されたもので、その目的は、各配線基板領域の信号用配線に均一厚みのめっき層を被着させることができる複数個取り配線基板を提供することにある。   The present invention has been devised in view of the above disadvantages, and an object of the present invention is to provide a multi-piece wiring board capable of depositing a plating layer having a uniform thickness on the signal wiring in each wiring board region. .

本発明の複数個取り配線基板は、各々が信号用配線を有する複数の配線基板領域を行列状に配列させるとともに、これらの配線基板領域をダミー領域で囲繞し、該ダミー領域に各配線基板領域の信号用配線と電気的に接続されるめっき用共通導体を形成してなる複数個取り配線基板において、前記めっき用共通導体と前記信号用配線とを、間に、前記配線基板領域内のグランド導体層あるいは給電導体層を介して電気的に接続したことを特徴とするものである。   The multiple wiring board of the present invention has a plurality of wiring board areas each having a signal wiring arranged in a matrix, and these wiring board areas are surrounded by dummy areas, and each wiring board area is arranged in the dummy area. A plurality of wiring boards formed by forming a common conductor for plating that is electrically connected to the signal wiring, and the ground in the wiring board region between the common conductor for plating and the signal wiring. It is electrically connected through a conductor layer or a power supply conductor layer.

本発明の複数個取り配線基板は、めっき用共通導体と信号用配線とを、間に、配線基板領域内のグランド導体層あるいは給電導体層を介して電気的に接続するようにしたことから、電流供給経路の距離に応じた電気抵抗の増加が抑制され、隣り合う配線基板領域間で信号用配線に被着されるめっき層の厚みに大きなバラツキが生じてしまうのを有効に防止することができる。   The multiple wiring board of the present invention is such that the common conductor for plating and the wiring for signal are electrically connected between each other via a ground conductor layer or a feeding conductor layer in the wiring board region. An increase in electrical resistance according to the distance of the current supply path is suppressed, and it is possible to effectively prevent a large variation in the thickness of the plating layer deposited on the signal wiring between adjacent wiring board regions. it can.

すなわち、各配線基板領域の信号用配線にはグランド導体層や給電導体層を介してめっき用の電流が供給されるようになっており、このようなグランド導体層や給電導体層は、接地や給電を安定して行なうべく、信号用配線に比べて広い面積で形成される。したがって、電流供給経路がめっき用共通導体からの距離に応じて長くなったとしても、それに伴う電気抵抗の増加を抑制することができる。   That is, a current for plating is supplied to the signal wiring in each wiring board region through the ground conductor layer and the power supply conductor layer. In order to supply power stably, it is formed in a larger area than the signal wiring. Therefore, even if the current supply path becomes longer according to the distance from the common conductor for plating, an increase in electrical resistance associated therewith can be suppressed.

以下、本発明を添付図面に基づいて説明する。図1は本発明の複数個取り配線基板の実施の形態の一例を示す平面図であり、同図に示す複数個取り配線基板9は、大略的に、配線基板領域1と信号用配線2とダミー領域3とめっき用共通導体4とで構成される。   Hereinafter, the present invention will be described with reference to the accompanying drawings. FIG. 1 is a plan view showing an example of an embodiment of a multiple wiring board according to the present invention. A multiple wiring board 9 shown in FIG. 1 is roughly composed of a wiring board region 1 and signal wirings 2. It consists of a dummy region 3 and a common conductor 4 for plating.

配線基板領域1およびダミー領域3は、酸化アルミニウム質焼結体,窒化アルミニウム質焼結体,ムライト質焼結体,ガラスセラミックス等により形成されている。   The wiring board region 1 and the dummy region 3 are formed of an aluminum oxide sintered body, an aluminum nitride sintered body, a mullite sintered body, glass ceramics, or the like.

配線基板領域1およびダミー領域3は、例えば酸化アルミニウム質焼結体から成る場合であれば、酸化アルミニウム等の原料粉末をシート状に成形したグリーンシートを複数枚準備するとともに配線基板領域1を行列状に設け、次に、このグリーンシートに必要に応じて適当な打ち抜き加工を施した後、積層、焼成することによって作製される。   If the wiring board region 1 and the dummy region 3 are made of, for example, an aluminum oxide sintered body, a plurality of green sheets obtained by forming a raw material powder such as aluminum oxide into a sheet shape are prepared and the wiring board region 1 is arranged in a matrix. Next, the green sheet is manufactured by subjecting the green sheet to an appropriate punching process as necessary, and then laminating and firing.

各配線基板領域1は、それぞれが電子部品搭載用の個々の配線基板となる領域であり、その上面等には信号用配線2が形成されている。信号用配線2は、配線基板領域1の内部に延出され、一端部が、電子部品が搭載される表面と対向する表面(図1の例では下面)等の外面に露出している。   Each wiring board region 1 is a region that becomes an individual wiring board for mounting electronic components, and a signal wiring 2 is formed on the upper surface thereof. The signal wiring 2 extends inside the wiring board region 1 and has one end exposed at an outer surface such as a surface (the lower surface in the example of FIG. 1) facing the surface on which the electronic component is mounted.

信号用配線2は、配線基板領域1に搭載される電子部品(図示せず)の電極がボンディングワイヤや半田等の導電性接続材(図示せず)を介して電気的に接続されるとともに、これを配線基板領域1の下面や側面に導出するための導電路として機能する。   In the signal wiring 2, electrodes of electronic components (not shown) mounted on the wiring board region 1 are electrically connected via conductive connection materials (not shown) such as bonding wires and solder, This functions as a conductive path for leading this out to the lower surface or side surface of the wiring board region 1.

また、配線基板領域1に搭載される電子部品としては、半導体素子、水晶振動子や弾性表面波素子等の圧電素子、容量素子、抵抗器、インダクタ等が挙げられる。   Examples of electronic components mounted on the wiring board region 1 include semiconductor elements, piezoelectric elements such as crystal resonators and surface acoustic wave elements, capacitive elements, resistors, and inductors.

なお、信号用配線2は、タングステンやモリブデン、マンガン、銅、銀、パラジウム、金、白金等の金属材料から成り、例えばタングステンから成る場合、タングステンの粉末を有機溶剤、バインダとともに混練して金属ペーストを作製し、この金属ペーストを、配線基板領域1を形成するグリーンシートに所定のパターンで印刷することにより形成される。   The signal wiring 2 is made of a metal material such as tungsten, molybdenum, manganese, copper, silver, palladium, gold, or platinum. For example, in the case of tungsten, the tungsten powder is kneaded with an organic solvent and a binder to form a metal paste. This metal paste is formed by printing in a predetermined pattern on a green sheet that forms the wiring board region 1.

そして、信号用配線2の露出表面には、酸化腐食を防止するとともに、半田やボンディングワイヤを接続する際の半田の濡れ性、ボンディングワイヤのボンディング性等の特性を向上させるために、ニッケルや金等のめっき層(図示せず)が被着されている。   The exposed surface of the signal wiring 2 is made of nickel or gold to prevent oxidative corrosion and improve characteristics such as solder wettability and bonding wire bondability when connecting the solder or bonding wire. A plating layer (not shown) such as is applied.

このめっき層は、従来周知の電解めっき法、具体的には、ニッケルや金等の金属成分を含む電解めっき用のめっき液中で、被めっき部となる信号用配線2に所定の電流を供給し、上記金属成分を信号用配線2の表面に析出させることによってめっき層が形成される。   This plating layer supplies a predetermined current to the signal wiring 2 serving as a portion to be plated in a conventionally known electrolytic plating method, specifically, in a plating solution containing a metal component such as nickel or gold. Then, the metal component is deposited on the surface of the signal wiring 2 to form a plating layer.

なお、信号用配線2への電流供給は、ダミー領域3に、配線基板領域2の全体を囲繞する枠状のめっき用共通導体4を形成しておき、このめっき用共通導体4から、配線基板領域の並びの最外周のものにめっき用の引き出し線を介して電流を供給することにより行なわれる。   For supplying current to the signal wiring 2, a frame-shaped plating common conductor 4 surrounding the entire wiring board area 2 is formed in the dummy area 3, and the plating common conductor 4 is connected to the wiring board. This is done by supplying a current to the outermost periphery of the array of regions through a lead wire for plating.

また、めっき用共通導体4への電流供給は、例えば、めっき用共通導体4からダミー領域3の外縁乃至多数個取り配線基板9の側面にかけて導通線(図示せず)を形成しておき、この導通線にめっき用治具(図示せず)を介して電源(直流整流器等)より電流を供給することにより行なわれる。   The current supply to the plating common conductor 4 is performed, for example, by forming a conductive line (not shown) from the plating common conductor 4 to the outer edge of the dummy region 3 or the side surface of the multi-layer wiring board 9. This is done by supplying a current from a power source (DC rectifier or the like) to a conductive line via a plating jig (not shown).

これらのめっき用共通導体4や引き出し線,導通線等は、信号用配線2と同様の金属材料により、同様の方法により形成される。   The plating common conductor 4, lead-out line, conduction line, and the like are formed of the same metal material as that of the signal wiring 2 by the same method.

またここで重要なことは、めっき用共通導体4と信号用配線2とを、間に、配線基板領域1内のグランド導体層5あるいは給電導体層6を介して電気的に接続しておくことである。   What is important here is that the plating common conductor 4 and the signal wiring 2 are electrically connected to each other via the ground conductor layer 5 or the power supply conductor layer 6 in the wiring board region 1. It is.

かかる構成により、めっき用共通導体4からの電流供給経路の距離に応じた電気抵抗の増加が抑制され、隣り合う配線基板領域1−1間で信号用配線2に被着されるめっき層の厚みに大きなバラツキが生じるのを有効に防止することができる。   With this configuration, an increase in electrical resistance according to the distance of the current supply path from the plating common conductor 4 is suppressed, and the thickness of the plating layer deposited on the signal wiring 2 between the adjacent wiring board regions 1-1. It is possible to effectively prevent the occurrence of large variations in the thickness.

すなわち、各配線基板領域1の信号用配線2にはグランド導体層5や給電導体層6を介してめっき用の電流が供給されるようになっており、このようなグランド導体層5や給電導体層6は、接地や給電を安定して行なうべく、信号用配線に比べて広い面積で形成される。したがって、電流供給経路がめっき用共通導体4からの距離に応じて長くなったとしても、それに伴う電気抵抗の増加を抑制することができる。   That is, a current for plating is supplied to the signal wiring 2 in each wiring board region 1 through the ground conductor layer 5 and the power supply conductor layer 6. The layer 6 is formed with a larger area than the signal wiring so as to stably perform grounding and power feeding. Therefore, even if the current supply path becomes longer according to the distance from the plating common conductor 4, it is possible to suppress an increase in electrical resistance associated therewith.

またこの場合、各配線基板領域1にグランド導体層5や給電導体層6をめっき用共通導体4と電気的に接続させて形成するとともに、このグランド導体層5や給電導体層6を配線基板領域1の外縁まで延出し、この延出部を、隣接する配線基板領域1の信号用配線に接続させておくようにすれば、信号用配線2を、グランド導体層5や給電導体層6を介してめっき用共通導体4と電気的に接続させることができる。そして、配列の最外周に位置する配線基板領1のグランド導体層5や給電導体層6に、めっき用共通導体4からめっき用の電流を供給することにより、各配線基板領域1の信号用配線2に対して、グランド導体層5や給電導体層6を介してめっき用の電流が供給される。   In this case, the ground conductor layer 5 and the power supply conductor layer 6 are formed in each wiring board region 1 by being electrically connected to the plating common conductor 4, and the ground conductor layer 5 and the power supply conductor layer 6 are formed in the wiring board region. 1 extends to the outer edge, and the extension is connected to the signal wiring in the adjacent wiring board region 1, the signal wiring 2 is routed through the ground conductor layer 5 and the power supply conductor layer 6. And can be electrically connected to the common conductor 4 for plating. Then, the current for plating is supplied from the common conductor 4 for plating to the ground conductor layer 5 and the power supply conductor layer 6 of the wiring board area 1 located on the outermost periphery of the array, thereby allowing the signal wiring in each wiring board region 1. 2 is supplied with a plating current through the ground conductor layer 5 and the power supply conductor layer 6.

なお、配列の最外周に位置する配線基板領域1の信号用配線2は、その信号用配線2が形成されている配線基板領域1のグランド導体層5や給電導体層6と電気的に接続される。これらの、最外周の配線基板領域1内で、信号用配線2と、グランド導体層5や給電導体層6とを電気的に接続する接続線は、経路の一部がダミー領域3を通過するようにして形成する。このようにしておけば、複数個取り配線基板9を個片の配線基板に分割したときに、ダミー領域3に位置する部位で接続線が断線されることとなるため、信号用配線2と、グランド導体層5や給電導体層6との電気的な短絡を防ぐことができる。   The signal wiring 2 in the wiring board region 1 located on the outermost periphery of the array is electrically connected to the ground conductor layer 5 and the power feeding conductor layer 6 in the wiring board region 1 in which the signal wiring 2 is formed. The In these outermost wiring board regions 1, a part of the path of the connection line that electrically connects the signal wiring 2 to the ground conductor layer 5 and the power supply conductor layer 6 passes through the dummy region 3. In this way, it is formed. In this way, when the multi-piece wiring board 9 is divided into individual wiring boards, the connection line is disconnected at the portion located in the dummy region 3, so that the signal wiring 2; An electrical short circuit with the ground conductor layer 5 and the power supply conductor layer 6 can be prevented.

グランド導体層5および給電導体層6は、電子部品のグランド端子や給電端子(図示せず)と電気的に接続されて接地や給電を行なうためのものであり、例えば、配線基板領域1の表面や内部に層状に形成される。   The ground conductor layer 5 and the power supply conductor layer 6 are electrically connected to a ground terminal and a power supply terminal (not shown) of an electronic component to perform grounding and power supply. For example, the surface of the wiring board region 1 It is formed in layers inside.

また、グランド導体層5や給電導体層6と電子部品との間の電気的な接続は、信号用配線2の場合と同様に、ボンディングワイヤや半田等の導電性接続材を介して行なわれる。   Further, the electrical connection between the ground conductor layer 5 or the power supply conductor layer 6 and the electronic component is performed through a conductive connecting material such as a bonding wire or solder, as in the case of the signal wiring 2.

なお、グランド導体層5および給電導体層6は、信号用配線と同様の金属材料を用い、同様の形成方法により形成することができ、これらの導体層はいずれか一方のみでもよい。   The ground conductor layer 5 and the power supply conductor layer 6 can be formed by using the same metal material as that for the signal wiring and by the same formation method, and only one of these conductor layers may be formed.

また、グランド導体層5および給電導体層6によって、接地や給電を確実に行なうには、グランド導体層5および給電導体層6を配線基板領域1の平面部全体に及ぶような広い面積で形成することが好ましい。   Further, in order to reliably perform grounding and power feeding by the ground conductor layer 5 and the power feeding conductor layer 6, the ground conductor layer 5 and the power feeding conductor layer 6 are formed in a wide area that covers the entire plane portion of the wiring board region 1. It is preferable.

さらに、グランド導体層5および給電導体層6を配線基板領域1の平面部全体にわたって形成した場合、信号用配線2に供給されるめっき用電流経路の電気抵抗をより効果的に抑制することができる。これにより、信号用配線2に供給されるめっき用電流のバラツキもさらに抑制され、めっき層の厚みバラツキをより小さく抑えることができる。   Furthermore, when the ground conductor layer 5 and the power supply conductor layer 6 are formed over the entire plane portion of the wiring board region 1, the electric resistance of the plating current path supplied to the signal wiring 2 can be more effectively suppressed. . Thereby, the variation of the plating current supplied to the signal wiring 2 is further suppressed, and the thickness variation of the plating layer can be further reduced.

なお、グランド導体層5や給電導体層6を、配線基板領域1の平面部全体に及ぶような広い面積で形成する場合、複数を一つの配線基板領域1に形成する場合、複数のグリーンシートにそれぞれ金属ペーストを印刷し積層する。また、めっき用共通導体4と信号用配線2とを、間に、グランド導体層5や給電導体層6を介して電気的に接続する場合は、いずれか一方に揃えることが好ましい。この場合、信号用配線2に供給される電流のばらつきをより効果的に抑制し、めっき層の厚みバラツキをより確実に抑えることができる。   In addition, when forming the ground conductor layer 5 and the power supply conductor layer 6 in a wide area extending over the entire planar portion of the wiring board region 1, when forming a plurality in one wiring board region 1, Each is printed with metal paste and laminated. Moreover, when electrically connecting the common conductor 4 for plating and the signal wiring 2 through the ground conductor layer 5 and the electric power feeding conductor layer 6 between them, it is preferable to arrange in any one. In this case, variation in current supplied to the signal wiring 2 can be more effectively suppressed, and variation in the thickness of the plating layer can be more reliably suppressed.

また、グランド導体層5および給電導体層6を広い面積で形成するために、このような導体層を形成するための絶縁層(グリーンシート等)を追加してもよい。この場合、グランド導体層5や給電導体層6が形成される絶縁層は、信号用配線2が形成されていても、形成されていなくてもよい。   Further, in order to form the ground conductor layer 5 and the power supply conductor layer 6 in a wide area, an insulating layer (such as a green sheet) for forming such a conductor layer may be added. In this case, the insulating layer on which the ground conductor layer 5 and the power supply conductor layer 6 are formed may or may not be formed with the signal wiring 2.

このような複数個取り配線基板9について、各配線基板領域1に電子部品を搭載するとともに電子部品の電極(信号用電極)を信号用配線2に電気的に接続し、必要に応じて蓋体や樹脂等の封止手段で電子部品を封止した後、配線基板領域1同士の境界や、配線基板領域1とダミー領域3との境界に沿って分割することにより、個々の配線基板に電子部品が実装されて成る複数の電子装置が同時に形成される。ここで、電子部品の搭載は、複数個取り配線基板を個々の配線基板領域に分割した後に行なってもよい。   With respect to such a multiple wiring board 9, electronic components are mounted on each wiring board region 1, and the electrodes (signal electrodes) of the electronic parts are electrically connected to the signal wiring 2, and a lid is provided as necessary. After sealing the electronic component with a sealing means such as resin or resin, it is divided along the boundary between the wiring substrate regions 1 or the boundary between the wiring substrate region 1 and the dummy region 3, so A plurality of electronic devices having components mounted thereon are formed simultaneously. Here, the mounting of the electronic components may be performed after the plurality of wiring boards are divided into individual wiring board regions.

なお、本発明は上記実施の形態に限定されるものではなく、本発明の要旨を逸脱しない範囲内であれば種々の変更は可能である。   The present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the gist of the present invention.

例えば、上述した図1の例では、グランド導体層5や給電導体層6を、信号用配線2と同じ平面上(複数個取り配線基板9の上面)に形成するようにしたが、配線基板領域1の内部に形成するようにしてもよい。この場合、グランド導体層5や給電導体層6は、電子部品のグランド端子等との電気的な接続のために、電子部品の搭載面(上面)に、ビア導体(図示せず)等を介して導出される。また、グランド導体層5や給電導体層6と隣の配線基板領域1の信号用配線2との電気的接続は、隣り合う配線基板領域1−1間の境界を跨ぐように設けられたキャスタレーション等の貫通導体(図示せず)を介して行なわれる。上述のようなビア導体や貫通導体は、例えば、多数個取り配線基板9を形成するグリーンシートの配線基板領域1や配線基板領域1同士の境界に、あらかじめ貫通孔を打抜き形成しておき、この貫通孔内に、所定の金属ペーストを従来周知のスクリーン印刷法等によって充填,塗布することにより形成される。   For example, in the example of FIG. 1 described above, the ground conductor layer 5 and the power supply conductor layer 6 are formed on the same plane as the signal wiring 2 (the upper surface of the plurality of wiring boards 9). You may make it form in 1 inside. In this case, the ground conductor layer 5 and the power supply conductor layer 6 are connected to a mounting surface (upper surface) of the electronic component via a via conductor (not shown) or the like for electrical connection with a ground terminal of the electronic component. Is derived. Further, the electrical connection between the ground conductor layer 5 and the feeding conductor layer 6 and the signal wiring 2 in the adjacent wiring board region 1 is a castellation provided so as to straddle the boundary between the adjacent wiring board regions 1-1. This is done through a through conductor (not shown). Via conductors and through conductors as described above are formed by punching through holes in advance at the boundary between the wiring board regions 1 and the wiring board regions 1 of the green sheet for forming the multi-piece wiring board 9, for example. The through hole is formed by filling and applying a predetermined metal paste by a conventionally known screen printing method or the like.

本発明の複数個取り配線基板の実施の形態の一例を示す平面図である。It is a top view which shows an example of embodiment of the multiple pick-up wiring board of this invention.

符号の説明Explanation of symbols

1・・・・・配線基板領域
2・・・・・信号用配線
3・・・・・ダミー領域
4・・・・・めっき用共通導体
5・・・・・グランド導体層
6・・・・・給電導体層
9・・・・・複数個取り配線基板
DESCRIPTION OF SYMBOLS 1 ... Wiring board area 2 ... Signal wiring 3 ... Dummy area 4 ... Common conductor for plating 5 ... Ground conductor layer 6 ...・ Feeding conductor layer 9 ... Multiple wiring board

Claims (1)

各々が信号用配線を有する複数の配線基板領域を行列状に配列させるとともに、これらの配線基板領域をダミー領域で囲繞し、該ダミー領域に各配線基板領域の信号用配線と電気的に接続されるめっき用共通導体を形成してなる複数個取り配線基板において、
前記めっき用共通導体と前記信号用配線とを、間に、前記配線基板領域内のグランド導体層あるいは給電導体層を介して電気的に接続したことを特徴とする複数個取り配線基板。
A plurality of wiring board regions each having signal wirings are arranged in a matrix, and these wiring board regions are surrounded by dummy regions, and are electrically connected to the signal wirings of the respective wiring board regions. In a multiple wiring board formed by forming a common conductor for plating,
A plurality of wiring boards, wherein the common conductor for plating and the signal wiring are electrically connected to each other through a ground conductor layer or a power supply conductor layer in the wiring board region.
JP2005020244A 2005-01-27 2005-01-27 Multiple wiring board Active JP4535893B2 (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015088552A (en) * 2013-10-29 2015-05-07 京セラ株式会社 Multi-piece wiring board with built-in coil
JP7382279B2 (en) 2020-05-21 2023-11-16 日本特殊陶業株式会社 Multi-chip wiring board and wiring board

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003168849A (en) * 2001-11-30 2003-06-13 Kyocera Corp Multiple allocation wiring board
JP2003318314A (en) * 2002-04-24 2003-11-07 Kyocera Corp Multi-cavity circuit substrate
JP2003347689A (en) * 2002-05-29 2003-12-05 Kyocera Corp Multipiece wiring board

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003168849A (en) * 2001-11-30 2003-06-13 Kyocera Corp Multiple allocation wiring board
JP2003318314A (en) * 2002-04-24 2003-11-07 Kyocera Corp Multi-cavity circuit substrate
JP2003347689A (en) * 2002-05-29 2003-12-05 Kyocera Corp Multipiece wiring board

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015088552A (en) * 2013-10-29 2015-05-07 京セラ株式会社 Multi-piece wiring board with built-in coil
JP7382279B2 (en) 2020-05-21 2023-11-16 日本特殊陶業株式会社 Multi-chip wiring board and wiring board

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