JP2006165391A - Wire bonding method - Google Patents

Wire bonding method Download PDF

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JP2006165391A
JP2006165391A JP2004357075A JP2004357075A JP2006165391A JP 2006165391 A JP2006165391 A JP 2006165391A JP 2004357075 A JP2004357075 A JP 2004357075A JP 2004357075 A JP2004357075 A JP 2004357075A JP 2006165391 A JP2006165391 A JP 2006165391A
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bonding
semiconductor chip
wire
unit
chip mounting
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Katsufusa Fujita
勝房 藤田
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Mitsui High Tec Inc
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/78—Apparatus for connecting with wire connectors
    • H—ELECTRICITY
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    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
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    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/78—Apparatus for connecting with wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/78—Apparatus for connecting with wire connectors
    • H01L2224/7825—Means for applying energy, e.g. heating means
    • H01L2224/783—Means for applying energy, e.g. heating means by means of pressure
    • H01L2224/78301—Capillary
    • H—ELECTRICITY
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    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01005—Boron [B]
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01006—Carbon [C]
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/1015—Shape
    • H01L2924/1016—Shape being a cuboid
    • H01L2924/10162—Shape being a cuboid with a square active surface

Abstract

<P>PROBLEM TO BE SOLVED: To provide a highly productive wire bonding method with a plurality of rows of unit semiconductor chip mounting frames arranged in a single row for reliably wire-bonding a lead frame or a wiring board having a conveyed semiconductor chip mounted with the semiconductor chip. <P>SOLUTION: The method is for carrying a semiconductor chip mounting frame 13 having a plurality of rows of unit semiconductor chip mounting frames each with a semiconductor chip 12 mounted, and for wire-bonding an electrode of the semiconductor chip 12 with a lead of the frame 13 by a bonding device 11. The bonding device 11 is provided at a predetermined position on either side of a bonding line for wire-bonding by moving a bonding head 15 only in a bonding region of the unit semiconductor chip mounting frame. When the above step is completed, the adjacent unit semiconductor chip mounting frame in the row direction or in the breadthwise direction is carried to below the bonding head 15 for wire-bonding. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

本発明は、半導体装置の製造方法に係り、特に、ワイヤーボンディング装置を用いて半導体チップの各電極とその周囲に配置されたリードのワイヤーボンディングを行う方法に関する。 The present invention relates to a method for manufacturing a semiconductor device, and more particularly, to a method for wire bonding of each electrode of a semiconductor chip and leads arranged around it using a wire bonding apparatus.

半導体装置の製造においては、例えば、特許文献１及び２に示すように、半導体チップを搭載したリードフレーム又は配線基板が前記半導体チップとボンディング装置によりワイヤーボンディングされる。ワイヤーボンディングでは、例えばリードフレームの僅かな傾きによる水平度の偏差によってワイヤーボンディングの接続不良が発生することの他、ボンディング装置のボンディングヘッドが進退移行する距離が長くなることによってボンディングヘッドに僅かな撓みや動き誤差等が発生し、これらの撓みや動き誤差によってワイヤーボンディングの接続不良が発生することがある。 In manufacturing a semiconductor device, for example, as shown in Patent Documents 1 and 2, a lead frame or a wiring board on which a semiconductor chip is mounted is wire-bonded by the semiconductor chip and a bonding apparatus. In wire bonding, for example, connection failure of wire bonding occurs due to deviation in horizontality due to slight inclination of the lead frame, etc., and also the bonding head of the bonding apparatus makes a slight deflection on the bonding head by increasing the distance that the bonding head moves forward and backward. In some cases, a wire bonding connection failure may occur due to the bending or movement error.

特開平９−１１５９４３号公報JP-A-9-115943 特開２０００−７７４５５号公報JP 2000-77455 A

一方、半導体装置の製造は、生産性の向上やコスト低減を図るため、半導体チップを複数列搭載するリードフレームとして製造し、このリードフレームに半導体チップをそれぞれ搭載している。そしてワイヤーボンディングにおいては、複数列の半導体チップを搭載したリードフレームを順次移動させながら行っていた。即ち、図２に示すように、搬送ライン５０を介して半導体チップ５１、５２をそれぞれ１列ずつ搭載したリードフレーム５３を搬送し、この搬送ライン５０の一方側に設けられたボンディング装置５４によりワイヤーボンディングが行われている。反ボンディング装置側の半導体チップ５１のワイヤーボンディングを行う場合には、ボンディング装置５４のボンディングヘッド５５を、半導体チップ５２のボンディング領域から更に幅方向に伸ばしてワイヤーボンディングを行っている。これに伴いボンディングヘッド５５の作業時に撓みが発生し、ワイヤーボンディングの接続不良及び接続信頼性が低下し、また半導体装置の生産性が低下するという問題がある。この問題は半導体チップを複数列に搭載した配線基板の場合にも生じる。なお、図２において５６はキャピラリーを示す。
本発明は、一列に並んだ単位半導体チップ搭載フレームを複数列（多列）有して、搬送されてくる半導体チップを搭載したリードフレーム又は配線基板について半導体チップと信頼性よくワイヤーボンディングし、併せて生産性が優れるワイヤーボンディング方法を提供することを目的とする。 On the other hand, in the manufacture of semiconductor devices, in order to improve productivity and reduce costs, semiconductor chips are manufactured as lead frames on which a plurality of rows are mounted, and the semiconductor chips are mounted on the lead frames. Wire bonding is performed while sequentially moving lead frames on which a plurality of rows of semiconductor chips are mounted. That is, as shown in FIG. 2, a lead frame 53 on which one row of semiconductor chips 51 and 52 is mounted is transferred via a transfer line 50, and a wire is bonded by a bonding device 54 provided on one side of the transfer line 50. Bonding is taking place. When wire bonding of the semiconductor chip 51 on the anti-bonding apparatus side is performed, the bonding head 55 of the bonding apparatus 54 is further extended in the width direction from the bonding region of the semiconductor chip 52 to perform wire bonding. As a result, there is a problem that bending occurs during the operation of the bonding head 55, wire bonding connection failure and connection reliability are lowered, and productivity of the semiconductor device is lowered. This problem also occurs in the case of a wiring board on which semiconductor chips are mounted in a plurality of rows. In FIG. 2, reference numeral 56 denotes a capillary.
The present invention has a plurality of rows (multiple rows) of unit semiconductor chip mounting frames arranged in a row, and a lead frame or wiring board on which a semiconductor chip is transported is wire-bonded with a semiconductor chip with high reliability. An object of the present invention is to provide a wire bonding method with excellent productivity.

前記目的に沿う本発明に係るワイヤーボンディング方法は、それぞれ半導体チップを搭載し一列に並んだ単位半導体チップ搭載フレームを複数列有する半導体チップ搭載フレームをボンディングラインに搬送し、ボンディング装置で前記半導体チップの電極と前記半導体チップ搭載フレームのリードとをワイヤーボンディングする方法において、
前記ボンディング装置を前記ボンディングラインの片側の定位置に設けてボンディングヘッドを前記単位半導体チップ搭載フレームのボンディング領域内だけ動かしてワイヤーボンディングし、該単位半導体チップ搭載フレームのワイヤーボンディングが終了すると、当該単位半導体チップ搭載フレームの列方向あるいは幅方向における隣りの単位半導体チップ搭載フレームを前記ボンディングヘッド下に搬送し、ワイヤーボンディングを行う。
即ち、具体的には、ボンディング装置は定位置でボンディングヘッドを動かし半導体チップの各電極と、この半導体チップを搭載した単位半導体チップ搭載フレームである、例えば単位リードフレーム又は単位配線基板の対応するリードとをワイヤーボンディングし、単位リードフレーム又は単位配線基板のワイヤーボンディングが終了すると、当該単位リードフレーム又は単位配線基板の列方向あるいは幅方向に隣りの単位リードフレーム又は単位配線基板を前記ボンディング装置のボンディング領域（作業領域）に搬送し、ワイヤーボンディングを行う。これによって、ボンディング装置のボンディングヘッドを短く保つことが可能となる。 The wire bonding method according to the present invention that meets the above-described object is a method of transporting a semiconductor chip mounting frame having a plurality of rows of unit semiconductor chip mounting frames each mounted with a semiconductor chip to a bonding line. In the method of wire bonding the electrode and the lead of the semiconductor chip mounting frame,
When the bonding apparatus is provided at a fixed position on one side of the bonding line, the bonding head is moved only within the bonding region of the unit semiconductor chip mounting frame, wire bonding is performed, and when the wire bonding of the unit semiconductor chip mounting frame is completed, the unit The adjacent unit semiconductor chip mounting frame in the column direction or width direction of the semiconductor chip mounting frame is transported under the bonding head to perform wire bonding.
Specifically, the bonding apparatus moves the bonding head at a fixed position to each electrode of the semiconductor chip and a unit semiconductor chip mounting frame on which this semiconductor chip is mounted, for example, a unit lead frame or a corresponding lead of a unit wiring board. When the wire bonding of the unit lead frame or unit wiring board is completed, the unit lead frame or unit wiring board adjacent in the column direction or width direction of the unit lead frame or unit wiring board is bonded to the bonding apparatus. It is transported to the area (work area) and wire bonding is performed. As a result, the bonding head of the bonding apparatus can be kept short.

本発明に係るワイヤーボンディング方法は、ワイヤーボンディングを行うボンディングヘッドの移動範囲を、定位置での単位半導体チップ搭載フレームのボンディング領域に限定し、半導体チップ搭載フレームを列方向（ライン方向）あるいは幅方向に順次移動させて、単位半導体チップ搭載フレームをボンディング装置のボンディング領域に位置させ、半導体チップとこれに対応するリードとのワイヤーボンディングを行っており、ボンディング装置のボンディングヘッドを単位半導体チップ搭載フレーム、例えば単位リードフレーム又は単位配線基板のボンディング領域内だけ動かすことによりワイヤーボンディングできるので、その動く移行長さは短くてよく、撓み等の機械的、構造的な面からの誤差が入らず信頼性高く接続でき、結果としてワイヤーボンディング不良が減少し、半導体装置の生産性が向上する。 In the wire bonding method according to the present invention, the moving range of the bonding head for wire bonding is limited to the bonding region of the unit semiconductor chip mounting frame at a fixed position, and the semiconductor chip mounting frame is arranged in the column direction (line direction) or the width direction. The unit semiconductor chip mounting frame is positioned in the bonding area of the bonding apparatus and wire bonding between the semiconductor chip and the corresponding lead is performed, and the bonding head of the bonding apparatus is connected to the unit semiconductor chip mounting frame, For example, wire bonding can be performed by moving only within the bonding area of the unit lead frame or unit wiring board, so that the moving transition length can be short, and there is no error from mechanical and structural aspects such as bending and high reliability. Can connect Wire bonding failure is reduced as the productivity of the semiconductor device is improved.

続いて、添付した図面を参照しつつ、本発明を具体化した実施の形態につき説明し、本発明の理解に供する。
ここで、図１（Ａ）、（Ｂ）は本発明の一実施の形態に係るワイヤーボンディング方法の説明図である。 Next, embodiments of the present invention will be described with reference to the accompanying drawings for understanding of the present invention.
Here, FIG. 1 (A), (B) is explanatory drawing of the wire bonding method which concerns on one embodiment of this invention.

図１に示すように、本発明の一実施の形態に係るワイヤーボンディング方法においては、ボンディング装置１１と、複数の半導体チップ１２が所定間隔で縦横に並べて搭載された半導体チップ搭載フレームの一例であるリードフレーム１３を搬送するＸＹ搬送装置１４とを用いる。ボンディング装置１１は、制御装置２３からの信号によって一定の範囲で前後進退及び横移動するボンディングヘッド１５を備えている。このボンディングヘッド１５の先端にキャピラリー１６が設けられ、所定のワイヤ１７を引き出して半導体チップ１２の電極パッドとリードの先端部とを電気的に連結できるようになっている。このボンディング装置１１にはボンディング撮像カメラ１９が設けられ、ボンディング状況を撮像し、接続される接続完否認識回路２０によって、ワイヤーボンディング位置回りの画像を処理してワイヤーボンディングの状況や位置を正確に認識すると共に、所定位置（即ち、制御装置２３から入力されたボンディング要位置）のワイヤーボンディングが完了したか否かの認識を行っている。 As shown in FIG. 1, the wire bonding method according to an embodiment of the present invention is an example of a bonding chip 11 and a semiconductor chip mounting frame in which a plurality of semiconductor chips 12 are mounted vertically and horizontally at a predetermined interval. An XY transport device 14 that transports the lead frame 13 is used. The bonding apparatus 11 includes a bonding head 15 that moves forward / backward and laterally within a certain range in response to a signal from the control device 23. A capillary 16 is provided at the tip of the bonding head 15 so that a predetermined wire 17 can be drawn out to electrically connect the electrode pad of the semiconductor chip 12 and the tip of the lead. The bonding apparatus 11 is provided with a bonding imaging camera 19, which images the bonding situation and processes the image around the wire bonding position by the connected connection recognition circuit 20 to accurately determine the wire bonding situation and position. At the same time, it recognizes whether or not the wire bonding at a predetermined position (that is, the bonding required position input from the control device 23) is completed.

また、単位半導体チップ搭載フレームの一例であってそれぞれ半導体チップ１２を搭載する単位リードフレームの画像を撮像する単位リードフレーム撮像カメラ２１が設けられ、この単位リードフレーム撮像カメラ２１の信号を画像記憶回路２２によって画像認識及び記憶し、その出力を制御装置２３に送っている。これによりワイヤーボンディングする前の単位リードフレームについてのワイヤーボンディング位置が分り記憶される。また、接続完否認識回路２０から単位リードフレームのワイヤーボンディングの完了信号が制御装置２３に出力されると、該制御装置２３から搬送制御装置２５に信号を送り、ＸＹ搬送装置１４により列方向あるいは幅方向に隣りの単位リードフレームをボンディングヘッド１５の下に搬送する。この搬送状況が搬送リードフレーム検知器２４でチェックされ、所定位置に搬送されたリードフレーム１３を検知する。なお、ボンディング撮像カメラ１９によってボンディングヘッド１５によるワイヤーボンディングが完了したか否かを判断する処理、単位リードフレーム撮像カメラ２１の画像によって単位リードフレームのワイヤーボンディングが完了したか否かを確認するための画像処理は、周知技術であるので詳しい説明を省略する。
搬送リードフレーム検知器２４が所定位置に搬送されてきた単位リードフレームを検知すると、それが制御装置２３に入力され、次のワイヤーボンディングが行われる。これらの作動を繰り返して複数列に設けられた半導体チップ１２とリードフレーム１３に対してワイヤーボンディングがなされる。 In addition, a unit lead frame imaging camera 21 that is an example of a unit semiconductor chip mounting frame and that captures an image of a unit lead frame on which the semiconductor chip 12 is mounted is provided. 22 recognizes and stores the image, and sends the output to the control device 23. As a result, the wire bonding position of the unit lead frame before wire bonding is known and stored. Further, when a completion signal for wire bonding of the unit lead frame is output from the connection completion recognition circuit 20 to the control device 23, a signal is sent from the control device 23 to the transport control device 25, and the XY transport device 14 performs a row direction or The unit lead frame adjacent in the width direction is conveyed under the bonding head 15. The conveyance status is checked by the conveyance lead frame detector 24, and the lead frame 13 conveyed to a predetermined position is detected. In addition, the process for determining whether or not the wire bonding by the bonding head 15 is completed by the bonding imaging camera 19, and for confirming whether or not the wire bonding of the unit lead frame is completed by the image of the unit lead frame imaging camera 21 Since image processing is a well-known technique, detailed description thereof is omitted.
When the transport lead frame detector 24 detects the unit lead frame transported to a predetermined position, it is input to the control device 23 and the next wire bonding is performed. By repeating these operations, wire bonding is performed on the semiconductor chip 12 and the lead frame 13 provided in a plurality of rows.

従って、このワイヤーボンディング方法においては、ボンディング装置１１の位置は固定で、ボンディングヘッド１５の下に位置する単位リードフレームに搭載された半導体チップ１２の電極とその周囲のリードとのワイヤーボンディングを行う。この場合、リードフレーム１３においては、図１に示すように、２列のライン（行）に並んだ単位リードフレームを有し、各ラインには複数の単位リードフレームを備えている。
まず、ＸＹ搬送装置１４でリードフレーム１３を搬送し、１列１番目にある単位リードフレームをボンディングヘッド１５の作業領域に配置させる。この１列１番目の単位リードフレームが所定位置にあることは、搬送リードフレーム検知器２４及び単位リードフレーム撮像カメラ２１で検知する。この状態で、ボンディング装置１１のボンディングヘッド１５を制御装置２３に予め組み込まれたプログラムによって三次元移動させて、単位リードフレーム内のボンディング領域内での半導体チップ１２と対応するリードとのワイヤーボンディングを行う。各ワイヤーボンディングの確認は、ボンディング撮像カメラ１９でワイヤボンディングが順次終了したことを確認しながら行う。 Therefore, in this wire bonding method, the position of the bonding apparatus 11 is fixed, and wire bonding is performed between the electrode of the semiconductor chip 12 mounted on the unit lead frame located under the bonding head 15 and the surrounding leads. In this case, as shown in FIG. 1, the lead frame 13 has unit lead frames arranged in two lines (rows), and each line includes a plurality of unit lead frames.
First, the lead frame 13 is transported by the XY transport device 14 and the unit lead frame in the first row is arranged in the working area of the bonding head 15. The conveyance lead frame detector 24 and the unit lead frame imaging camera 21 detect that the first unit lead frame in the first row is at a predetermined position. In this state, the bonding head 15 of the bonding apparatus 11 is three-dimensionally moved by a program pre-installed in the control apparatus 23 to perform wire bonding between the semiconductor chip 12 and the corresponding lead in the bonding area in the unit lead frame. Do. Confirmation of each wire bonding is performed while confirming that the wire bonding is sequentially completed by the bonding imaging camera 19.

１列１番目の単位リードフレームのボンディング作業が完了すると、単位リードフレーム撮像カメラ２１が終了状態を確認し、ＸＹ搬送装置１４を作動させて、１列２番目の単位リードフレームがボンディングヘッド１５の直下に位置するようにする。この確認は、単位リードフレーム撮像カメラ２１及び搬送リードフレーム検知器２４によって行い、この後、ボンディングヘッド１５を作動させて、１列２番目の単位リードフレームのボンディング作業を行う。以下、順次、１列３番目及び４番目の単位リードフレームの半導体チップ１２の電極とリードとのボンディングを順次行う。 When the bonding work of the first unit lead frame in the first row is completed, the unit lead frame imaging camera 21 confirms the end state, and the XY transport device 14 is operated, so that the second unit lead frame in the first row is attached to the bonding head 15. Make sure it is directly underneath. This confirmation is performed by the unit lead frame imaging camera 21 and the transport lead frame detector 24, and then the bonding head 15 is operated to perform the bonding operation of the second unit lead frame in the first row. Hereinafter, the electrodes and leads of the semiconductor chip 12 of the third and fourth unit lead frames in the first row are sequentially bonded.

１列目の単位リードフレームのボンディング作業が完了すると、２列１番目の単位リードフレームのワイヤーボンディングを行うが、この場合、ＸＹ搬送装置１４を作動させてリードフレーム１３が幅方向に移動し、例えば２列１番目の単位リードフレームをボンディングヘッド１５の直下に配置する。これによって、ボンディングヘッド１５の前後進退長さを単位リードフレームのボンディング領域内だけと短くでき、ボンディングヘッド１５の撓みが減少し、更には装置自体の精度誤差も小さくなる。この後、２列２〜４番目の単位リードフレームのワイヤーボンディングを順次完了し、リードフレーム１３の全てのワイヤーボンディングが完了する。 When the bonding operation of the unit lead frame in the first row is completed, the wire bonding of the first unit lead frame in the second row is performed. In this case, the lead frame 13 is moved in the width direction by operating the XY transport device 14, For example, the first unit lead frame in the second row is arranged immediately below the bonding head 15. As a result, the forward / backward length of the bonding head 15 can be shortened only within the bonding area of the unit lead frame, the bending of the bonding head 15 is reduced, and the accuracy error of the apparatus itself is also reduced. Thereafter, the wire bonding of the 2nd to 4th unit lead frames is sequentially completed, and all the wire bonding of the lead frame 13 is completed.

前記実施の形態においては、半導体チップ搭載フレームの一例とてしてリードフレームを使用した場合について説明したが、半導体チップ搭載フレームとしてリードフレームを用いることなく、配線基板（例えば、絶縁シートの上にリードを形成したもの）の上に半導体チップを搭載し、ワイヤーボンディングを行う場合であっても本発明は適用される。
更に、前記実施の形態において、最初に搬送ライン方向（列方向）に並んだ単位リードフレームのワイヤーボンディングを行い、次に列をずらして次の列（幅方向）に配置された単位リードフレームを搬送ライン方向にワイヤーボンディングを行ったが、例えば、最初に幅方向にリードフレームを移動し、次に列方向にリードフレームを移動させて、全部の単位リードフレームのワイヤーボンディングを行う場合も本発明は適用される。 In the above embodiment, the case where the lead frame is used as an example of the semiconductor chip mounting frame has been described. However, without using the lead frame as the semiconductor chip mounting frame, the wiring board (for example, on the insulating sheet) is used. The present invention can be applied even when a semiconductor chip is mounted on a chip formed with leads and wire bonding is performed.
Furthermore, in the above embodiment, the unit lead frames arranged in the transport line direction (column direction) are first wire-bonded, and then the unit lead frames arranged in the next column (width direction) are shifted to the next row (width direction). Although wire bonding is performed in the conveyance line direction, for example, the present invention also applies to wire bonding of all unit lead frames by first moving the lead frame in the width direction and then moving the lead frame in the column direction. Applies.

（Ａ）は本発明の一実施の形態に係るワイヤーボンディング方法の説明図、（Ｂ）はボンディング装置の説明図である。(A) is explanatory drawing of the wire bonding method which concerns on one embodiment of this invention, (B) is explanatory drawing of a bonding apparatus. 従来例に係るワイヤーボンディング方法の説明図である。It is explanatory drawing of the wire bonding method which concerns on a prior art example.

符号の説明Explanation of symbols

１１：ボンディング装置、１２：半導体チップ、１３：リードフレーム、１４：ＸＹ搬送装置、１５：ボンディングヘッド、１６：キャピラリー、１７：ワイヤ、１９：ボンディング撮像カメラ、２０：接続完否認識回路、２１：単位リードフレーム撮像カメラ、２２：画像記憶回路、２３：制御装置、２４：搬送リードフレーム検知器、２５：搬送制御装置 11: Bonding device, 12: Semiconductor chip, 13: Lead frame, 14: XY transport device, 15: Bonding head, 16: Capillary, 17: Wire, 19: Bonding imaging camera, 20: Connection completion recognition circuit, 21: Unit lead frame imaging camera, 22: image storage circuit, 23: control device, 24: transport lead frame detector, 25: transport control device

Claims (2)

それぞれ半導体チップを搭載し一列に並んだ単位半導体チップ搭載フレームを複数列有する半導体チップ搭載フレームをボンディングラインに搬送し、ボンディング装置で前記半導体チップの電極と前記半導体チップ搭載フレームのリードとをワイヤーボンディングする方法において、
前記ボンディング装置を前記ボンディングラインの片側の定位置に設けてボンディングヘッドを前記単位半導体チップ搭載フレームのボンディング領域内だけ動かしてワイヤーボンディングし、該単位半導体チップ搭載フレームのワイヤーボンディングが終了すると、当該単位半導体チップ搭載フレームの列方向あるいは幅方向における隣りの単位半導体チップ搭載フレームを、前記ボンディングヘッド下に搬送し、ワイヤーボンディングを行うことを特徴とするワイヤーボンディング方法。 A semiconductor chip mounting frame having a plurality of rows of unit semiconductor chip mounting frames each mounted with a semiconductor chip is transported to a bonding line, and the electrodes of the semiconductor chip and the leads of the semiconductor chip mounting frame are wire bonded by a bonding apparatus. In the way to
When the bonding apparatus is provided at a fixed position on one side of the bonding line, the bonding head is moved only within the bonding region of the unit semiconductor chip mounting frame, wire bonding is performed, and when the wire bonding of the unit semiconductor chip mounting frame is completed, the unit A wire bonding method, wherein a unit semiconductor chip mounting frame adjacent in a column direction or a width direction of a semiconductor chip mounting frame is transported under the bonding head and wire bonding is performed. 請求項１記載のワイヤーボンディング方法において、前記半導体チップ搭載フレームは、リードフレーム又は配線基板であることを特徴とするワイヤーボンディング方法。 2. The wire bonding method according to claim 1, wherein the semiconductor chip mounting frame is a lead frame or a wiring board.
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