JP3395645B2 - Wire bonding method - Google Patents

Wire bonding method

Info

Publication number
JP3395645B2
JP3395645B2 JP10076898A JP10076898A JP3395645B2 JP 3395645 B2 JP3395645 B2 JP 3395645B2 JP 10076898 A JP10076898 A JP 10076898A JP 10076898 A JP10076898 A JP 10076898A JP 3395645 B2 JP3395645 B2 JP 3395645B2
Authority
JP
Japan
Prior art keywords
chip
substrate
wire bonding
recognizing
wire
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP10076898A
Other languages
Japanese (ja)
Other versions
JPH11297742A (en
Inventor
隆幸 吉山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Corp
Panasonic Holdings Corp
Original Assignee
Panasonic Corp
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Panasonic Corp, Matsushita Electric Industrial Co Ltd filed Critical Panasonic Corp
Priority to JP10076898A priority Critical patent/JP3395645B2/en
Publication of JPH11297742A publication Critical patent/JPH11297742A/en
Application granted granted Critical
Publication of JP3395645B2 publication Critical patent/JP3395645B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/78—Apparatus for connecting with wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H01L2224/05554—Shape in top view being square
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    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
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    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
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    • H01L2224/78—Apparatus for connecting with wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/78—Apparatus for connecting with wire connectors
    • H01L2224/7825—Means for applying energy, e.g. heating means
    • H01L2224/783—Means for applying energy, e.g. heating means by means of pressure
    • H01L2224/78301—Capillary
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    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H—ELECTRICITY
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    • H01L2924/1015—Shape
    • H01L2924/1016—Shape being a cuboid
    • H01L2924/10161—Shape being a cuboid with a rectangular active surface

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Description

【発明の詳細な説明】Detailed Description of the Invention

【０００１】[0001]

【発明の属する技術分野】本発明は、基板やチップなど
の複数個のワークの電極やパッドをワイヤで接続するワ
イヤボンディング方法に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wire bonding method for connecting electrodes or pads of a plurality of works such as substrates and chips with wires.

【０００２】[0002]

【従来の技術】ワイヤボンディングは、一般に、１枚の
基板の電極と、この基板に搭載された１個のチップのパ
ッドを、ワイヤボンディング装置のキャピラリツールに
挿通されたワイヤで接続するものである。ワイヤは基板
の電極とチップのパッドに正しくボンディングする必要
があり、このためワイヤボンディングを行うのに先立っ
て、基板とチップの位置を認識することが行われる。2. Description of the Related Art Generally, wire bonding is to connect an electrode of one substrate and a pad of one chip mounted on this substrate with a wire inserted into a capillary tool of a wire bonding apparatus. . The wires need to be properly bonded to the electrodes of the substrate and the pads of the chip, so that the positions of the substrate and the chip are recognized prior to performing the wire bonding.

【０００３】基板とチップの位置認識は、基板の位置認
識部とチップの位置認識部をカメラにより認識すること
により行われる。そしてこの認識結果に基づいて、キャ
ピラリツールを基板やチップに対して相対的に水平移動
させながら、キャピラリツールに挿通されたワイヤを基
板の電極やチップのパッドに次々にボンディングしてい
く。The position recognition of the substrate and the chip is performed by recognizing the position recognition unit of the substrate and the position recognition unit of the chip with a camera. Then, based on this recognition result, while the capillary tool is moved horizontally relative to the substrate or the chip, the wires inserted in the capillary tool are bonded to the electrodes of the substrate or the pads of the chip one after another.

【０００４】ところで近年、２枚の基板を結合し、一方
の基板にチップを搭載するワークユニットがあらわれて
いる。このようなワークユニットでは、２枚の基板のう
ちの第１の基板の電極とチップのパッドをワイヤで接続
する第１回目のワイヤボンディングを行った後、第２の
基板の電極とチップのパッドをワイヤで接続する第２回
目のワイヤボンディングを行うようになっている。この
場合、まず第１の基板の位置認識部とチップの位置認識
部をカメラで認識し、この認識結果に基づいて第１の基
板の電極とチップのパッドをワイヤで接続した後、第２
の基板の位置認識部とチップの位置認識部をカメラで認
識し、この認識結果に基づいて第２の基板の電極とチッ
プのパッドをワイヤで接続する。基板やチップの位置を
認識するためには、基板やチップの２個の位置認識部を
それぞれカメラで認識する必要があるので、従来、上記
ワークユニットのワイヤボンディングを行うのに先立っ
て、カメラで総計８回基板の位置認識部とチップの位置
認識部を認識する必要があった。By the way, in recent years, a work unit in which two substrates are joined and a chip is mounted on one substrate has appeared. In such a work unit, after performing the first wire bonding for connecting the electrode of the first substrate of the two substrates and the pad of the chip with a wire, the electrode of the second substrate and the pad of the chip are connected. The second wire bonding in which the wires are connected to each other is performed. In this case, first, the camera recognizes the position recognition unit of the first substrate and the position recognition unit of the chip, and based on the recognition result, the electrodes of the first substrate and the pads of the chip are connected by wires, and then the second
The position recognition unit of the substrate and the position recognition unit of the chip are recognized by the camera, and the electrode of the second substrate and the pad of the chip are connected by the wire based on the recognition result. In order to recognize the positions of the substrate and the chip, it is necessary to recognize the two position recognizing units of the substrate and the chip by the camera, respectively. It was necessary to recognize the position recognition part of the board and the position recognition part of the chip eight times in total.

【０００５】また近年、１枚の基板に２個のチップを搭
載するワークユニットがあらわれている。このようなワ
ークユニットでは、基板の電極と２個のチップのパッ
ド、および２個のチップのパッド同士をワイヤで接続す
るようになっている。このワークユニットの場合、基板
の電極と第１のチップのパッドをワイヤで接続する第１
回目のワイヤボンディングを行うのに先立って、基板の
２個の位置認識部と第１のチップの２個の位置認識部を
カメラで合計４回認識する。また基板の電極と第１のチ
ップのパッドをワイヤで接続する第２回目のワイヤボン
ディングを行うのに先立って、基板の２個の位置認識部
と第２のチップの２個の位置認識部をカメラで合計４回
認識する。さらに第１のチップのパッドと第２のチップ
のパッドをワイヤで接続する第３回目のワイヤボンディ
ングを行うのに先立って、第１のチップの２個の位置認
識部と第２のチップの２個の位置認識部を合計４回カメ
ラで認識する。したがってこのようなワークユニットで
は、総計１２回カメラで位置認識部の認識を行ってい
た。Further, in recent years, a work unit in which two chips are mounted on one substrate has appeared. In such a work unit, the electrodes of the substrate, the pads of the two chips, and the pads of the two chips are connected by wires. In the case of this work unit, the first electrode that connects the electrode of the substrate and the pad of the first chip with a wire
Prior to the second wire bonding, the camera recognizes the two position recognizing parts of the substrate and the two position recognizing parts of the first chip four times in total. In addition, before performing the second wire bonding in which the electrodes of the substrate and the pads of the first chip are connected by wires, the two position recognizing units of the substrate and the two position recognizing units of the second chip are connected. The camera recognizes a total of four times. Further, before performing the third wire bonding in which the pads of the first chip and the pads of the second chip are connected by wires, the two position recognizing units of the first chip and the second position recognizing unit of the second chip are connected. The position recognition unit is recognized by the camera four times in total. Therefore, in such a work unit, the position recognition unit is recognized by the camera 12 times in total.

【０００６】[0006]

【発明が解決しようとする課題】以上のように従来方法
は、前者のワークユニットの場合、カメラで総計８回基
板やチップの位置認識を行い、また後者のワークユニッ
トの場合、同様に総計１２回基板やチップの位置認識を
行っていた。このように従来方法はカメラによる位置認
識の回数がきわめて多いため、位置認識にかなりの時間
を要し、ワイヤボンディングの作業能率があがらないも
のであった。As described above, according to the conventional method, in the case of the former work unit, the position of the substrate and the chip is recognized by the camera a total of 8 times, and in the case of the latter work unit, the total of 12 pieces is similarly obtained. The position of the board and the chip was recognized. As described above, in the conventional method, since the number of times of position recognition by the camera is extremely large, a considerable amount of time is required for position recognition, and the work efficiency of wire bonding cannot be improved.

【０００７】したがって本発明は、基板やチップなどの
複数個のワークの電極やパッドをワイヤで接続する際に
行われる光学手段によるワークの位置認識部の認識回数
を削減し、ワイヤボンディングの作業能率をあげること
ができるワイヤボンディング方法を提供することを目的
とする。Therefore, according to the present invention, the number of times of recognizing the position recognizing part of the work by the optical means, which is performed when the electrodes and pads of the plurality of works such as the substrate and the chip are connected by the wire, is reduced, and the work efficiency of the wire bonding is reduced. It is an object of the present invention to provide a wire bonding method that can increase

【０００８】[0008]

【課題を解決するための手段】本発明は、第１の基板の
電極と第１の基板に搭載されたチップのパッドをワイヤ
で接続するとともに、第１の基板に結合された第２の基
板の電極と前記チップのパッドをワイヤで接続するワイ
ヤボンディング方法であって、第１の基板または第２の
基板の位置認識部およびチップの位置認識部を光学手段
により認識する第１工程と、第１工程で認識されたチッ
プの位置認識部の位置データをメモリに登録する第２工
程と、前記第１工程で認識された第１の基板または第２
の基板およびチップの位置データに基づいて第１の基板
または第２の基板の電極とチップのパッドをワイヤボン
ディング装置によりワイヤで接続する第３工程と、第２
の基板または第１の基板の位置認識部を光学手段により
認識する第４工程と、第４工程で認識された第２の基板
または第１の基板の位置および前記第２工程でメモリに
登録されたチップの位置データに基づいて、第２の基板
または第１の基板の電極とチップのパッドをワイヤボン
ディング装置によりワイヤで接続する第５工程と、を含
むことを特徴とするワイヤボンディング方法である。According to the present invention, an electrode of a first substrate is connected to a pad of a chip mounted on the first substrate by a wire, and a second substrate bonded to the first substrate. A wire bonding method for connecting the electrode of the chip and the pad of the chip with a wire, the first step of recognizing the position recognition part of the first substrate or the second substrate and the position recognition part of the chip by optical means, A second step of registering in the memory the position data of the position recognizing part of the chip recognized in the first step; and the first substrate or the second step recognized in the first step.
The third step of connecting the electrodes of the first substrate or the second substrate and the pads of the chip with the wires by the wire bonding device based on the position data of the substrate and the chip,
Of the second substrate or the first substrate recognized in the fourth step and the second step recognized in the fourth step and the second step of recognizing the position recognizing unit of the first board or the first board by the optical means, and the second step are registered in the memory. And a fifth step of connecting the electrode of the second substrate or the first substrate and the pad of the chip with a wire by a wire bonding device based on the position data of the chip, the wire bonding method. .

【０００９】また本発明は、基板の電極と、基板に搭載
された第１のチップのパッドと第２のチップのパッドを
ワイヤで接続するワイヤボンディング方法であって、基
板の位置認識部と第１のチップの位置認識部を光学手段
により認識する第１工程と、第１工程で認識された第１
のチップの位置認識部の位置データをメモリに登録する
第２工程と、第１工程で認識された基板および第１のチ
ップの位置に基づいて基板の電極と第１のチップのパッ
ドをワイヤボンディング装置によりワイヤで接続する第
３工程と、第２のチップの位置認識部と基板の位置認識
部を光学手段により認識する第４工程と、第４工程で認
識された第２のチップの位置認識部の位置データをメモ
リに登録する第５工程と、第４工程で認識された第２の
チップと基板の位置に基づいて第２のチップのパッドと
基板の電極をワイヤボンディング装置によりワイヤで接
続する第６工程と、第２工程でメモリに登録された第１
のチップの位置データと第５工程でメモリに登録された
第２のチップの位置データに基づいて、第１のチップの
パッドと第２のチップのパッドをワイヤボンディング装
置によりワイヤで接続する第７工程と、を含むことを特
徴とするワイヤボンディング方法である。The present invention is also a wire bonding method for connecting electrodes of a substrate, pads of a first chip and pads of a second chip mounted on the substrate with wires, and a position recognizing unit of the substrate and The first step of recognizing the position recognition part of the first chip by the optical means, and the first step recognized in the first step
Second step of registering the position data of the position recognizing unit of the chip in the memory, and wire bonding of the electrode of the substrate and the pad of the first chip based on the positions of the substrate and the first chip recognized in the first step. A third step of connecting with a wire by a device, a fourth step of recognizing the position recognizing part of the second chip and a position recognizing part of the substrate by optical means, and a position recognizing of the second chip recognized in the fourth step. Based on the positions of the second chip and the substrate recognized in the fourth step and the fifth step of registering the position data of the parts in the memory, the pad of the second chip and the electrode of the substrate are connected by the wire by the wire bonding device. And the first step registered in the memory in the second step.
Connecting the pad of the first chip and the pad of the second chip with a wire by a wire bonding device based on the position data of the second chip and the position data of the second chip registered in the memory in the fifth step. And a wire bonding method comprising:

【００１０】上記構成によれば、光学手段で認識された
チップの位置認識部の位置データをメモリに登録してお
くことにより、そのチップに対して次回のワイヤボンデ
ィングを行うときには、再度の位置認識は行わず、メモ
リに登録された位置データを呼び出して用いることによ
り、光学手段による位置認識を省略する。したがって光
学手段による位置認識の総回数を削減し、ワイヤボンデ
ィングの作業能率をあげることができる。According to the above construction, by registering the position data of the position recognizing portion of the chip recognized by the optical means in the memory, when the next wire bonding is performed on the chip, the position recognition is performed again. The position recognition by the optical means is omitted by calling and using the position data registered in the memory. Therefore, the total number of times of position recognition by the optical means can be reduced, and the work efficiency of wire bonding can be improved.

【００１１】[0011]

【発明の実施の形態】（実施の形態１）図１は本発明の
実施の形態１のワイヤボンディング装置の斜視図、図２
は同ワークユニットの部分平面図、図３は同ワイヤボン
ディングのフローチャートである。(First Embodiment) FIG. 1 is a perspective view of a wire bonding apparatus according to a first embodiment of the present invention, and FIG.
Is a partial plan view of the work unit, and FIG. 3 is a flowchart of the wire bonding.

【００１２】図１において、第１の基板１と第２の基板
２を結合し、第１の基板１上にチップ３を搭載してワー
クユニット７が構成されている。第１の基板１には回路
パターンの電極４や位置認識部Ａ，Ｂ（以下、「Ａ点」
「Ｂ点」という）が形成されている。また第２の基板２
には回路パターンの電極５や位置認識部Ｃ，Ｄ（以下、
「Ｃ点」「Ｄ点」という）が形成されている。またチッ
プ３にはパッド６や位置認識部Ｅ，Ｆ（以下、「Ｅ点」
「Ｆ点」という）が形成されている。第１の基板１と第
２の基板２が一体となったワークユニット７は、搬送路
８を矢印方向へ搬送される。なお位置認識部としては、
基板やチップの特徴部も利用される。In FIG. 1, a first substrate 1 and a second substrate 2 are combined, and a chip 3 is mounted on the first substrate 1 to form a work unit 7. On the first substrate 1, the electrodes 4 of the circuit pattern and the position recognition parts A and B (hereinafter, “point A”)
“Point B”) is formed. In addition, the second substrate 2
The electrode 5 of the circuit pattern and the position recognition parts C and D (hereinafter,
“Point C” and “D point”) are formed. Further, the chip 3 has a pad 6 and position recognition parts E and F (hereinafter, referred to as “E point”).
"Point F") is formed. The work unit 7 in which the first substrate 1 and the second substrate 2 are integrated is transported in the transport path 8 in the arrow direction. As a position recognition unit,
Substrate and chip features are also utilized.

【００１３】搬送路８の側方にはワイヤボンディング装
置１０が配設されている。ワイヤボンディング装置１０
は、可動テーブル１１上に駆動部ケース１２を設置して
成っている。駆動部ケース１２から前方へホーン１３が
延出しており、ホーン１３の先端部にはキャピラリツー
ル１４が保持されている。キャピラリツール１４にはワ
イヤＷが挿通されている。ワイヤＷはスプール（図外）
から導出され、キャピラリツール１４に供給される。駆
動部ケース１２からブラケット１５が前方へ延出してお
り、ブラケット１５の先端部には光学手段としてのカメ
ラ１６が装着されている。カメラ１６には、制御部３０
を介してメモリ３１が接続されている。A wire bonding device 10 is arranged beside the transport path 8. Wire bonding device 10
Includes a drive unit case 12 mounted on a movable table 11. A horn 13 extends forward from the drive unit case 12, and a capillary tool 14 is held at the tip of the horn 13. A wire W is inserted through the capillary tool 14. Wire W is spool (not shown)
And supplied to the capillary tool 14. A bracket 15 extends forward from the drive unit case 12, and a camera 16 as an optical unit is attached to the tip of the bracket 15. The camera 16 includes a control unit 30.
The memory 31 is connected via.

【００１４】駆動部ケース１２の内部には、ホーン１３
を上下方向に揺動させる駆動手段などが内蔵されてい
る。キャピラリツール１４は可動テーブル１１が駆動す
ることによりＸ方向やＹ方向へ水平移動し、またホーン
１３が揺動することにより上下動し、電極４とパッド
６、また電極５とパッド６をワイヤＷで接続する。Inside the drive unit case 12, a horn 13 is provided.
A drive means for swinging up and down is built in. The capillary tool 14 horizontally moves in the X and Y directions when the movable table 11 is driven, and moves up and down when the horn 13 swings, so that the electrode 4 and the pad 6, or the electrode 5 and the pad 6 are connected to the wire W. Connect with.

【００１５】図２は、ワイヤボンディング終了後のワー
クユニット７を部分的に示している。図２では、ワイヤ
Ｗを区別するために、符号Ｗにはボンディング順に添字
１〜６を付している。図２に示すように、電極４とチッ
プ３の左側のパッド６はそれぞれ３個あり、第１回目の
ワイヤボンディングによりワイヤＷ１，Ｗ２，Ｗ３で接
続される。また電極５とチップ３の右側のパッド６もそ
れぞれ３個あり、第２回目のワイヤボンディングにより
ワイヤＷ４，Ｗ５，Ｗ６で接続される。FIG. 2 partially shows the work unit 7 after completion of wire bonding. In FIG. 2, in order to distinguish the wires W, the suffix W is added to the symbol W in the order of bonding. As shown in FIG. 2, there are three electrodes 4 and three pads 6 on the left side of the chip 3, which are connected by wires W1, W2, W3 by the first wire bonding. There are also three electrodes 5 and three pads 6 on the right side of the chip 3, which are connected by wires W4, W5, W6 by the second wire bonding.

【００１６】次に、ワイヤＷ１〜Ｗ６をボンディングす
る動作を説明する。図１において、ワークユニット７は
搬送路８によりワイヤボンディング装置１０の前方に搬
入される（図３のステップ１）。次に第１の基板１の認
識を行う（ステップ２）。この第１の基板１の認識は、
可動テーブル１１を駆動してカメラ１６を水平移動さ
せ、第１の基板１のＡ点，Ｂ点を観察して行う。Next, the operation of bonding the wires W1 to W6 will be described. In FIG. 1, the work unit 7 is loaded in front of the wire bonding apparatus 10 by the transport path 8 (step 1 in FIG. 3). Next, the first substrate 1 is recognized (step 2). The recognition of the first substrate 1 is
The movable table 11 is driven to horizontally move the camera 16, and the points A and B of the first substrate 1 are observed.

【００１７】次に同様にしてカメラ１６をチップ３の上
方へ移動させ、チップ３のＥ点，Ｆ点を認識する（ステ
ップ３）。カメラ１６で認識されたＥ点，Ｆ点の位置デ
ータはチップ３の位置データとしてメモリ３１に登録さ
れる（ステップ４）。次にＡ点，Ｂ点の認識により電極
４の位置が正確に判明し、またＥ点，Ｆ点の認識により
パッド６の位置が正確に判明したので、これに基づいて
第１回目のワイヤボンディング（ワイヤＷ１〜Ｗ３の接
続）を行う（ステップ５）。Similarly, the camera 16 is moved above the chip 3 to recognize the points E and F of the chip 3 (step 3). The position data of the points E and F recognized by the camera 16 are registered in the memory 31 as the position data of the chip 3 (step 4). Next, the position of the electrode 4 was accurately found by recognizing the points A and B, and the position of the pad 6 was correctly found by recognizing the points E and F. Based on this, the first wire bonding was performed. (Connecting the wires W1 to W3) is performed (step 5).

【００１８】次にカメラ１６を第２の基板２の上方へ移
動させ、Ｃ点，Ｄ点を認識するとともに（ステップ
６）、メモリ３１からチップ３のＥ点，Ｆ点の位置デー
タを呼び出す（ステップ７）。次にＣ点，Ｄ点の認識に
より電極５の位置が正確に判明し、またＥ点，Ｆ点の位
置データを呼び出したことによりパッド６の正確な位置
が判明したので、これに基づいて第２回目のワイヤボン
ディング（ワイヤＷ４〜Ｗ６の接続）を行う（ステップ
８）。以上のようにしてワイヤボンディングが終了した
ならば、ワークユニット７は次の工程へ送り出され、ま
た新たなワークユニット７が搬入されて上記動作が繰り
返される。Next, the camera 16 is moved above the second substrate 2 to recognize the points C and D (step 6), and the position data of the points E and F of the chip 3 are retrieved from the memory 31 (step S6). Step 7). Next, the position of the electrode 5 is accurately found by recognizing the points C and D, and the accurate position of the pad 6 is found by calling the position data of the points E and F. Second wire bonding (connection of wires W4 to W6) is performed (step 8). When the wire bonding is completed as described above, the work unit 7 is sent to the next step, a new work unit 7 is carried in, and the above operation is repeated.

【００１９】上述した本方法では、第１回目のワイヤボ
ンディング（ワイヤＷ１〜Ｗ３の接続）では、Ａ点，Ｂ
点，Ｅ点，Ｆ点の４つの位置認識部を合計４回カメラ１
６で認識している。また第２回目のワイヤボンディング
（ワイヤＷ４〜Ｗ６の接続）では、Ｃ点，Ｄ点の２つの
位置認識部を合計２回カメラ１６で認識している。そし
てＥ点，Ｆ点の位置はメモリ３１から呼び出した位置デ
ータを用いるようにし、これにより第２回目のワイヤボ
ンディングにはチップ３の位置認識部であるＥ点，Ｆ点
のカメラ１６による認識は省略している。したがってす
べてのワイヤＷ１〜Ｗ６をボンディングするために行わ
れたカメラ１６による認識の総回数の総計は６回であ
り、カメラ１６による位置認識部の認識回数を２回削減
している。In the above method, in the first wire bonding (connection of the wires W1 to W3), points A and B are used.
4 position recognition parts of point, E point, and F point are performed 4 times in total by the camera 1
We recognize in 6. Further, in the second wire bonding (connection of the wires W4 to W6), the camera 16 recognizes the two position recognizing portions at the points C and D twice in total. The positions of the points E and F are set by using the position data retrieved from the memory 31. As a result, in the second wire bonding, the E, F points which are the position recognizing parts of the chip 3 are not recognized by the camera 16. Omitted. Therefore, the total number of recognitions performed by the camera 16 for bonding all the wires W1 to W6 is 6, and the number of recognitions of the position recognition unit by the camera 16 is reduced by 2.

【００２０】（実施の形態２）図４は本発明の実施の形
態２のワイヤボンディング装置の斜視図、図５は同ワー
クユニットの平面図、図６は同ワイヤボンディングのフ
ローチャートである。(Second Embodiment) FIG. 4 is a perspective view of a wire bonding apparatus according to a second embodiment of the present invention, FIG. 5 is a plan view of the work unit, and FIG. 6 is a flowchart of the wire bonding.

【００２１】ワークユニット２０は、基板２１上に第１
のチップ２２と第２のチップ２３を搭載して成ってい
る。基板２１には回路パターンの電極２４，２５が形成
されており、また第１のチップ２２と第２のチップ２３
の上面にはパッド２６，２７が形成されている。基板２
１には位置認識部であるＡ点，Ｂ点，Ｃ点，Ｄ点が合計
４個形成されており、第１のチップ２２と第２のチップ
２３にもそれぞれ位置認識部としてＥ点，Ｆ点，Ｇ点，
Ｈ点が形成されている。ワイヤボンディング装置１０等
の構成は実施の形態１と同じである。The work unit 20 has a first substrate 21 on which
Chip 22 and second chip 23 are mounted. Circuit board electrodes 24 and 25 are formed on the substrate 21, and the first chip 22 and the second chip 23 are formed.
Pads 26 and 27 are formed on the upper surface of the. Board 2
A total of four point A, point B, point C, and point D, which are position recognizing sections, are formed on the first chip 1. The first chip 22 and the second chip 23 also have point E, F as the position recognizing section, respectively. Point, G point,
The H point is formed. The configurations of the wire bonding apparatus 10 and the like are the same as those in the first embodiment.

【００２２】図５はワイヤボンディング後のワークユニ
ット２０を示すものである。次に、図５に示すようにワ
イヤＷ１〜Ｗ９をボンディングする動作を説明する。な
おワイヤＷの添字１〜９もボンディング順を示してい
る。図４において、ワークユニット２０は搬送路８によ
りワイヤボンディング装置１０の前方に搬入される（図
６のステップ１）。次に第１回目のワイヤボンディング
（ワイヤＷ１〜Ｗ３の接続）を行うために、基板２１の
Ａ点，Ｂ点を認識し（ステップ２）、また第１のチップ
２２のＥ点，Ｆ点を認識する（ステップ３）。この認識
は、カメラ１６を基板２１や第１のチップ２２の上方へ
移動させて行う。次にＥ点，Ｆ点の位置データをメモリ
３１に登録するとともに（ステップ４）、基板２１の電
極２４と第１のチップ２２のパッド２６をワイヤＷ１〜
Ｗ３で接続する（ステップ５）。FIG. 5 shows the work unit 20 after wire bonding. Next, the operation of bonding the wires W1 to W9 as shown in FIG. 5 will be described. The subscripts 1 to 9 of the wire W also indicate the bonding order. In FIG. 4, the work unit 20 is loaded in front of the wire bonding apparatus 10 by the transport path 8 (step 1 in FIG. 6). Next, in order to perform the first wire bonding (connection of the wires W1 to W3), the points A and B of the substrate 21 are recognized (step 2), and the points E and F of the first chip 22 are identified. Recognize (step 3). This recognition is performed by moving the camera 16 above the substrate 21 and the first chip 22. Next, the position data of the points E and F are registered in the memory 31 (step 4), and the electrodes 24 of the substrate 21 and the pads 26 of the first chip 22 are connected to the wires W1 to W1.
Connect with W3 (step 5).

【００２３】次に基板２１のＣ点，Ｄ点をカメラ１６で
認識し（ステップ６）、また第２のチップ２３のＧ点，
Ｈ点をカメラ１６で認識する（ステップ７）。次にＧ
点，Ｈ点の位置データをメモリ３１に登録するとともに
（ステップ８）、第２回目のワイヤボンディングを行っ
て基板２１の電極２５と第２のチップ２３のパッド２７
をワイヤＷ４〜Ｗ６で接続する（ステップ９）。Next, the C point and D point of the substrate 21 are recognized by the camera 16 (step 6), and the G point of the second chip 23,
The point H is recognized by the camera 16 (step 7). Then G
The position data of the points H and H are registered in the memory 31 (step 8), and the second wire bonding is performed to carry out the electrode 25 of the substrate 21 and the pad 27 of the second chip 23.
Are connected by wires W4 to W6 (step 9).

【００２４】次にメモリ３１から第１のチップ２２のＥ
点，Ｆ点および第２のチップ２３のＧ点，Ｈ点の位置デ
ータを呼び出し（ステップ１０）、第３回目のワイヤボ
ンディングを行って第１のチップ２２のパッド２６と第
２のチップ２３のパッド２７をワイヤＷ７〜Ｗ９で接続
する（ステップ１１）。以上のようにしてこのワークユ
ニット２０のワイヤボンディングが終了したならば、ワ
ークユニット２０は搬送路８で次の工程へ送られ、また
新たなワークユニット２０が搬入され、上記動作が繰り
返される。Next, from the memory 31 to E of the first chip 22.
The position data of the point, F point and G point, H point of the second chip 23 is called (step 10), and the third wire bonding is performed to perform the pad bonding of the first chip 22 and the second chip 23. The pads 27 are connected by the wires W7 to W9 (step 11). When the wire bonding of the work unit 20 is completed as described above, the work unit 20 is sent to the next step on the transport path 8, a new work unit 20 is carried in, and the above operation is repeated.

【００２５】この方法は、第１のチップ２２のパッド２
６と第２のチップ２３のパッド２７をワイヤＷ７〜Ｗ９
で接続する際には、カメラ１６でＥ点〜Ｈ点の認識を行
わず、メモリ３１に登録されたＥ点〜Ｈ点の位置データ
を用いるので、カメラ１６による認識の総回数を４回削
減し、総計８回のカメラ１６による認識ですべてのワイ
ヤＷ１〜Ｗ９を接続できる。In this method, the pad 2 of the first chip 22 is used.
6 and the pad 27 of the second chip 23 to the wires W7 to W9.
When connecting by, the position data of the points E to H registered in the memory 31 is used without recognizing the points E to H by the camera 16, so the total number of recognitions by the camera 16 is reduced by four times. However, all the wires W1 to W9 can be connected by the recognition by the camera 16 a total of eight times.

【００２６】[0026]

【発明の効果】本発明によれば、基板やチップなどの複
数個のワークの電極やパッドをワイヤで接続する際に行
われる光学手段によるワークの位置認識部の認識回数を
削減し、ワイヤボンディングの作業能率をあげることが
できる。According to the present invention, the number of times of recognition of the work position recognition section by the optical means performed when the electrodes and pads of a plurality of works such as substrates and chips are connected by wires is reduced, and wire bonding is performed. Can improve the work efficiency of.

【図面の簡単な説明】[Brief description of drawings]

【図１】本発明の実施の形態１のワイヤボンディング装
置の斜視図FIG. 1 is a perspective view of a wire bonding device according to a first embodiment of the present invention.

【図２】本発明の実施の形態１のワークユニットの部分
平面図FIG. 2 is a partial plan view of the work unit according to the first embodiment of the present invention.

【図３】本発明の実施の形態１のワイヤボンディングの
フローチャートFIG. 3 is a flowchart of wire bonding according to the first embodiment of the present invention.

【図４】本発明の実施の形態２のワイヤボンディング装
置の斜視図FIG. 4 is a perspective view of a wire bonding device according to a second embodiment of the present invention.

【図５】本発明の実施の形態２のワークユニットの平面
図FIG. 5 is a plan view of a work unit according to the second embodiment of the present invention.

【図６】本発明の実施の形態２のワイヤボンディングの
フローチャートFIG. 6 is a flowchart of wire bonding according to the second embodiment of the present invention.

【符号の説明】[Explanation of symbols]

１ 第１の基板 ２ 第２の基板 ３ チップ ４，５，２４，２５ 電極 ６，２６，２７ パッド ７，２０ ワークユニット ８ 搬送路 １０ ワイヤボンディング装置 １４ キャピラリツール １６ カメラ ２２ 第１のチップ ２３ 第２のチップ ３１ メモリ Ａ〜Ｈ 位置認識部 Ｗ１〜Ｗ６ ワイヤ 1st substrate 2 Second substrate 3 chips 4, 5, 24, 25 electrodes 6,26,27 pad 7,20 work units 8 transport paths 10 Wire bonding equipment 14 Capillary tools 16 cameras 22 First Chip 23 Second Chip 31 memory A to H position recognition unit W1-W6 wire

Claims (2)

(57)【特許請求の範囲】(57) [Claims] 【請求項１】第１の基板の電極と第１の基板に搭載され
たチップのパッドをワイヤで接続するとともに、第１の
基板に結合された第２の基板の電極と前記チップのパッ
ドをワイヤで接続するワイヤボンディング方法であっ
て、 第１の基板または第２の基板の位置認識部およびチップ
の位置認識部を光学手段により認識する第１工程と、第
１工程で認識されたチップの位置認識部の位置データを
メモリに登録する第２工程と、前記第１工程で認識され
た第１の基板または第２の基板およびチップの位置デー
タに基づいて第１の基板または第２の基板の電極とチッ
プのパッドをワイヤボンディング装置によりワイヤで接
続する第３工程と、第２の基板または第１の基板の位置
認識部を光学手段により認識する第４工程と、第４工程
で認識された第２の基板または第１の基板の位置および
前記第２工程でメモリに登録されたチップの位置データ
に基づいて、第２の基板または第１の基板の電極とチッ
プのパッドをワイヤボンディング装置によりワイヤで接
続する第５工程と、を含むことを特徴とするワイヤボン
ディング方法。1. An electrode of a first substrate and a pad of a chip mounted on the first substrate are connected by a wire, and an electrode of a second substrate coupled to the first substrate and a pad of the chip are connected to each other. A wire bonding method for connecting with a wire, comprising: a first step of recognizing a position recognizing part of a first substrate or a second substrate and a position recognizing part of a chip by an optical means; and a chip recognized in the first step. A second step of registering the position data of the position recognition unit in a memory, and the first substrate or the second substrate based on the position data of the first substrate or the second substrate and the chip recognized in the first step. The third step of connecting the electrodes of the chip and the pad of the chip with the wire by the wire bonding device, the fourth step of recognizing the position recognizing part of the second substrate or the first substrate by the optical means, and the fourth step. Was first Based on the position of the second substrate or the first substrate and the position data of the chip registered in the memory in the second step, the electrode of the second substrate or the first substrate and the pad of the chip are wired by the wire bonding device. And a fifth step of connecting with the wire bonding method. 【請求項２】基板の電極と、基板に搭載された第１のチ
ップのパッドと第２のチップのパッドをワイヤで接続す
るワイヤボンディング方法であって、 基板の位置認識部と第１のチップの位置認識部を光学手
段により認識する第１工程と、第１工程で認識された第
１のチップの位置認識部の位置データをメモリに登録す
る第２工程と、第１工程で認識された基板および第１の
チップの位置に基づいて基板の電極と第１のチップのパ
ッドをワイヤボンディング装置によりワイヤで接続する
第３工程と、第２のチップの位置認識部と基板の位置認
識部を光学手段により認識する第４工程と、第４工程で
認識された第２のチップの位置認識部の位置データをメ
モリに登録する第５工程と、第４工程で認識された第２
のチップと基板の位置に基づいて第２のチップのパッド
と基板の電極をワイヤボンディング装置によりワイヤで
接続する第６工程と、第２工程でメモリに登録された第
１のチップの位置データと第５工程でメモリに登録され
た第２のチップの位置データに基づいて、第１のチップ
のパッドと第２のチップのパッドをワイヤボンディング
装置によりワイヤで接続する第７工程と、を含むことを
特徴とするワイヤボンディング方法。2. A wire bonding method for connecting an electrode of a substrate, a pad of a first chip and a pad of a second chip mounted on the substrate with a wire, the position recognizing unit of the substrate and the first chip. First step of recognizing the position recognizing section of the first chip by optical means, a second step of registering the position data of the position recognizing section of the first chip recognized in the first step in a memory, and the first step of recognizing Based on the positions of the substrate and the first chip, the third step of connecting the electrodes of the substrate and the pads of the first chip with a wire by a wire bonding device, the position recognizing unit of the second chip and the position recognizing unit of the substrate are performed. A fourth step recognized by the optical means, a fifth step of registering the position data of the position recognition part of the second chip recognized in the fourth step in a memory, and a second step recognized in the fourth step.
The step of connecting the pad of the second chip and the electrode of the substrate with the wire by the wire bonding device based on the positions of the chip and the substrate, and the position data of the first chip registered in the memory in the second step. A seventh step of connecting the pads of the first chip and the pads of the second chip with wires by a wire bonding device based on the position data of the second chip registered in the memory in the fifth step. A wire bonding method characterized by:
JP10076898A 1998-04-13 1998-04-13 Wire bonding method Expired - Fee Related JP3395645B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10076898A JP3395645B2 (en) 1998-04-13 1998-04-13 Wire bonding method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10076898A JP3395645B2 (en) 1998-04-13 1998-04-13 Wire bonding method

Publications (2)

Publication Number Publication Date
JPH11297742A JPH11297742A (en) 1999-10-29
JP3395645B2 true JP3395645B2 (en) 2003-04-14

Family

ID=14282681

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10076898A Expired - Fee Related JP3395645B2 (en) 1998-04-13 1998-04-13 Wire bonding method

Country Status (1)

Country Link
JP (1) JP3395645B2 (en)

Also Published As

Publication number Publication date
JPH11297742A (en) 1999-10-29

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