JP2006165314A - Nitride semiconductor device and its manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a nitride semiconductor device which can realize a high breakdown voltage and restrain frequency dispersion, and to provide its manufacturing method. <P>SOLUTION: A mask material formed of an insulating film is formed on a first nitride semiconductor layer to coat a control electrode formation region, and a second nitride semiconductor layer which consists of a nitride semiconductor layer comprising at least one of iron, carbon, zinc or magnesium as impurity and does not comprise aluminum is selectively formed on the exposed first nitride semiconductor layer. Thereafter, a control electrode is formed on the mask material or by removing the mask material. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a nitride semiconductor device using a nitride semiconductor as an active layer and a method for manufacturing the same, and more particularly to a high electron mobility transistor (HEMT) or a field effect transistor (FET). The present invention also relates to a nitride semiconductor device having a control electrode in Schottky contact with the semiconductor device and a method for manufacturing the same.

  FIG. 6 shows a cross-sectional view of a conventional semiconductor device made of a group III-V nitride semiconductor. The semiconductor device shown in FIG. 6 has a so-called HEMT structure, on a substrate 11 made of sapphire, a buffer layer 12 made of gallium nitride (GaN), a channel layer 13 made of gallium nitride, and non-doped aluminum gallium nitride (AlGaN). ), A carrier supply layer 15 made of n-type aluminum gallium nitride, and a Schottky layer 16 made of non-doped aluminum gallium nitride are sequentially stacked, and a heterostructure made up of a channel layer 13 and a spacer layer 14. In the vicinity of the junction interface, a two-dimensional electron gas layer made of a potential well and having extremely high electron mobility is formed. In the nitride semiconductor device having such a structure, by controlling the voltage applied to the gate electrode 20 (control electrode) in Schottky contact with the Schottky layer 16, carriers flowing between the source electrode 19a and the drain electrode 19b (2 Dimensional electron gas).

For this type of semiconductor device, various structures as disclosed in Patent Document 1, for example, have been proposed in addition to the above structure.
Japanese Patent Laid-Open No. 10-335637

  However, the breakdown voltage of the conventional nitride semiconductor device is greatly influenced by the Schottky characteristic formed by the contact between the gate metal and the nitride semiconductor layer. In general, Schottky characteristics of a gate metal formed on a nitride semiconductor layer, for example, an aluminum gallium nitride (AlGaN) layer or a gallium nitride (GaN) layer, has a high gate leakage current, which causes a gallium arsenide (GaAs) HEMT to flow. In comparison, the gate leakage current tends to increase by about two digits. This leakage current triggers impact ionization, lowering the off breakdown voltage (drain breakdown voltage when the FET is off), which is an important parameter for nitride semiconductor devices with high output elements, from the expected value. There was a problem that the performance of high withstand voltage could not be fully exploited. On the other hand, even in a semiconductor device in which a gate electrode is formed on a nitride semiconductor layer such as an aluminum gallium nitride (AlGaN) layer or a gallium nitride (GaN) layer, the surface is trapped by electrons trapped in the surface level of the nitride semiconductor layer. The potential fluctuates and frequency dispersion of the current-voltage characteristics occurs.

  In addition, in order to achieve high gain and high efficiency in high-power devices, gate electrode formation and ohmic electrode formation with a so-called recess structure have been attempted, but etching at the time of forming the recess structure varies, and nitriding is performed with good reproducibility. There is a problem that a physical semiconductor device cannot be formed. Furthermore, due to the strong chemical bonding strength of nitride semiconductors, dry etching is mainly used for etching, and damage that occurs during dry etching has a problem of deteriorating device characteristics.

  The present invention solves the above problems, significantly reduces the leakage current in the Schottky characteristics of the control electrode (gate electrode) formed in the nitride semiconductor layer, and suppresses impact ionization in the nitride semiconductor layer. An object of the present invention is to provide a nitride semiconductor device capable of realizing a high breakdown voltage and further suppressing frequency dispersion. It is another object of the present invention to provide a method for manufacturing a nitride semiconductor device capable of forming a control electrode and an ohmic electrode with good reproducibility.

  In order to achieve the above object, the invention according to claim 1 of the present application provides at least one group III element consisting of at least one of the group consisting of gallium, aluminum, boron and indium, and at least one of the group consisting of nitrogen, phosphorus and arsenic. In a nitride semiconductor device including a group III-V nitride semiconductor layer composed of a group V element containing nitrogen, a first nitride semiconductor layer including the group III-V nitride semiconductor layer stacked on a substrate; A group III-V nitride semiconductor layer selectively stacked on the first nitride semiconductor layer excluding at least the control electrode formation region, and the second nitride semiconductor layer not containing aluminum; And a control electrode connected to the first nitride semiconductor layer directly or through an insulating film, wherein the second nitride semiconductor layer has a small amount of iron, carbon, zinc or magnesium as an impurity. Kutomo is characterized in that comprises one of.

  The invention according to claim 2 of the present application is the nitride semiconductor device according to claim 1, wherein the first nitride except for the control electrode formation region and the ohmic electrode formation region in ohmic contact with the first nitride semiconductor layer is provided. The second nitride semiconductor layer selectively stacked on the semiconductor layer, the control electrode in contact with the first nitride semiconductor layer directly or through an insulating film, and the first nitride semiconductor And the ohmic electrode in ohmic contact with the layer.

  The invention according to claim 3 of the present application is the nitride semiconductor device according to claim 1 or 2, wherein the energy of the first nitride semiconductor layer is between the substrate and the first nitride semiconductor layer. A third nitride semiconductor layer made of the group III-V nitride semiconductor layer having an energy gap smaller than the gap is provided.

  The invention according to claim 4 of the present application is the nitride semiconductor device according to any one of claims 1 to 3, further comprising a source electrode and a drain electrode that serve as the ohmic electrode in ohmic contact with the first nitride semiconductor layer, A current flowing through a channel made of the first nitride semiconductor layer or a channel formed between the third nitride semiconductor layer and the first nitride semiconductor layer is controlled by a voltage applied to the control electrode. It is characterized by doing.

  The invention according to claim 5 of the present application is a group III element comprising at least one group selected from the group consisting of gallium, aluminum, boron and indium, and a group V element including at least nitrogen from the group consisting of nitrogen, phosphorus and arsenic. In the method for manufacturing a nitride semiconductor device comprising a group III-V nitride semiconductor layer, a step of forming a first nitride semiconductor layer comprising the group III-V nitride semiconductor layer on a substrate; A step of forming a mask material made of an insulating film covering the control electrode formation region on the first nitride semiconductor layer, and iron, carbon as impurities on the exposed first nitride semiconductor layer, Selectively forming a second nitride semiconductor layer made of the group III-V nitride semiconductor layer doped with at least one of zinc or magnesium and not containing aluminum; On the disk substrate, or the first nitride semiconductor layer exposed by removing the mask material, it is characterized in that a step of forming a control electrode.

  The invention according to claim 6 of the present application is the method for manufacturing a nitride semiconductor device according to claim 5, wherein the step of forming the second nitride semiconductor layer is performed on the exposed first nitride semiconductor layer. A step of selectively forming a nitride semiconductor layer made of the Group III-V nitride and not containing aluminum, and a part or all of the nitride semiconductor layer comprising at least iron, carbon, zinc, or magnesium. And a step of doping one as an impurity.

  The invention according to claim 7 of the present application is the method for manufacturing a nitride semiconductor device according to any one of claims 5 to 6, wherein the substrate has an energy gap smaller than that of the first nitride semiconductor layer on the substrate. Forming a third nitride semiconductor layer made of the group III-V nitride semiconductor layer, wherein the first nitride semiconductor layer is formed on the third nitride semiconductor layer. It is what.

  The invention according to claim 8 of the present application is the method for manufacturing a nitride semiconductor device according to any one of claims 5 to 7, wherein silicon oxide, silicon nitride, titanium nitride, tungsten nitride, molybdenum nitride, nickel nitride, aluminum nitride, titanium oxide The mask material is formed of an insulator made of tungsten oxide, molybdenum oxide, nickel oxide, and aluminum oxide, and the second nitride semiconductor layer is formed on the exposed first nitride semiconductor layer by MOCVD. It is characterized by being selectively formed.

  Since the nitride semiconductor device according to the present invention has a structure in which the control electrode is in contact with the nitride semiconductor layer through the insulating film, the leakage current can be reduced. When the control electrode of the present invention is a gate electrode such as an FET or HEMT, the gate leakage current is reduced, and the collision ionization in the channel is further suppressed, so that a high breakdown voltage can be realized.

  In addition, the nitride semiconductor device according to the present invention has a structure including a nitride semiconductor layer doped with at least one of highly insulating iron, carbon, zinc, or magnesium as an impurity between the gate-drain electrodes. -The current collapse phenomenon is suppressed and the high-frequency characteristics are improved by suppressing electrons trapped in the surface level between the drain electrodes or reducing the surface state density.

  Furthermore, in a nitride semiconductor device having an ohmic electrode with a recess structure, an ohmic electrode is formed in the vicinity of the channel, the contact resistance is reduced, the high gain and high efficiency of the nitride semiconductor device are achieved, and it is suitable as a high output semiconductor device It is.

  A method for manufacturing a nitride semiconductor device according to the present invention has a desired structure without etching a nitride semiconductor layer only by pattern formation of an insulating film by a normal nitride semiconductor device manufacturing process, a selective growth method, or the like. Since a nitride semiconductor device can be formed, a nitride semiconductor device having good controllability of the manufacturing process and excellent characteristics can be manufactured without variation and with a high yield.

  In the method of manufacturing a nitride semiconductor device having a recess structure in the control electrode according to the present invention, the first nitride semiconductor layer in contact with the control electrode can be thinned, and the threshold voltage (pinch-off voltage) is reduced. Is possible. In addition, since the first nitride semiconductor layer in contact with the control electrode is not damaged by dry etching after the epitaxial growth, a nitride semiconductor device in which characteristic deterioration does not occur as a result of damage is formed. can do.

  Further, in the method of manufacturing a nitride semiconductor device having a recess structure of the control electrode and the ohmic electrode, the source electrode can be formed in the vicinity of the channel, so that the source resistance is reduced and the mutual conductance (gm) is also improved accordingly. The nitride semiconductor device can be easily formed.

  Hereinafter, the nitride semiconductor device and the method for manufacturing the nitride semiconductor device according to the present invention will be described in order of embodiments, mainly using iron as an impurity as an example.

  First, the nitride semiconductor device of the present invention will be described in detail by taking a HEMT as a group III-V nitride semiconductor device as an example. FIG. 1 shows a sectional view of a HEMT which is a III-V nitride semiconductor device according to a first embodiment of the present invention. As shown in FIG. 1, on a substrate 11 made of silicon carbide (SiC), a buffer layer 12 made of aluminum nitride (AlN) having a thickness of about 200 nm and a thickness having an energy gap smaller than that of a carrier supply layer described later. A channel layer 13 (third nitride semiconductor layer) made of 2 μm non-doped gallium nitride (GaN), a spacer layer 14 made of 7 nm thick non-doped aluminum gallium nitride (AlGaN), and a 15 nm thick n-type aluminum gallium nitride nitride The Schottky layer 16 (first nitride semiconductor layer) made of non-doped aluminum gallium nitride having a thickness of 3 nm is stacked and formed, and the insulating film 17 made of silicon oxide and having a thickness of 15 nm is further formed on the Schottky layer 16. (Mask material) and 10 nm thick iron (Fe) The cap layer 18 made of ping gallium nitride (second nitride semiconductor layer) are stacked. On the Schottky layer 16, a source electrode 19 a and a drain electrode 19 b (ohmic electrode) made of a laminated body of titanium (Ti) / aluminum (Al) that are in ohmic contact are provided, and are in ohmic contact with the carrier supply layer 15. A gate electrode 20 (control electrode) made of a nickel (Ni) / gold (Au) laminate or the like is provided on the insulating film 17 to form a Schottky contact.

The cap layer 18 doped with iron (Fe) is selectively stacked on the Schottky layer 16 except for the region where the insulating film 17 is provided. The sheet resistance is as high as 10 ⁹ Ω / □ or more.

  Since the nitride semiconductor device of the present invention has a structure in which the insulating film 17 is provided under the gate electrode 20, the gate leakage current is reduced, collision ionization in the channel is suppressed, and the off breakdown voltage is improved.

  In the nitride semiconductor device of the present invention, since the highly insulating cap layer 18 is provided between the gate and drain electrodes, suppression of electrons trapped in the surface level between the gate and drain electrodes or the surface By reducing the level density, frequency dispersion of current-voltage characteristics can be suppressed.

  Next, a method for manufacturing the nitride semiconductor device shown in FIG. 1 will be described. First, an aluminum nitride (AlN) buffer layer 12 having a thickness of about 200 nm is formed on a substrate 11 made of silicon carbide (SiC) by MOCVD (metal organic chemical vapor deposition) or MBE (electron beam epitaxial). A channel layer 13 made of non-doped gallium nitride (GaN) with a thickness of 2 μm, a spacer layer 14 made of non-doped aluminum gallium nitride (AlGaN) with a thickness of 7 nm, a carrier supply layer 15 made of n-type aluminum gallium nitride with a thickness of 15 nm, a thickness A Schottky layer 16 made of non-doped aluminum gallium nitride with a thickness of 3 nm is sequentially stacked and grown (FIG. 2a).

  Next, an insulating film 17 (mask material) made of silicon oxide and having a thickness of 15 nm is formed on the Schottky layer 16 by plasma CVD, low pressure CVD, EB (electron beam) deposition, or the like. Thereafter, the insulating film 17 is left in the gate electrode formation region and the ohmic electrode formation region by the usual lithographic method and etching method, the other insulating film 17 is removed, and the Schottky layer 16 is exposed (FIG. 2b). Although it is not always necessary to leave the insulating film 17 in the ohmic electrode formation region, it is preferable to form an ohmic contact in the vicinity of the channel when the ohmic electrode described later is formed, thereby reducing the contact resistance.

  Here, the insulating film 17 is not limited to the silicon oxide of this embodiment as long as it has high insulating properties and the cap layer 18 does not grow on the insulating film 17. As other insulating film materials, silicon nitride, titanium nitride, tungsten nitride, molybdenum nitride, nickel nitride, aluminum nitride, titanium oxide, tungsten oxide, molybdenum oxide, nickel oxide, and aluminum oxide are preferable because they can be easily formed and removed. . In addition, the thickness of the insulating film 17 may be set as appropriate so that the cap layer 18 can be selectively grown and the carrier flowing through the channel can be controlled by the voltage applied to the control electrode.

Thereafter, dicyclopentadienyl (bis (cyclopentadienyl) iron, Cp ₂ Fe) is simultaneously supplied as a doping source, and a cap layer 18 made of gallium nitride (GaN) doped with 10 nm thick iron (Fe) is grown again. Let Thus, by doping with iron (Fe), a layer having high insulation characteristics is obtained. Further, since gallium nitride doped with iron (Fe) does not grow on the surface of the insulating film 17, a cap layer 18 can be selectively formed as shown in FIG. 2c.

  Next, the insulating film 17b in the ohmic electrode formation region is removed by a normal lithographic method and an etching method, and a titanium (Ti) film having a thickness of about 10 nm is formed on the Schottky layer 16 exposed by the lift-off method by an electron beam evaporation method or the like. Then, an aluminum (Al) film having a thickness of about 200 nm is deposited and heat treatment is performed to form at least a source electrode 19a and a drain electrode 19b that are in ohmic contact with the carrier supply layer 15 (FIG. 2d). When the ohmic electrode is formed as a so-called recess structure in this way, the resistance can be reduced.

  Subsequently, a laminate made of nickel (Ni) with a thickness of 20 nm / gold (Au) with a thickness of 300 nm is laminated on the insulating film 17 by an electron beam evaporation method or the like by a normal lithographic method and a lift-off method. By patterning, a gate electrode 20 in Schottky contact is formed (FIG. 2e). Thereafter, the HEMT is completed in accordance with a normal semiconductor device manufacturing process.

  The method for manufacturing a nitride semiconductor device of the present invention includes only a normal nitride semiconductor device manufacturing process, and a nitride semiconductor device having a desired structure can be formed. Nitride semiconductor devices having excellent characteristics can be manufactured without variation and with high yield.

  FIG. 3 shows a cross-sectional view of a second embodiment made of another nitride semiconductor device. Similar to the first embodiment, on a substrate 11 made of silicon carbide (SiC), a buffer layer 12 made of aluminum nitride (AlN) having a thickness of about 200 nm, and a thickness having an energy gap smaller than that of a carrier supply layer described later. Channel layer 13 (third nitride semiconductor layer) made of non-doped gallium nitride (GaN) having a thickness of 2 μm, spacer layer 14 made of non-doped aluminum gallium nitride (AlGaN) having a thickness of 7 nm, and n-type aluminum gallium nitride having a thickness of 15 nm And a Schottky layer 16 (first nitride semiconductor layer) made of non-doped aluminum gallium nitride with a thickness of 3 nm, and further doped with iron (Fe) with a thickness of 10 nm on the Schottky layer 16. The cap layer 18 made of gallium nitride (second It is stacked forming a compound semiconductor layer). On the Schottky layer 16, a source electrode 19 a and a drain electrode 19 b (ohmic electrode) made of a laminated body of titanium (Ti) / aluminum (Al) that are in ohmic contact are provided, and are in ohmic contact with the carrier supply layer 15. In this embodiment, unlike the first embodiment, the insulating film 17 is removed and a gate electrode 20 (control electrode) made of a nickel (Ni) / gold (Au) laminate or the like is formed on the exposed Schottky layer 16. And a Schottky contact is formed on the Schottky layer 16.

As in the first embodiment, the cap layer 18 doped with iron (Fe) is selectively stacked on the Schottky layer 16 except for the gate electrode 20 formation region, the source electrode 19a, and the drain electrode 19b formation region. The sheet resistance is as high as 10 ⁹ Ω / □ or more.

  In the nitride semiconductor device of the present invention, since the highly insulating cap layer 18 is provided between the gate and drain electrodes, suppression of electrons trapped in the surface level between the gate and drain electrodes or surface level The frequency dispersion of the current-voltage characteristics can be suppressed by reducing the unit density.

  Next, a method for manufacturing the nitride semiconductor device shown in FIG. 3 will be described. As in the first embodiment, an aluminum nitride (AlN) buffer layer 12 having a thickness of about 200 nm and an undoped gallium nitride (2 μm thickness) are first formed on a substrate 11 made of silicon carbide (SiC) by MOCVD or MBE. A channel layer 13 made of GaN), a spacer layer 14 made of non-doped aluminum gallium nitride (AlGaN) having a thickness of 7 nm, a carrier supply layer 15 made of n-type aluminum gallium nitride having a thickness of 15 nm, and an undoped aluminum gallium nitride having a thickness of 3 nm. The resulting Schottky layers 16 are sequentially stacked and grown. (Figure 4a).

  Next, an insulating film 17 (mask material) made of silicon oxide and having a thickness of 15 nm is formed on the Schottky layer 16 by plasma CVD, low pressure CVD, EB (electron beam) deposition, or the like. Thereafter, a part of the insulating film 17 is removed by a normal lithographic method and an etching method to expose the Schottky layer 16 (FIG. 4b).

  The insulating film 17 is not limited to the silicon oxide of this embodiment as long as the cap layer 18 does not grow on the insulating film 17. As other insulating film materials, silicon nitride, titanium nitride, tungsten nitride, molybdenum nitride, nickel nitride, aluminum nitride, titanium oxide, tungsten oxide, molybdenum oxide, nickel oxide, and aluminum oxide are preferable because they can be easily formed and removed. . Further, the thickness of the insulating film 17 may be set as appropriate so that the Schottky layer 16 can be selectively grown and the carrier flowing through the channel can be controlled by the voltage applied to the control electrode.

Thereafter, bis (cyclopentadienyl) iron (bis (cyclopentadienyl) iron, Cp ₂ Fe) is supplied as a doping source together with the raw material gas, and the cap layer 18 made of gallium nitride (GaN) doped with 10 nm thick iron (Fe) again. Grow. By doping with iron (Fe) in this way, a layer having excellent insulating properties is obtained (FIG. 4c).

  Further, the insulating film 17b is removed by a normal lithographic method and an etching method, and the Schottky layer 16 is exposed (FIG. 4d). Subsequently, a titanium (Ti) film having a thickness of about 20 nm and an aluminum (Al) film having a thickness of about 200 nm are deposited on the Schottky layer 16 by an electron beam evaporation method by a normal lithographic method and a lift-off method, and heat treatment is performed. The source electrode 19a and the drain electrode 19b are formed.

  Subsequently, a laminated body made of nickel (Ni) with a thickness of 20 nm / gold (Au) with a thickness of 300 nm is laminated on the Schottky layer 16 by an ordinary lithographic method and a lift-off method by an electron beam evaporation method or the like. By patterning, a gate electrode 20 in Schottky contact is formed (FIG. 4e). Thereafter, the HEMT is completed in accordance with a normal semiconductor device manufacturing process.

  In this embodiment, since the gate electrode 20 has a so-called recess structure, the source resistance is reduced, the mutual conductance (gm) is improved, and the threshold voltage can be reduced. Further, since the source electrode 19a and the drain electrode 19b are similarly formed as recess structures, the resistance can be reduced.

  In addition, since the nitride semiconductor device manufacturing method of the present invention follows a normal semiconductor device manufacturing process without etching the nitride semiconductor layer, it can be manufactured with extremely good controllability and high yield.

  Next, another method for manufacturing the cap layer 18 will be described. As shown in FIG. 5, an aluminum nitride (AlN) buffer layer 12 having a thickness of about 200 nm and a non-doped gallium nitride (GaN) having a thickness of 2 μm are formed on a substrate 11 made of silicon carbide (SiC) by MOCVD or MBE. ), A spacer layer 14 made of non-doped aluminum gallium nitride (AlGaN) having a thickness of 7 nm, a carrier supply layer 15 made of n-type aluminum gallium nitride having a thickness of 15 nm, and made of non-doped aluminum gallium nitride having a thickness of 3 nm. The Schottky layer 16 is sequentially stacked and grown. (Figure 5a).

  Next, an insulating film 17 made of silicon oxide and having a thickness of 15 nm is formed on the Schottky layer 16 by plasma CVD, low pressure CVD, EB vapor deposition, or the like. Thereafter, a part of the insulating film 17 is removed by a normal lithographic method and an etching method to expose the Schottky layer 16 (FIG. 5b).

  Thereafter, in this embodiment, a 10 nm thick non-doped gallium nitride layer 21 containing no impurities is selectively formed on the exposed Schottky layer 16 (FIG. 5c).

Next, an SOG (spin-on-glass) film 22 to which an iron compound is added is formed on the surface of the non-doped gallium nitride layer 21. Specifically, an iron compound (Fe (NO ₃ ) ₃ .9H ₂ O) is used with respect to 100 ml of an organic solvent containing a silanol compound (R _n Si (OH) _{4 -n} ) (for example, OCDtype-1 manufactured by Tokyo Ohka Kogyo Co., Ltd.). Is prepared and spin-coated on the surface of the non-doped gallium nitride layer 21 and the insulating film 17. This is fired to form the SOG film 22 (FIG. 5d).

After that, by heating, iron (Fe) added to the SOG film is diffused into the non-doped gallium nitride layer 21 to form the cap layer 18 in which iron (Fe) is diffused. The cap layer 18 becomes a high resistance film exhibiting high insulating properties (sheet resistance 1 × 10 ⁹ Ω / □ or more). After the SOG film 22 remaining on the cap layer 18 and the insulating film 17 is removed, the insulating film 17b is removed and the titanium (Ti) that makes ohmic contact with the exposed Schottky layer 16 is removed as in the first and second embodiments. ) / Aluminum (Al) laminate or the like, and a source electrode 19a and a drain electrode 19b are formed. Further, the gate electrode 20 made of a nickel (Ni) / gold (Au) laminate or the like is patterned on the insulating film 17a (FIG. 5f) or on the Schottky layer 16 exposed by removing the insulating film 17a. A physical semiconductor can be formed.

  Also in this example, as in the first and second examples, the gate-drain electrode is provided with the nitride semiconductor cap layer 18 doped with highly insulating iron (Fe) between the gate-drain electrodes. Therefore, a nitride semiconductor device that suppresses frequency dispersion of current-voltage characteristics by suppressing electrons trapped in the surface state between them or reducing the surface state density can be manufactured with high yield without variation.

  Although the embodiments of the present invention have been described with respect to the nitride semiconductor device having the HEMT structure, the present invention can also be applied to the nitride semiconductor device having the FET structure. That is, the present invention can be applied only in the configuration of the semiconductor substrate. Hereinafter, an FET which is a group III-V nitride semiconductor device according to a third embodiment of the present invention will be described in accordance with the manufacturing process. First, a buffer layer made of aluminum nitride (AlN) having a thickness of about 200 nm is grown on a substrate made of silicon carbide (SiC) by MOCVD or MBE, and n-type gallium nitride (GaN) having a thickness of about 3 μm. An active layer (first nitride semiconductor layer) is sequentially stacked and grown.

  Next, an insulating film (mask material) having a thickness of 15 nm made of silicon oxide is formed on the active layer by plasma CVD, low pressure CVD, EB vapor deposition, or the like. Thereafter, by an ordinary lithographic method and an etching method, an insulating film such as a gate electrode formation region is left, the other insulating films are removed, and the active layer is exposed.

  Thereafter, a cap layer (second nitride semiconductor layer) made of gallium nitride doped with iron (Fe) as an impurity is grown on the active layer by MOCVD. Next, a source electrode and a drain electrode that are in ohmic contact with the active layer by an EB deposition method on the cap layer by an ordinary lithographic method and a lift-off method, and an active material that is exposed on the insulating film or by removing the insulating film. A gate electrode in Schottky contact is formed on the layer. Thereafter, the FET is completed according to the normal manufacturing process of the semiconductor device.

  Even if the present invention is a nitride semiconductor device having an FET structure, since the insulating film is provided under the gate electrode, the gate leakage current is reduced, collision ionization in the channel is suppressed, and the off breakdown voltage is reduced. Improved. In addition, since a highly insulating cap layer is provided between the gate and the drain electrode, the current − is suppressed by suppressing electrons trapped in the surface level between the gate and the drain electrode or by reducing the surface level density. Frequency dispersion of voltage characteristics can be suppressed.

  Even if the present invention manufactures a nitride semiconductor device having an FET structure, it can be formed only by a normal nitride semiconductor device manufacturing process, and a nitride semiconductor device having a desired structure can be formed. A nitride semiconductor device having good process controllability and excellent characteristics can be manufactured without variation and with a high yield.

  Although the embodiments of the present invention have been described above, the present invention is not limited to these embodiments and can be variously modified. The nitride semiconductor layer is not limited to the GaN / AlGaN system, and the nitride semiconductor layer (corresponding to the Schottky layer 16 in the above embodiment) on which the control electrode is formed is GaN, InN or a mixed crystal thereof. It can be comprised by the layer which contains a compound and does not contain aluminum. The first nitride semiconductor layer (corresponding to the carrier supply layer 15 in the above embodiment) can be formed of a layer containing GaN, InN, AlN, or a mixed crystal semiconductor thereof and containing at least aluminum. A sapphire substrate may be used instead of the silicon carbide (SiC) substrate used in the examples. In that case, it is desirable to use gallium nitride (GaN) grown at a low temperature as the buffer layer 12. Further, a silicon substrate (Si) may be used instead of the silicon carbide (SiC) substrate used in the embodiments. It goes without saying that the composition of the control electrode that forms Schottky contact with the nitride semiconductor and the electrode that makes ohmic contact are appropriately selected according to the type of the nitride semiconductor layer, insulating film, and the like to be used.

  As described above, the case where iron (Fe) is doped as an impurity has been described in detail. However, the impurity doped in the present invention is not only iron (Fe) but also carbon (C), zinc (Zn), and magnesium (Mg). There may be. When doping these as impurities, a well-known manufacturing method is followed.

For example, when a nitride semiconductor layer is formed by MOCVD, zinc (Zn) is used as a doping source using di-ethyl zinc, and dicyclopentadienyl magnesium (bis (cyclopentadienyl) magnesium, Cp ₂ Mg) can be used to form a nitride semiconductor layer doped with magnesium (Mg). Further, when the nitride semiconductor layer is formed by the MBE method, metallic zinc or metallic magnesium can be used as a dopant. When carbon (C) is doped, carbon tetrabromide (CBr ₄ ) can be used as a doping source by MOCVD.

In addition, when doping with zinc (Zn) or magnesium (Mg) using an SOG film, a solution in which a desired metal compound is added to an organic solvent containing a silanol compound (R _n Si (OH) _{4 -n} ) is used. It can be formed by firing after spin coating on the semiconductor layer. In addition, impurities can be doped by ion implantation.

It is explanatory drawing of the nitride semiconductor device which is an Example of this invention. It is explanatory drawing of the manufacturing method of the nitride semiconductor device which is an Example of this invention. It is explanatory drawing of the nitride semiconductor device which is another Example of this invention. It is explanatory drawing of the manufacturing method of the nitride semiconductor device which is another Example of this invention. It is explanatory drawing of the manufacturing method of the nitride semiconductor device which is another Example of this invention. It is explanatory drawing of the conventional nitride semiconductor device.

Explanation of symbols

11; substrate; 12; buffer layer; 13; channel layer; 14; spacer layer;
15; carrier supply layer, 16; Schottky layer, 17; insulating film, 18; cap layer,
19a; source electrode, 19b; drain electrode, 20; gate electrode,
21; Non-doped gallium nitride layer, 22; SOG film

Claims (8)

Group III-V nitride composed of a group III element consisting of at least one of the group consisting of gallium, aluminum, boron and indium and a group V element containing at least nitrogen from the group consisting of nitrogen, phosphorus and arsenic In a nitride semiconductor device composed of a semiconductor layer,
A first nitride semiconductor layer made of the III-V nitride semiconductor layer stacked on a substrate, and the III- layer selectively stacked on the first nitride semiconductor layer excluding at least the control electrode formation region; A second nitride semiconductor layer made of a group V nitride semiconductor layer and containing no aluminum, and a control electrode connected to the first nitride semiconductor layer directly or via an insulating film;
The second nitride semiconductor layer includes at least one of iron, carbon, zinc, or magnesium as an impurity. The nitride semiconductor device according to claim 1,
The second nitride semiconductor layer selectively stacked on the first nitride semiconductor layer excluding the control electrode formation region and the ohmic electrode formation region in ohmic contact with the first nitride semiconductor layer; and A nitride semiconductor comprising: the control electrode in contact with the first nitride semiconductor layer directly or through an insulating film; and the ohmic electrode in ohmic contact with the first nitride semiconductor layer apparatus. The nitride semiconductor device according to claim 1 or 2,
A third nitride composed of the group III-V nitride semiconductor layer having an energy gap smaller than that of the first nitride semiconductor layer between the substrate and the first nitride semiconductor layer. A nitride semiconductor device comprising a semiconductor layer. The nitride semiconductor device according to any one of claims 1 to 3,
A source electrode and a drain electrode serving as the ohmic electrode in ohmic contact with the first nitride semiconductor layer; a channel formed of the first nitride semiconductor layer; or the third nitride semiconductor layer and the first A nitride semiconductor device, wherein a current flowing through a channel formed between the first and second nitride semiconductor layers is controlled by a voltage applied to the control electrode. Group III-V nitride composed of a group III element consisting of at least one of the group consisting of gallium, aluminum, boron and indium and a group V element containing at least nitrogen from the group consisting of nitrogen, phosphorus and arsenic In a method for manufacturing a nitride semiconductor device comprising a semiconductor layer,
Forming a first nitride semiconductor layer comprising the group III-V nitride semiconductor layer on a substrate;
Forming a mask material made of an insulating film covering the control electrode formation region on the first nitride semiconductor layer;
A second nitride composed of the group III-V nitride semiconductor layer not containing aluminum, doped with at least one of iron, carbon, zinc, or magnesium as an impurity on the exposed first nitride semiconductor layer Selectively forming a semiconductor layer;
Forming a control electrode on the mask material or on the first nitride semiconductor layer exposed by removing the mask material. 6. The method of manufacturing a nitride semiconductor device according to claim 5, wherein the step of forming the second nitride semiconductor layer includes:
Selectively forming a nitride semiconductor layer made of Group III-V nitride and not containing aluminum on the exposed first nitride semiconductor layer;
And a step of doping at least one of iron, carbon, zinc, and magnesium as an impurity into a part or all of the nitride semiconductor layer. In the manufacturing method of the nitride semiconductor device according to claim 5,
Forming a third nitride semiconductor layer made of the group III-V nitride semiconductor layer having an energy gap smaller than that of the first nitride semiconductor layer on the substrate; 3. A method of manufacturing a nitride semiconductor device, comprising: forming the first nitride semiconductor layer on the nitride semiconductor layer 3. In the manufacturing method of the nitride semiconductor device according to claim 5,
The mask material is formed of an insulator made of silicon oxide, silicon nitride, titanium nitride, tungsten nitride, molybdenum nitride, nickel nitride, aluminum nitride, titanium oxide, tungsten oxide, molybdenum oxide, nickel oxide, aluminum oxide, and MOCVD method is used. The method of manufacturing a nitride semiconductor device, wherein the second nitride semiconductor layer is selectively formed on the exposed first nitride semiconductor layer.

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