JP2006156807A5 - - Google Patents
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- Publication number
- JP2006156807A5 JP2006156807A5 JP2004346957A JP2004346957A JP2006156807A5 JP 2006156807 A5 JP2006156807 A5 JP 2006156807A5 JP 2004346957 A JP2004346957 A JP 2004346957A JP 2004346957 A JP2004346957 A JP 2004346957A JP 2006156807 A5 JP2006156807 A5 JP 2006156807A5
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2004346957A JP2006156807A (ja) | 2004-11-30 | 2004-11-30 | 半導体装置およびその製造方法 |
| US11/289,694 US20060131676A1 (en) | 2004-11-30 | 2005-11-30 | Semiconductor device and manufacturing method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2004346957A JP2006156807A (ja) | 2004-11-30 | 2004-11-30 | 半導体装置およびその製造方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2006156807A JP2006156807A (ja) | 2006-06-15 |
| JP2006156807A5 true JP2006156807A5 (enExample) | 2007-09-13 |
Family
ID=36594604
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2004346957A Abandoned JP2006156807A (ja) | 2004-11-30 | 2004-11-30 | 半導体装置およびその製造方法 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US20060131676A1 (enExample) |
| JP (1) | JP2006156807A (enExample) |
Families Citing this family (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006165068A (ja) * | 2004-12-02 | 2006-06-22 | Sony Corp | 半導体装置およびその製造方法 |
| KR100647472B1 (ko) * | 2005-11-23 | 2006-11-23 | 삼성전자주식회사 | 반도체 장치의 듀얼 게이트 구조물 및 그 형성 방법. |
| WO2008013125A1 (en) * | 2006-07-25 | 2008-01-31 | Nec Corporation | Semiconductor device and method for manufacturing same |
| JPWO2008015940A1 (ja) * | 2006-08-01 | 2009-12-24 | 日本電気株式会社 | 半導体装置及びその製造方法 |
| JP5446068B2 (ja) * | 2007-03-30 | 2014-03-19 | 富士通セミコンダクター株式会社 | 半導体装置の製造方法 |
| JP4575400B2 (ja) | 2007-05-08 | 2010-11-04 | 株式会社東芝 | 半導体装置の製造方法 |
| JP2008288465A (ja) * | 2007-05-18 | 2008-11-27 | Panasonic Corp | 半導体装置及びその製造方法 |
| KR100852212B1 (ko) | 2007-06-12 | 2008-08-13 | 삼성전자주식회사 | 반도체 소자 및 이를 형성하는 방법 |
| JP2009043760A (ja) * | 2007-08-06 | 2009-02-26 | Toshiba Corp | 半導体装置 |
| JP5147588B2 (ja) * | 2008-08-04 | 2013-02-20 | パナソニック株式会社 | 半導体装置 |
| US8629506B2 (en) * | 2009-03-19 | 2014-01-14 | International Business Machines Corporation | Replacement gate CMOS |
| CN102237270B (zh) * | 2010-04-23 | 2016-01-20 | 联华电子股份有限公司 | 金属栅极结构及其制造方法 |
| US9293347B2 (en) * | 2012-05-18 | 2016-03-22 | Renesas Electronics Corporation | Semiconductor device and method of manufacturing the same |
| US10038063B2 (en) * | 2014-06-10 | 2018-07-31 | International Business Machines Corporation | Tunable breakdown voltage RF FET devices |
Family Cites Families (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6537901B2 (en) * | 2000-12-29 | 2003-03-25 | Hynix Semiconductor Inc. | Method of manufacturing a transistor in a semiconductor device |
| KR100493206B1 (ko) * | 2001-01-16 | 2005-06-03 | 가부시키가이샤 히타치세이사쿠쇼 | 반도체장치 및 그 제조방법 |
| KR100399356B1 (ko) * | 2001-04-11 | 2003-09-26 | 삼성전자주식회사 | 듀얼 게이트를 가지는 씨모스형 반도체 장치 형성 방법 |
| US6475908B1 (en) * | 2001-10-18 | 2002-11-05 | Chartered Semiconductor Manufacturing Ltd. | Dual metal gate process: metals and their silicides |
| JP3974507B2 (ja) * | 2001-12-27 | 2007-09-12 | 株式会社東芝 | 半導体装置の製造方法 |
| US6873048B2 (en) * | 2003-02-27 | 2005-03-29 | Sharp Laboratories Of America, Inc. | System and method for integrating multiple metal gates for CMOS applications |
| JP3790237B2 (ja) * | 2003-08-26 | 2006-06-28 | 株式会社東芝 | 半導体装置の製造方法 |
| US7030001B2 (en) * | 2004-04-19 | 2006-04-18 | Freescale Semiconductor, Inc. | Method for forming a gate electrode having a metal |
| US7135401B2 (en) * | 2004-05-06 | 2006-11-14 | Micron Technology, Inc. | Methods of forming electrical connections for semiconductor constructions |
| US7528024B2 (en) * | 2004-05-24 | 2009-05-05 | Texas Instruments Incorporated | Dual work function metal gate integration in semiconductor devices |
| US7173312B2 (en) * | 2004-12-15 | 2007-02-06 | International Business Machines Corporation | Structure and method to generate local mechanical gate stress for MOSFET channel mobility modification |
-
2004
- 2004-11-30 JP JP2004346957A patent/JP2006156807A/ja not_active Abandoned
-
2005
- 2005-11-30 US US11/289,694 patent/US20060131676A1/en not_active Abandoned