JP2006129499A5 - - Google Patents
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- Publication number
- JP2006129499A5 JP2006129499A5 JP2005316280A JP2005316280A JP2006129499A5 JP 2006129499 A5 JP2006129499 A5 JP 2006129499A5 JP 2005316280 A JP2005316280 A JP 2005316280A JP 2005316280 A JP2005316280 A JP 2005316280A JP 2006129499 A5 JP2006129499 A5 JP 2006129499A5
- Authority
- JP
- Japan
- Prior art keywords
- adcs
- transfer function
- analog baseband
- baseband signal
- filter
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000011159 matrix material Substances 0.000 claims 9
- 238000000034 method Methods 0.000 claims 8
- 238000006243 chemical reaction Methods 0.000 claims 7
- 238000005070 sampling Methods 0.000 claims 3
- 230000000295 complement effect Effects 0.000 claims 1
- 230000007704 transition Effects 0.000 claims 1
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US10/977,833 US7049992B1 (en) | 2004-10-29 | 2004-10-29 | Sample rate doubling using alternating ADCs |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2006129499A JP2006129499A (ja) | 2006-05-18 |
| JP2006129499A5 true JP2006129499A5 (enExample) | 2008-03-27 |
Family
ID=35458308
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2005316280A Pending JP2006129499A (ja) | 2004-10-29 | 2005-10-31 | 交互adcを利用したサンプル・レートの倍加方法およびシステム |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US7049992B1 (enExample) |
| JP (1) | JP2006129499A (enExample) |
| DE (1) | DE102005039684A1 (enExample) |
| GB (1) | GB2419482A (enExample) |
Families Citing this family (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7196650B1 (en) * | 2006-01-27 | 2007-03-27 | Analog Devices, Inc. | Signal converter systems and methods with enhanced signal-to-noise ratios |
| JP2008275730A (ja) * | 2007-04-26 | 2008-11-13 | Sec:Kk | 音響信号符号化装置及び音響信号符号化方法 |
| EP2158680B1 (en) * | 2007-06-21 | 2014-06-04 | Signal Processing Devices Sweden AB | Compensation of mismatch errors in a time-interleaved analog-to-digital converter |
| WO2008156400A1 (en) * | 2007-06-21 | 2008-12-24 | Signal Processing Devices Sweden Ab | Compensation of mismatch errors in a time-interleaved analog-to-digital converter |
| US7728753B2 (en) * | 2008-10-13 | 2010-06-01 | National Semiconductor Corporation | Continuous synchronization for multiple ADCs |
| DE102009029051A1 (de) * | 2009-09-01 | 2011-03-03 | Robert Bosch Gmbh | Verfahren und Vorrichtung zum Bereitstellen eines Reflexionssignals |
| KR101423111B1 (ko) * | 2010-08-10 | 2014-07-30 | 창원대학교 산학협력단 | 밴드 패스 샘플링 수신기 |
| US8525717B2 (en) * | 2010-08-13 | 2013-09-03 | Rf Micro Devices, Inc. | Half-bandwidth based quadrature analog-to-digital converter |
| DE102011011711A1 (de) * | 2010-11-16 | 2012-05-16 | Rohde & Schwarz Gmbh & Co. Kg | Verfahren und Vorrichtung zur Kompensation von Fehlanpassungen in Analog-Digital-Wandlern |
| US9165597B2 (en) * | 2013-06-28 | 2015-10-20 | Seagate Technology Llc | Time-multiplexed single input single output (SISO) data recovery channel |
| DE102014200914B4 (de) * | 2014-01-20 | 2021-06-24 | Rohde & Schwarz GmbH & Co. Kommanditgesellschaft | Verfahren und System zur Kompensation von Fehlanpassungen zwischen zeitlich versetzt zueinander abtastenden Analog-Digital-Wandlern |
| DE102014203369B4 (de) * | 2014-02-25 | 2018-10-31 | Rohde & Schwarz Gmbh & Co. Kg | Verfahren und System zur Kompensation von Systemfehlern zwischen mehreren Analog-Digital-Wandlern |
| US9281832B1 (en) * | 2014-12-31 | 2016-03-08 | Texas Instruments Incorporated | Circuits and methods for bandwidth estimation optimization of analog to digital converters |
| CN110352561B (zh) * | 2017-02-28 | 2024-02-13 | 索尼半导体解决方案公司 | 模拟数字转换器、固态成像元件和电子设备 |
| US10749541B1 (en) | 2020-01-07 | 2020-08-18 | Guzik Technical Enterprises | Time interleaved analog to digital converter with digital equalization and a reduced number of multipliers |
Family Cites Families (20)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4755761A (en) * | 1986-06-26 | 1988-07-05 | General Electric Company | Zero intermediate-frequency demodulator |
| US4965822A (en) * | 1989-04-10 | 1990-10-23 | Videotelecom Corp. | Full duplex speakerphone |
| US5278872A (en) * | 1991-05-28 | 1994-01-11 | North American Philips Corporation | System and circuit architecture for echo cancellation and a television receiver comprising same |
| GB9205614D0 (en) * | 1992-03-14 | 1992-04-29 | Innovision Ltd | Sample rate converter suitable for converting between digital video formats |
| US5233549A (en) * | 1992-04-21 | 1993-08-03 | Loral Aerospace Corp. | Reduced quantization error FIR filter |
| CA2144596A1 (en) * | 1994-04-05 | 1995-10-06 | Richard Prodan | Modulator/demodulator using baseband filtering |
| US5732107A (en) * | 1995-08-31 | 1998-03-24 | Northrop Grumman Corporation | Fir interpolator with zero order hold and fir-spline interpolation combination |
| US5886749A (en) * | 1996-12-13 | 1999-03-23 | Cable Television Laboratories, Inc. | Demodulation using a time domain guard interval with an overlapped transform |
| DE10007148C2 (de) * | 1999-02-17 | 2003-06-18 | Advantest Corp | Hochgeschwindigkeits-Wellenformdigitalisierer mit einer Phasenkorrekturvorrichtung und Verfahren zur Phasenkorrektur |
| US6795494B1 (en) * | 2000-05-12 | 2004-09-21 | National Semiconductor Corporation | Receiver architecture using mixed analog and digital signal processing and method of operation |
| US6798827B1 (en) * | 2000-05-12 | 2004-09-28 | National Semiconductor Corporation | System and method for correcting offsets in an analog receiver front end |
| US6744835B1 (en) * | 2000-06-02 | 2004-06-01 | Conexant Systems, Inc. | Methods and apparatus for implementing an interpolation finite impulse response (FIR) filter for use in timing recovery |
| US6414612B1 (en) * | 2000-09-14 | 2002-07-02 | Scientific-Atlanta, Inc. | Enhanced bandwidth digitizer using multiple analog-to digital converters and self calibration |
| JP4475784B2 (ja) * | 2000-09-26 | 2010-06-09 | 株式会社アドバンテスト | A/d変換入力遅延補正装置、方法、記録媒体 |
| US6735029B2 (en) * | 2000-11-10 | 2004-05-11 | Seagate Technology Llc | Equalized response extraction from a read channel |
| US20030058148A1 (en) * | 2001-09-21 | 2003-03-27 | Sheen Timothy W. | Multiple a-to-d converter scheme employing digital crossover filter |
| US6600438B2 (en) * | 2001-10-18 | 2003-07-29 | Agilent Technologies, Inc. | Broadband IF conversion using two ADCs |
| US6744832B2 (en) * | 2002-07-23 | 2004-06-01 | George J. Miao | Analog-to-digital converter bank based ultra wideband communications |
| US6885330B2 (en) * | 2003-09-05 | 2005-04-26 | Cirrus Logic, Inc. | Data converters with ternary pulse width modulation output stages and methods and systems using the same |
| JP4544915B2 (ja) * | 2004-06-03 | 2010-09-15 | ルネサスエレクトロニクス株式会社 | 受信装置及びアナログ・ディジタル変換装置 |
-
2004
- 2004-10-29 US US10/977,833 patent/US7049992B1/en not_active Expired - Lifetime
-
2005
- 2005-08-22 DE DE102005039684A patent/DE102005039684A1/de not_active Withdrawn
- 2005-10-19 GB GB0521294A patent/GB2419482A/en not_active Withdrawn
- 2005-10-31 JP JP2005316280A patent/JP2006129499A/ja active Pending
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