JP2006059996A5 - - Google Patents
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- Publication number
- JP2006059996A5 JP2006059996A5 JP2004239822A JP2004239822A JP2006059996A5 JP 2006059996 A5 JP2006059996 A5 JP 2006059996A5 JP 2004239822 A JP2004239822 A JP 2004239822A JP 2004239822 A JP2004239822 A JP 2004239822A JP 2006059996 A5 JP2006059996 A5 JP 2006059996A5
- Authority
- JP
- Japan
- Prior art keywords
- printed wiring
- wiring board
- board
- pattern
- pad
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
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Claims (11)
前記プリント配線板に対してパターンの形成およびソルダーレジストを禁止するパターン禁止エリアを指定する手段と、
前記プリント配線板の板端から前記パターン禁止エリアを介在させた前記プリント配線板の板端近傍にパッドの配置を許容する手段と
を具備したことを特徴とするプリント配線板設計方法。 In a printed wiring board design method for performing pattern layout of a printed wiring board,
A means for designating a pattern prohibition area for prohibiting pattern formation and solder resist on the printed wiring board;
A printed wiring board design method comprising: means for allowing a pad to be arranged in the vicinity of the board end of the printed wiring board with the pattern inhibition area interposed from the board end of the printed wiring board.
前記プリント配線板に配置するパッドの前記板端に最も近い端部と前記板端との間の距離、
前記プリント配線板に配置するパッドと前記板端との間に形成可能なソルダーレジストの幅、
の少なくともいずれかが設定範囲内にあるとき前記パターン禁止エリアを介在させた前記パッドの配置を許容する請求項2記載のプリント配線板設計方法。 Means for allowing the placement of pads near the end of the printed wiring board through the pattern prohibition area from the end of the printed wiring board,
The distance between the end of the pad disposed on the printed wiring board and the end of the pad closest to the end of the board,
The width of the solder resist that can be formed between the pad placed on the printed wiring board and the board edge;
The printed wiring board design method according to claim 2, wherein the placement of the pad with the pattern prohibition area interposed is allowed when at least one of them is within a set range.
前記プリント配線板の板端にパターン形成およびソルダーレジストを禁止する領域を設け、このパターン形成およびソルダーレジストを禁止する領域を介して、パッドを前記プリント配線板の板端近傍に設けたことを特徴とするプリント配線板。 In printed wiring boards,
An area for prohibiting pattern formation and solder resist is provided at the end of the printed wiring board, and a pad is provided in the vicinity of the end of the printed wiring board via the area for prohibiting pattern formation and solder resist. Printed wiring board.
前記プリント回路板の板端にパターン形成およびソルダーレジストを禁止した領域を有して当該領域を介し前記板端の近傍に前記板端に沿って設けられた一対のパッドと、
前記一対のパッドに実装された回路部品と
を具備したことを特徴とするプリント回路板。 In printed circuit boards,
A pair of pads provided along the board edge in the vicinity of the board edge through the area having an area where pattern formation and solder resist are prohibited at the board edge of the printed circuit board;
A printed circuit board comprising circuit components mounted on the pair of pads.
前記プリント配線板に対してパターン形成およびソルダーレジストを禁止するパターン禁止エリアを指定する手段と、
前記プリント配線板の板端から前記パターン禁止エリアを介在させた前記プリント配線板の板端近傍にパッドの配置を許容する手段と
を具備したことを特徴とするプリント配線板の設計ツール。 A design tool for pattern layout of printed wiring boards,
Means for designating a pattern prohibition area for prohibiting pattern formation and solder resist on the printed wiring board;
A design tool for a printed wiring board, comprising: means for allowing a pad to be arranged in the vicinity of the board end of the printed wiring board with the pattern prohibition area interposed from the board end of the printed wiring board.
前記プリント配線板に配置するパッドの前記板端に最も近い端部と前記板端との間の距離、
前記プリント配線板に配置するパッドと前記板端との間に形成可能なソルダーレジストの幅、
の少なくともいずれかが設定範囲内にあるとき前記パターン禁止エリアを介在した前記パッドの配置を許容する請求項8記載のプリント配線板の設計ツール。 Means for allowing the placement of pads near the end of the printed wiring board through the pattern prohibition area from the end of the printed wiring board,
The distance between the end of the pad disposed on the printed wiring board and the end of the pad closest to the end of the board,
The width of the solder resist that can be formed between the pad placed on the printed wiring board and the board edge;
The printed wiring board design tool according to claim 8, wherein the arrangement of the pad through the pattern prohibition area is allowed when at least one of the patterns is within a set range.
前記制御回路基板は、当該基板の板端にパターン形成およびソルダーレジストを禁止した領域を介在して前記板端の近傍に前記板端に沿って設けた一対のパッドと、前記一対のパッドに実装された回路部品とを具備することを特徴とする電子機器。 A disk drive unit containing a recording medium, and a control circuit board for controlling the operation of the disk drive unit;
The control circuit board is mounted on a pair of pads provided along the board edge in the vicinity of the board edge through an area where pattern formation and solder resist are prohibited at the board edge of the board. An electronic device comprising: a circuit component configured as described above.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004239822A JP4709512B2 (en) | 2004-08-19 | 2004-08-19 | Electronics |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004239822A JP4709512B2 (en) | 2004-08-19 | 2004-08-19 | Electronics |
Publications (3)
Publication Number | Publication Date |
---|---|
JP2006059996A JP2006059996A (en) | 2006-03-02 |
JP2006059996A5 true JP2006059996A5 (en) | 2007-08-16 |
JP4709512B2 JP4709512B2 (en) | 2011-06-22 |
Family
ID=36107219
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2004239822A Expired - Fee Related JP4709512B2 (en) | 2004-08-19 | 2004-08-19 | Electronics |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP4709512B2 (en) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5463092B2 (en) * | 2009-07-07 | 2014-04-09 | アルプス電気株式会社 | Electronic circuit unit and manufacturing method thereof |
JP6322903B2 (en) * | 2013-05-21 | 2018-05-16 | 日本電気株式会社 | Information processing apparatus, information processing method, and program |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6298795A (en) * | 1985-10-25 | 1987-05-08 | 日本シイエムケイ株式会社 | Printed wiring board and manufacture of the same |
JPS6292679U (en) * | 1985-11-29 | 1987-06-13 | ||
JP2554542Y2 (en) * | 1992-02-17 | 1997-11-17 | 台灣杜邦股▲ふん▼有限公司 | Printed circuit board |
JP3009783B2 (en) * | 1992-05-20 | 2000-02-14 | ローム株式会社 | Manufacturing method of printed wiring board |
JPH09130013A (en) * | 1995-10-30 | 1997-05-16 | Ibiden Co Ltd | Fabrication of printed wiring board and substrate for multiple patterns |
-
2004
- 2004-08-19 JP JP2004239822A patent/JP4709512B2/en not_active Expired - Fee Related
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