JP2006042349A - Cmlバッファ用のコモンモード・シフティング回路 - Google Patents
Cmlバッファ用のコモンモード・シフティング回路 Download PDFInfo
- Publication number
- JP2006042349A JP2006042349A JP2005213960A JP2005213960A JP2006042349A JP 2006042349 A JP2006042349 A JP 2006042349A JP 2005213960 A JP2005213960 A JP 2005213960A JP 2005213960 A JP2005213960 A JP 2005213960A JP 2006042349 A JP2006042349 A JP 2006042349A
- Authority
- JP
- Japan
- Prior art keywords
- current
- voltage
- output
- logic circuit
- output port
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/0264—Arrangements for coupling to transmission lines
- H04L25/028—Arrangements specific to the transmitter end
- H04L25/0282—Provision for current-mode coupling
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
- H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
- H03K19/09432—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors with coupled sources or source coupled logic
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/0264—Arrangements for coupling to transmission lines
- H04L25/0272—Arrangements for coupling to multiple lines, e.g. for differential transmission
- H04L25/0274—Arrangements for ensuring balanced coupling
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Logic Circuits (AREA)
- Amplifiers (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US59062404P | 2004-07-23 | 2004-07-23 | |
| US11/141,337 US7355451B2 (en) | 2004-07-23 | 2005-05-31 | Common-mode shifting circuit for CML buffers |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2006042349A true JP2006042349A (ja) | 2006-02-09 |
| JP2006042349A5 JP2006042349A5 (enExample) | 2008-09-04 |
Family
ID=35656470
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2005213960A Pending JP2006042349A (ja) | 2004-07-23 | 2005-07-25 | Cmlバッファ用のコモンモード・シフティング回路 |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US7355451B2 (enExample) |
| JP (1) | JP2006042349A (enExample) |
| KR (1) | KR101121460B1 (enExample) |
| TW (1) | TWI434512B (enExample) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2010273009A (ja) * | 2009-05-20 | 2010-12-02 | Toshiba Corp | 電圧変換回路および無線通信装置 |
| US9479172B2 (en) | 2015-01-22 | 2016-10-25 | Megachips Corporation | Differential output buffer |
Families Citing this family (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3874733B2 (ja) * | 2003-02-28 | 2007-01-31 | 富士通株式会社 | 高速入力信号の受信回路 |
| US20080061837A1 (en) * | 2006-08-25 | 2008-03-13 | Parade Technologies, Ltd. | Low Supply Voltage, Large Output Swing, Source-Terminated Output Driver for High Speed AC-coupled Double-Termination Serial Links |
| US7579881B2 (en) * | 2007-11-14 | 2009-08-25 | Infineon Technologies Ag | Write driver circuit |
| KR20130026218A (ko) * | 2011-09-05 | 2013-03-13 | 삼성전기주식회사 | 홀 플레이트 스위칭 시스템 |
| KR102073367B1 (ko) | 2014-07-07 | 2020-02-05 | 한국전자통신연구원 | 버퍼 증폭기 및 버퍼 증폭기를 포함하는 트랜스 임피던스 증폭기 |
| US9614530B2 (en) * | 2014-12-12 | 2017-04-04 | Samsung Display Co., Ltd. | Fast fall and rise time current mode logic buffer |
| US9225332B1 (en) * | 2015-04-08 | 2015-12-29 | Xilinx, Inc. | Adjustable buffer circuit |
| US10712769B2 (en) | 2017-08-16 | 2020-07-14 | Oracle International Corporation | Method and apparatus for clock signal distribution |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH05226950A (ja) * | 1992-02-14 | 1993-09-03 | Asahi Kasei Micro Syst Kk | 全差動増幅器 |
| JPH08288761A (ja) * | 1995-04-10 | 1996-11-01 | Fujitsu Ltd | 差動増幅&出力オフセット回路及びこれを備えた半導体集積回路並びにノイズ除去方法 |
| JP2001339259A (ja) * | 2000-05-30 | 2001-12-07 | Oki Electric Ind Co Ltd | 差動増幅回路及び半導体集積回路装置 |
| JP2003124788A (ja) * | 2001-10-16 | 2003-04-25 | Denso Corp | 増幅回路および波形整形回路 |
Family Cites Families (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4806796A (en) * | 1988-03-28 | 1989-02-21 | Motorola, Inc. | Active load for emitter coupled logic gate |
| US4868423A (en) * | 1988-05-02 | 1989-09-19 | Motorola, Inc. | Current mode logic gate |
| US5309039A (en) * | 1992-09-29 | 1994-05-03 | Motorola, Inc. | Power supply dependent input buffer |
| US5909127A (en) | 1995-12-22 | 1999-06-01 | International Business Machines Corporation | Circuits with dynamically biased active loads |
| GB9707349D0 (en) | 1997-04-11 | 1997-05-28 | Univ Waterloo | A dynamic current mode logic family |
| US5856757A (en) * | 1997-06-11 | 1999-01-05 | Philips Electronics North America Corporation | gm-C cell with two stage common mode control and current boost |
| US5977800A (en) | 1997-10-20 | 1999-11-02 | Vlsi Technology, Inc. | Differential MOS current-mode logic circuit having high gain and fast speed |
| US6366140B1 (en) | 1999-07-01 | 2002-04-02 | Vitesse Semiconductor Corporation | High bandwidth clock buffer |
| TW518642B (en) * | 2000-06-27 | 2003-01-21 | Semiconductor Energy Lab | Level shifter |
| US6353338B1 (en) | 2000-09-28 | 2002-03-05 | Lsi Logic Corporation | Reduced-swing differential output buffer with idle function |
| US6677784B2 (en) | 2000-12-28 | 2004-01-13 | International Business Machines Corporation | Low voltage bipolar logic and gate device |
| US6762624B2 (en) | 2002-09-03 | 2004-07-13 | Agilent Technologies, Inc. | Current mode logic family with bias current compensation |
-
2005
- 2005-05-31 US US11/141,337 patent/US7355451B2/en not_active Expired - Fee Related
- 2005-07-22 KR KR1020050066707A patent/KR101121460B1/ko not_active Expired - Fee Related
- 2005-07-22 TW TW094124993A patent/TWI434512B/zh not_active IP Right Cessation
- 2005-07-25 JP JP2005213960A patent/JP2006042349A/ja active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH05226950A (ja) * | 1992-02-14 | 1993-09-03 | Asahi Kasei Micro Syst Kk | 全差動増幅器 |
| JPH08288761A (ja) * | 1995-04-10 | 1996-11-01 | Fujitsu Ltd | 差動増幅&出力オフセット回路及びこれを備えた半導体集積回路並びにノイズ除去方法 |
| JP2001339259A (ja) * | 2000-05-30 | 2001-12-07 | Oki Electric Ind Co Ltd | 差動増幅回路及び半導体集積回路装置 |
| JP2003124788A (ja) * | 2001-10-16 | 2003-04-25 | Denso Corp | 増幅回路および波形整形回路 |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2010273009A (ja) * | 2009-05-20 | 2010-12-02 | Toshiba Corp | 電圧変換回路および無線通信装置 |
| US9479172B2 (en) | 2015-01-22 | 2016-10-25 | Megachips Corporation | Differential output buffer |
Also Published As
| Publication number | Publication date |
|---|---|
| TW200629726A (en) | 2006-08-16 |
| US7355451B2 (en) | 2008-04-08 |
| US20060017468A1 (en) | 2006-01-26 |
| TWI434512B (zh) | 2014-04-11 |
| KR101121460B1 (ko) | 2012-03-15 |
| KR20060092833A (ko) | 2006-08-23 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20080723 |
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| A621 | Written request for application examination |
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| A977 | Report on retrieval |
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| A131 | Notification of reasons for refusal |
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| A601 | Written request for extension of time |
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| A602 | Written permission of extension of time |
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| A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20120217 |
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