JP2006042349A - Cmlバッファ用のコモンモード・シフティング回路 - Google Patents

Cmlバッファ用のコモンモード・シフティング回路 Download PDF

Info

Publication number
JP2006042349A
JP2006042349A JP2005213960A JP2005213960A JP2006042349A JP 2006042349 A JP2006042349 A JP 2006042349A JP 2005213960 A JP2005213960 A JP 2005213960A JP 2005213960 A JP2005213960 A JP 2005213960A JP 2006042349 A JP2006042349 A JP 2006042349A
Authority
JP
Japan
Prior art keywords
current
voltage
output
logic circuit
output port
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2005213960A
Other languages
English (en)
Japanese (ja)
Other versions
JP2006042349A5 (enExample
Inventor
Kameran Azadet
アザデット カムラン
Fuji Yang
ヤング フジ
Chunbing Guo
グオ チュンビン
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Agere Systems LLC
Original Assignee
Agere Systems LLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Agere Systems LLC filed Critical Agere Systems LLC
Publication of JP2006042349A publication Critical patent/JP2006042349A/ja
Publication of JP2006042349A5 publication Critical patent/JP2006042349A5/ja
Pending legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175Coupling arrangements; Interface arrangements
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/0264Arrangements for coupling to transmission lines
    • H04L25/028Arrangements specific to the transmitter end
    • H04L25/0282Provision for current-mode coupling
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/09432Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors with coupled sources or source coupled logic
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/0264Arrangements for coupling to transmission lines
    • H04L25/0272Arrangements for coupling to multiple lines, e.g. for differential transmission
    • H04L25/0274Arrangements for ensuring balanced coupling

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Logic Circuits (AREA)
  • Amplifiers (AREA)
JP2005213960A 2004-07-23 2005-07-25 Cmlバッファ用のコモンモード・シフティング回路 Pending JP2006042349A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US59062404P 2004-07-23 2004-07-23
US11/141,337 US7355451B2 (en) 2004-07-23 2005-05-31 Common-mode shifting circuit for CML buffers

Publications (2)

Publication Number Publication Date
JP2006042349A true JP2006042349A (ja) 2006-02-09
JP2006042349A5 JP2006042349A5 (enExample) 2008-09-04

Family

ID=35656470

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2005213960A Pending JP2006042349A (ja) 2004-07-23 2005-07-25 Cmlバッファ用のコモンモード・シフティング回路

Country Status (4)

Country Link
US (1) US7355451B2 (enExample)
JP (1) JP2006042349A (enExample)
KR (1) KR101121460B1 (enExample)
TW (1) TWI434512B (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010273009A (ja) * 2009-05-20 2010-12-02 Toshiba Corp 電圧変換回路および無線通信装置
US9479172B2 (en) 2015-01-22 2016-10-25 Megachips Corporation Differential output buffer

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3874733B2 (ja) * 2003-02-28 2007-01-31 富士通株式会社 高速入力信号の受信回路
US20080061837A1 (en) * 2006-08-25 2008-03-13 Parade Technologies, Ltd. Low Supply Voltage, Large Output Swing, Source-Terminated Output Driver for High Speed AC-coupled Double-Termination Serial Links
US7579881B2 (en) * 2007-11-14 2009-08-25 Infineon Technologies Ag Write driver circuit
KR20130026218A (ko) * 2011-09-05 2013-03-13 삼성전기주식회사 홀 플레이트 스위칭 시스템
KR102073367B1 (ko) 2014-07-07 2020-02-05 한국전자통신연구원 버퍼 증폭기 및 버퍼 증폭기를 포함하는 트랜스 임피던스 증폭기
US9614530B2 (en) * 2014-12-12 2017-04-04 Samsung Display Co., Ltd. Fast fall and rise time current mode logic buffer
US9225332B1 (en) * 2015-04-08 2015-12-29 Xilinx, Inc. Adjustable buffer circuit
US10712769B2 (en) 2017-08-16 2020-07-14 Oracle International Corporation Method and apparatus for clock signal distribution

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05226950A (ja) * 1992-02-14 1993-09-03 Asahi Kasei Micro Syst Kk 全差動増幅器
JPH08288761A (ja) * 1995-04-10 1996-11-01 Fujitsu Ltd 差動増幅&出力オフセット回路及びこれを備えた半導体集積回路並びにノイズ除去方法
JP2001339259A (ja) * 2000-05-30 2001-12-07 Oki Electric Ind Co Ltd 差動増幅回路及び半導体集積回路装置
JP2003124788A (ja) * 2001-10-16 2003-04-25 Denso Corp 増幅回路および波形整形回路

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4806796A (en) * 1988-03-28 1989-02-21 Motorola, Inc. Active load for emitter coupled logic gate
US4868423A (en) * 1988-05-02 1989-09-19 Motorola, Inc. Current mode logic gate
US5309039A (en) * 1992-09-29 1994-05-03 Motorola, Inc. Power supply dependent input buffer
US5909127A (en) 1995-12-22 1999-06-01 International Business Machines Corporation Circuits with dynamically biased active loads
GB9707349D0 (en) 1997-04-11 1997-05-28 Univ Waterloo A dynamic current mode logic family
US5856757A (en) * 1997-06-11 1999-01-05 Philips Electronics North America Corporation gm-C cell with two stage common mode control and current boost
US5977800A (en) 1997-10-20 1999-11-02 Vlsi Technology, Inc. Differential MOS current-mode logic circuit having high gain and fast speed
US6366140B1 (en) 1999-07-01 2002-04-02 Vitesse Semiconductor Corporation High bandwidth clock buffer
TW518642B (en) * 2000-06-27 2003-01-21 Semiconductor Energy Lab Level shifter
US6353338B1 (en) 2000-09-28 2002-03-05 Lsi Logic Corporation Reduced-swing differential output buffer with idle function
US6677784B2 (en) 2000-12-28 2004-01-13 International Business Machines Corporation Low voltage bipolar logic and gate device
US6762624B2 (en) 2002-09-03 2004-07-13 Agilent Technologies, Inc. Current mode logic family with bias current compensation

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05226950A (ja) * 1992-02-14 1993-09-03 Asahi Kasei Micro Syst Kk 全差動増幅器
JPH08288761A (ja) * 1995-04-10 1996-11-01 Fujitsu Ltd 差動増幅&出力オフセット回路及びこれを備えた半導体集積回路並びにノイズ除去方法
JP2001339259A (ja) * 2000-05-30 2001-12-07 Oki Electric Ind Co Ltd 差動増幅回路及び半導体集積回路装置
JP2003124788A (ja) * 2001-10-16 2003-04-25 Denso Corp 増幅回路および波形整形回路

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010273009A (ja) * 2009-05-20 2010-12-02 Toshiba Corp 電圧変換回路および無線通信装置
US9479172B2 (en) 2015-01-22 2016-10-25 Megachips Corporation Differential output buffer

Also Published As

Publication number Publication date
TW200629726A (en) 2006-08-16
US7355451B2 (en) 2008-04-08
US20060017468A1 (en) 2006-01-26
TWI434512B (zh) 2014-04-11
KR101121460B1 (ko) 2012-03-15
KR20060092833A (ko) 2006-08-23

Similar Documents

Publication Publication Date Title
US6867618B2 (en) Voltage mode differential driver and method
US6900663B1 (en) Low voltage differential signal driver circuit and method
KR101965788B1 (ko) 단일 종단형 구성가능한 다중 모드 드라이버
US7560957B2 (en) High-speed CML circuit design
JP5502469B2 (ja) 多用途でコンパクトなdc結合cmlバッファ
US7598779B1 (en) Dual-mode LVDS/CML transmitter methods and apparatus
JPH08250995A (ja) 出力回路
CN102664619A (zh) 具有可控输出摆幅的电压模式驱动器
AU717718B2 (en) Universal sender device
JP2006042349A (ja) Cmlバッファ用のコモンモード・シフティング回路
JP4097149B2 (ja) 差動駆動回路およびそれを内蔵する電子機器
US8441281B2 (en) Current-mode logic buffer with enhanced output swing
US7471110B2 (en) Current mode interface for off-chip high speed communication
US20090154591A1 (en) High-speed serial data signal transmitter driver circuitry
JP4237402B2 (ja) 対称送信ライン駆動用出力バッファ
JP2004253859A (ja) 電流ドライバ回路
US7352221B1 (en) Programmable amplifiers with positive and negative hysteresis
US7746121B2 (en) Ultra low power LVDS driver with built in impedance termination to supply and ground rails
US6509765B1 (en) Selectable resistor and/or driver for an integrated circuit with a linear resistance
JP2536965B2 (ja) Eclコンパチブル論理レベルを発生する高速cmos論理デバイス
US20080136465A1 (en) Semiconductor integrated circuit
US20130328591A1 (en) Voltage mode driver with current booster (vmdcb)
US20010024137A1 (en) Driver circuit
US6496070B2 (en) Buffer circuit comprising load, follower transistor and current source connected in series
US6930530B1 (en) High-speed receiver for high I/O voltage and low core voltage

Legal Events

Date Code Title Description
A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20080723

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20080723

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20110811

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20110817

A601 Written request for extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A601

Effective date: 20111117

A602 Written permission of extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A602

Effective date: 20111122

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20120217

A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 20120704