JP2006032492A - Semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To realize an electronic component package that hermetically seals a substrate mounting an electronic component thereon without compromising the strength reliability of the substrate to external forces and, in addition, has a small mounting area. <P>SOLUTION: A semiconductor device includes a board 1 mounting the electronic component thereon, a cap 4 covering the electronic component, and a joint 2 formed by joining the board section 1 and cap section 4 to each other and seals a housing space 3 housing the electronic component. On at least one of the joint surfaces of the board 1 and cap 4 facing the joint 2, a projected-recessed section having a corner 14 is formed. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a semiconductor device, and more particularly to a package for sealing an accommodation space for accommodating an electronic component.

  In an electronic component package in a conventional semiconductor device, an electronic component is mounted on a ceramic substrate, the electronic component mounting portion is covered with a metal or ceramic lid member, and the accommodation space for accommodating the electronic component is hermetically sealed. ing. Further, at the time of sealing, a metallized layer is formed on the surface of the substrate, and the metallized layer and the lid member are joined with a brazing material (see, for example, Patent Document 1). When joining with the brazing material, thermal stress may be generated between the ceramic substrate and the metallized layer, and peeling may occur. In order to prevent this peeling, in the electronic component package shown in Patent Document 1, the thickness of the outer edge portion of the metallized layer is increased, the bonding strength between the ceramic substrate and the metallized layer is improved, and the electronic component is mounted by the lid member. The ceramic substrate is hermetically sealed, and the electronic components are operated normally and stably over a long period of time.

JP 2001-127180 A (page 6, FIG. 1)

  In the semiconductor device as described above, the separation of the substrate component due to the thermal stress when bonding the substrate and the lid is considered, but the bonding strength at the interface between the brazing material and the metallized layer, or the brazing It is assumed that the bonding strength between the material and the lid does not change. Moreover, the starting point of peeling is the outer peripheral part of the sealing, and peeling from the inside of the sealing is not considered. In addition, in order to increase the bonding strength at the bonding interface, it is necessary to increase the bonding width, which increases the mounting area of the electronic component package.

  The present invention has been made to solve such a problem, and is an electronic component package that hermetically seals a substrate on which an electronic component is mounted and does not impair strength reliability against external force and has a small mounting area. The purpose is to obtain a device that can realize the above.

  A semiconductor device according to the present invention joins a plate portion on which an electronic component is mounted, a lid portion that covers the electronic component, the plate portion and the lid portion, and seals a housing space that houses the electronic component. In a semiconductor device including a bonding portion, an uneven portion having a corner portion is formed on at least one of the bonding surfaces of the plate portion facing the bonding portion or the bonding surface of the lid portion facing the bonding portion. It is a thing.

  In the semiconductor device according to the present invention, since the uneven portion having the corners is formed on the bonding surface between the plate portion and the lid portion, there is an effect of increasing the bonding area without changing the bonding width, and the bonding strength is improved. . Further, the bonding width can be reduced as the bonding strength is improved, and the apparatus can be downsized. Further, by providing the corner portion, it is possible to keep the progress of the peeling at the corner portion even if the interface peeling occurs, and it is possible to hermetically seal the substrate on which the electronic component is mounted.

Embodiment 1 FIG.
1 is a cross-sectional configuration diagram showing a semiconductor device according to a first embodiment of the present invention. In FIG. 1, the semiconductor device includes a plate portion 1 on which electronic components are mounted, a lid portion 4 that covers the electronic components, a plate portion 1 and the lid portion 4, and an accommodation space 3 that accommodates the electronic components. It is comprised by the junction part 2 to seal. Moreover, the board part 1 which faces the junction part 2 has an unevenness | corrugation, and is equipped with the concave-shaped junction surface in FIG. The lid portion 4 facing the joint portion 2 is also uneven, and in FIG. 1, it has a convex joint surface that fits with the concave joint surface of the plate portion 1. The joint portion 2 is provided between the convex joint surface and the concave joint surface, and is configured to seal the accommodating space 3 surrounded by the plate portion 1 and the lid portion 4 in an airtight manner. Yes. The member which comprises the junction part 2 is comprised by the single member, for example, is comprised by the laminated body etc. of nickel. Both the concave portion formed on the joint surface of the plate portion 1 and the convex portion formed on the joint surface of the lid portion 4 are formed of a single member.

  FIG. 2 is a diagram for explaining the bonding surface of the semiconductor device according to the present embodiment in comparison with the bonding surface of a conventional semiconductor device. Since the conventional joint surface needs to maintain the airtightness of the electronic component housing space, as shown in FIG. 2A, the entire joint surface is usually a flat surface and is flush with the electronic component mounting surface. It is. In FIG. 2A, when the plate member is subjected to bending deformation or external force, a force for opening the interface of the joint 2 which is the weakest portion is generated. For example, the force that opens the interface of the joint portion 2 is concentrated on the end portion 6 of the interface between the joint portion 2 and the joint surface of the plate portion 1, and the interface peeling 7 occurs from the interface end portion 6. FIG. 2B shows a state after the interfacial peeling. When the interfacial debonding 7 occurs, the interfacial debonding 7 progresses in some cases, leading to a final breakage, and there is a concern that the airtightness of the semiconductor device is impaired. For this reason, it has been necessary to increase the bonding area to increase the bonding strength and prevent the final breakage.

  In the present embodiment, as shown in FIG. 2C, a concave portion and a convex portion having a triangular cross section are provided on the joint surface of the plate portion 1 and the joint surface of the lid portion 4, respectively. FIG. 2C shows a case where a concave portion is provided on the joint surface of the plate portion 1 and a convex portion is provided on the joint surface of the lid portion 4, and the joint surface between the joint portions of the plate portion 1 and the lid portion 4 is shown by the joint portion 2. Seal. In this way, the bonding width does not change, but the vertical cross section of the bonding portion 2 is constituted by the sides 8 and 9, and the interface between the plate portion 1 and the bonding portion 2 and the interface between the bonding portion 2 and the lid portion 4 are as follows. Since each is composed of two joint surfaces, the joint area increases. In other words, the bonding width can be reduced while maintaining the strength of the conventional structure, and the device can be downsized.

  The main stress 5 that opens the interface between the plate portion 1 and the lid portion 4 works in a direction perpendicular to the joint surface as shown in FIG. 2A in the conventional structure. Then, as shown in FIG. 2C, the main stress 5 is decomposed in two directions perpendicular to the sides 8 and 9 and acts as stress 10 on each joint surface. Since the stress 10 is smaller than the main stress 5 and is relaxed, the effect of suppressing the occurrence of interface peeling can be obtained. Therefore, the joint surface made of the inclined side 8 has an effect of suppressing the occurrence of interface peeling from the starting point 11, and the joint surface made of the inclined side 9 has an effect of suppressing the occurrence of interface peeling from the starting point 12, The degree of the effect of suppressing the occurrence of interfacial peeling varies depending on the degree of inclination between the sides 8 and 9.

  In addition, as shown in FIG. 2D, even when the interface peeling 13 occurs, the joining surface has the corner portion 14, and therefore the traveling direction of the interface peeling 13 changes at the corner portion 14, and the interface peeling occurs. The effect of stopping the progression of 13 is obtained. That is, it is possible to obtain a structure in which the interface before the interface peeling 13 reaches the corner portion 14 and the interface after the interface peeling 13 reaches the corner portion 14 are different from each other. It becomes possible to fasten at the position.

In FIG. 2 (d), the interfacial delamination 13 has occurred at the bonding surface between the plate portion 1 and the bonding portion 2. appear. In the present embodiment, since the shape of both joint surfaces is the same shape, the same effect can be obtained for interfacial peeling that occurs on the joint surface between the lid 4 and the joint 2.
In the present embodiment, since the concave portion formed on the bonding surface of the plate portion 1 and the convex portion formed on the bonding surface of the lid portion 4 are both formed of a single member, the interface is perpendicular to the main stress. And the occurrence of interfacial peeling can be suppressed.

Embodiment 2. FIG.
FIG. 3 is a cross-sectional configuration diagram illustrating a bonding surface of the semiconductor device according to the second embodiment. In FIG. 3, the same reference numerals as those in FIG. 2 denote the same or corresponding parts.
In the second embodiment, trapezoidal concave and convex portions are provided on the bonding surface of the plate portion 1 and the bonding surface of the lid portion 4, respectively. When the vertical cross-sectional shape of the joint surface is trapezoidal as shown in FIG. 3, there is an advantage that the depth of the concave portion can be made shallower and the height of the convex portion can be made lower than the shape described in the first embodiment. Further, the joint surface composed of the inclined side 8 has an effect of suppressing the occurrence of interface peeling from the starting point 11, and the joint surface composed of the inclined side 9 has an effect of suppressing the occurrence of interface peeling from the starting point 12, Further, the trapezoidal corner portions 14 and 15 have an effect of stopping the progress of the interface peeling. These effects are the same as those in the first embodiment, and operate in the same manner as in the triangular shape.

Embodiment 3 FIG.
FIGS. 4A, 4B, and 4C are cross-sectional configuration diagrams illustrating a bonding surface of the semiconductor device according to the third embodiment. In FIG. 4, the same reference numerals as those in FIG. 2 are the same or equivalent.
In this Embodiment 3, when providing an uneven | corrugated | grooved part in the joint surface of the board part 1 and the cover part 4, as shown to FIG. 4 (a) (b), it is biased to one edge part of the said joint surface. An uneven portion having a triangular cross section or an uneven portion having a trapezoidal cross section is disposed. When it is clear that the starting point of interfacial delamination is on one side of the joint surface, the uneven portion having the effect of suppressing the occurrence of interfacial delamination is arranged so as to be biased toward the end surface where interfacial delamination occurs. Also good. The joint surface formed by the inclined side 8 has an effect of suppressing the occurrence of interface peeling from the starting point 11, and the corner portions 14, 15, 16 have the effect of stopping the progress of the interface peeling.
In addition, as shown in FIG.4 (c), you may make it provide an uneven | corrugated | grooved part with a rectangular cross section in an end surface. In this case, the corner portions 14, 15, and 16 have an effect of stopping the progress of the interface peeling.

Embodiment 4 FIG.
FIGS. 5A, 5B, and 5C are cross-sectional configuration diagrams showing the bonding surface of the semiconductor device according to the fourth embodiment. In FIG. 5, the same reference numerals as those in FIG. 2 are the same or equivalent.
In the case where only the effect of stopping the progress of the interfacial peeling is required, the position of the concavo-convex portion does not necessarily have to be at the end of the joint surface. For example, as shown in FIG. 5A, a triangular uneven portion is provided at the center of the joint surface, and the joint surface formed by the inclined sides 8 and 9 may not be located at the end of the joint surface. . In this case, the end portion of the joint surface is horizontal, and the main stress 5 that opens the interface between the plate portion 1 and the lid portion 4 works in the direction perpendicular to the joint surface at the end portion, so that a large force is involved, and the starting point 11 There is a risk that interface peeling will occur from the starting point 12. In the case where interface peeling occurs from the starting points 11 and 12, in the present embodiment, as shown in FIG. 5A, there is a triangular uneven portion at the center of the bonding surface, and the corners are located in the middle of the bonding surface. Since it has the parts 14, 15, 16, the interfacial delamination continues at the corner parts 14, 15, 16. As a result, it is possible to hermetically seal the substrate on which the electronic component is mounted without impairing strength reliability against external force or the like.

  5 (b) and 5 (c), the cross-sectional shape of the concavo-convex portion is a trapezoidal or rectangular shape, but even with such a configuration, the interfacial delamination stops at the corner portions 14, 15, 16, and 17. Have the same effect.

Embodiment 5. FIG.
6 (a) and 6 (b) are cross-sectional configuration diagrams showing the bonding surface of the semiconductor device according to the fifth embodiment. In FIG. 6, the same reference numerals as those in FIG. 2 denote the same or corresponding parts.
In the fifth embodiment, as in the first embodiment or the second embodiment, the bonding surface of the plate portion 1 and the bonding surface of the lid portion 4 are provided with uneven portions having a triangular or trapezoidal cross section, respectively. In the case of the present embodiment, the vertical cross-sectional shape of the joint surface of the plate portion 1 is convex, and the vertical cross-sectional shape of the joint surface of the lid portion 4 is concave.
Even if it does in this way, like Embodiment 1 and Embodiment 2, while it becomes possible to suppress generation | occurrence | production of interface peeling, there exists an effect which stops progress of interface peeling.

  Also, with respect to the configurations shown in the third and fourth embodiments, the concavo-convex portion is reversed, that is, the vertical cross-sectional shape of the joint surface of the plate portion 1 is convex, and the vertical cross-section of the joint surface of the lid portion 4 The shape may be concave, and the same effects as those shown in the third and fourth embodiments are obtained.

Embodiment 6 FIG.
FIGS. 7A, 7B, and 7C are cross-sectional configuration diagrams illustrating the bonding surface of the semiconductor device according to the sixth embodiment. In FIG. 7, the same reference numerals as those in FIG. 2 are the same or equivalent.
Although the uneven portion in the first to fifth embodiments is a single uneven portion, a plurality of uneven portions may be formed as shown in FIG.
In such a configuration, there are many points that keep the progress of the interfacial peeling more than the case of a single unevenness. Therefore, the effect of stopping the progress of interfacial peeling increases.

Embodiment 7 FIG.
8 (a) to 8 (f) are cross-sectional configuration diagrams showing the bonding surface of the semiconductor device according to the seventh embodiment. In FIG. 8, the same reference numerals as those in FIG. 2 are the same or equivalent.
The concavo-convex portions in the first to sixth embodiments are provided on the joint surfaces of both the plate portion 1 and the lid portion 4, but interface peeling occurs when the plate portion 1 and the lid portion 4 are joined by the joint portion 2. When the joining surface that occurs is clear, unevenness is formed only on the joining surface of the plate portion 1 and the joining surface of the lid portion 4 where surface peeling occurs, and the joining surface that is difficult to cause interface peeling is a flat surface. Also good. The joint surface 18 (plane) on which interface peeling is unlikely to occur and the joint surface on which interface peeling is likely to occur (unevenness is formed) are joined by the joint 2.
Note that the operation for suppressing the occurrence of interfacial peeling and the operation for stopping the progress of interfacial peeling are the same as those described in Embodiment 1 on the bonding surface where the unevenness is formed.

1 is a cross-sectional configuration diagram illustrating a semiconductor device according to a first embodiment of the present invention. It is a figure explaining the junction surface of the semiconductor device by Embodiment 1 of this invention compared with the junction surface of the conventional semiconductor device. It is a cross-sectional block diagram which shows the joint surface of the semiconductor device by Embodiment 2 of this invention. It is a cross-sectional block diagram which shows the joint surface of the semiconductor device by Embodiment 3 of this invention. It is a cross-sectional block diagram which shows the joint surface of the semiconductor device by Embodiment 4 of this invention. It is a cross-sectional block diagram which shows the joint surface of the semiconductor device by Embodiment 5 of this invention. It is a cross-sectional block diagram which shows the joint surface of the semiconductor device by Embodiment 6 of this invention. It is a cross-sectional block diagram which shows the joint surface of the other semiconductor device by Embodiment 7 of this invention.

Explanation of symbols

  1 plate part, 2 joint part, 3 accommodation space, 4 cover part.

Claims (6)

A semiconductor device comprising: a plate portion on which an electronic component is mounted; a lid portion that covers the electronic component; and a joint portion that joins the plate portion and the lid portion and seals a housing space that houses the electronic component. In the semiconductor device, an uneven portion having a corner is formed on at least one of the bonding surfaces of the plate portion facing the bonding portion or the bonding surface of the lid portion facing the bonding portion. . 2. The semiconductor device according to claim 1, wherein the uneven portion is constituted by a single member. 2. The semiconductor device according to claim 1, wherein the concavo-convex portion has a vertical cross-sectional shape including a triangular shape. The semiconductor device according to claim 1, wherein the concavo-convex portion has a vertical cross-sectional shape including a trapezoid. The semiconductor device according to claim 1, wherein the concavo-convex portion has a vertical cross-sectional shape including a rectangle. The semiconductor device according to claim 1, wherein the uneven portion has a plurality of uneven portions.

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