WO2021009970A1 - Semiconductor module - Google Patents

Semiconductor module Download PDF

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Publication number
WO2021009970A1
WO2021009970A1 PCT/JP2020/012580 JP2020012580W WO2021009970A1 WO 2021009970 A1 WO2021009970 A1 WO 2021009970A1 JP 2020012580 W JP2020012580 W JP 2020012580W WO 2021009970 A1 WO2021009970 A1 WO 2021009970A1
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WO
WIPO (PCT)
Prior art keywords
cap
semiconductor element
substrate
upper plate
semiconductor module
Prior art date
Application number
PCT/JP2020/012580
Other languages
French (fr)
Japanese (ja)
Inventor
利克 大櫃
Original Assignee
株式会社村田製作所
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社村田製作所 filed Critical 株式会社村田製作所
Priority to JP2021532675A priority Critical patent/JP7143951B2/en
Publication of WO2021009970A1 publication Critical patent/WO2021009970A1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/02—Containers; Seals
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
    • H03B5/00—Generation of oscillations using amplifier with regenerative feedback from output to input
    • H03B5/30—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element being electromechanical resonator
    • H03B5/32—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element being electromechanical resonator being a piezoelectric resonator

Definitions

  • the present invention relates to a semiconductor module.
  • Patent Document 1 describes a semiconductor module having a crystal oscillator, an accommodating member, and a semiconductor element. At least a part of the upper surface of the accommodating member is made of a metal member, and the crystal oscillator is accommodated in the internal space. The semiconductor element is laminated on the accommodating member so as to cover the metal member.
  • the semiconductor element may be deformed according to a difference in the coefficient of thermal expansion between the semiconductor element and the accommodating member when heat is applied. ..
  • the temperature characteristics of the semiconductor element may change.
  • An object of the present invention is to provide a semiconductor module capable of suppressing deformation of a semiconductor element when heat is applied.
  • the semiconductor module on one side of the present invention comprises a first substrate, an electronic component mounted on the first substrate, an upper plate provided on the first substrate and covering the electronic component, and a periphery of the upper plate.
  • a first cap including a surrounding wall portion, a semiconductor element provided facing the upper plate and having a larger area than the first cap in a plan view from a direction perpendicular to the first substrate, and the first cap. It has an adhesive member which is provided between one cap and the semiconductor element and has a fillet having a hem extending from the first cap toward the semiconductor element.
  • the semiconductor module of the present invention it is possible to suppress deformation of the semiconductor element when heat is applied.
  • FIG. 1 is a cross-sectional view showing the configuration of the semiconductor module according to the first embodiment.
  • FIG. 2 is a cross-sectional view showing a laminated structure of a crystal oscillator, a first accommodating member, and a semiconductor element.
  • FIG. 3 is a plan view schematically showing the relationship between the crystal oscillator, the first accommodating member, the adhesive member, and the semiconductor element.
  • FIG. 4 is a graph showing changes in the amount of warpage of semiconductor elements before and after the reflow process in the semiconductor module according to the embodiment.
  • FIG. 5 is a graph showing changes in the amount of warpage of semiconductor elements before and after the reflow process in the semiconductor module according to the comparative example.
  • FIG. 6 is a cross-sectional view showing a laminated structure of a crystal oscillator, a first accommodating member, and a semiconductor element of the semiconductor module according to the second embodiment.
  • FIG. 7 is a plan view schematically showing the semiconductor module according to the third embodiment.
  • FIG. 1 is a cross-sectional view showing the configuration of the semiconductor module according to the first embodiment.
  • the semiconductor module 10 includes a first accommodating member 12, a crystal oscillator 20, an adhesive member 30, a semiconductor element 40, and a second accommodating member 50.
  • the semiconductor module 10 according to the first embodiment is, for example, a temperature-compensated crystal oscillator (Temperature Compensated Crystal Oscillator, hereinafter may be referred to as “TCXO”) in which a crystal oscillator 20 is mounted as an electronic component.
  • TCXO Temperature Compensated Crystal Oscillator
  • the first accommodating member 12 includes a first substrate 13 and a first cap 14.
  • the first substrate 13 is a flat plate-shaped insulating substrate, and is a ceramic substrate such as an alumina substrate.
  • the first cap 14 is a concave metal housing, and the first substrate 13 side (lower side) is open.
  • the crystal oscillator 20 is provided in a space surrounded by the first substrate 13 and the first cap 14.
  • the semiconductor element 40 is laminated on the first accommodating member 12 so as to cover the first cap 14 of the first accommodating member 12.
  • the semiconductor element 40 is adhered to the first accommodating member 12 by the adhesive member 30.
  • the semiconductor element 40 is, for example, an IC (Integrated Circuit), and includes, for example, various circuits such as an oscillation circuit and a temperature compensation circuit constituting the TCXO.
  • the temperature compensation circuit is a circuit that controls the oscillation frequency of the TCXO to be constant even if the temperature changes.
  • the adhesive member 30 is, for example, a resin for die bonding, and a silicone resin is used.
  • the adhesive member 30 is a material having flexibility that can be deformed when a force is applied, and has a tensile elastic modulus smaller than that of the first cap 14 and the semiconductor element 40.
  • the adhesive member 30 is not limited to the silicone resin, and may be an epoxy resin, or may be a conductive silicone adhesive or an epoxy resin containing a conductive filler (metal powder such as silver powder). ..
  • the detailed laminated structure of the first accommodating member 12, the crystal oscillator 20, the adhesive member 30, and the semiconductor element 40 will be described later.
  • the second accommodating member 50 includes a second substrate 51 and a second cap 52.
  • the second substrate 51 is a flat plate-shaped insulating substrate, and is a ceramic substrate such as an alumina substrate.
  • the first substrate 13 is mounted on the second substrate 51. That is, the first substrate 13, the crystal oscillator 20, the first cap 14, the adhesive member 30, and the semiconductor element 40 are laminated in this order on the second substrate 51.
  • the first board 13 and the second board 51 are electrically connected via the connection terminals 16 and 55. It is preferable that the same material as that of the first substrate 13 is used for the second substrate 51. In this case, the difference in the coefficient of thermal expansion between the second substrate 51 and the first substrate 13 can be suppressed. Therefore, even when heat is applied to the semiconductor module 10, the connection between the second substrate 51 and the first substrate 13 can be ensured.
  • the present invention is not limited to this, and the second substrate 51 may be made of a material different from that of the first substrate 13.
  • the connection terminal 41 provided on the upper surface of the semiconductor element 40 and the connection terminal 54 provided on the second substrate 51 are connected via the bonding wire 45. As a result, the crystal oscillator 20 and the semiconductor element 40 are electrically connected to the second substrate 51.
  • the second cap 52 is a concave metal housing, and the second substrate 51 side (lower side) is open.
  • the second cap 52 is provided on the second substrate 51 so as to cover the first accommodating member 12, the crystal oscillator 20, and the semiconductor element 40.
  • the first accommodating member 12, the crystal oscillator 20, and the semiconductor element 40 are arranged in the internal space SP2 surrounded by the second substrate 51 and the second cap 52.
  • the internal space SP2 is an atmosphere of an inert gas such as nitrogen gas.
  • the second cap 52 has an upper plate 52a, a wall portion 52b, and a flange portion 52c.
  • the upper plate 52a faces the semiconductor element 40.
  • the upper plate 52a is arranged apart from the semiconductor element 40 so as to be in a non-contact state with the bonding wire 45.
  • the wall portion 52b surrounds the upper plate 52a.
  • the upper end side of the wall portion 52b is connected to the upper plate 52a.
  • the flange portion 52c is provided on the lower end side of the wall portion 52b and extends in a direction perpendicular to the wall portion 52b.
  • the lower end side of the wall portion 52b and the flange portion 52c are joined to the second substrate 51 by a joining member (not shown).
  • the wall portion 52b is provided apart from the semiconductor element 40 and the first accommodating member 12. Further, the wall portion 52b is provided apart from the connection terminal 54 so as to be in a non-contact state with the bonding wire 45.
  • the semiconductor element 40 is provided so as to overlap the first accommodating member 12, the area of the second accommodating member 50 (second substrate 51) can be reduced. Further, a space is provided between the first accommodating member 12 and the semiconductor element 40 and the inner wall of the second cap 52, and no sealing resin or the like is provided. Therefore, when heat is applied by reflow processing or the like, deformation due to the difference in thermal expansion coefficient between the sealing resin and the semiconductor element 40, disconnection of the bonding wire 45, and the like can be suppressed.
  • the crystal oscillator 20 is shown as an electronic component accommodated in the first accommodating member 12, it is merely an example and is not limited thereto.
  • the semiconductor module 10 of the present embodiment may be equipped with a SAW (Surface Acoustic Wave) filter, a piezoelectric vibration element, a MEMS (Micro Electro Mechanical Systems) vibration element, or the like as electronic components.
  • SAW Surface Acoustic Wave
  • MEMS Micro Electro Mechanical Systems
  • FIG. 2 is a cross-sectional view showing a laminated structure of a crystal oscillator, a first accommodating member, and a semiconductor element.
  • the second accommodating member 50 and the bonding wire 45 are omitted, and the crystal oscillator 20, the first accommodating member 12, and the semiconductor element 40 are shown in an enlarged manner.
  • the crystal oscillator 20 is provided on the first main surface 13a of the first substrate 13.
  • the second main surface 13b of the first substrate 13 is arranged so as to face the second substrate 51 (see FIG. 1).
  • One end side of the crystal oscillator 20 is electrically connected to the first main surface 13a via the conductive adhesive material 21.
  • the other end side of the crystal oscillator 20 is separated from the first main surface 13a.
  • the first cap 14 has an upper plate 14a, a wall portion 14b, a flange portion 14c, and a curved portion 14d.
  • the upper plate 14a faces the first substrate 13 and the crystal oscillator 20.
  • the upper plate 14a is arranged apart from the crystal oscillator 20. That is, a space is provided between the upper plate 14a and the crystal oscillator 20.
  • the wall portion 14b surrounds the upper plate 14a. Further, the wall portion 14b is provided at a distance from the crystal oscillator 20.
  • the curved portion 14d has a smooth curved surface so as to connect the upper end of the wall portion 14b and the end portion of the upper plate 14a.
  • the flange portion 14c is provided on the lower end side of the wall portion 14b and extends in a direction perpendicular to the wall portion 14b.
  • the lower end side of the wall portion 14b and the flange portion 14c are joined to the first substrate 13 by a joining member (not shown) such as a brazing material.
  • a joining member such as a brazing material.
  • the first substrate 13 and the first cap 14 are brought into close contact with each other, and the internal space SP1 surrounded by the first substrate 13 and the first cap 14 is sealed.
  • the crystal oscillator 20 is provided in a closed internal space SP1.
  • the first cap 14 can be manufactured, for example, by preparing a flat metal plate and forming the metal plate into a concave shape by press working with a mold.
  • the upper plate 14a, the wall portion 14b, the flange portion 14c, and the curved portion 14d are integrally formed using one material.
  • the manufacturing method of the first cap 14 is not limited to this.
  • the end portion of the flange portion 14c and the end portion of the first substrate 13 coincide with each other, but the present invention is not limited to this.
  • the end portion of the flange portion 14c may be located inside the end portion of the first substrate 13. That is, the area of the first substrate 13 in a plan view may be larger than that of the first cap 14. Further, the first cap 14 may have a configuration in which the flange portion 14c is not provided.
  • the adhesive member 30 is provided between the first accommodating member 12 and the semiconductor element 40. More specifically, the adhesive member 30 covers the upper plate 14a and the curved portion 14d of the first cap 14, and also covers the lower surface of the semiconductor element 40. A fillet 31 having a wide hem from the first cap 14 toward the semiconductor element 40 is formed on the peripheral edge of the adhesive member 30.
  • the semiconductor element 40 has a larger area than the first cap 14 in a plan view.
  • the semiconductor element 40 has an area larger than at least the upper plate 14a. That is, the semiconductor element 40 has a portion that projects outward from the outer circumference of the first cap 14 (the end portion of the flange portion 14c).
  • the lower surface of the semiconductor element 40 includes a portion that overlaps the upper plate 14a and the curved portion 14d, and a portion that is outside the upper plate 14a and the curved portion 14d and does not overlap the upper plate 14a and the curved portion 14d.
  • the plan view represents the arrangement relationship when viewed from a direction perpendicular to the first substrate 13.
  • the thickness of the adhesive member 30 is formed to be substantially constant in the region overlapping the upper plate 14a.
  • the thickness of the adhesive member 30 increases as it approaches the outer circumference of the wall portion 14b in the region overlapping the curved portion 14d.
  • a fillet 31 is formed outside the curved portion 14d, that is, outside the wall portion 14b.
  • the fillet 31 is formed so as to extend to the peripheral side of the lower surface of the semiconductor element 40, that is, to the portion of the lower surface of the semiconductor element 40 that does not overlap with the upper plate 14a and the curved portion 14d.
  • the fillet 31 is formed so that the contact area between the adhesive member 30 and the semiconductor element 40 is larger than the contact area between the adhesive member 30 and the upper plate 14a and the curved portion 14d.
  • FIG. 3 is a plan view schematically showing the relationship between the crystal oscillator, the first accommodating member, the adhesive member, and the semiconductor element.
  • FIG. 3 shows a sectional view taken along line III-III'of FIG.
  • the semiconductor element 40 is shown by a two-dot chain line, and the fillet 31 portion of the adhesive member 30 is shown with a diagonal line.
  • the crystal oscillator 20 has a rectangular shape in a plan view.
  • the first accommodating member 12 (first substrate 13 and first cap 14) is also rectangular in a plan view. That is, the first accommodating member 12 has a first long side 12a, a second long side 12b, a first short side 12c, and a second short side 12d.
  • the first long side 12a faces the second long side 12b.
  • the first long side 12a and the second long side 12b are provided along the longitudinal direction of the crystal oscillator 20.
  • the first short side 12c faces the second short side 12d.
  • the first short side 12c and the second short side 12d are located between the first long side 12a and the second long side 12b.
  • the first long side 12a, the second long side 12b, the first short side 12c, and the second short side 12d match the outer shape of the first substrate 13 in a plan view.
  • the first cap 14 also has a first long side s1, a second long side s2, a first short side s3, and a second short side s4.
  • the first long side s1, the second long side s2, the first short side s3, and the second short side s4 are the outer shapes of the wall portion 14b in a plan view.
  • the semiconductor element 40 has a larger area than the first accommodating member 12, and overlaps the first long side 12a, the second long side 12b, the first short side 12c, and the second short side 12d of the first accommodating member 12.
  • the four sides of the first accommodating member 12, the crystal oscillator 20, and the adhesive member 30 are all located inside the outer periphery of the semiconductor element 40 in a plan view.
  • the adhesive member 30 is provided in a region inside the outer circumference of the semiconductor element 40 and overlapping with the first accommodating member 12.
  • the adhesive member 30 overlaps the first long side 12a, the second long side 12b, the first short side 12c and the second short side 12d, and has the first long side 12a, the second long side 12b, and the first short side 12c. And a region outside the second short side 12d is provided. That is, the adhesive member 30 covers all the regions of the upper plate 14a and the curved portion 14d of the first cap 14.
  • the fillet 31 is formed outside the wall portion 14b. That is, the fillet 31 is formed in a frame shape along the first long side s1, the second long side s2, the first short side s3, and the second short side s4. The fillet 31 overlaps with the first long side 12a, the second long side 12b, the first short side 12c and the second short side 12d of the first accommodating member 12, and the first long side 12a and the second long side 12b. , It is also located outside the first short side 12c and the second short side 12d.
  • a liquid resin is used to apply and form the adhesive member 30 on the upper surface of the upper plate 14a of the first cap 14 in a predetermined pattern by a dispenser. After that, by arranging the semiconductor element 40 on the upper plate 14a of the first cap 14, the liquid resin is spread over the entire surface of the upper plate 14a, and the fillet 31 is formed on the outer periphery of the liquid resin. After that, the liquid resin is cured to form the adhesive member 30 having the fillet 31.
  • FIG. 4 is a graph showing changes in the amount of warpage of semiconductor elements before and after the reflow process in the semiconductor module according to the embodiment.
  • FIG. 5 is a graph showing changes in the amount of warpage of semiconductor elements before and after the reflow process in the semiconductor module according to the comparative example.
  • the semiconductor module 10 according to the embodiment shown in FIG. 4 has a configuration in which an adhesive member 30 having a fillet 31 is provided between the first cap 14 and the semiconductor element 40.
  • the semiconductor module according to the comparative example shown in FIG. 5 has a configuration in which a fillet is not formed on the adhesive member, that is, a configuration in which the adhesive member is provided only in a region overlapping the first cap. Only the presence or absence of the fillet 31 of the adhesive member 30 is different between the examples and the comparative examples, and other configurations (for example, the material of the adhesive member 30, the size of the semiconductor element 40, etc.) and the reflow conditions are the same.
  • Graph 1 shown in FIG. 4 and graph 2 shown in FIG. 5 show the amount of warpage of the semiconductor element 40 before and after the reflow process, respectively.
  • the horizontal axis indicates time
  • “initial” indicates the time point before the reflow process is performed
  • “after 48 hours” indicates the time point 48 hours after the reflow process.
  • the vertical axis indicates the amount of warpage of the semiconductor element 40.
  • the amount of warpage indicates a change in the amount of warpage of the semiconductor element 40 when left for 48 hours after the reflow step, based on the amount of warpage of the semiconductor element 40 in the "initial stage".
  • the change in the amount of warpage of the semiconductor element 40 was investigated for the three samples A, B, and C in the example and for the three samples D, E, and F in the comparative example.
  • the warpage amounts of the samples A, B, and C are 0.01 ⁇ m, 0.04 ⁇ m, and 0.01 ⁇ m, respectively, after the reflow step.
  • the average amount of warpage is 0.02 ⁇ m.
  • the warpage amounts of the samples D, E, and F are 0.17 ⁇ m, 0.03 ⁇ m, and 0.22 ⁇ m, respectively, after the reflow step.
  • the average amount of warpage is 0.14 ⁇ m.
  • the semiconductor module 10 of the embodiment can suppress the amount of warpage of the semiconductor element 40 after the reflow process by providing the adhesive member 30 having the fillet 31.
  • the semiconductor module 10 of the present embodiment includes a first substrate 13, a crystal oscillator 20 (electronic component), a first cap 14, a semiconductor element 40, and an adhesive member 30.
  • the crystal oscillator 20 is mounted on the first substrate 13.
  • the first cap 14 is provided on the first substrate 13, and includes an upper plate 14a that covers the crystal oscillator 20 and a wall portion 14b that surrounds the upper plate 14a.
  • the semiconductor element 40 is provided so as to face the upper plate 14a, and has an area larger than that of the first cap 14 in a plan view from a direction perpendicular to the first substrate 13.
  • the adhesive member 30 is provided between the first cap 14 and the semiconductor element 40, and has an adhesive member 30 in which a fillet 31 having a hem extending from the first cap 14 toward the semiconductor element 40 is formed.
  • the semiconductor module 10 can suppress the occurrence of deformation (warp) of the semiconductor element 40 when heat is applied.
  • the semiconductor element 40 is arranged so as to be overlapped on the first accommodating member 12 and the crystal oscillator 20. , The distance between the semiconductor element 40 and the crystal oscillator 20 can be reduced. As a result, the semiconductor module 10 can improve the temperature characteristics. On the other hand, when the semiconductor element 40 is warped, the temperature characteristics of the semiconductor element 40 may deteriorate due to the piezoresistive effect. In the present embodiment, as described above, the deformation of the semiconductor element 40 is suppressed, so that the decrease in the temperature characteristics of the semiconductor element 40 can be suppressed.
  • the adhesive member 30 overlaps with four sides (first long side s1, second long side s2, first short side s3, and second short side s4) surrounding the periphery of the first cap 14. Provided.
  • the semiconductor module 10 can effectively suppress the residual stress generated between the first cap 14 and the semiconductor element 40.
  • the first cap 14 has a curved portion 14d that connects the upper plate 14a and the wall portion 14b, and the adhesive member 30 is provided so as to cover the upper plate 14a and the curved portion 14d.
  • the first cap 14 has the curved portion 14d, it is possible to suppress the concentration of stress in the first cap 14 as compared with the structure in which the upper plate 14a and the wall portion 14b are bent and connected.
  • the adhesive member 30 is formed thicker than the portion overlapping the upper plate 14a inside the curved portion 14d. As a result, the adhesive member 30 can effectively disperse the stress generated between the first cap 14 and the semiconductor element 40, and suppress the deformation of the semiconductor element 40.
  • the fillet 31 is well formed, and the area of the fillet 31 in contact with the semiconductor element 40 can be increased.
  • the semiconductor module 10 is further provided on the second substrate 51 on which the first substrate 13 is mounted and the second substrate 51, and the second cap 52 that covers the first substrate 13, the first cap 14, and the semiconductor element 40. And, including.
  • the crystal oscillator 20 and the semiconductor element 40 are provided in the internal space SP2 surrounded by the second substrate 51 and the second cap 52, noise leakage to the outside and noise intrusion from the outside Can be suppressed.
  • the upper surface of the semiconductor element 40 has a space and faces the second cap 52. That is, the adhesive member 30 is provided on the lower surface of the semiconductor element 40, and the resin material such as the adhesive member 30 is not provided on the upper surface of the semiconductor element 40. Therefore, as compared with the configuration in which the semiconductor element 40 is resin-sealed, the stress generated in the semiconductor element 40 when heat is applied to the semiconductor module 10 can be suppressed.
  • the electronic component is a crystal oscillator 20.
  • the semiconductor module 10 can form a temperature-compensated crystal oscillator.
  • each component of the semiconductor module 10 are merely examples and can be changed as appropriate.
  • the first substrate 13 and the second substrate 51 may be multilayer substrates, respectively, or may be equipped with other components in addition to the crystal oscillator 20.
  • the first cap 14 and the second cap 52 are not limited to the case where they are formed of a single metal, and a film such as a plating film may be provided as needed.
  • FIG. 6 is a cross-sectional view showing a laminated structure of a crystal oscillator, a first accommodating member, and a semiconductor element of the semiconductor module according to the second embodiment.
  • the configuration in which the upper plate 14a of the first cap 14 has a curved shape will be described.
  • the curved shape of the upper plate 14a shown in FIG. 6 and the like is emphasized more than the actual curved shape for understanding, and the difference between the distances d1 and d2 is greatly described.
  • the difference between the actual distances d1 and d2 is smaller than that in FIG.
  • the central portion of the upper plate 14a is recessed toward the first substrate 13 side. Even in this case, the upper plate 14a is provided so as to be separated from the crystal oscillator 20 so as to be in a non-contact state.
  • the distance d1 between the upper plate 14a and the semiconductor element 40 at the central portion of the upper plate 14a is larger than the distance d2 between the upper plate 14a and the semiconductor element 40 at the peripheral edge of the upper plate 14a.
  • the distance d1 indicates the distance at the position where the height of the upper plate 14a is the lowest (that is, the closest to the first substrate 13).
  • the distance d2 indicates the distance at the position where the height of the upper plate 14a is the highest (that is, the farthest from the first substrate 13).
  • the thickness of the adhesive member 30 at the central portion of the upper plate 14a can be increased as compared with the first embodiment.
  • FIG. 7 is a plan view schematically showing the semiconductor module according to the third embodiment.
  • the adhesive member 30 is provided so as to overlap the first long side s1 and the second long side s2 among the four sides of the first cap 14. The configuration to be used will be described.
  • the adhesive member 30 is provided at a position that does not overlap with the first short side s3 and the second short side s4.
  • the adhesive member 30 is arranged between the first short side s3 and the second short side s4 in a plan view.
  • the wall portions 14b of the first short side s3 and the second short side s4 face the semiconductor element 40 without interposing the adhesive member 30.
  • the first long side s1 and the second long side s2 are longer than the first short side s3 and the second short side s4, that is, the first cap 14 has the first length.
  • the amount of deformation when heat is applied is large in the direction along the side s1 and the second long side s2.
  • the adhesive member 30 is arranged so as to overlap at least the first long side s1 and the second long side s2, the stress generated in the semiconductor element 40 when heat is effectively applied. Can be suppressed to suppress deformation of the semiconductor element 40.
  • the semiconductor module 10B of the third embodiment can be combined with the configuration of the second embodiment described above.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
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  • Computer Hardware Design (AREA)
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Abstract

This semiconductor module has: a first substrate; an electronic component that is mounted to the first substrate; a first cap that is provided to the first substrate and that includes an upper plate for covering the electronic component and a wall part for surrounding the periphery of the upper plate; a semiconductor element that is provided so as to oppose the upper plate and that has an area greater than the area of the first cap in a plan view from a direction perpendicular to the first substrate; and an adhesive member which is provided between the first cap and the semiconductor element and in which a fillet is formed with a skirt thereof expanding from the first cap toward the semiconductor element.

Description

半導体モジュールSemiconductor module
　本発明は、半導体モジュールに関する。 The present invention relates to a semiconductor module.
　特許文献１には、水晶振動子と、収容部材と、半導体素子とを有する半導体モジュールが記載されている。収容部材は、上面の少なくとも一部が金属部材で構成され、内部空間に水晶振動子を収容する。半導体素子は、金属部材を覆うように収容部材の上に積層される。 Patent Document 1 describes a semiconductor module having a crystal oscillator, an accommodating member, and a semiconductor element. At least a part of the upper surface of the accommodating member is made of a metal member, and the crystal oscillator is accommodated in the internal space. The semiconductor element is laminated on the accommodating member so as to cover the metal member.
特開２０１０－１０４８０号公報Japanese Unexamined Patent Publication No. 2010-10480
　半導体素子が収容部材の上に積層された構成の半導体モジュールでは、熱が加えられた場合に、半導体素子と収容部材との熱膨張係数の差に応じて、半導体素子が変形する可能性がある。半導体素子が変形した場合、半導体素子の温度特性等が変化する可能性がある。 In a semiconductor module having a structure in which a semiconductor element is laminated on an accommodating member, the semiconductor element may be deformed according to a difference in the coefficient of thermal expansion between the semiconductor element and the accommodating member when heat is applied. .. When the semiconductor element is deformed, the temperature characteristics of the semiconductor element may change.
　本発明は、熱が加えられた場合の、半導体素子の変形を抑制することができる半導体モジュールを提供することを目的とする。 An object of the present invention is to provide a semiconductor module capable of suppressing deformation of a semiconductor element when heat is applied.
　本発明の一側面の半導体モジュールは、第１基板と、前記第１基板に搭載される電子部品と、前記第１基板に設けられ、前記電子部品を覆う上板と、前記上板の周囲を囲む壁部とを含む第１キャップと、前記上板と対向して設けられ、前記第１基板と垂直な方向からの平面視で前記第１キャップよりも大きい面積を有する半導体素子と、前記第１キャップと前記半導体素子との間に設けられ、前記第１キャップから前記半導体素子に向かって裾広がりのフィレットが形成された接着部材とを有する。 The semiconductor module on one side of the present invention comprises a first substrate, an electronic component mounted on the first substrate, an upper plate provided on the first substrate and covering the electronic component, and a periphery of the upper plate. A first cap including a surrounding wall portion, a semiconductor element provided facing the upper plate and having a larger area than the first cap in a plan view from a direction perpendicular to the first substrate, and the first cap. It has an adhesive member which is provided between one cap and the semiconductor element and has a fillet having a hem extending from the first cap toward the semiconductor element.
　本発明の半導体モジュールによれば、熱が加えられた場合の半導体素子の変形を抑制することができる。 According to the semiconductor module of the present invention, it is possible to suppress deformation of the semiconductor element when heat is applied.
図１は、第１実施形態に係る半導体モジュールの構成を示す断面図である。FIG. 1 is a cross-sectional view showing the configuration of the semiconductor module according to the first embodiment. 図２は、水晶振動子及び第１収容部材と、半導体素子との積層構造を示す断面図である。FIG. 2 is a cross-sectional view showing a laminated structure of a crystal oscillator, a first accommodating member, and a semiconductor element. 図３は、水晶振動子、第１収容部材、接着部材及び半導体素子の関係を模式的に示す平面図である。FIG. 3 is a plan view schematically showing the relationship between the crystal oscillator, the first accommodating member, the adhesive member, and the semiconductor element. 図４は、実施例に係る半導体モジュールにおいて、リフロー工程前後の半導体素子の反り量の変化を示すグラフである。FIG. 4 is a graph showing changes in the amount of warpage of semiconductor elements before and after the reflow process in the semiconductor module according to the embodiment. 図５は、比較例に係る半導体モジュールにおいて、リフロー工程前後の半導体素子の反り量の変化を示すグラフである。FIG. 5 is a graph showing changes in the amount of warpage of semiconductor elements before and after the reflow process in the semiconductor module according to the comparative example. 図６は、第２実施形態に係る半導体モジュールの、水晶振動子及び第１収容部材と、半導体素子との積層構造を示す断面図である。FIG. 6 is a cross-sectional view showing a laminated structure of a crystal oscillator, a first accommodating member, and a semiconductor element of the semiconductor module according to the second embodiment. 図７は、第３実施形態に係る半導体モジュールを模式的に示す平面図である。FIG. 7 is a plan view schematically showing the semiconductor module according to the third embodiment.
　以下に、本発明の半導体モジュールの実施の形態を図面に基づいて詳細に説明する。なお、この実施の形態により本発明が限定されるものではない。各実施の形態は例示であり、異なる実施の形態で示した構成の部分的な置換又は組み合わせが可能であることは言うまでもない。第２実施形態以降では第１実施形態と共通の事柄についての記述を省略し、異なる点についてのみ説明する。特に、同様の構成による同様の作用効果については実施形態毎には逐次言及しない。 Hereinafter, embodiments of the semiconductor module of the present invention will be described in detail with reference to the drawings. The present invention is not limited to this embodiment. It goes without saying that each embodiment is an example, and partial replacement or combination of the configurations shown in different embodiments is possible. In the second and subsequent embodiments, the description of matters common to those of the first embodiment will be omitted, and only the differences will be described. In particular, similar actions and effects with the same configuration will not be mentioned sequentially for each embodiment.
（第１実施形態）
　図１は、第１実施形態に係る半導体モジュールの構成を示す断面図である。図１に示すように、半導体モジュール１０は、第１収容部材１２と、水晶振動子２０と、接着部材３０と、半導体素子４０と、第２収容部材５０とを有する。第１実施形態に係る半導体モジュール１０は、例えば、電子部品として水晶振動子２０が搭載された温度補償型水晶発振器（Temperature　Compensated　Crystal　Oscillator、以下、「ＴＣＸＯ」と称する場合がある）である。 (First Embodiment)
FIG. 1 is a cross-sectional view showing the configuration of the semiconductor module according to the first embodiment. As shown in FIG. 1, the semiconductor module 10 includes a first accommodating member 12, a crystal oscillator 20, an adhesive member 30, a semiconductor element 40, and a second accommodating member 50. The semiconductor module 10 according to the first embodiment is, for example, a temperature-compensated crystal oscillator (Temperature Compensated Crystal Oscillator, hereinafter may be referred to as “TCXO”) in which a crystal oscillator 20 is mounted as an electronic component.
　第１収容部材１２は、第１基板１３と、第１キャップ１４とを含む。第１基板１３は、平板状の絶縁性基板であり、例えばアルミナ基板等のセラミックス基板である。第１キャップ１４は、凹状の金属製筐体であり、第１基板１３側（下側）が開口している。第１キャップ１４の材料は、例えば、鉄ニッケル合金（Ｆｅ－４２Ｎｉ）が用いられる。水晶振動子２０は、第１基板１３と、第１キャップ１４とで囲まれた空間に設けられる。 The first accommodating member 12 includes a first substrate 13 and a first cap 14. The first substrate 13 is a flat plate-shaped insulating substrate, and is a ceramic substrate such as an alumina substrate. The first cap 14 is a concave metal housing, and the first substrate 13 side (lower side) is open. As the material of the first cap 14, for example, an iron-nickel alloy (Fe-42Ni) is used. The crystal oscillator 20 is provided in a space surrounded by the first substrate 13 and the first cap 14.
　半導体素子４０は、第１収容部材１２の第１キャップ１４を覆うように第１収容部材１２の上に積層される。半導体素子４０は、接着部材３０により、第１収容部材１２に接着される。半導体素子４０は、例えばＩＣ（Integrated　Circuit）であり、例えば、ＴＣＸＯを構成する発振回路や温度補償回路等の各種回路を含む。温度補償回路は、温度が変化しても、ＴＣＸＯの発振周波数が一定になるよう制御する回路である。 The semiconductor element 40 is laminated on the first accommodating member 12 so as to cover the first cap 14 of the first accommodating member 12. The semiconductor element 40 is adhered to the first accommodating member 12 by the adhesive member 30. The semiconductor element 40 is, for example, an IC (Integrated Circuit), and includes, for example, various circuits such as an oscillation circuit and a temperature compensation circuit constituting the TCXO. The temperature compensation circuit is a circuit that controls the oscillation frequency of the TCXO to be constant even if the temperature changes.
　接着部材３０は、例えば、ダイボンド用樹脂であり、シリコーン樹脂が用いられる。接着部材３０は、力が加えられた場合に変形可能な柔軟性を有する材料であり、第１キャップ１４及び半導体素子４０よりも引張弾性率が小さい。なお、接着部材３０は、シリコーン樹脂に限定されず、エポキシ樹脂であってもよく、あるいは、導電性フィラー（銀粉等の金属粉）を含む導電性のシリコーン接着材やエポキシ樹脂であってもよい。なお、第１収容部材１２、水晶振動子２０、接着部材３０及び半導体素子４０の詳細な積層構造については後述する。 The adhesive member 30 is, for example, a resin for die bonding, and a silicone resin is used. The adhesive member 30 is a material having flexibility that can be deformed when a force is applied, and has a tensile elastic modulus smaller than that of the first cap 14 and the semiconductor element 40. The adhesive member 30 is not limited to the silicone resin, and may be an epoxy resin, or may be a conductive silicone adhesive or an epoxy resin containing a conductive filler (metal powder such as silver powder). .. The detailed laminated structure of the first accommodating member 12, the crystal oscillator 20, the adhesive member 30, and the semiconductor element 40 will be described later.
　第２収容部材５０は、第２基板５１及び第２キャップ５２を含む。第２基板５１は、平板状の絶縁性基板であり、例えばアルミナ基板等のセラミックス基板である。第２基板５１の上に、第１基板１３が搭載される。つまり、第２基板５１の上に、第１基板１３、水晶振動子２０、第１キャップ１４、接着部材３０及び半導体素子４０の順に積層される。 The second accommodating member 50 includes a second substrate 51 and a second cap 52. The second substrate 51 is a flat plate-shaped insulating substrate, and is a ceramic substrate such as an alumina substrate. The first substrate 13 is mounted on the second substrate 51. That is, the first substrate 13, the crystal oscillator 20, the first cap 14, the adhesive member 30, and the semiconductor element 40 are laminated in this order on the second substrate 51.
　第１基板１３と第２基板５１とは、接続端子１６、５５を介して電気的に接続される。第２基板５１は、第１基板１３と同じ材料が用いられることが好ましい。この場合、第２基板５１と第１基板１３との熱膨張係数の差を抑制できる。このため、半導体モジュール１０に熱が加えられた場合であっても、第２基板５１と第１基板１３との接続を確保することができる。ただし、これに限定されず、第２基板５１は、第１基板１３と異なる材料であってもよい。また、半導体素子４０の上面に設けられた接続端子４１と、第２基板５１に設けられた接続端子５４とが、ボンディングワイヤ４５を介して接続される。これにより、水晶振動子２０及び半導体素子４０は、第２基板５１に電気的に接続される。 The first board 13 and the second board 51 are electrically connected via the connection terminals 16 and 55. It is preferable that the same material as that of the first substrate 13 is used for the second substrate 51. In this case, the difference in the coefficient of thermal expansion between the second substrate 51 and the first substrate 13 can be suppressed. Therefore, even when heat is applied to the semiconductor module 10, the connection between the second substrate 51 and the first substrate 13 can be ensured. However, the present invention is not limited to this, and the second substrate 51 may be made of a material different from that of the first substrate 13. Further, the connection terminal 41 provided on the upper surface of the semiconductor element 40 and the connection terminal 54 provided on the second substrate 51 are connected via the bonding wire 45. As a result, the crystal oscillator 20 and the semiconductor element 40 are electrically connected to the second substrate 51.
　第２キャップ５２は、凹状の金属製筐体であり、第２基板５１側（下側）が開口している。第２キャップ５２は、第１収容部材１２、水晶振動子２０及び半導体素子４０を覆って第２基板５１に設けられている。言い換えると、第２基板５１と第２キャップ５２とで囲まれた内部空間ＳＰ２に、第１収容部材１２、水晶振動子２０及び半導体素子４０が配置される。内部空間ＳＰ２は、例えば窒素ガス等の不活性ガス雰囲気である。 The second cap 52 is a concave metal housing, and the second substrate 51 side (lower side) is open. The second cap 52 is provided on the second substrate 51 so as to cover the first accommodating member 12, the crystal oscillator 20, and the semiconductor element 40. In other words, the first accommodating member 12, the crystal oscillator 20, and the semiconductor element 40 are arranged in the internal space SP2 surrounded by the second substrate 51 and the second cap 52. The internal space SP2 is an atmosphere of an inert gas such as nitrogen gas.
　第２キャップ５２は、上板５２ａと、壁部５２ｂと、フランジ部５２ｃとを有する。上板５２ａは、半導体素子４０と対向する。上板５２ａは、ボンディングワイヤ４５と非接触状態となるように、半導体素子４０から離隔して配置される。壁部５２ｂは上板５２ａの周囲を囲む。壁部５２ｂの上端側が上板５２ａに接続される。フランジ部５２ｃは、壁部５２ｂの下端側に設けられ、壁部５２ｂに垂直な方向に延びる。壁部５２ｂの下端側及びフランジ部５２ｃが、図示しない接合部材により第２基板５１と接合される。壁部５２ｂは、半導体素子４０及び第１収容部材１２から離隔して設けられる。また、壁部５２ｂは、ボンディングワイヤ４５と非接触状態となるように、接続端子５４から離れて設けられる。 The second cap 52 has an upper plate 52a, a wall portion 52b, and a flange portion 52c. The upper plate 52a faces the semiconductor element 40. The upper plate 52a is arranged apart from the semiconductor element 40 so as to be in a non-contact state with the bonding wire 45. The wall portion 52b surrounds the upper plate 52a. The upper end side of the wall portion 52b is connected to the upper plate 52a. The flange portion 52c is provided on the lower end side of the wall portion 52b and extends in a direction perpendicular to the wall portion 52b. The lower end side of the wall portion 52b and the flange portion 52c are joined to the second substrate 51 by a joining member (not shown). The wall portion 52b is provided apart from the semiconductor element 40 and the first accommodating member 12. Further, the wall portion 52b is provided apart from the connection terminal 54 so as to be in a non-contact state with the bonding wire 45.
　本実施形態では、第１収容部材１２の上に半導体素子４０が重なって設けられているので、第２収容部材５０（第２基板５１）の面積を小さくすることができる。また、第１収容部材１２及び半導体素子４０と、第２キャップ５２の内壁との間には空間が設けられており、封止樹脂等が設けられていない。このため、リフロー処理などにより熱が加えられた場合における、封止樹脂と半導体素子４０との熱膨張係数の差に起因する変形や、ボンディングワイヤ４５の断線等を抑制することができる。 In the present embodiment, since the semiconductor element 40 is provided so as to overlap the first accommodating member 12, the area of the second accommodating member 50 (second substrate 51) can be reduced. Further, a space is provided between the first accommodating member 12 and the semiconductor element 40 and the inner wall of the second cap 52, and no sealing resin or the like is provided. Therefore, when heat is applied by reflow processing or the like, deformation due to the difference in thermal expansion coefficient between the sealing resin and the semiconductor element 40, disconnection of the bonding wire 45, and the like can be suppressed.
　なお、第１収容部材１２に収容される電子部品として水晶振動子２０を示したが、あくまで一例でありこれに限定されない。本実施形態の半導体モジュール１０は、電子部品として、ＳＡＷ（Surface　Acoustic　Wave）フィルタや、圧電振動素子や、ＭＥＭＳ（Micro　Electro　Mechanical　Systems）振動素子等を搭載してもよい。 Although the crystal oscillator 20 is shown as an electronic component accommodated in the first accommodating member 12, it is merely an example and is not limited thereto. The semiconductor module 10 of the present embodiment may be equipped with a SAW (Surface Acoustic Wave) filter, a piezoelectric vibration element, a MEMS (Micro Electro Mechanical Systems) vibration element, or the like as electronic components.
　図２は、水晶振動子及び第１収容部材と、半導体素子との積層構造を示す断面図である。なお、図２では、第２収容部材５０及びボンディングワイヤ４５を省略し、水晶振動子２０、第１収容部材１２及び半導体素子４０を拡大して示す。 FIG. 2 is a cross-sectional view showing a laminated structure of a crystal oscillator, a first accommodating member, and a semiconductor element. In FIG. 2, the second accommodating member 50 and the bonding wire 45 are omitted, and the crystal oscillator 20, the first accommodating member 12, and the semiconductor element 40 are shown in an enlarged manner.
　図２に示すように、第１基板１３の第１主面１３ａに水晶振動子２０が設けられる。第１基板１３の第２主面１３ｂは、第２基板５１（図１参照）と対向して配置される。水晶振動子２０の一端側が、導電性接着材２１を介して第１主面１３ａに電気的に接続される。水晶振動子２０の他端側は、第１主面１３ａと離隔している。 As shown in FIG. 2, the crystal oscillator 20 is provided on the first main surface 13a of the first substrate 13. The second main surface 13b of the first substrate 13 is arranged so as to face the second substrate 51 (see FIG. 1). One end side of the crystal oscillator 20 is electrically connected to the first main surface 13a via the conductive adhesive material 21. The other end side of the crystal oscillator 20 is separated from the first main surface 13a.
　第１キャップ１４は、上板１４ａと、壁部１４ｂと、フランジ部１４ｃと、湾曲部１４ｄと、を有する。上板１４ａは、第１基板１３及び水晶振動子２０と対向する。上板１４ａは、水晶振動子２０と離隔して配置される。つまり、上板１４ａと水晶振動子２０との間には空間が設けられる。壁部１４ｂは上板１４ａの周囲を囲む。また、壁部１４ｂは、水晶振動子２０から離隔して設けられる。湾曲部１４ｄは、壁部１４ｂの上端と上板１４ａの端部とを接続するように、滑らかな曲面を有する。 The first cap 14 has an upper plate 14a, a wall portion 14b, a flange portion 14c, and a curved portion 14d. The upper plate 14a faces the first substrate 13 and the crystal oscillator 20. The upper plate 14a is arranged apart from the crystal oscillator 20. That is, a space is provided between the upper plate 14a and the crystal oscillator 20. The wall portion 14b surrounds the upper plate 14a. Further, the wall portion 14b is provided at a distance from the crystal oscillator 20. The curved portion 14d has a smooth curved surface so as to connect the upper end of the wall portion 14b and the end portion of the upper plate 14a.
　フランジ部１４ｃは、壁部１４ｂの下端側に設けられ、壁部１４ｂに垂直な方向に延びる。壁部１４ｂの下端側及びフランジ部１４ｃは、例えばろう材等の図示しない接合部材により第１基板１３と接合される。これにより、第１基板１３と第１キャップ１４とが密着され、第１基板１３と第１キャップ１４とで囲まれた内部空間ＳＰ１が密閉される。水晶振動子２０は、密閉された内部空間ＳＰ１に設けられる。 The flange portion 14c is provided on the lower end side of the wall portion 14b and extends in a direction perpendicular to the wall portion 14b. The lower end side of the wall portion 14b and the flange portion 14c are joined to the first substrate 13 by a joining member (not shown) such as a brazing material. As a result, the first substrate 13 and the first cap 14 are brought into close contact with each other, and the internal space SP1 surrounded by the first substrate 13 and the first cap 14 is sealed. The crystal oscillator 20 is provided in a closed internal space SP1.
　第１キャップ１４は、例えば、平板状の金属板を用意し、金型を用いたプレス加工により、金属板を凹状に形成することにより製造することができる。上板１４ａ、壁部１４ｂ、フランジ部１４ｃ及び湾曲部１４ｄは、１つの素材を用いて一体に形成される。なお、第１キャップ１４の製造方法は、これに限定されない。 The first cap 14 can be manufactured, for example, by preparing a flat metal plate and forming the metal plate into a concave shape by press working with a mold. The upper plate 14a, the wall portion 14b, the flange portion 14c, and the curved portion 14d are integrally formed using one material. The manufacturing method of the first cap 14 is not limited to this.
　また、図２では、フランジ部１４ｃの端部と第１基板１３の端部とが一致しているが、これに限定されない。フランジ部１４ｃの端部が第１基板１３の端部よりも内側に位置していてもよい。つまり、第１基板１３の平面視での面積が第１キャップ１４よりも大きくてもよい。また、第１キャップ１４は、フランジ部１４ｃが設けられていない構成であってもよい。 Further, in FIG. 2, the end portion of the flange portion 14c and the end portion of the first substrate 13 coincide with each other, but the present invention is not limited to this. The end portion of the flange portion 14c may be located inside the end portion of the first substrate 13. That is, the area of the first substrate 13 in a plan view may be larger than that of the first cap 14. Further, the first cap 14 may have a configuration in which the flange portion 14c is not provided.
　接着部材３０は、第１収容部材１２と半導体素子４０との間に設けられる。より具体的には、接着部材３０は、第１キャップ１４の上板１４ａ及び湾曲部１４ｄを覆うとともに、半導体素子４０の下面を覆う。接着部材３０の周縁には、第１キャップ１４から半導体素子４０に向かって裾広がりのフィレット３１が形成される。 The adhesive member 30 is provided between the first accommodating member 12 and the semiconductor element 40. More specifically, the adhesive member 30 covers the upper plate 14a and the curved portion 14d of the first cap 14, and also covers the lower surface of the semiconductor element 40. A fillet 31 having a wide hem from the first cap 14 toward the semiconductor element 40 is formed on the peripheral edge of the adhesive member 30.
　本実施形態では、半導体素子４０は、平面視で、第１キャップ１４よりも大きい面積を有する。半導体素子４０は、少なくとも上板１４ａよりも大きい面積を有する。つまり、半導体素子４０は、第１キャップ１４の外周（フランジ部１４ｃの端部）よりも外側に張り出した部分を有する。半導体素子４０の下面は、上板１４ａ及び湾曲部１４ｄと重なる部分と、上板１４ａ及び湾曲部１４ｄよりも外側で、かつ、上板１４ａ及び湾曲部１４ｄと重ならない部分とを含む。なお、本明細書において、平面視とは、第１基板１３と垂直な方向から見たときの配置関係を表す。 In the present embodiment, the semiconductor element 40 has a larger area than the first cap 14 in a plan view. The semiconductor element 40 has an area larger than at least the upper plate 14a. That is, the semiconductor element 40 has a portion that projects outward from the outer circumference of the first cap 14 (the end portion of the flange portion 14c). The lower surface of the semiconductor element 40 includes a portion that overlaps the upper plate 14a and the curved portion 14d, and a portion that is outside the upper plate 14a and the curved portion 14d and does not overlap the upper plate 14a and the curved portion 14d. In the present specification, the plan view represents the arrangement relationship when viewed from a direction perpendicular to the first substrate 13.
　接着部材３０の厚さは、上板１４ａと重なる領域ではほぼ一定に形成される。接着部材３０の厚さは、湾曲部１４ｄと重なる領域では、壁部１４ｂの外周に近づくにしたがって厚くなる。湾曲部１４ｄよりも外側、つまり壁部１４ｂよりも外側では、フィレット３１が形成される。フィレット３１は、半導体素子４０の下面のうち周縁側、すなわち、半導体素子４０の下面のうち上板１４ａ及び湾曲部１４ｄと重ならない部分まで拡がって形成される。接着部材３０と、上板１４ａ及び湾曲部１４ｄとの接触面積よりも、接着部材３０と、半導体素子４０との接触面積が大きくなるように、フィレット３１が形成される。 The thickness of the adhesive member 30 is formed to be substantially constant in the region overlapping the upper plate 14a. The thickness of the adhesive member 30 increases as it approaches the outer circumference of the wall portion 14b in the region overlapping the curved portion 14d. A fillet 31 is formed outside the curved portion 14d, that is, outside the wall portion 14b. The fillet 31 is formed so as to extend to the peripheral side of the lower surface of the semiconductor element 40, that is, to the portion of the lower surface of the semiconductor element 40 that does not overlap with the upper plate 14a and the curved portion 14d. The fillet 31 is formed so that the contact area between the adhesive member 30 and the semiconductor element 40 is larger than the contact area between the adhesive member 30 and the upper plate 14a and the curved portion 14d.
　図３は、水晶振動子、第１収容部材、接着部材及び半導体素子の関係を模式的に示す平面図である。図３は、図２のＩＩＩ－ＩＩＩ’断面図を示している。ただし、図３では、半導体素子４０を二点鎖線で示し、接着部材３０のうち、フィレット３１の部分に斜線を付して示している。 FIG. 3 is a plan view schematically showing the relationship between the crystal oscillator, the first accommodating member, the adhesive member, and the semiconductor element. FIG. 3 shows a sectional view taken along line III-III'of FIG. However, in FIG. 3, the semiconductor element 40 is shown by a two-dot chain line, and the fillet 31 portion of the adhesive member 30 is shown with a diagonal line.
　図３に示すように、水晶振動子２０は、平面視で矩形状である。水晶振動子２０に対応して、第１収容部材１２（第１基板１３及び第１キャップ１４）も、平面視で矩形状である。つまり、第１収容部材１２は、第１長辺１２ａ、第２長辺１２ｂ、第１短辺１２ｃ及び第２短辺１２ｄを有する。第１長辺１２ａは第２長辺１２ｂと対向する。第１長辺１２ａ及び第２長辺１２ｂは、水晶振動子２０の長手方向に沿って設けられる。第１短辺１２ｃは第２短辺１２ｄと対向する。第１短辺１２ｃ及び第２短辺１２ｄは、第１長辺１２ａと第２長辺１２ｂとの間に位置する。ここで、第１長辺１２ａ、第２長辺１２ｂ、第１短辺１２ｃ及び第２短辺１２ｄは、平面視で、第１基板１３の外形形状と一致する。 As shown in FIG. 3, the crystal oscillator 20 has a rectangular shape in a plan view. Corresponding to the crystal oscillator 20, the first accommodating member 12 (first substrate 13 and first cap 14) is also rectangular in a plan view. That is, the first accommodating member 12 has a first long side 12a, a second long side 12b, a first short side 12c, and a second short side 12d. The first long side 12a faces the second long side 12b. The first long side 12a and the second long side 12b are provided along the longitudinal direction of the crystal oscillator 20. The first short side 12c faces the second short side 12d. The first short side 12c and the second short side 12d are located between the first long side 12a and the second long side 12b. Here, the first long side 12a, the second long side 12b, the first short side 12c, and the second short side 12d match the outer shape of the first substrate 13 in a plan view.
　第１キャップ１４も第１長辺ｓ１、第２長辺ｓ２、第１短辺ｓ３及び第２短辺ｓ４を有する。第１長辺ｓ１、第２長辺ｓ２、第１短辺ｓ３及び第２短辺ｓ４は、平面視で、壁部１４ｂの外形形状である。 The first cap 14 also has a first long side s1, a second long side s2, a first short side s3, and a second short side s4. The first long side s1, the second long side s2, the first short side s3, and the second short side s4 are the outer shapes of the wall portion 14b in a plan view.
　半導体素子４０は、第１収容部材１２よりも大きい面積を有し、第１収容部材１２の第１長辺１２ａ、第２長辺１２ｂ、第１短辺１２ｃ及び第２短辺１２ｄと重なる。第１収容部材１２の４辺、水晶振動子２０及び接着部材３０はいずれも、平面視で、半導体素子４０の外周の内側に位置する。 The semiconductor element 40 has a larger area than the first accommodating member 12, and overlaps the first long side 12a, the second long side 12b, the first short side 12c, and the second short side 12d of the first accommodating member 12. The four sides of the first accommodating member 12, the crystal oscillator 20, and the adhesive member 30 are all located inside the outer periphery of the semiconductor element 40 in a plan view.
　接着部材３０は、半導体素子４０の外周の内側であって、第１収容部材１２と重なる領域に設けられる。接着部材３０は、第１長辺１２ａ、第２長辺１２ｂ、第１短辺１２ｃ及び第２短辺１２ｄと重なり、かつ、第１長辺１２ａ、第２長辺１２ｂ、第１短辺１２ｃ及び第２短辺１２ｄよりも外側の領域まで設けられる。つまり、接着部材３０は、第１キャップ１４の上板１４ａ及び湾曲部１４ｄの全ての領域を覆っている。 The adhesive member 30 is provided in a region inside the outer circumference of the semiconductor element 40 and overlapping with the first accommodating member 12. The adhesive member 30 overlaps the first long side 12a, the second long side 12b, the first short side 12c and the second short side 12d, and has the first long side 12a, the second long side 12b, and the first short side 12c. And a region outside the second short side 12d is provided. That is, the adhesive member 30 covers all the regions of the upper plate 14a and the curved portion 14d of the first cap 14.
　フィレット３１は、壁部１４ｂよりも外側に形成される。つまり、フィレット３１は、第１長辺ｓ１、第２長辺ｓ２、第１短辺ｓ３及び第２短辺ｓ４に沿って、枠状に形成される。フィレット３１は、第１収容部材１２の第１長辺１２ａ、第２長辺１２ｂ、第１短辺１２ｃ及び第２短辺１２ｄと重なって、かつ、第１長辺１２ａ、第２長辺１２ｂ、第１短辺１２ｃ及び第２短辺１２ｄよりも外側にも位置する。 The fillet 31 is formed outside the wall portion 14b. That is, the fillet 31 is formed in a frame shape along the first long side s1, the second long side s2, the first short side s3, and the second short side s4. The fillet 31 overlaps with the first long side 12a, the second long side 12b, the first short side 12c and the second short side 12d of the first accommodating member 12, and the first long side 12a and the second long side 12b. , It is also located outside the first short side 12c and the second short side 12d.
　接着部材３０の形成方法の一例として、液体状の樹脂を用いて、ディスペンサにより第１キャップ１４の上板１４ａの上面に、所定のパターンで塗布形成される。その後、第１キャップ１４の上板１４ａに半導体素子４０を配置することで、液体状の樹脂が上板１４ａの全面に押し拡げられるとともに、液体状の樹脂の外周にフィレット３１が形成される。その後、液体状の樹脂が硬化されて、フィレット３１を有する接着部材３０が形成される。 As an example of the method of forming the adhesive member 30, a liquid resin is used to apply and form the adhesive member 30 on the upper surface of the upper plate 14a of the first cap 14 in a predetermined pattern by a dispenser. After that, by arranging the semiconductor element 40 on the upper plate 14a of the first cap 14, the liquid resin is spread over the entire surface of the upper plate 14a, and the fillet 31 is formed on the outer periphery of the liquid resin. After that, the liquid resin is cured to form the adhesive member 30 having the fillet 31.
（実施例）
　図４は、実施例に係る半導体モジュールにおいて、リフロー工程前後の半導体素子の反り量の変化を示すグラフである。図５は、比較例に係る半導体モジュールにおいて、リフロー工程前後の半導体素子の反り量の変化を示すグラフである。図４に示す実施例に係る半導体モジュール１０は、上述したように、第１キャップ１４と半導体素子４０との間に、フィレット３１を有する接着部材３０が設けられた構成である。図５に示す比較例に係る半導体モジュールは、接着部材にフィレットが形成されていない構成、すなわち、第１キャップと重なる領域にのみ接着部材が設けられた構成である。実施例と比較例とで、接着部材３０のフィレット３１の有無のみ異なり、その他の構成（例えば、接着部材３０の材料、半導体素子４０の大きさ等）や、リフロー条件は同一としている。 (Example)
FIG. 4 is a graph showing changes in the amount of warpage of semiconductor elements before and after the reflow process in the semiconductor module according to the embodiment. FIG. 5 is a graph showing changes in the amount of warpage of semiconductor elements before and after the reflow process in the semiconductor module according to the comparative example. As described above, the semiconductor module 10 according to the embodiment shown in FIG. 4 has a configuration in which an adhesive member 30 having a fillet 31 is provided between the first cap 14 and the semiconductor element 40. The semiconductor module according to the comparative example shown in FIG. 5 has a configuration in which a fillet is not formed on the adhesive member, that is, a configuration in which the adhesive member is provided only in a region overlapping the first cap. Only the presence or absence of the fillet 31 of the adhesive member 30 is different between the examples and the comparative examples, and other configurations (for example, the material of the adhesive member 30, the size of the semiconductor element 40, etc.) and the reflow conditions are the same.
　図４に示すグラフ１及び図５に示すグラフ２において、それぞれリフロー工程前後の半導体素子４０の反り量を示している。グラフ１及びグラフ２において、それぞれ、横軸は時間を示し、「初期」はリフロー工程を行う前の時点を示し、「４８ｈ後」は、リフロー工程後、４８時間経過した時点を示す。縦軸は、半導体素子４０の反り量を示す。反り量は、「初期」での半導体素子４０の反り量を基準として、リフロー工程後、４８ｈ放置した場合の半導体素子４０の反り量の変化を示す。実施例は３つのサンプルＡ、Ｂ、Ｃについて、比較例は３つのサンプルＤ、Ｅ、Ｆについて、半導体素子４０反り量の変化を調査した。 Graph 1 shown in FIG. 4 and graph 2 shown in FIG. 5 show the amount of warpage of the semiconductor element 40 before and after the reflow process, respectively. In Graph 1 and Graph 2, the horizontal axis indicates time, “initial” indicates the time point before the reflow process is performed, and “after 48 hours” indicates the time point 48 hours after the reflow process. The vertical axis indicates the amount of warpage of the semiconductor element 40. The amount of warpage indicates a change in the amount of warpage of the semiconductor element 40 when left for 48 hours after the reflow step, based on the amount of warpage of the semiconductor element 40 in the "initial stage". The change in the amount of warpage of the semiconductor element 40 was investigated for the three samples A, B, and C in the example and for the three samples D, E, and F in the comparative example.
　図４に示すように、実施例の半導体モジュール１０は、リフロー工程後において、サンプルＡ、Ｂ、Ｃの反り量は、それぞれ、０．０１μｍ、０．０４μｍ、０．０１μｍである。平均の反り量は、０．０２μｍである。一方、図５に示すように、比較例の半導体モジュールでは、リフロー工程後において、サンプルＤ、Ｅ、Ｆの反り量は、それぞれ、０．１７μｍ、０．０３μｍ、０．２２μｍである。平均の反り量は、０．１４μｍである。 As shown in FIG. 4, in the semiconductor module 10 of the example, the warpage amounts of the samples A, B, and C are 0.01 μm, 0.04 μm, and 0.01 μm, respectively, after the reflow step. The average amount of warpage is 0.02 μm. On the other hand, as shown in FIG. 5, in the semiconductor module of the comparative example, the warpage amounts of the samples D, E, and F are 0.17 μm, 0.03 μm, and 0.22 μm, respectively, after the reflow step. The average amount of warpage is 0.14 μm.
　図４及び図５に示すように、実施例の半導体モジュール１０は、フィレット３１を有する接着部材３０を設けることで、リフロー工程後の半導体素子４０の反り量を抑制できることが示された。 As shown in FIGS. 4 and 5, it was shown that the semiconductor module 10 of the embodiment can suppress the amount of warpage of the semiconductor element 40 after the reflow process by providing the adhesive member 30 having the fillet 31.
　以上説明したように、本実施形態の半導体モジュール１０は、第１基板１３と、水晶振動子２０（電子部品）と、第１キャップ１４と、半導体素子４０と、接着部材３０と、を有する。水晶振動子２０は、第１基板１３に搭載される。第１キャップ１４は、第１基板１３に設けられ、水晶振動子２０を覆う上板１４ａと、上板１４ａの周囲を囲む壁部１４ｂとを含む。半導体素子４０は、上板１４ａと対向して設けられ、第１基板１３と垂直な方向からの平面視で第１キャップ１４よりも大きい面積を有する。接着部材３０は、第１キャップ１４と半導体素子４０との間に設けられ、第１キャップ１４から半導体素子４０に向かって裾広がりのフィレット３１が形成された接着部材３０とを有する。 As described above, the semiconductor module 10 of the present embodiment includes a first substrate 13, a crystal oscillator 20 (electronic component), a first cap 14, a semiconductor element 40, and an adhesive member 30. The crystal oscillator 20 is mounted on the first substrate 13. The first cap 14 is provided on the first substrate 13, and includes an upper plate 14a that covers the crystal oscillator 20 and a wall portion 14b that surrounds the upper plate 14a. The semiconductor element 40 is provided so as to face the upper plate 14a, and has an area larger than that of the first cap 14 in a plan view from a direction perpendicular to the first substrate 13. The adhesive member 30 is provided between the first cap 14 and the semiconductor element 40, and has an adhesive member 30 in which a fillet 31 having a hem extending from the first cap 14 toward the semiconductor element 40 is formed.
　これによれば、半導体モジュール１０にリフロー処理などの熱処理が施された場合であっても、第１キャップ１４と半導体素子４０との熱膨張係数の差に応じて発生する残留応力が、接着部材３０により抑制される。また、接着部材３０には、フィレット３１が形成されているので、フィレット３１が形成されない場合に比べて接着部材３０と半導体素子４０との接触面積が大きくなる。これにより、熱が加えられた場合に、半導体素子４０に加えられる応力が接着部材３０により分散され、第１キャップ１４と半導体素子４０との間に発生する応力が低減される。これにより、熱処理後における半導体素子４０の残留応力を効果的に抑制することができる。この結果、半導体モジュール１０は、熱が加えられた場合の、半導体素子４０の変形（反り）の発生を抑制することができる。 According to this, even when the semiconductor module 10 is subjected to a heat treatment such as a reflow treatment, the residual stress generated according to the difference in the coefficient of thermal expansion between the first cap 14 and the semiconductor element 40 is generated by the adhesive member. It is suppressed by 30. Further, since the fillet 31 is formed in the adhesive member 30, the contact area between the adhesive member 30 and the semiconductor element 40 is larger than that in the case where the fillet 31 is not formed. As a result, when heat is applied, the stress applied to the semiconductor element 40 is dispersed by the adhesive member 30, and the stress generated between the first cap 14 and the semiconductor element 40 is reduced. As a result, the residual stress of the semiconductor element 40 after the heat treatment can be effectively suppressed. As a result, the semiconductor module 10 can suppress the occurrence of deformation (warp) of the semiconductor element 40 when heat is applied.
　例えば、ＴＣＸＯにおいて、半導体素子４０を第２基板５１上に設ける構成に比べて、本実施形態では、半導体素子４０を、第１収容部材１２及び水晶振動子２０の上に重ねて配置することで、半導体素子４０と水晶振動子２０との距離を小さくすることができる。この結果、半導体モジュール１０は、温度特性を向上させることができる。一方で、半導体素子４０に反りが生じた場合、ピエゾ抵抗効果により半導体素子４０の温度特性が低下する可能性がある。本実施形態では、上述したように、半導体素子４０の変形が抑制されるので、半導体素子４０の温度特性の低下を抑制できる。 For example, in TCXO, as compared with the configuration in which the semiconductor element 40 is provided on the second substrate 51, in the present embodiment, the semiconductor element 40 is arranged so as to be overlapped on the first accommodating member 12 and the crystal oscillator 20. , The distance between the semiconductor element 40 and the crystal oscillator 20 can be reduced. As a result, the semiconductor module 10 can improve the temperature characteristics. On the other hand, when the semiconductor element 40 is warped, the temperature characteristics of the semiconductor element 40 may deteriorate due to the piezoresistive effect. In the present embodiment, as described above, the deformation of the semiconductor element 40 is suppressed, so that the decrease in the temperature characteristics of the semiconductor element 40 can be suppressed.
　また、半導体モジュール１０において、接着部材３０は、第１キャップ１４の周囲を囲む４辺（第１長辺ｓ１、第２長辺ｓ２、第１短辺ｓ３及び第２短辺ｓ４）と重なって設けられる。 Further, in the semiconductor module 10, the adhesive member 30 overlaps with four sides (first long side s1, second long side s2, first short side s3, and second short side s4) surrounding the periphery of the first cap 14. Provided.
　これによれば、半導体モジュール１０は、効果的に、第１キャップ１４と半導体素子４０との間に発生する残留応力を抑制することができる。 According to this, the semiconductor module 10 can effectively suppress the residual stress generated between the first cap 14 and the semiconductor element 40.
　また、半導体モジュール１０において、第１キャップ１４は、上板１４ａと壁部１４ｂとを接続する湾曲部１４ｄを有し、接着部材３０は、上板１４ａ及び湾曲部１４ｄを覆って設けられる。 Further, in the semiconductor module 10, the first cap 14 has a curved portion 14d that connects the upper plate 14a and the wall portion 14b, and the adhesive member 30 is provided so as to cover the upper plate 14a and the curved portion 14d.
　これにより、第１キャップ１４が湾曲部１４ｄを有するので、上板１４ａと壁部１４ｂとが屈曲して接続された構造に比べて、第１キャップ１４における応力の集中を抑制することができる。また、湾曲部１４ｄと重なる部分では、湾曲部１４ｄよりも内側の上板１４ａと重なる部分よりも接着部材３０が厚く形成される。これにより、接着部材３０は、効果的に第１キャップ１４と半導体素子４０との間に発生する応力を分散し、半導体素子４０の変形を抑制することができる。また、フィレット３１が良好に形成され、半導体素子４０と接するフィレット３１の面積も大きくすることができる。 As a result, since the first cap 14 has the curved portion 14d, it is possible to suppress the concentration of stress in the first cap 14 as compared with the structure in which the upper plate 14a and the wall portion 14b are bent and connected. Further, in the portion overlapping the curved portion 14d, the adhesive member 30 is formed thicker than the portion overlapping the upper plate 14a inside the curved portion 14d. As a result, the adhesive member 30 can effectively disperse the stress generated between the first cap 14 and the semiconductor element 40, and suppress the deformation of the semiconductor element 40. Further, the fillet 31 is well formed, and the area of the fillet 31 in contact with the semiconductor element 40 can be increased.
　また、半導体モジュール１０は、更に、第１基板１３が搭載される第２基板５１と、第２基板５１に設けられ、第１基板１３、第１キャップ１４及び半導体素子４０を覆う第２キャップ５２と、を含む。 Further, the semiconductor module 10 is further provided on the second substrate 51 on which the first substrate 13 is mounted and the second substrate 51, and the second cap 52 that covers the first substrate 13, the first cap 14, and the semiconductor element 40. And, including.
　これによれば、水晶振動子２０及び半導体素子４０は、第２基板５１と第２キャップ５２とで囲まれた内部空間ＳＰ２に設けられるので、外部へのノイズの漏洩及び外部からのノイズの侵入を抑制することができる。また、半導体素子４０の上面は、空間を有して第２キャップ５２と対向する。つまり、半導体素子４０の下面に接着部材３０が設けられ、半導体素子４０の上面には接着部材３０等の樹脂材料は設けられない。このため、半導体素子４０が樹脂封止される構成に比べて、半導体モジュール１０に熱が加えられた場合の、半導体素子４０に発生する応力を抑制することができる。 According to this, since the crystal oscillator 20 and the semiconductor element 40 are provided in the internal space SP2 surrounded by the second substrate 51 and the second cap 52, noise leakage to the outside and noise intrusion from the outside Can be suppressed. Further, the upper surface of the semiconductor element 40 has a space and faces the second cap 52. That is, the adhesive member 30 is provided on the lower surface of the semiconductor element 40, and the resin material such as the adhesive member 30 is not provided on the upper surface of the semiconductor element 40. Therefore, as compared with the configuration in which the semiconductor element 40 is resin-sealed, the stress generated in the semiconductor element 40 when heat is applied to the semiconductor module 10 can be suppressed.
　また、半導体モジュール１０において、電子部品は水晶振動子２０である。 Further, in the semiconductor module 10, the electronic component is a crystal oscillator 20.
　これによれば、半導体モジュール１０は、温度補償型水晶発振器を構成できる。 According to this, the semiconductor module 10 can form a temperature-compensated crystal oscillator.
　なお、半導体モジュール１０の各構成要素の形状、厚さ等は、あくまで一例であり適宜変更することができる。例えば、第１基板１３及び第２基板５１は、それぞれ、多層基板であってもよいし、水晶振動子２０に加え、他の部品が搭載されていてもよい。また、第１キャップ１４及び第２キャップ５２は、単一の金属で形成される場合に限定されず、必要に応じてめっき膜等の皮膜が設けられていてもよい。 The shape, thickness, etc. of each component of the semiconductor module 10 are merely examples and can be changed as appropriate. For example, the first substrate 13 and the second substrate 51 may be multilayer substrates, respectively, or may be equipped with other components in addition to the crystal oscillator 20. Further, the first cap 14 and the second cap 52 are not limited to the case where they are formed of a single metal, and a film such as a plating film may be provided as needed.
（第２実施形態）
　図６は、第２実施形態に係る半導体モジュールの、水晶振動子及び第１収容部材と、半導体素子との積層構造を示す断面図である。第２実施形態では、上記第１実施形態とは異なり、第１キャップ１４の上板１４ａが湾曲形状を有している構成について説明する。なお、図６等に示す上板１４ａの湾曲形状は、理解のために実際の湾曲形状よりも強調して、距離ｄ１、ｄ２の差を大きく記載している。実際の距離ｄ１、ｄ２の差は、図６よりも小さい。 (Second Embodiment)
FIG. 6 is a cross-sectional view showing a laminated structure of a crystal oscillator, a first accommodating member, and a semiconductor element of the semiconductor module according to the second embodiment. In the second embodiment, unlike the first embodiment, the configuration in which the upper plate 14a of the first cap 14 has a curved shape will be described. The curved shape of the upper plate 14a shown in FIG. 6 and the like is emphasized more than the actual curved shape for understanding, and the difference between the distances d1 and d2 is greatly described. The difference between the actual distances d1 and d2 is smaller than that in FIG.
　図６に示すように、半導体モジュール１０Ａにおいて、上板１４ａの中央部が第１基板１３側に向かって凹む。なお、この場合でも、上板１４ａは、水晶振動子２０と非接触状態となるように離隔して設けられる。 As shown in FIG. 6, in the semiconductor module 10A, the central portion of the upper plate 14a is recessed toward the first substrate 13 side. Even in this case, the upper plate 14a is provided so as to be separated from the crystal oscillator 20 so as to be in a non-contact state.
　上板１４ａの中央部での、上板１４ａと半導体素子４０との距離ｄ１は、上板１４ａの周縁での、上板１４ａと半導体素子４０との距離ｄ２よりも大きい。距離ｄ１は、上板１４ａの高さが最も低い（すなわち、第１基板１３に最も近い）位置での距離を示す。また、距離ｄ２は、上板１４ａの高さが最も高い（すなわち、第１基板１３に最も離れた）位置での距離を示す。 The distance d1 between the upper plate 14a and the semiconductor element 40 at the central portion of the upper plate 14a is larger than the distance d2 between the upper plate 14a and the semiconductor element 40 at the peripheral edge of the upper plate 14a. The distance d1 indicates the distance at the position where the height of the upper plate 14a is the lowest (that is, the closest to the first substrate 13). Further, the distance d2 indicates the distance at the position where the height of the upper plate 14a is the highest (that is, the farthest from the first substrate 13).
　第２実施形態では、第１実施形態に較べて、上板１４ａの中央部での接着部材３０の厚さを厚くすることができる。これにより、熱が加えられた場合に、効果的に第１キャップ１４と半導体素子４０との間に発生する応力を分散することができ、熱処理後に半導体素子４０に発生する残留応力を効果的に抑制することができる。 In the second embodiment, the thickness of the adhesive member 30 at the central portion of the upper plate 14a can be increased as compared with the first embodiment. As a result, when heat is applied, the stress generated between the first cap 14 and the semiconductor element 40 can be effectively dispersed, and the residual stress generated in the semiconductor element 40 after the heat treatment can be effectively dispersed. It can be suppressed.
（第３実施形態）
　図７は、第３実施形態に係る半導体モジュールを模式的に示す平面図である。第３実施形態では、上記第１実施形態及び第２実施形態とは異なり、接着部材３０が、第１キャップ１４の４辺のうち、第１長辺ｓ１及び第２長辺ｓ２と重なって設けられる構成について説明する。 (Third Embodiment)
FIG. 7 is a plan view schematically showing the semiconductor module according to the third embodiment. In the third embodiment, unlike the first embodiment and the second embodiment, the adhesive member 30 is provided so as to overlap the first long side s1 and the second long side s2 among the four sides of the first cap 14. The configuration to be used will be described.
　図７に示すように、半導体モジュール１０Ｂにおいて、接着部材３０は、第１短辺ｓ３及び第２短辺ｓ４と重ならない位置に設けられる。言い換えると、接着部材３０は、平面視で、第１短辺ｓ３と第２短辺ｓ４との間に配置される。第１短辺ｓ３及び第２短辺ｓ４の壁部１４ｂは、接着部材３０を介さずに半導体素子４０と対向する。 As shown in FIG. 7, in the semiconductor module 10B, the adhesive member 30 is provided at a position that does not overlap with the first short side s3 and the second short side s4. In other words, the adhesive member 30 is arranged between the first short side s3 and the second short side s4 in a plan view. The wall portions 14b of the first short side s3 and the second short side s4 face the semiconductor element 40 without interposing the adhesive member 30.
　第１キャップ１４の４辺のうち、第１長辺ｓ１及び第２長辺ｓ２は、第１短辺ｓ３及び第２短辺ｓ４に比べて長い、すなわち、第１キャップ１４は、第１長辺ｓ１及び第２長辺ｓ２に沿った方向で、熱が加えられた場合の変形量が大きい。第３実施形態においても、接着部材３０は、少なくとも第１長辺ｓ１及び第２長辺ｓ２と重なって配置されるため、効果的に、熱が加えられた場合に半導体素子４０に発生する応力を抑制して、半導体素子４０の変形を抑制することができる。 Of the four sides of the first cap 14, the first long side s1 and the second long side s2 are longer than the first short side s3 and the second short side s4, that is, the first cap 14 has the first length. The amount of deformation when heat is applied is large in the direction along the side s1 and the second long side s2. Also in the third embodiment, since the adhesive member 30 is arranged so as to overlap at least the first long side s1 and the second long side s2, the stress generated in the semiconductor element 40 when heat is effectively applied. Can be suppressed to suppress deformation of the semiconductor element 40.
　なお、第３実施形態の半導体モジュール１０Ｂは、上述した第２実施形態の構成と組み合わせることができる。 The semiconductor module 10B of the third embodiment can be combined with the configuration of the second embodiment described above.
　なお、上記した実施の形態は、本発明の理解を容易にするためのものであり、本発明を限定して解釈するためのものではない。本発明は、その趣旨を逸脱することなく、変更／改良され得るとともに、本発明にはその等価物も含まれる。 It should be noted that the above-described embodiment is for facilitating the understanding of the present invention, and is not for limiting and interpreting the present invention. The present invention can be modified / improved without departing from the spirit thereof, and the present invention also includes an equivalent thereof.
　１０、１０Ａ、１０Ｂ　半導体モジュール
　１２　第１収容部材
　１２ａ、ｓ１　第１長辺
　１２ｂ、ｓ２　第２長辺
　１２ｃ、ｓ３　第１短辺
　１２ｄ、ｓ４　第２短辺
　１３　第１基板
　１４　第１キャップ
　１４ａ、５２ａ　上板
　１４ｂ、５２ｂ　壁部
　１４ｃ、５２ｃ　フランジ部
　１４ｄ　湾曲部
　１６、４１、５４、５５　接続端子
　２０　水晶振動子
　２１　導電性接着材
　３０　接着部材
　３１　フィレット
　４０　半導体素子
　４５　ボンディングワイヤ
　５０　第２収容部材
　５１　第２基板
　５２　第２キャップ
　ＳＰ１、ＳＰ２　内部空間 10, 10A, 10B Semiconductor module 12 1st housing member 12a, s1 1st long side 12b, s2 2nd long side 12c, s3 1st short side 12d, s4 2nd short side 13 1st substrate 14 1st cap 14a, 52a Top plate 14b, 52b Wall part 14c, 52c Flange part 14d Curved part 16, 41, 54, 55 Connection terminal 20 Crystal transducer 21 Conductive adhesive 30 Adhesive member 31 Fillet 40 Semiconductor element 45 Bonding wire 50 Second accommodating member 51 2nd substrate 52 2nd cap SP1, SP2 Internal space

Claims (7)

  1. 　第１基板と、
    　前記第１基板に搭載される電子部品と、
    　前記第１基板に設けられ、前記電子部品を覆う上板と、前記上板の周囲を囲む壁部とを含む第１キャップと、
    　前記上板と対向して設けられ、前記第１基板と垂直な方向からの平面視で前記第１キャップよりも大きい面積を有する半導体素子と、
    　前記第１キャップと前記半導体素子との間に設けられ、前記第１キャップから前記半導体素子に向かって裾広がりのフィレットが形成された接着部材とを有する
    　半導体モジュール。     1st board and
    The electronic components mounted on the first substrate and
    A first cap provided on the first substrate and including an upper plate for covering the electronic component and a wall portion surrounding the periphery of the upper plate.
    A semiconductor element provided so as to face the upper plate and having an area larger than that of the first cap in a plan view from a direction perpendicular to the first substrate.
    A semiconductor module having an adhesive member provided between the first cap and the semiconductor element and having a fillet having a wide hem formed from the first cap toward the semiconductor element.
  2. 　請求項１に記載の半導体モジュールであって、
    　前記第１キャップは、前記平面視で、第１長辺と、前記第１長辺と対向する第２長辺と、前記第１長辺及び前記第２長辺の間に設けられた第１短辺及び第２短辺とを有し、
    　前記接着部材は、少なくとも前記第１長辺及び前記第２長辺と重なって設けられる
    　半導体モジュール。     The semiconductor module according to claim 1.
    The first cap is provided between the first long side, the second long side facing the first long side, the first long side, and the second long side in the plan view. It has a short side and a second short side,
    The adhesive member is a semiconductor module provided so as to overlap at least the first long side and the second long side.
  3. 　請求項１又は請求項２に記載の半導体モジュールであって、
    　前記接着部材は、前記平面視で、前記第１キャップの周囲を囲む４辺と重なって設けられる
    　半導体モジュール。     The semiconductor module according to claim 1 or 2.
    The adhesive member is a semiconductor module provided so as to overlap the four sides surrounding the periphery of the first cap in the plan view.
  4. 　請求項１から請求項３のいずれか１項に記載の半導体モジュールであって、
    　前記上板は、中央部が前記第１基板側に向かって凹む湾曲形状を有しており、
    　前記中央部での、前記上板と前記半導体素子との距離は、前記上板の周縁での前記上板と前記半導体素子との距離よりも大きい
    　半導体モジュール。     The semiconductor module according to any one of claims 1 to 3.
    The upper plate has a curved shape in which the central portion is recessed toward the first substrate side.
    A semiconductor module in which the distance between the upper plate and the semiconductor element at the central portion is larger than the distance between the upper plate and the semiconductor element at the peripheral edge of the upper plate.
  5. 　請求項１から請求項４のいずれか１項に記載の半導体モジュールであって、
    　前記第１キャップは、前記上板と前記壁部とを接続する湾曲部を有し、
    　前記接着部材は、前記上板及び前記湾曲部を覆って設けられる
    　半導体モジュール。     The semiconductor module according to any one of claims 1 to 4.
    The first cap has a curved portion that connects the upper plate and the wall portion.
    The adhesive member is a semiconductor module provided so as to cover the upper plate and the curved portion.
  6. 　請求項１から請求項５のいずれか１項に記載の半導体モジュールであって、
    　更に、前記第１基板が搭載される第２基板と、
    　前記第２基板に設けられ、前記第１基板、前記第１キャップ及び前記半導体素子を覆う第２キャップと、を含む
    　半導体モジュール。     The semiconductor module according to any one of claims 1 to 5.
    Further, a second substrate on which the first substrate is mounted and
    A semiconductor module provided on the second substrate and including the first substrate, the first cap, and a second cap that covers the semiconductor element.
  7. 　請求項１から請求項６のいずれか１項に記載の半導体モジュールであって、
    　前記電子部品は水晶振動子である
    　半導体モジュール。     The semiconductor module according to any one of claims 1 to 6.
    The electronic component is a semiconductor module which is a crystal oscillator.
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