JP2005531143A5 - - Google Patents

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Publication number
JP2005531143A5
JP2005531143A5 JP2004515710A JP2004515710A JP2005531143A5 JP 2005531143 A5 JP2005531143 A5 JP 2005531143A5 JP 2004515710 A JP2004515710 A JP 2004515710A JP 2004515710 A JP2004515710 A JP 2004515710A JP 2005531143 A5 JP2005531143 A5 JP 2005531143A5
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JP
Japan
Prior art keywords
resistance
circuit
digital circuit
substrate
low
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP2004515710A
Other languages
English (en)
Japanese (ja)
Other versions
JP2005531143A (ja
Filing date
Publication date
Priority claimed from US10/178,672 external-priority patent/US20030234438A1/en
Application filed filed Critical
Publication of JP2005531143A publication Critical patent/JP2005531143A/ja
Publication of JP2005531143A5 publication Critical patent/JP2005531143A5/ja
Withdrawn legal-status Critical Current

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JP2004515710A 2002-06-24 2003-05-21 ミクストシグナルrfアプリケーションおよび回路のための集積回路構造 Withdrawn JP2005531143A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/178,672 US20030234438A1 (en) 2002-06-24 2002-06-24 Integrated circuit structure for mixed-signal RF applications and circuits
PCT/US2003/016286 WO2004001850A1 (en) 2002-06-24 2003-05-21 Integrated circuit structure for mixed-signal rf applications and circuits

Publications (2)

Publication Number Publication Date
JP2005531143A JP2005531143A (ja) 2005-10-13
JP2005531143A5 true JP2005531143A5 (enExample) 2006-06-29

Family

ID=29734747

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2004515710A Withdrawn JP2005531143A (ja) 2002-06-24 2003-05-21 ミクストシグナルrfアプリケーションおよび回路のための集積回路構造

Country Status (7)

Country Link
US (1) US20030234438A1 (enExample)
EP (1) EP1518276A1 (enExample)
JP (1) JP2005531143A (enExample)
KR (1) KR20050013190A (enExample)
CN (1) CN1547775A (enExample)
AU (1) AU2003248560A1 (enExample)
WO (1) WO2004001850A1 (enExample)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4742543B2 (ja) * 2004-09-08 2011-08-10 凸版印刷株式会社 Dnaチップ装置
US7375000B2 (en) * 2005-08-22 2008-05-20 International Business Machines Corporation Discrete on-chip SOI resistors
KR100854440B1 (ko) * 2006-04-26 2008-08-26 매그나칩 반도체 유한회사 반도체 집적회로
US7884440B2 (en) * 2006-04-26 2011-02-08 Magnachip Semiconductor, Ltd. Semiconductor integrated circuit
KR100876604B1 (ko) 2007-07-13 2008-12-31 (주)페타리 반도체 소자 및 그 제조 방법
US8129817B2 (en) * 2008-12-31 2012-03-06 Taiwan Semiconductor Manufacturing Co., Ltd. Reducing high-frequency signal loss in substrates
CN102055414A (zh) * 2010-04-14 2011-05-11 锐迪科创微电子(北京)有限公司 射频功率放大器模块及移动通信终端
US8679863B2 (en) 2012-03-15 2014-03-25 International Business Machines Corporation Fine tuning highly resistive substrate resistivity and structures thereof
KR102070477B1 (ko) * 2012-06-28 2020-01-29 스카이워크스 솔루션즈, 인코포레이티드 고저항률 기판 상의 쌍극성 트랜지스터
JP6076068B2 (ja) * 2012-12-17 2017-02-08 ルネサスエレクトロニクス株式会社 半導体集積回路装置
CN104051529B (zh) * 2013-03-13 2017-07-28 台湾积体电路制造股份有限公司 高阻抗衬底上的rf开关

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5218224A (en) * 1989-06-14 1993-06-08 Kabushiki Kaisha Toshiba Semiconductor device including inversion preventing layers having a plurality of impurity concentration peaks in direction of depth
JPH03222467A (ja) * 1990-01-29 1991-10-01 Mitsubishi Electric Corp 半導体集積回路装置
US5994755A (en) * 1991-10-30 1999-11-30 Intersil Corporation Analog-to-digital converter and method of fabrication
JP3217560B2 (ja) * 1993-11-15 2001-10-09 株式会社東芝 半導体装置
US5623159A (en) * 1994-10-03 1997-04-22 Motorola, Inc. Integrated circuit isolation structure for suppressing high-frequency cross-talk
US5559349A (en) * 1995-03-07 1996-09-24 Northrop Grumman Corporation Silicon integrated circuit with passive devices over high resistivity silicon substrate portion, and active devices formed in lower resistivity silicon layer over the substrate
US5880515A (en) * 1996-09-30 1999-03-09 Lsi Logic Corporation Circuit isolation utilizing MeV implantation
JPH10199993A (ja) * 1997-01-07 1998-07-31 Mitsubishi Electric Corp 半導体回路装置及びその製造方法、半導体回路装置製造用マスク装置
US6407441B1 (en) * 1997-12-29 2002-06-18 Texas Instruments Incorporated Integrated circuit and method of using porous silicon to achieve component isolation in radio frequency applications
US6388290B1 (en) * 1998-06-10 2002-05-14 Agere Systems Guardian Corp. Single crystal silicon on polycrystalline silicon integrated circuits
US6166415A (en) * 1998-11-02 2000-12-26 Mitsubishi Denki Kabushiki Kaisha Semiconductor device with improved noise resistivity
US6424022B1 (en) * 2000-03-12 2002-07-23 Mobilink Telecom, Inc. Guard mesh for noise isolation in highly integrated circuits
US7575969B2 (en) * 2000-03-02 2009-08-18 Texas Instruments Incorporated Buried layer and method
US20020125537A1 (en) * 2000-05-30 2002-09-12 Ting-Wah Wong Integrated radio frequency circuits
US6441442B1 (en) * 2000-05-30 2002-08-27 Programmable Silicon Solutions Integrated inductive circuits
US6525394B1 (en) * 2000-08-03 2003-02-25 Ray E. Kuhn Substrate isolation for analog/digital IC chips
JP2002198490A (ja) * 2000-12-26 2002-07-12 Toshiba Corp 半導体装置
US6909150B2 (en) * 2001-07-23 2005-06-21 Agere Systems Inc. Mixed signal integrated circuit with improved isolation
US6563181B1 (en) * 2001-11-02 2003-05-13 Motorola, Inc. High frequency signal isolation in a semiconductor device

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