JP2005524906A5 - - Google Patents

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Publication number
JP2005524906A5
JP2005524906A5 JP2004504121A JP2004504121A JP2005524906A5 JP 2005524906 A5 JP2005524906 A5 JP 2005524906A5 JP 2004504121 A JP2004504121 A JP 2004504121A JP 2004504121 A JP2004504121 A JP 2004504121A JP 2005524906 A5 JP2005524906 A5 JP 2005524906A5
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JP
Japan
Prior art keywords
coupled
computer system
processor
processor element
interface bus
Prior art date
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Withdrawn
Application number
JP2004504121A
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English (en)
Japanese (ja)
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JP2005524906A (ja
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Publication date
Priority claimed from US10/142,045 external-priority patent/US20030212853A1/en
Application filed filed Critical
Publication of JP2005524906A publication Critical patent/JP2005524906A/ja
Publication of JP2005524906A5 publication Critical patent/JP2005524906A5/ja
Withdrawn legal-status Critical Current

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JP2004504121A 2002-05-09 2002-12-03 少なくとも１つの組込型マイクロプロセッサコアを有するフィールドプログラマブルゲートアレイ制御要素を組込んだ適応プロセッサアーキテクチャ Withdrawn JP2005524906A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/142,045 US20030212853A1 (en) 2002-05-09 2002-05-09 Adaptive processor architecture incorporating a field programmable gate array control element having at least one embedded microprocessor core
PCT/US2002/038844 WO2003096195A1 (en) 2002-05-09 2002-12-03 Adaptive processor architecture incorporating a field programmable gate array control element having at least one embedded microprocessor core

Publications (2)

Publication Number Publication Date
JP2005524906A JP2005524906A (ja) 2005-08-18
JP2005524906A5 true JP2005524906A5 (enExample) 2006-01-19

Family

ID=29399794

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2004504121A Withdrawn JP2005524906A (ja) 2002-05-09 2002-12-03 少なくとも１つの組込型マイクロプロセッサコアを有するフィールドプログラマブルゲートアレイ制御要素を組込んだ適応プロセッサアーキテクチャ

Country Status (6)

Country Link
US (2) US20030212853A1 (enExample)
EP (1) EP1502190A1 (enExample)
JP (1) JP2005524906A (enExample)
AU (1) AU2002360486A1 (enExample)
CA (1) CA2483541A1 (enExample)
WO (1) WO2003096195A1 (enExample)

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JP4571454B2 (ja) * 2004-07-16 2010-10-27 株式会社アドバンテスト 半導体集積回路
EP1713007B1 (en) * 2005-04-11 2008-09-17 STMicroelectronics S.r.l. A dynamically reconfigurable System-on-Chip comprising a plurality of reconfigurable gate array devices
WO2008061162A1 (en) * 2006-11-14 2008-05-22 Star Bridge Systems, Inc. Hybrid computing platform having fpga components with embedded processors
US8332610B2 (en) 2007-04-17 2012-12-11 Marvell World Trade Ltd. System on chip with reconfigurable SRAM
CN102799559B (zh) * 2012-07-27 2015-12-02 浪潮(北京)电子信息产业有限公司 一种验证系统和拓扑结构的建立方法
CN103419201B (zh) * 2013-08-19 2015-07-08 电子科技大学 基于fpga的多指节机器人控制系统及其控制方法
CN107430766A (zh) 2015-04-07 2017-12-01 深圳市大疆创新科技有限公司 用于将图像数据并行存储在相机系统中的系统和方法
CN106648507B (zh) * 2016-12-05 2020-02-14 中国航空工业集团公司洛阳电光设备研究所 一种用于嵌入式处理器扩展dvi显示输出的电路及方法
TWI638442B (zh) * 2017-05-26 2018-10-11 瑞昱半導體股份有限公司 電子裝置及其電路基板
CN108776644B (zh) * 2018-05-04 2022-09-27 中国电子科技集团公司第三十六研究所 一种数据高速缓存系统、方法和航天用电子设备
CN110059049A (zh) * 2019-03-27 2019-07-26 中国计量大学上虞高等研究院有限公司 一种实时存储装置
CN112068467B (zh) * 2020-08-24 2022-01-14 国微集团(深圳)有限公司 数据传输系统、数据存储系统
CN113569525B (zh) * 2021-06-24 2024-07-23 合肥松豪电子科技有限公司 一种利用sram在fpga验证平台上的验证模型及方法
US12430270B1 (en) * 2024-11-26 2025-09-30 Texas Milkyway Inc. Multi-port SRAM system for a distributed memory pool

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US5802290A (en) * 1992-07-29 1998-09-01 Virtual Computer Corporation Computer network of distributed virtual computers which are EAC reconfigurable in response to instruction to be executed
US6052773A (en) * 1995-02-10 2000-04-18 Massachusetts Institute Of Technology DPGA-coupled microprocessors
US5570040A (en) * 1995-03-22 1996-10-29 Altera Corporation Programmable logic array integrated circuit incorporating a first-in first-out memory
US5903771A (en) * 1996-01-16 1999-05-11 Alacron, Inc. Scalable multi-processor architecture for SIMD and MIMD operations
US5737766A (en) * 1996-02-14 1998-04-07 Hewlett Packard Company Programmable gate array configuration memory which allows sharing with user memory
US5744980A (en) * 1996-02-16 1998-04-28 Actel Corporation Flexible, high-performance static RAM architecture for field-programmable gate arrays
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US6339819B1 (en) * 1997-12-17 2002-01-15 Src Computers, Inc. Multiprocessor with each processor element accessing operands in loaded input buffer and forwarding results to FIFO output buffer
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