JP2005353873A - Chip conveying method and apparatus thereof - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To shorten a tact time of chip conveyance approximately by half or less at the same cost as a conventional method and apparatus in a chip conveying method and apparatus for conveying chips which are cut out of a wafer, to predetermined positions on a tray in accordance with their classifications. <P>SOLUTION: When picking up chips 14 which are cut out of a wafer 15 and classified in accordance with their characteristics through a collet conveying the chips to a tray, and arranging the chips at predetermined positions on the tray in accordance with their classifications; the chips 14 are conveyed to a plurality of relay stages 5, 6 installed near the wafer 15 using the collet 8, and the chips are conveyed from the relay stages to trays 12, 13 installed near the relay stages using conveyer arms 10, 11 corresponding to the relay stages. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a chip transport method and apparatus for transporting chips cut from a wafer to a predetermined position on a tray according to the classification, and in particular, the chip transport tact time is reduced to about 1/2 at a cost equivalent to that of the prior art. The present invention relates to a chip transfer method and apparatus that can be shortened below.

  Chips fabricated on a wafer such as a semiconductor are cut out one by one, so each has different electrical characteristics. Therefore, the electrical characteristics are inspected one by one, and scratches and cracks on the front and back surfaces of the chip are inspected. As a result, a plurality of classifications from non-defective products to defective products are given, and each is distinguished by, for example, marking, or encoded and recorded as MAP (map) information on an FD (flexible disk) or the like.

  These chips are sorted and stored in a predetermined tray or a predetermined position in the tray according to the classification. Conventionally, the chips are picked up one by one from the wafer and transferred to each position on the tray. Therefore, the tact time for transporting one chip was 0.7 s (seconds) at the shortest.

  Since the number of chips per wafer has increased dramatically due to the miniaturization of chips, the total time required for chip transfer has also increased, and further reduction in the tact time of chip transfer has been desired. Until now, no such means have been generally provided.

  The applicant and the inventor of the present application do not know the known patent documents and the known non-patent documents related to the present invention, so the description is omitted.

  The present invention has been made in order to eliminate the above-described disadvantages of the prior art, and the object of the present invention is to pick up chips, which are cut out from a wafer and classified according to the respective characteristics, with a collet and put them into a tray. In a method of transferring chips that are transferred and arranged at predetermined positions on the tray according to the classification, the chips are transferred directly to the tray by a collet and once transferred to at least one relay stage installed near the method and the wafer. Use a combination of the method of transporting the chip from the relay stage to the tray by the transport arm, or by selecting one of these methods, and appropriately combining or selecting the transport by the collet and the transport by the transport arm. Thus, the tact time for transporting one chip to the tray is, for example, 1/2 of the conventional time. .35s kept below is to dramatically improve the transfer efficiency of the chip.

  Another object is to transfer the chip from the relay stage to the vicinity of the relay stage by a transfer arm corresponding to each of the relay stages in the above-described method. In this case, the transfer time from the wafer to the relay stage is further shortened by transporting each of the trays to the respective trays, and the tact time of the chip transport is further shortened.

  Yet another object is that in the above method, among the chips, the first classification chip to be transported to the first tray is directly transported to the first tray by the collet, and the other classification chip is installed in the vicinity of the wafer by the collet. By transporting the chips of the other classification to the second tray installed in the vicinity of the relay stage by the transport arm respectively to the relay stage and directly to the first tray and to the second tray via the relay stage. It is to reduce the tact time of each chip conveyance while combining the conveyance of each chip.

  Another object is to transfer the chip to a relay stage installed near the wafer by a collet, and to transfer the chip from the relay stage to a tray installed near the relay stage by a plurality of transfer arms, respectively. In addition to shortening the transfer time from the wafer to the relay stage, even if chips are transferred to the relay stage one after another, the chips are transferred from the relay stage to the tray without delay.

  Still another object is to provide a mount stage configured to be mounted with a tray for accommodating chips and movable in the surface direction, and to hold the wafer from which the chips are cut and to move or rotate the wafer in the surface direction. A configured wafer stage, a relay stage for temporarily holding a chip, a collet configured to reciprocally swing in a state in which the chip is picked up from the wafer and transported to a tray or a relay stage, and a relay By providing a transfer arm configured to be able to transfer chips from the stage to the tray, the collet and the transfer arm operate in cooperation with each other, and the tact time of chip transfer is, for example, 1/2 of the conventional value. It is to be able to shorten to 35 s or less.

  Another object is to further reduce the transfer time from the wafer to the relay stage by providing a plurality of mount stages, relay stages and transfer arms in the above-described configuration. The tact time can be further shortened.

  Still another object of the present invention is to provide a first mount stage in which a first tray that accommodates a first classified chip among the previously classified chips is attached and configured to be movable in the surface direction. A second mount stage that is mounted with a second tray that accommodates other classified chips among the chips and is configured to be movable in the surface direction, holds the wafer from which the chips are cut, and holds the wafer in the surface direction. A wafer stage configured to be movable or rotatable, a relay stage disposed in the vicinity of the wafer stage and configured to temporarily hold other classification chips, and reciprocally swings in a state where the chips are picked up from the wafer. A collet configured to transport the first classification chip to the first tray and the other classification chip to the relay stage, and the second tray from the relay stage. By providing a transfer arm configured to be able to transfer other classified chips, the tact time of each chip transfer can be reduced while combining the direct transfer to the first tray and the transfer to the second tray via the relay stage. Is to make it possible.

  Another object is to shorten the transfer time from the wafer to the relay stage by providing a plurality of transfer arms with respect to the relay stage in the above configuration, thereby transferring the chips one after another to the relay stage. In other words, it is possible to carry chips without any delay from the relay stage to the tray.

  In short, according to the method of the present invention (Claim 1), chips cut out from a wafer and classified according to each characteristic are picked up by a collet and conveyed to a tray, and are arranged at predetermined positions on the tray according to the classification. In a method for transferring chips, a method in which the chips are directly transferred to the tray by the collet, and the method and at least one relay stage installed in the vicinity of the wafer, and the chips are transferred from the relay stage by a transfer arm. The method of transporting to the tray is used in combination, or any one of these methods can be selected.

  Further, according to the method of the present invention (Claim 2), chips cut out from a wafer and classified according to each characteristic are picked up by a collet and conveyed to a tray, and are arranged at predetermined positions on the tray according to the classification. In the chip transfer method, the chip is transferred to a plurality of relay stages installed in the vicinity of the wafer by the collet, and the chip is transferred from the relay stage to the relay stage by a transfer arm corresponding to each of the relay stages. It conveys to the said tray each installed in the vicinity, It is characterized by the above-mentioned.

  According to the method of the present invention (Claim 3), chips cut out from a wafer and classified according to the respective characteristics are picked up by a collet and transferred to a tray, and are arranged at predetermined positions on the tray according to the classification. In the chip transfer method, the first classification chip to be transferred to the first tray among the chips is directly transferred to the first tray by the collet, and the other classification chip is installed in the vicinity of the wafer by the collet. The chips are transported to a stage, and the chips of the other classification are transported to a second tray installed in the vicinity of the relay stage by a transport arm.

  Further, according to the method of the present invention (Claim 4), chips cut out from a wafer and classified according to the respective characteristics are picked up by a collet and transferred to a tray, and are arranged at predetermined positions on the tray according to the classification. In the chip transfer method, the chip is transferred to the relay stage installed in the vicinity of the wafer by the collet, and the chip is transferred from the relay stage to the tray installed in the vicinity of the relay stage by a plurality of transfer arms. Each is transported.

  The apparatus of the present invention (Claim 5) includes a mount stage that is mounted with a tray for accommodating chips and configured to be movable in the surface direction, and holds the wafer from which the chips are cut out, and holds the wafer in the surface direction. A wafer stage configured to be movable or rotatable, a relay stage for temporarily holding the chip, and a reciprocating swing in a state in which the chip is picked up from the wafer, thereby moving the chip to the tray or the relay stage. And a transport arm configured to transport the chip from the relay stage to the tray.

  Further, the device of the present invention (Claim 6) includes a plurality of mount stages each mounted with a tray for accommodating a chip and configured to be movable in the surface direction, and a wafer from which the chip has been cut out. A wafer stage configured to move or rotate the wafer in a plane direction, a plurality of relay stages arranged in the vicinity of the wafer stage and configured to temporarily hold the chip, and the chip from the wafer A collet configured to swing back and forth in a picked-up state and transport the chip to the relay stage, and a plurality of transport arms configured to transport the chip from the relay stage to the tray. It is characterized by this.

  Further, the device of the present invention (Claim 7) includes a first mount stage configured to be attached with a first tray that accommodates the first classified chip among the previously classified chips, and to be movable in the surface direction. A second mount stage that is mounted with a second tray that accommodates other classified chips among the chips and is configured to be movable in the surface direction; and holds the wafer from which the chips have been cut; A wafer stage configured to be movable or rotatable in a surface direction, a relay stage disposed near the wafer stage and configured to temporarily hold the other classification chip, and the chip was picked up from the wafer This is configured so that the first classification chip can be conveyed to the first tray and the other classification chip can be conveyed to the relay stage. DOO and, is characterized in that a transfer arm configured to be conveyed to said other classifying chips from the intermediate stage to the second tray.

  The apparatus of the present invention (invention 8) includes a mount stage that is mounted with a tray for accommodating chips and configured to be movable in the surface direction, holds the wafer from which the chips are cut, and holds the wafer in the surface direction. A wafer stage configured to be movable or rotatable, a relay stage disposed in the vicinity of the wafer stage and configured to be capable of temporarily holding the chip, and reciprocating rocking while the chip is picked up from the wafer. A collet configured to move and convey the chip to the relay stage; and a plurality of transfer arms configured to respectively convey the chip from the relay stage to the tray. is there.

  The present invention relates to a method for transporting chips in which chips cut out from a wafer as described above and classified according to their characteristics are picked up by a collet and transported to a tray, and are arranged at predetermined positions on the tray according to the classification. In this method, the chip is directly transferred to the tray by a collet, and the method is used in combination with the method of once transferring the chip to at least one relay stage installed near the wafer and transferring the chip from the relay stage to the tray by the transfer arm. In addition, since any one of these methods can be selected, the tact time for transporting one chip to the tray is selected by appropriately combining or selecting the transport by the collet and the transport by the transport arm. This is effective for dramatically reducing the chip transfer efficiency by limiting the value to 0.35 s or less, which is 1/2.

  Further, in the above method, the chip is transferred to a plurality of relay stages installed in the vicinity of the wafer by the collet, and the chip is installed from the relay stage to the vicinity of the relay stage by a transfer arm corresponding to each of the relay stages. Since the transfer to the tray is performed, there is an effect that the transfer time from the wafer to the relay stage can be further shortened, and as a result, the effect of further shortening the tact time of the chip transfer can be obtained.

  Further, in the above method, the first classification chip to be transported to the first tray among the chips is directly transported to the first tray by the collet, and the other classification chip is transported to the relay stage installed near the wafer by the collet. Since the chips of the other classification are respectively transported to the second tray installed in the vicinity of the relay stage by the transport arm, the direct transport to the first tray and the transport to the second tray via the relay stage are performed. There is an effect that the tact time of each chip conveyance can be shortened while combining.

  Also, the chip is transferred to the relay stage installed near the wafer by the collet, and the chips are transferred from the relay stage to the tray installed near the relay stage by a plurality of transfer arms, so that the relay is performed from the wafer. The transport time to the stage can be shortened, and even if chips are transported to the relay stage one after another, the effect that the transport of chips from the relay stage to the tray can be performed without delay is obtained. .

  Further, a mount stage that is mounted with a tray for accommodating chips and is configured to be movable in the surface direction, and a wafer stage that is configured to hold the wafer from which the chips are cut and to move or rotate the wafer in the surface direction. And a relay stage for temporarily holding the chip, a collet configured to reciprocate in a state where the chip is picked up from the wafer and transported to the tray or the relay stage, and a chip from the relay stage to the tray. Since the collet and the transfer arm operate in cooperation with each other, the tact time of the chip transfer is reduced to, for example, 0.35 s or less, which is ½ of the conventional value. There is an effect that can be done.

  In the above configuration, since a plurality of mount stages, relay stages, and transfer arms are provided, the transfer time from the wafer to the relay stage can be further shortened, and as a result, the tact time of chip transfer can be further shortened. An effect is obtained.

  Furthermore, in the above configuration, the first mount stage configured to be attached to the first tray that accommodates the first classified chip among the pre-classified chips and configured to be movable in the surface direction, and the other classification among the chips. A second mount stage that is mounted with a second tray that accommodates chips and is movable in the surface direction, and a wafer from which chips are cut out are held, and the wafer can be moved or rotated in the surface direction. A configured wafer stage, a relay stage arranged in the vicinity of the wafer stage and configured to temporarily hold another classification chip, and a first classification chip that reciprocally swings in a state where the chip is picked up from the wafer. Collets configured to transport the other classification chips to the relay stage on the first tray, and other classifications from the relay stage to the second tray Since the transfer arm is configured to be able to transfer the chip, the tact time of each chip transfer can be shortened while combining the direct transfer to the first tray and the transfer to the second tray via the relay stage. An effect is obtained.

  In the above configuration, since a plurality of transfer arms are provided for the relay stage, the transfer time from the wafer to the relay stage can be shortened, and even if chips are transferred to the relay stage one after another, the relay stage The effect that the conveyance of the chip | tip to a tray can be performed without delay is acquired.

  Hereinafter, the present invention will be described based on embodiments shown in the drawings. 1 to 3, the chip transfer apparatus 1 according to the first embodiment of the present invention includes a mount stage 2, 3, a wafer stage 4, a relay stage 5, 6, a collet 8, a transfer arm 10, 11.

  The mount stages 2 and 3 are configured such that trays 12 and 13 for accommodating the chips 14 are respectively attached, and the trays 12 and 13 are configured to be movable in the surface direction. And the arrow -Y direction).

  The mount stages 2 and 3 can perform a feed operation (position correction), for example, in one way 0.3 s from end to end in the Y-axis direction of the trays 12 and 13.

  The wafer stage 4 is configured to hold the wafer 15 from which the chips 14 have been cut out, and to move or rotate the wafer in the surface direction. For example, the X-axis direction (arrow + X direction and arrow -X direction) And can be rotated in the direction of the arrow L and the arrow R.

  For this reason, the movable range of the wafer stage 4 is within the moving area 16, and the movable range of the wafer 15 is within the moving area 18 when the rotational direction is fixed. Considering the rotation of the wafer stage 4, the moving area 18 is circular, unlike the illustrated one.

  The relay stages 5 and 6 are arranged in the vicinity of the wafer stage 4 and configured to be able to temporarily hold the chip 14. The relay stages 5 and 6 are provided on the swing trajectory of the collet 8, and their positions are symmetrical with respect to each other, for example.

  The relay stages 5 and 6 have, for example, a suction mechanism (not shown), and are appropriately moved in the X-axis direction and the Y-axis direction or rotated in the plane direction based on image processing on the chip 14, for example. The position of the chip 14 can be corrected. This is to correct the positional deviation and inclination of the chip 14 in the relay stages 5 and 6 so that the chips 14 and 13 can be accurately conveyed to desired positions.

  The collet 8 is configured such that the chip 14 is reciprocally swung while the chip 14 is picked up from the wafer 15, and the chip 14 can be transferred to the relay stages 5 and 6, respectively, and is attached to the central shaft 19. By rotating the central shaft 19, the center shaft 19 reciprocates within a range of 180 °, for example, by 90 °. Each collet 8 has, for example, a suction mechanism (not shown) in order to pick up the chip 14.

  The wafer stage 4 can perform image analysis, for example, for 0.15 s and move the chip 14 to be picked up to the pickup position, and the collet 8 can pick up the chip 14 and Release can be performed, and the central shaft 19 can be rotated, for example, for 0.1 s to transport the chip 14.

  Therefore, for example, the time required for attracting the chips 14 in the wafer 15 by the collet 8 and transporting them to the relay stage 5 is 0.35 s in total.

  The transfer arms 10 and 11 are configured to be able to transfer the chips 14 from the relay stages 5 and 6 to the trays 12 and 13, respectively, and the collets 10a and 11a having a suction mechanism (not shown) are connected to the X axis. Each has a driving mechanism for driving in each direction (none of them are shown). The time required for the reciprocation of the collets 10a and 11a is, for example, 0.45 s at maximum.

  Next, the chip transfer device 20 according to the second embodiment of the present invention includes a first mount stage 21, a second mount stage 22, a wafer stage 4, a relay stage 23, and a collet in FIGS. 24 and a transfer arm 26.

  The first mount stage 21 is configured such that a first tray 31 that accommodates the first classified chip 28A among the chips 28 classified in advance is attached, and the first tray 31 is movable in the surface direction. For example, it can move in the X-axis direction (arrow + X direction and arrow -X direction) and the Y-axis direction (arrow + Y direction and arrow -Y direction), respectively. This movement is a pitch movement, and the time required to move one pitch is, for example, 0.15 s.

  The second mount stage 22 is provided with a second tray 32 that accommodates the other classification chip 28B among the chips 28, and is configured to be movable in the surface direction. It is movable in the direction of arrow + Y and arrow -Y.

  The second mount stage 22 can perform a feeding operation (position correction), for example, in one way 0.3 s from end to end in the Y-axis direction of the second tray 32.

  The relay stage 23 is disposed in the vicinity of the wafer stage 4 and is configured to be able to temporarily hold the other classification chip 28B, and is provided on the swinging locus of the collet 24. (Not shown). Further, for example, based on image processing for the chip 28B, the position of the chip 28B can be corrected by appropriately moving in the X-axis direction and the Y-axis direction or rotating in the plane direction. This is to correct the positional deviation and inclination of the chip 28B on the relay stage 23 so that it can be accurately conveyed to a desired position on the second tray 32.

  The collet 24 is configured to swing back and forth in a state where the chip 28 is picked up from the wafer 15, so that the first classification chip 28 </ b> A can be conveyed to the first tray 31 and the other classification chip 28 </ b> B can be conveyed to the relay stage 23. In order to pick up the chip 28, it is provided with a suction mechanism (not shown), for example. The collet 24 reciprocally swings within a range of, for example, 90 ° by a total of 180 ° by rotationally driving the central shaft 29.

  The transfer arm 26 is configured to be able to transfer the other classification chip 28B from the relay stage 23 to the second tray 32, and drives the collet 26a having a suction mechanism (not shown) in the X-axis direction. It has a mechanism (none is shown). The time required for the reciprocation of the collet 26a is, for example, 0.55 s at maximum.

  Since the wafer stage 4 is the same as that of the first embodiment, the same portions are denoted by the same reference numerals in the drawings, and description thereof is omitted.

  The chip transfer apparatus 30 according to the third embodiment of the present invention includes a mount stage 33, a wafer stage 4, a relay stage 34, a collet 35, and transfer arms 36 and 38 in FIGS. 9 to 12. ing.

  A mount stage 33 and a tray 40 that accommodates the chips 39 are attached, and the tray 40 is configured to be movable in the surface direction. For example, each of them in the Y1 axis direction (arrow + Y1 direction and arrow -Y1 direction). It is movable.

  The mount stage 33 can perform a feed operation (position correction), for example, in one way 0.3 s from end to end in the Y1 axis direction of the tray 40.

  The relay stage 34 is disposed in the vicinity of the wafer stage 4 and is configured to be able to temporarily hold the chip 39. The relay stage 34 is provided on a swinging locus of the collet 35, and is provided with, for example, an adsorption mechanism (not shown). )have. Further, for example, based on image processing for the chip 39, the position of the chip 39 can be corrected by appropriately moving in the Y1-axis direction or rotating in the surface direction. This is to correct the positional deviation and inclination of the chip 39 on the relay stage 34 so that it can be accurately conveyed to a desired position on the tray 40.

  The collet 35 is configured to reciprocally swing in a state where the chip 39 is picked up from the wafer 15 and to be able to transport the chip 39 to the relay stage 34, and is attached to the central shaft 41. By rotating 41, for example, it reciprocates within a range of 45 °. The collet 35 has, for example, a suction mechanism (not shown) in order to pick up the chip 39.

  The transfer arms 36 and 38 are configured to be able to transfer the chips 39 from the relay stage 34 to the tray 40, respectively. The collets 36a and 38a having a suction mechanism (not shown) are moved in the X1 axial direction (arrow + X1). Each having a driving mechanism (not shown). The time required for the reciprocation of the collets 10a and 11a is, for example, a maximum of 0.55 s, respectively.

  Since the wafer stage 4 is the same as that of the first embodiment, the same portions are denoted by the same reference numerals in the drawings, and the description thereof is omitted.

  In the present invention (Claim 1), the chips 14 cut out from the wafer 15 and classified according to the respective characteristics are picked up by the collet and conveyed to the tray, and are arranged at predetermined positions on the tray according to the classification. In the chip transfer method, the chip 14 is directly transferred to a tray (not shown) by a collet and the method and at least one relay stage 6 installed in the vicinity of the wafer 15 are temporarily transferred from the relay stage to the chip. Is used in combination with a method of transporting the sheet to the tray 13 by the transport arm 11, or any one of these methods can be selected.

  Further, according to the present invention (Claim 2), chips 14 cut out from the wafer 15 and classified according to the respective characteristics are picked up by a collet and conveyed to a tray, and are arranged at predetermined positions on the tray according to the classification. In the chip transfer method, the chip 14 is transferred to a plurality of relay stages 5 and 6 installed in the vicinity of the wafer 15 by the collet 8, and the chip 14 is transferred by the transfer arms 10 and 11 corresponding to each of the relay stages. This is a method of conveying from trays 5 and 6 to trays 12 and 13 respectively installed in the vicinity of the relay stage.

  Further, according to the present invention (Claim 3), chips 28 cut out from the wafer 15 and classified according to the respective characteristics are picked up by a collet and transferred to a tray, and are arranged at predetermined positions on the tray according to the classification. In the chip transfer method, the first classification chip 28A to be transferred to the first tray 31 among the chips 28 is directly transferred to the first tray 31 by the collet 24, and the chips 28B of other classifications are adjacent to the wafer 15 by the collet 24. Are transferred to the relay stage 23, and the other-class chips 28B are respectively transferred to the second tray 32 installed in the vicinity of the relay stage 23 by the transfer arm 26.

  Further, according to the present invention (Claim 4), chips 39 cut out from the wafer 15 and classified according to the respective characteristics are picked up by a collet and conveyed to a tray, and are arranged at predetermined positions on the tray according to the classification. In the chip transfer method, the chip 39 is transferred to the relay stage 34 installed in the vicinity of the wafer 15 by the collet 35, and the chip 39 is installed from the relay stage 34 to the vicinity of the relay stage by the plurality of transfer arms 36 and 38. This is a method of conveying to the tray 40 respectively.

  The present invention is configured as described above, and the operation thereof will be described below. First, the operation of the chip transfer apparatus 1 according to the first embodiment of the present invention will be described. The chip transfer apparatus 1 operates based on, for example, the timing chart shown in FIG.

  In FIG. 1, the collet 8 is positioned on the relay stage 5 by rotating the central axis 19 by 90 ° in the direction of arrow R from the state in which the chip 14 on the wafer 15 is attracted, and the chip 14 is moved to the relay stage. 5 (time required for conveyance is 0.35 s). The collet 8 returns the chip 14 to the relay stage 5 and then returns to the wafer 15. The chip 14 to be transported next has been moved to the suction position by driving the wafer stage 4, for example, in the direction of the arrow −X before suction by the collet 8. The suction position is, for example, the center of the moving area 16.

  At the relay stage 5, position correction is performed within 0.1 s using, for example, image analysis. Next, the collet 10a of the transfer arm 10 sucks the chip 14 on the relay stage 5 and transfers it to the tray 12 in the direction of the arrow -X. The round trip time of the collet 10a is, for example, 0.45 s. At this time, the mount stage 2 performs positioning by driving the tray 12 in the Y-axis direction within 0.3 s in order to align the accommodation position of the chip 14 in the tray 12 with the moving end of the collet 10a.

  On the other hand, at the same time as the above-described position correction of the relay stage 5 starts, the collet 8 picks up the next chip 14 and the central axis 19 rotates 90 ° in the direction of arrow L as shown in FIG. The next chip 14 is delivered and returned to the wafer 15 again. This time is also 0.35 s. Further, the next chip 14 has also moved to the suction position when the wafer stage 4 is driven in the direction of the arrow -X, for example.

  In the relay stage 6, as in the relay stage 5, position correction is performed within 0.1 s using, for example, image analysis. Next, the collet 11a of the transfer arm 11 sucks the chip 14 on the relay stage 6 and transfers it to the tray 13 in the arrow + X direction. The round trip time of the collet 11a is, for example, 0.45 s. At this time, the mount stage 3 performs positioning by driving the tray 13 in the Y-axis direction within 0.3 s in order to align the accommodation position of the chip 14 in the tray 13 with the moving end of the collet 11a.

  In the meantime, as shown in FIG. 3, the next chip 14 is further conveyed to the relay stage 5 by the collet 8, and the same operation is repeated thereafter, whereby the chip 14 of the wafer 15 is conveyed to the tray 12 or the tray 13. go.

  In the chip transfer device 1, it takes 0.35 s to transfer the chip 14 from the wafer 15 to the relay stages 5 and 6 and return to the wafer 15 again, and the subsequent transfer is left to the transfer arms 10 and 11. In addition, since the stagnation of the chips 14 is prevented from occurring in the relay stages 5 and 6, the transport tact time per chip 14 does not exceed 0.35 s, which is 1 compared with the conventional 0.7 s. / 2 has been shortened. In addition, for example, the tact time is not shortened by using a special high performance motor (not shown) or the like, but is achieved by devising the way of conveyance, so the cost is the same as the conventional one.

  Note that whether the chip 14 is transported to the tray 12 or the tray 13 is an item arbitrarily determined according to the classification of each chip 14. For example, in the tray 12 and the tray 13, the chips 14 are arranged in the same classification order. Alternatively, the best quality chips may be arranged in the tray 12 and other quality chips may be arranged in the tray 13. The classification of the chips 14 is performed based on the inspection result of the electrical characteristics of each chip, and the classification of each chip is performed by marking, for example. The same applies to the following embodiments.

  In the present embodiment, the mount stage, the tray, the relay stage, and the transfer arm are each two sets. However, the present invention is not limited to this and may be further increased.

  Next, the operation of the chip transfer device 20 according to the second embodiment of the present invention will be described. The chip transfer device 20 operates based on, for example, the timing chart shown in FIG.

  In FIG. 5, the collet 24 is positioned on the first tray 31 by rotating the central axis 29 by 90 ° in the direction of arrow R from the state in which the first classification chip 28A on the wafer 15 is attracted. (The time from when the collet 24 picks up the chips 28A from the wafer 15 to the first tray 31 and returns to the first tray 31 is 0.35 s).

  At this time, the first mount stage 21 moves the first tray 31 in the X-axis direction and the Y-axis within 0.15 s in order to adjust the accommodation position of the first classification chip 28A in the first tray 31 to the reception position from the collet 24 in advance. Positioning is performed by moving the pitch in the axial direction. Since the first tray 31 is dedicated to the first classification chip 28A, it is possible to store the chips one after another only by pitch movement.

  On the other hand, at this time, the other classification chip 28 </ b> B has moved to the suction position by driving the wafer stage 4 in the −X direction, for example, and is then sucked by the collet 24. When the other classification chip 28B is adsorbed by the collet 24, the central axis 29 rotates 90 ° in the direction of the arrow L, and the other classification chip 28B is conveyed to the relay stage 23 (the collet 24 removes the chip 28B from the wafer 15). The time from picking up and transporting to the second tray 32 and returning to the wafer 15 again is 0.35 s). Although not shown in the timing chart of FIG. 8, the relay stage 23 may perform position correction (X-axis direction, Y-axis direction, and rotation direction) using, for example, image analysis. The time required for the position correction is, for example, within 0.1 s.

  Subsequently, as shown in FIG. 7, the collet 26 a of the transport arm 26 sucks the other classification chip 28 </ b> B on the relay stage 23 and transports it to the second tray 32 in the arrow X direction. The round trip time of the collet 26a is, for example, 0.55 s. At this time, the second mount stage 22 drives the second tray 32 in the Y-axis direction within 0.3 s in order to align the accommodation position of the other classification chip 28B in the second tray 32 with the moving end of the collet 26a, thereby positioning. I do.

  While carrying by the carrying arm 26, the central axis 29 rotates 90 ° in the direction of arrow R, and the first classification chip 28 </ b> A is carried to the first tray 31. At this time, for example, the first mount stage 21 is moved in a pitch direction, for example, in the direction of the arrow -X. Similarly, the chips 28 of the wafer 15 are transferred to the first tray 31 or the second tray 32. The chips 28 may be alternately conveyed to the first tray 31 or the second tray 32, and basically, as shown in the timing chart of FIG. The chips may be transferred to the second tray 32 only when the other classified chip 28B is being transferred.

  Also in this embodiment, as in the first embodiment, the transport tact time per chip 28 does not exceed 0.35 s and is very efficient.

  The operation of the chip transfer device 30 according to the third embodiment of the present invention will be described. The chip transfer device 30 operates based on, for example, the timing chart shown in FIG.

  In FIG. 9, the collet 35 is positioned on the relay stage 34 by rotating the central axis 41 by 45 ° in the direction of arrow R from the state in which the chip 39 on the wafer 15 is attracted. (The collet 35 picks up the chip 39 from the wafer 15 and conveys it to the relay stage 34, and the time to return to the wafer 15 is about 0.35 s).

  In the relay stage 34, when the chip 39 is delivered, position correction is performed, for example, in the arrow + Y1 direction within 0.1 s using, for example, image processing. In some cases, position correction is performed in the rotational direction. Before the position correction is performed, the mount stage 33 is driven in the Y-axis direction, the tray 40 is positioned, and after the position correction of the relay stage 34 is completed, the collet 38a of the transfer arm 38 is moved to the chip 39 on the relay stage 34. And is conveyed to the tray 40 in the direction of the arrow -X1. The round trip time of the collet 38a is, for example, 0.55 s.

  As soon as the chip 39 is attracted to the collet 38a, the relay stage 34 moves in the direction of the arrow -Y1 and becomes neutral (position in FIG. 9). If the next chip 39 can be received while moving to the transfer arm 38 side, the relay stage 34 need not be returned to the neutral state.

  10 and 11, while the transfer arm 38 is transferring the chip 39, the wafer stage 4 is moved in the direction of the arrow -X, for example, and the next chip 39 is attracted by the collet 35, and the central axis 41 is It is rotated 45 ° in the direction of arrow L and conveyed to the relay stage 34. Then, as shown in FIG. 12, the relay stage 34 is corrected in the direction of the arrow -Y1 within 0.1 s, and the collet 36a of the transfer arm 36 adsorbs the chip 39 on the relay stage 34, Transport to the tray 40 in the direction of arrow -X1. The round trip time of the collet 36a is also 0.55 s, for example.

  Similarly, the transfer arm 36, 38 is alternately used to transfer each chip 39 to a predetermined position on the tray 40, so that the transfer tact time per chip 39 is 0.35 s. Never exceed.

  In this embodiment, the number of transfer arms is two. However, the number of transfer arms is not limited to this and may be increased. Further, the position correction of the relay stage 34 is not limited to the Y1-axis direction, and the position correction in the rotation direction may be performed as necessary.

  4, 8, and 13 show timing charts, but these are only examples, and the operation of the chip transfer devices 1, 20, and 30 is not limited to those based on these timing charts.

1 to 4 relate to the first embodiment, and FIG. 1 is a plan view schematically showing a chip transfer device. It is a top view which shows the state by which the chip | tip was conveyed by the collet to the other relay stage, while the chip | tip conveyed by the one relay stage was conveyed by the conveyance arm to the tray. FIG. 3 is a plan view showing a state in which chips are transported to one relay stage by a collet while chips on the other relay stage in FIG. 2 are transported to a tray by a transport arm. It is a timing chart figure. 5 to 8 relate to the second embodiment, and FIG. 5 is a plan view showing an outline of a chip transfer device. It is a top view which shows the state in which another classification chip | tip is conveyed from a wafer to a relay stage by a collet. It is a top view which shows the state which is conveying the 1st classification | category chip to the 1st tray, while the other classification | category chip on the relay stage in FIG. 6 is being conveyed by the conveyance arm to the 2nd tray. It is a timing chart figure. FIGS. 9 to 13 relate to the third embodiment, and FIG. 9 is a plan view showing an outline of a chip transfer device. It is a top view which shows the state which the collet is adsorb | sucking the chip | tip on a wafer while conveying the chip | tip on a relay stage to a tray with a conveyance arm. It is a top view which shows the state which conveyed the chip | tip adsorbed by the collet in FIG. 10 from the wafer to the relay stage. It is a top view which shows the state which is conveying the chip | tip in FIG. 11 from the relay stage to the tray by the conveyance arm. It is a timing chart figure.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Chip transfer device 2 Mount stage 3 Mount stage 4 Wafer stage 5 Relay stage 6 Relay stage 8 Collet 10 Transfer arm 11 Transfer arm 12 Tray 13 Tray 14 Chip 15 Wafer 20 Chip transfer device 21 First mount stage 22 Second mount Stage 23 Relay stage 24 Collet 26 Transfer arm 28 Chip 28A First classification chip 28B Second classification chip 30 Chip transfer device 31 First tray 32 Second tray 33 Mount stage 34 Relay stage 35 Collet 36 Transfer arm 38 Transfer arm 39 Tip 40 trays

Claims (8)

  Chips cut out from a wafer and classified according to the respective characteristics are picked up by a collet and conveyed to a tray, and the chips are arranged in a predetermined position on the tray according to the classification. The method of directly transporting to the tray by the above method and the method of transporting the chip once to at least one relay stage installed in the vicinity of the wafer and transporting the chip from the relay stage to the tray by the transport arm are used in combination. Or any one of these methods can be selected.   Chips cut out from a wafer and classified according to the respective characteristics are picked up by a collet and conveyed to a tray, and the chips are arranged in a predetermined position on the tray according to the classification. Are transferred to a plurality of relay stages installed in the vicinity of the wafer, and the chips are transferred from the relay stage to the trays installed in the vicinity of the relay stage by the transfer arms corresponding to the relay stages, respectively. A method for conveying chips, comprising:   In a chip transfer method in which chips cut out from a wafer and classified according to each characteristic are picked up by a collet and transferred to a tray, and arranged in a predetermined position on the tray according to the classification, The first classification chip to be transferred to one tray is directly transferred to the first tray by a collet, and the other classification chip is transferred to the relay stage installed in the vicinity of the wafer by the collet. A method for transferring chips, wherein each of the chips is transferred to a second tray installed in the vicinity of the relay stage by a transfer arm.   Chips cut out from a wafer and classified according to the respective characteristics are picked up by a collet and conveyed to a tray, and the chips are arranged in a predetermined position on the tray according to the classification. To the relay stage installed in the vicinity of the wafer, and a plurality of transfer arms to transfer the chip from the relay stage to the tray installed in the vicinity of the relay stage. Method.   A mount stage to which a tray for accommodating chips is attached and configured to be movable in the plane direction, and a wafer stage configured to hold the wafer from which the chips are cut and to be configured to move or rotate the wafer in the plane direction A relay stage for temporarily holding the chip, a collet configured to reciprocally swing in a state where the chip is picked up from the wafer, and to transport the chip to the tray or the relay stage, A chip transfer apparatus comprising: a transfer arm configured to transfer the chip from a relay stage to the tray.   A plurality of mount stages each mounted with a tray for receiving chips and configured to be movable in the surface direction, and a wafer holding the wafer from which the chips are cut out, and configured to be able to move or rotate the wafer in the surface direction. A wafer stage, a plurality of relay stages arranged in the vicinity of the wafer stage and configured to be able to temporarily hold the chip, and the chip is reciprocally swung in a state where the chip is picked up from the wafer. A chip transport apparatus comprising: a collet configured to be transportable to the relay stage; and a plurality of transport arms configured to transport the chip from the relay stage to the tray.   A first mount stage that is attached to a first tray that accommodates a first classified chip among the previously classified chips and is configured to be movable in the surface direction, and accommodates another classified chip among the chips. A second mount stage attached with a second tray and configured to be movable in the surface direction, and a wafer from which the chips are cut out are held, and the wafer can be moved or rotated in the surface direction. A wafer stage, a relay stage arranged in the vicinity of the wafer stage and configured to temporarily hold the other classification chip, and the first classification chip that reciprocally swings while the chip is picked up from the wafer. A collet configured to be able to convey the other classification chip to the first tray and to the relay stage, and a front from the relay stage. Conveying device chip, characterized in that a transfer arm configured to allow conveying the other classification chip to the second tray.   A mount stage to which a tray for accommodating chips is attached and configured to be movable in the plane direction, and a wafer stage configured to hold the wafer from which the chips are cut and to be configured to move or rotate the wafer in the plane direction A relay stage disposed near the wafer stage and configured to be capable of temporarily holding the chip, and reciprocally swinging in a state where the chip is picked up from the wafer, so that the chip can be transferred to the relay stage. And a plurality of transfer arms configured to be able to transfer the chip from the relay stage to the tray, respectively.

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