JP2005317908A - Board with built-in element and its manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a board with a built-in element, in which a crystal oscillator is completely embedded in the substrate, and to provide a manufacturing method of the substrate. <P>SOLUTION: In the board with built-in element 100, a crystal oscillating element 31 formed of a crystal oscillating body 31a, and a pair of electrodes 31b is stored in a recessed part where at least a surface is arranged on one face 6a of an insulating board 6. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to an element-embedded substrate and a method for manufacturing the element-embedded substrate.

For example, in portable electronic devices such as mobile phones and PDAs, a thin plate-like element-embedded substrate in which a circuit board and various components are integrated is being adopted in order to reduce the size and weight and reduce the cost. For example, as shown in Patent Document 1 and Patent Document 2, such an element-embedded substrate is a substrate in which various components are embedded in a substrate such as a resin, and a conductive circuit pattern is formed on the surface. Since it is formed in a flat plate shape, is thin and light, and is excellent in mass productivity, it is suitable as a component substrate for portable electronic devices that are required to be reduced in size and weight.
JP 2001-358465 A Japanese Patent Laid-Open No. 11-220262

As electronic components incorporated in conventional circuit component modules, relatively small components such as chip-type resistor elements and capacitor elements are employed. However, recently, there is a demand for embedding a crystal resonator as an electronic component in a substrate to make a module. In general, a crystal resonator is composed of a crystal resonator and a cover member that covers the resonator, and the resonator itself is relatively large. If it becomes possible to embed such a crystal resonator in a substrate, a significant space saving can be achieved, which contributes further to the reduction in size and weight of portable electronic devices.
However, in reality, it has been physically impossible to completely incorporate a crystal resonator on a circuit board having a thickness smaller than the minimum size of the crystal resonator.

  The present invention has been made in view of the above circumstances, and an object thereof is to provide an element-embedded substrate in which a crystal resonator is completely embedded in a substrate and a method for manufacturing the same.

In order to achieve the above object, the present invention employs the following configuration.
The element-embedded substrate according to the present invention includes a crystal resonator element including a crystal resonator and a pair of electrodes sandwiching the crystal resonator, and is housed in a recess provided on at least one surface of an insulating substrate. It is characterized by that.
In the element-embedded substrate of the present invention, it is preferable that a metal layer is formed on the entire inner surface of the recess, and a gap is provided between the metal layer and the crystal resonator element.
Furthermore, in the element-embedded substrate of the present invention, a wiring pattern is provided on the one surface side of the substrate, and the pair of electrodes are connected to the wiring pattern from the inside of the recess, and the wiring pattern and the crystal resonator element It is desirable that the sealing material is filled in between and the concave portion is sealed by the sealing material when the crystal resonator element is accommodated in the concave portion.

  According to the above configuration, since the crystal resonator element constituting the main body of the crystal resonator is housed in the concave portion of the substrate, space saving of the element-embedded substrate can be achieved. Further, the metal layer formed on the entire inner surface of the concave portion corresponds to a cover member of a general crystal resonator, and can protect the crystal resonator element. In addition, since the gap is provided between the metal layer and the crystal resonator element, the vibration of the crystal resonator element is not disturbed by the metal layer, and the crystal resonator element can be driven normally. In addition, since the electrodes of the crystal resonator element are connected to the wiring pattern from the inside of the recess, the connection portion between the electrode and the wiring pattern is not exposed to the outside of the element-embedded substrate, and the connection portion is protected and the connection is reliable. Can increase the sex. In addition, since the sealing material is filled between the wiring pattern and the electrode, these connection portions can be further protected. Furthermore, since the opening of the recess is sealed by this sealing material, the cavity of the recess is completely sealed, and the crystal resonator element can be driven stably.

Next, in the element-embedded substrate manufacturing method of the present invention, a seed layer is laminated on a plate substrate, a wiring pattern is formed on the seed layer, and a quartz vibrator and a pair of the quartz vibrator are sandwiched between the wiring patterns. A plate substrate forming step for attaching a quartz crystal vibration element comprising the electrodes, and a substrate having at least a surface provided with an indentation on one surface, and preparing the plate substrate while accommodating the crystal oscillation element in the recess And a removal step of removing the plate substrate and the seed layer from the substrate.
In the element-embedded substrate manufacturing method of the present invention, the wiring pattern is transferred to the dielectric layer by forming a dielectric layer on the one surface of the substrate and then laminating the plate substrate on the substrate. It is desirable to embed.
Furthermore, in the method for manufacturing an element-embedded substrate of the present invention, it is desirable that the plate substrate is laminated on the substrate after forming a metal layer on the entire inner surface of the recess.
Furthermore, in the element-embedded substrate manufacturing method of the present invention, a sealing material is filled between the wiring pattern and the crystal resonator element in the plate substrate forming step, and the plate substrate is formed on the substrate in the laminating step. When laminating, it is desirable to seal the recess with the sealing material.

According to said structure, a thin element built-in board | substrate can be manufactured by accommodating a crystal oscillation element in a recessed part. Moreover, since the wiring pattern is embedded in the dielectric layer, the exposed area of the wiring pattern is reduced, and the wiring pattern can be protected by the dielectric layer. In particular, the wiring pattern is not etched in the subsequent seed layer etching step, and the reduction in the line width of the wiring pattern can be prevented.
Further, the metal layer formed on the entire inner surface of the recess corresponds to a cover member of a general crystal resonator, and can protect the crystal resonator element. Furthermore, by filling a sealing material between the wiring pattern and the electrode, these connection portions can be further protected. Furthermore, since the opening of the concave portion is sealed by this sealing material, the void portion of the concave portion is completely sealed, and the crystal resonator element can be driven stably.

  According to the element-embedded substrate and the manufacturing method thereof of the present invention, it is possible to provide an element-embedded substrate in which the crystal resonator is completely embedded in the substrate and the manufacturing method thereof.

Hereinafter, an element-embedded substrate and a manufacturing method thereof according to embodiments of the present invention will be described with reference to the drawings.
The method for manufacturing an element-embedded substrate according to the present embodiment includes a plate substrate forming step, a laminating step, and a removing step.
The outline of each process will be described. First, in the plate substrate process, a seed layer is stacked on the plate substrate, a wiring pattern is formed on the seed layer, and the crystal oscillator and the crystal oscillator are sandwiched between the wiring patterns. This is a step of attaching a crystal resonator element composed of a pair of electrodes. The laminating step is a step of preparing a substrate having at least a surface provided with a recess on one surface and laminating the plate substrate on the one surface side of the substrate while accommodating the crystal resonator element in the recess. It is. The removing step is a step of removing the plate substrate and the seed layer from the substrate.

  Details of each step will be described below with reference to the drawings. FIG. 1 is a process diagram showing a plate substrate process, FIG. 2 is a process chart of a process for forming a substrate used in a lamination process, and FIG. 3 is a process chart showing a lamination process and a removal process. 1 to 3 are for explaining the manufacturing method of the element-embedded substrate according to the present embodiment. The size, thickness, dimensions, etc. of the respective parts shown in the figure are the dimensional relations of the actual element-embedded substrate. It does not necessarily match.

"Plate substrate formation process"
First, in the plate substrate forming step, a plate substrate 1 shown in FIG. 1A is prepared, and then a seed layer 2 is formed on the entire surface including one surface 1a of the plate substrate 1 as shown in FIGS. 1A and B. For example, the seed layer 2 may be a laminated film including a zinc oxide layer having a thickness of 50 nm to 500 nm and a metal copper layer having a thickness of about 2 μm laminated on the zinc oxide layer. By forming the seed layer 2 on the entire surface of the plate substrate 1, the peelability between the plate substrate 1 and a wiring pattern described later can be improved. The zinc oxide layer can be formed by, for example, an electroless plating method after putting the plate substrate 1 into a plating bath containing zinc oxide. Further, the metal copper layer can be formed by an electroless plating method. The seed layer 2 may be formed only on one surface 1a of the plate substrate 1.

  Further, it is preferable that the entire surface of the plate substrate 1 is made of silicon oxide because the adhesion with the zinc oxide layer constituting the seed layer can be improved and the plate substrate 1 can be reused. Specific examples of the plate substrate 1 include, for example, a glass plate containing silicon oxide as a main component, a silicon substrate in which a silicon oxide layer is formed on the entire surface by a thermal oxidation method or a thermal CVD method, and a silicon oxide layer on the entire surface by a sputtering method or the like. A resin substrate or a dielectric substrate coated on the substrate can be used. Moreover, what added dopants, such as B, P, As, can also be used as said silicon substrate. Further, the resin substrate may be flexible, and in this case, a long resin substrate can be wound in a roll shape, which is suitable for continuous production and can improve productivity. The thickness of the plate substrate 1 is not particularly limited, but for example, a plate having a thickness of 30 μm to 3 mm can be used.

  Next, as shown in FIG. 1C, a patterned resist layer 4 (resist pattern) having a plurality of resist removal portions 4 a is formed on the seed layer 2. Specifically, a photosensitive resin film or dry film (hereinafter referred to as a resist layer) of about 10 μm, for example, is laminated on the seed layer 2, and then exposure and development are performed by overlaying the mask to cope with the mask pattern. A resist removal portion 4a to be formed is formed. In this way, the patterned resist layer 4 having the resist removal portion 4a is formed.

  In addition, the residue of the photosensitive resin film or the dry film may remain in the resist removal portion 4a after the patterned resist layer 4 is formed. If this residue remains, the wiring pattern to be formed later may be disconnected, or the adhesion between the wiring pattern and the seed layer 2 may be lowered, resulting in a problem in the subsequent removal process. Therefore, for the purpose of complete removal of the residue, after forming the pattern resist layer 4, the resist removal portion 4a is irradiated with argon plasma, or the surface of the seed layer 2 exposed to the resist removal portion 4a is lightly etched, It is desirable to remove the residue. In the case of irradiating with argon plasma, for example, it may be performed under conditions of a plasma power of about 500 W, an atmospheric pressure of 10 Pa or less, an argon flow rate of 50 sccm, and an irradiation time of 30 seconds. In addition, in order to lightly etch the surface of the seed layer, it is preferable that the seed layer surface be treated with an etchant made of 10% aqueous acetic acid for 30 seconds. By performing such a treatment, the adhesion strength between the seed layer 2 and the wiring pattern can be 3 N / cm or more.

Next, as shown in FIG. 1D, a wiring pattern 5 made of a Cu film 5a and an Au film 5b is formed on the resist removal portion 4a by a plating method. Specifically, for example, a plating solution containing copper sulfate or the like is brought into contact with the seed layer 2 in the resist removing portion 4a, and then direct current is applied to the seed layer 2 to grow Cu plating. Formed by growing plating. The thickness of the wiring pattern 5 is preferably thinner than the thickness of the patterned resist layer 4, and is preferably about 5 μm, for example. The thickness of the Cu film 5a is preferably about 3 μm, for example, and the thickness of the Au film 5b is preferably about 0.1 μm, for example.
Next, as shown in FIG. 1E, the patterned resist layer 4 is removed by wet etching. In this way, the seed layer 2 and the wiring pattern 5 are formed on the plate substrate 1.

  Next, as shown in FIG. 1F, the crystal resonator element 31 is mounted on the wiring pattern 5. As shown in FIG. 1G, the crystal resonator element 31 includes a crystal piece (crystal oscillator) 31a and a pair of electrodes 31b and 31b sandwiched from the thickness direction of the crystal piece 31a. For example, a solder ball 31c is attached to the electrode 31b of the crystal resonator element, and the crystal resonator element 31 is connected to the wiring pattern 5 through the solder ball 31c. When the crystal unit 31 is mounted, the sealing material 34 is filled between the wiring pattern 5 and the crystal piece 31a. Examples of the material of the sealing material 34 include an epoxy resin. Further, when the crystal resonator element 31 is mounted, it is mounted so that the thickness direction of the crystal piece 31a substantially coincides with the thickness direction of the plate substrate 1, that is, in a state where the crystal piece is laid on the plate substrate 1. Is desirable.

Next, as shown in FIG. 2A, an insulating substrate 6 (substrate) having a thickness of about 500 μm is prepared. Cu layers 7 and 7 having a thickness of about 18 μm are formed on one surface 6a and the other surface 6b of the substrate 6 by plating, for example. In addition, as a specific example of the insulating substrate 6, a plate material made of a thermoplastic resin such as an epoxy resin or a polyester resin can be used. A glass epoxy resin plate can also be used as the insulating substrate 6.
Next, as shown in FIG. 2B, a through hole 8 for embedding a crystal resonator element and through holes 9 and 9 for through holes are formed in the insulating substrate 6. At this time, the through-hole 8 for filling is provided so as not to break the Cu layer 7 formed on the other surface 6 b side of the substrate 6. The through hole 9 for the through hole is provided so as to penetrate the substrate 6 including the Cu layers 7 and 7.
Further, different Cu layers 10 and 10 are formed on the Cu layers 7 and 7 on the upper surface 6a side and the lower surface 6b side of the substrate 6 by, for example, a plating method. Further, Cu layers 11 and 41 are formed on the inner surfaces of the through holes 8 and 9 by a plating method.
Note that the shape of the through-hole 8 in plan view may be any shape of a circle, an ellipse, a triangle, and a polygon including a rectangle. About the magnitude | size of the through-hole 8, the magnitude | size to the extent that the quartz crystal vibration element 31 may be sufficient is sufficient. Furthermore, the through-hole 8 can be formed by means such as punching using a mold or laser processing.

Next, as shown in FIG. 2C, the Cu layers 7 and 10 formed on the substrate 6 are respectively patterned. When patterning the Cu layer on the one surface 6a side, patterning is performed so that the Cu layer 12 remains around the through holes 8 and 9 and the wiring portion 13 remains outside the through holes 9 and 9 in the drawing. Further, when the Cu layer on the other surface 6 b side is patterned, the Cu layer 14 that closes the through hole 8 is left and the Cu layer 15 is left around the through hole 9. The through hole 8 is closed by the Cu layer 14 left by the patterning and becomes a recess 16. A metal layer composed of Cu layers 14 and 11 is formed on the entire inner surface of the recess 16.
Next, each through-hole 9 is filled with a conductive paste 17, and a Cu post layer 18 having a thickness of about 10 μm is formed on the conductive paste 17 by, for example, a plating method. The through hole 9 is closed by the Cu post layer 18. In this way, a through hole 19 made of the conductive paste 17 and the Cu post layer 18 is formed.

Next, as shown in FIG. 2D, dielectric layers 20 and 20 having a thickness of about 10 μm to 20 μm are formed on both surfaces of the insulating substrate 6 by, for example, a printing method. The thickness of the dielectric layer 20 is adjusted so that the upper surface of the Cu post layer 18 and the surface of the dielectric layer 20 are flush with each other. Examples of the material of the dielectric layer 20 include thermoplastic resins such as epoxy resins and polyester resins.
Next, as shown in FIG. 2E, a conductive paste 21 is applied on the Cu post layer 18. In this way, the insulating substrate 6 provided with the recess 16 and the through hole 19 is formed.

"Lamination process and removal process"
Next, a lamination process and a removal process are demonstrated with reference to FIG.
First, as shown in FIG. 3A, an insulating substrate 6 provided with a recess 16 and a through-hole 19 and a plate substrate 1 attached with a crystal resonator element 31 are prepared. Then, the plate substrate 1 is disposed on the one surface 6a side of the insulating substrate 6, and the substrates 1 and 6 are aligned so that the concave portion 16 and the crystal resonator element 31 face each other and overlap each other.
Further, another plate substrate 32 is prepared. A seed layer 2 is formed on the entire surface of the plate substrate 32, and a wiring pattern 35 including a Cu film 35a and an Au film 35b is formed on the one surface 31a side. Then, another plate substrate 32 is arranged on the other surface 6 b side of the insulating substrate 6, and the plate substrate 31 with respect to the insulating substrate 6 so that the wiring pattern 35 of the plate substrate 32 overlaps the conductive paste 21 of the insulating substrate 6. Align.

Next, as shown in FIG. 3B, the plate substrates 1 and 32 and the insulating substrate 6 are laminated and hot-pressed. By this hot pressing, the wiring patterns 5 and 35 are transferred to the dielectric layers 20 and 20 of the insulating substrate, respectively. The dielectric layers 20, 20 are deformed into a thin plate shape by being pressed from the thickness direction thereof, whereby a part of the dielectric layer is extruded to the non-formed portion A of each wiring pattern 5, 35. In this manner, the wiring patterns 5 and 35 are transferred and embedded in the dielectric layer 20.
At the same time, the crystal resonator element 31 is inserted into the recess 16. A gap portion 27 is formed between the crystal resonator element 31 and the recess 16. Further, by inserting the crystal resonator element 31, the sealing material 34 pushes away the dielectric layer 20 and abuts against the Cu layer 12 left around the recess 16. The sealing material 34 is filled between the crystal piece 31a and the wiring pattern 5. However, a part of the sealing material 34 protrudes from the crystal piece 31a and is filled. Surrounded. For this reason, as the crystal resonator element 31 is inserted into the recess 16, the entire outer edge of the sealing material 34 is abutted against the Cu layer 12 around the recess 16. As a result, the opening of the recess 16 is completely sealed by the sealing material 34.
Further, the Cu post layer 18 of the through hole 19 is connected to the wiring patterns 5 and 35 via the conductive paste 21.

  Although the temperature at the time of hot pressing depends on the material of the insulating substrate 6, it is preferably in the range of 140 to 180 ° C. The pressure of the hot press is preferably about 15 to 25 Pa. Further, the pressing time is preferably about 30 to 50 minutes. In this way, the wiring patterns 5 and 35 and the crystal resonator element 31 are transferred to the insulating substrate 6.

"Removal process"
Next, as shown in FIG. 3C, stress is applied between the plate substrates 1 and 32 and the insulating substrate 6 to peel the plate substrates 1 and 32 from the insulating substrate 6. At this time, peeling occurs between the plate substrate 1 and the seed layer 2, and the seed layer 2 is transferred to the insulating substrate 6 side together with the wiring pattern 5. The seed layer 2 transferred to the insulating substrate 6 is removed by wet etching. For example, a persulfuric acid aqueous solution can be used as the etching solution. The plate substrate 1 after peeling can be reused by removing the seed layer 2 remaining without being transferred with an acid or alkali.

It is considered that the separation between the plate substrate 1 and the seed layer 2 is caused by the following mechanism.
That is, when the plate substrate 1 is peeled from the insulating substrate 6, a tensile stress is applied to the seed layer 2 in the film thickness direction. At this time, the wiring pattern 5 is bonded to the metal copper layer constituting the seed layer 2, and the wiring pattern 5 is embedded in the insulating substrate 6 and is firmly bonded to the insulating substrate 6. It is considered that the tensile stress toward the 6 side is superior, whereby the seed layer 2 is transferred together with the wiring pattern 5 to the insulating substrate 6 side. In addition, the metal copper layer constituting the seed layer 2 is pulled by the wiring pattern 5 at the time of peeling and is subjected to a shear stress, but the metal copper layer is backed with a zinc oxide layer as an underlayer. There is no possibility that the metal copper layer itself is torn, and it is peeled cleanly from the plate substrate 1 together with the zinc oxide layer. Further, since the zinc oxide layer itself is formed with a film thickness of 50 nm to 500 nm, the film strength of the zinc oxide layer is high, and the zinc oxide layer itself is not likely to be broken and is peeled cleanly from the plate substrate 1. .

Although the wiring patterns 5 and 35 are slightly etched when the seed layer 2 is etched, there is no possibility that the line widths of the wiring patterns 5 and 35 are reduced. This is because most of the wiring patterns 5 and 35 are embedded in the dielectric layer 20, so that the exposed portions of the wiring patterns 5 and 35 are reduced, and the wiring pattern 5 is protected by the dielectric layer 20. Because. Since the wiring patterns 5 and 35 are protected by the insulating substrate 6, corrosion of the wiring patterns 5 and 35 due to the etching solution is prevented, and a reduction in the line width of the wiring patterns 5 and 35 can be prevented. As a result, a line and space (L / S) of 10 μm / 10 μm, which was impossible with the conventional transfer method, can be realized.
In this way, the element built-in substrate 100 is manufactured.

  According to the method for manufacturing an element-embedded substrate of this embodiment, the thin element-embedded substrate 100 can be manufactured by housing the crystal resonator element 31 in the recess 16. In particular, the element-embedded substrate 100 can be made thinner by accommodating the crystal piece 31a of the crystal resonator element 31 so that the thickness direction thereof substantially coincides with the thickness direction of the insulating substrate 6. Further, since the wiring patterns 5 and 35 are embedded in the dielectric layer 20, the exposed areas of the wiring patterns 5 and 35 are reduced, and the wiring patterns 5 and 35 can be protected. In particular, the wiring pattern is not etched in the subsequent step of etching the seed layer 2, and a 10 μm / 10 μm line and space (L / S) can be realized.

"Element-embedded substrate"
As shown in FIG. 3C, the element-embedded substrate 100 of this embodiment is schematically configured with a crystal resonator element 31 housed in a recess 16 provided in the insulating substrate 6. The crystal resonator element 31 includes a crystal piece 31a and a pair of electrodes 31b that sandwich the crystal piece 31a. The crystal resonator element 31 is accommodated in the recess 16 so that the thickness direction of the crystal piece 31 coincides with the thickness direction of the insulating substrate 6.
Dielectric layers 20 and 20 are laminated on both surfaces 6 a and 6 b of the insulating substrate 6. On the surface of the dielectric layer 20, wiring patterns 5 and 35 made of Cu films 5a and 35a and Au films 5b and 35b are embedded. A wiring portion 13 made of a Cu layer is sandwiched between the one surface 6 a of the insulating substrate 6 and the dielectric layer 20. A Cu layer 12 is provided around the recess 16. Further, a Cu layer 14 serving as the bottom of the recess 16 is provided on the other surface 6 b of the insulating substrate 6.

A solder ball 31c is attached to the pair of electrodes 31b. The electrode 31b is connected to the wiring pattern 5 from the inside of the recess 16 through the solder ball 31c. A sealing material 34 is filled between the crystal resonator element 31 and the wiring pattern 5. The sealing material 34 is bonded to the Cu layer 12 provided around the recess 16, and the recess 16 is closed by the sealing material 34.
Cu layers 11 and 14 (metal layers) are formed on the inner surface of the recess 16. A gap portion 27 is formed between the crystal resonator element 31 and the Cu layers 11 and 14.

  The wiring patterns 5 and 35 are connected to each other through a through hole 19 that penetrates the insulating substrate 6. The through hole 19 is generally configured by a conductive paste 17 housed in the insulating substrate 6 and a Cu post layer 18 provided on both surfaces of the insulating substrate 6 and penetrating the dielectric layer 20. The wiring patterns 5 and 35 are connected. Further, a conductive paste 21 is applied between the Cu post layer 18 and the wiring patterns 5 and 35 to ensure the connection between the wiring patterns 5 and 35 and the through hole 19.

According to the above element-embedded substrate 100, since the crystal resonator element 31 is housed in the recess 16 of the substrate, the element-embedded substrate 100 can be made thin. In particular, the element-embedded substrate 100 can be made thinner by accommodating the crystal piece 31a so that the thickness direction of the quartz crystal piece 31a substantially coincides with the thickness direction of the insulating substrate 6. Further, the Cu layers 11 and 14 formed on the entire inner surface of the recess 16 correspond to a cover member of a general crystal resonator, and the crystal resonator element 31 can be protected. Further, by using the metal layers 11 and 14 as ground terminals, the crystal resonator element 31 can be covered with the ground. Further, by providing the gap portion 27 in the recess 16, there is no possibility that the vibration of the crystal resonator element 31 is disturbed by the metal layers 11 and 14, and the crystal resonator element 31 can be driven normally. Furthermore, since the concave portion 16 is sealed by the sealing material 34, the gap 27 is completely sealed, and the crystal resonator element 31 can be driven stably.
Further, since the Au films 5b and 35b constituting the wiring patterns 5 and 35 are joined to the crystal resonator element 31 or the through hole 19, the reliability of conduction between the wiring patterns 5 and 35 and these members can be improved. .

FIG. 1 is a schematic cross-sectional view illustrating a method for manufacturing an element-embedded substrate according to an embodiment of the present invention. FIG. 2 is a schematic cross-sectional view illustrating a method for manufacturing an element-embedded substrate according to an embodiment of the present invention. FIG. 3 is a schematic cross-sectional view illustrating a method for manufacturing an element-embedded substrate according to an embodiment of the present invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Plate substrate, 2 ... Seed layer, 5 ... Wiring pattern, 6 ... Insulating substrate (substrate), 6a ... One side, 11, 14 ... Cu layer (metal layer), 16 ... Recessed part, 20 ... Dielectric layer, 27 ... Cavity, 31 ... Quartz vibrating element, 31a ... Quartz piece (quartz vibrating body), 31b ... Electrode, 34 ... Sealing material, 100 ... Board with built-in element

Claims (7)

  An element-embedded substrate characterized in that a crystal resonator element comprising a crystal resonator and a pair of electrodes sandwiching the crystal resonator is housed in a recess provided at least on the surface of an insulating substrate .   The element built-in substrate according to claim 1, wherein a metal layer is formed on the entire inner surface of the recess, and a gap is provided between the metal layer and the crystal resonator element.   A wiring pattern is provided on the one surface side of the substrate, the pair of electrodes are connected to the wiring pattern from the inside of the recess, and a sealing material is filled between the wiring pattern and the crystal resonator element. 3. The element-embedded substrate according to claim 1, wherein the concave portion is sealed by the sealing material when the crystal resonator element is accommodated in the concave portion. A plate substrate forming step of laminating a seed layer on a plate substrate, forming a wiring pattern on the seed layer, and further attaching a crystal vibrating element comprising a crystal vibrating body and a pair of electrodes sandwiching the crystal vibrating body to the wiring pattern When,
A step of preparing a substrate having at least a surface provided with a concave portion on one surface and having an insulating surface, and laminating the plate substrate on one surface side of the substrate while accommodating the crystal resonator element in the concave portion;
A method of manufacturing a device-embedded substrate, comprising: a removing step of removing the plate substrate and the seed layer from the substrate.   5. The wiring pattern is transferred and embedded in the dielectric layer by forming a dielectric layer on the one surface of the substrate and then laminating the plate substrate on the substrate. The manufacturing method of the element built-in board | substrate of description.   6. The method for manufacturing an element-embedded substrate according to claim 4, wherein the plate substrate is laminated on the substrate after forming a metal layer on the entire inner surface of the recess. In the plate substrate forming step, a sealing material is filled between the wiring pattern and the crystal resonator element, and the concave portion is sealed with the sealing material when the plate substrate is laminated on the substrate in the laminating step. The method for manufacturing a device-embedded substrate according to any one of claims 4 to 6.

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