JP2005311043A - Semiconductor device and inspection method, and device therefor - Google Patents

Semiconductor device and inspection method, and device therefor Download PDF

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Publication number
JP2005311043A
JP2005311043A JP2004125432A JP2004125432A JP2005311043A JP 2005311043 A JP2005311043 A JP 2005311043A JP 2004125432 A JP2004125432 A JP 2004125432A JP 2004125432 A JP2004125432 A JP 2004125432A JP 2005311043 A JP2005311043 A JP 2005311043A
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Prior art keywords
electrode pad
inspection
semiconductor device
pad portion
metal
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JP2004125432A
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Japanese (ja)
Inventor
Kazuhiro Ishikawa
和弘 石川
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Panasonic Holdings Corp
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Matsushita Electric Industrial Co Ltd
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Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP2004125432A priority Critical patent/JP2005311043A/en
Publication of JP2005311043A publication Critical patent/JP2005311043A/en
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Abstract

<P>PROBLEM TO BE SOLVED: To increase the number of contacts with an electrode pad by a probe needle whose top ends are shaped like saw-teeth to carry out inspection with low loads, and to prevent the characteristics fluctuations of a transistor located directly under the electrode pad, or generation of interlayer film cracks. <P>SOLUTION: The number of contacts with an electrode 2 is increased by a probe needle 4, whose outer peripheral part is provided with a plurality of sharp and short top ends 4a so that accurate contacts can be realized with low load for probe inspection. The contact areas between the electrode pad 2 and metal bumps or metallic wires are increased by probe traces 8 in this inspection so that the contact resistance value can be stabilized, and that fluctuation can be reduced. Also, the position accuracy of the metal bumps or metallic wires to be formed on that can be made satisfactory. Furthermore, AL waste 6 to be generated in this inspection are removed by a vacuum suction means at the central part of the probe needle 4 so that any short circuiting between the adjacent electrode pads 2 can be prevented. Thus, the productivity of the semiconductor device 1, after inspection, is made satisfactory. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

本発明は、トランジスタなどを構成する半導体素子上に電極パッドを形成させたパッドオンエレメント（以下、ＰＯＥという）と称する半導体素子（ＰＯＥ半導体素子）における、特に、半導体素子上の電極パッド部にプローブ針を用いたプローブ検査の際に生じる半導体素子へのダメージの低減と接触抵抗の安定化、およびワイヤーボンディング位置精度の向上化を図ることができる、プローブ検査を通じて得た半導体装置とこの検査方法および検査装置に関するものである。   The present invention relates to a probe in a semiconductor element (POE semiconductor element) called a pad-on-element (hereinafter referred to as POE) in which an electrode pad is formed on a semiconductor element that constitutes a transistor or the like, and more particularly to an electrode pad portion on the semiconductor element. A semiconductor device obtained through probe inspection, which can reduce damage to a semiconductor element generated during probe inspection using a needle, stabilize contact resistance, and improve wire bonding position accuracy, and this inspection method, and The present invention relates to an inspection device.

以下、図面を参照して従来のプローブ針による半導体素子のデバイス特性を検査確認する検査方法について説明する。図１０は従来の半導体素子１の特性検査する際のプローブ検査工程の一部を示す断面図である。図１０に示すように、従来のプローブ検査工程においては、半導体ウエハー１６上にある複数の半導体素子１に設けた複数のアルミニウム（以下、ＡＬという）等の金属層からなる電極パッド部２の表層面部に、検査用で先端がＶ字型に一箇所鋭角になっている構造のプローブ針を、シリコンナイトライド（以下、ＳｉＮという）保護膜３に接することなく、電極パッド部２に突き刺して電極パッド部２のＡＬ材を削りながら、電極パッド部２とプローブ針４とが電気的に接触し検査するものである。   Hereinafter, an inspection method for inspecting and confirming device characteristics of a semiconductor element using a probe needle will be described with reference to the drawings. FIG. 10 is a cross-sectional view showing a part of a probe inspection process when inspecting the characteristics of a conventional semiconductor device 1. As shown in FIG. 10, in the conventional probe inspection process, the surface layer of the electrode pad portion 2 made of a plurality of metal layers such as a plurality of aluminum (hereinafter referred to as AL) provided on the plurality of semiconductor elements 1 on the semiconductor wafer 16. On the surface portion, a probe needle having a structure for inspection and having a sharp V-shaped tip is pierced into the electrode pad portion 2 without contacting the silicon nitride (hereinafter referred to as SiN) protective film 3, and the electrode The electrode pad 2 and the probe needle 4 are in electrical contact with each other for inspection while the AL material of the pad 2 is shaved.

しかし、このような構造では、プローブ針４に加圧されるオーバードライブ（以下、ＯＤという）量が低い領域では、検査用のプローブ針４と半導体素子１上の複数の電極パッド部２との接触抵抗が高くなり、安定した電気的検査ができない状態にあった。逆にＯＤ量を高くすれば、半導体素子１上の電極パッド部２の直下にあるトランジスタ部２３や層間膜２４にクラック２５が発生するといった物理的ダメージが付加され、安定した検査領域が十分に確保できないといった技術的課題があった。   However, in such a structure, in the region where the amount of overdrive (hereinafter referred to as OD) applied to the probe needle 4 is low, the probe needle 4 for inspection and the plurality of electrode pad portions 2 on the semiconductor element 1 The contact resistance was high, and stable electrical inspection was not possible. Conversely, if the OD amount is increased, physical damage such as generation of cracks 25 in the transistor part 23 and the interlayer film 24 immediately below the electrode pad part 2 on the semiconductor element 1 is added, and a stable inspection region is sufficiently obtained. There was a technical problem that could not be secured.

また、従来のプローブ検査工程では、電極パッド部２とプローブ針４とが接触してＯＤ量が付加される際、プローブ針４が電極パッド部２のＡＬ材を削り、発生したＡＬ屑６により、隣接する電極パッド部２間でのショート不良等の電気的不具合を発生させるだけでなく、ＡＬ屑６を踏んで金（Ａｕ）等の金属バンプ９を形成した際、半導体素子１上の電極パッド部２の直下にあるトランジスタ部２３や層間膜２４にクラック２５を発生するといった危険性をも有する構造であった。
特開昭６１−２９５６４０号公報 特開平３−１９１５４３号公報 Further, in the conventional probe inspection process, when the electrode pad portion 2 and the probe needle 4 are in contact with each other and an OD amount is added, the probe needle 4 scrapes the AL material of the electrode pad portion 2, and the generated AL scrap 6 When the metal bumps 9 made of gold (Au) or the like are formed by stepping on the AL scrap 6 as well as causing an electrical failure such as a short-circuit failure between the adjacent electrode pad portions 2, the electrodes on the semiconductor element 1 The structure has a risk that a crack 25 is generated in the transistor part 23 and the interlayer film 24 immediately below the pad part 2.
JP-A 61-295640 Japanese Patent Laid-Open No. 3-191543

前述のように、従来のプローブ検査工程の構造では、図１０に示した電極パッド部２直下へのプローブ荷重が大きく付加された状態で半導体素子のデバイス特性を検査を行っている。この従来の検査方法においては、プローブ針４に付加する荷重のＯＤ量が高くなると、電極パッド部２直下の層間膜２４へのクラック２５の発生やトランジスタ部２３への悪影響が発生する。現状のプロービングの仕様条件においては、工程管理マージンが少ない領域で生産管理している状況にある。   As described above, in the structure of the conventional probe inspection process, the device characteristics of the semiconductor element are inspected in a state where a probe load just below the electrode pad portion 2 shown in FIG. In this conventional inspection method, when the OD amount of the load applied to the probe needle 4 is increased, the crack 25 is generated in the interlayer film 24 immediately below the electrode pad portion 2 and the transistor portion 23 is adversely affected. Under the current probing specification conditions, production is managed in an area where the process management margin is small.

また、図１０に示すプローブ針４による検査方法においては、電極パッド部２の表面を、鋭角を有するＶ字型のプローブ針４により、酸化膜を破り、かつＡＬ材を削りながら、電気的検査をする構成を有している。この際、電極パッド部２の直下にあるチタンナイトライド（以下、ＴｉＮという）膜が露出してしまうと、そのＴｉＮ膜と金属バンプ９に用いられるＡｕは接着しないため、Ａｕ−ＡＬ合金相が十分に形成できず、つまり金属バンプ９と電極パッド部２との不着による接続不具合が発生する。   Further, in the inspection method using the probe needle 4 shown in FIG. 10, the surface of the electrode pad portion 2 is electrically inspected while breaking the oxide film and scraping the AL material with the V-shaped probe needle 4 having an acute angle. It has the structure which carries out. At this time, if a titanium nitride (hereinafter referred to as TiN) film immediately below the electrode pad portion 2 is exposed, the TiN film and Au used for the metal bump 9 do not adhere to each other. It cannot be formed sufficiently, that is, a connection failure occurs due to non-bonding between the metal bump 9 and the electrode pad portion 2.

これを回避するには、電極パッド部２のサイズ（セル高さ）を大きくしてプローブ検査領域とバンプ形成領域を独立分離させる必要があった。しかし、これにより半導体素子１のサイズが大きくなり、半導体素子１のサイズ縮小効果やその低コスト化が図れなくなるといった大きな課題があった。   In order to avoid this, it is necessary to increase the size (cell height) of the electrode pad portion 2 and to separate the probe inspection region and the bump formation region independently. However, this increases the size of the semiconductor element 1, and there is a significant problem that the size reduction effect of the semiconductor element 1 and its cost cannot be reduced.

また、削ったＡＬ屑６が積み上がり、電極パッド部２の表面上にＡＬ屑６の山が発生する。これらの現象により、電極パッド部２上に発生したＡＬ屑６の山の上に、金属バンプ９を形成すると、電極パッド部２の直下にあるトランジスタ部２３や層間膜２４にクラック２５が発生するといった物理的ダメージが発生した。また、電気的導通性を有するＡＬ屑６の塊が、隣接する電極パッド部２間にまたがりショート等の不良を発生させるなどの電気的信頼性の面において大きな課題も有していた。   Further, the scraped AL waste 6 is piled up, and a pile of AL waste 6 is generated on the surface of the electrode pad portion 2. Due to these phenomena, when the metal bump 9 is formed on the peak of the AL scrap 6 generated on the electrode pad portion 2, a physical phenomenon that a crack 25 is generated in the transistor portion 23 and the interlayer film 24 immediately below the electrode pad portion 2. Damage has occurred. Further, the AL scrap 6 mass having electrical conductivity has a big problem in terms of electrical reliability, such as causing a defect such as a short circuit between the adjacent electrode pad portions 2.

さらに、Ａｕ等の金属バンプや金属線のワイヤーボンディングの位置精度の不具合も多発しており、今後必要不可欠である半導体装置の小型化に伴う狭パッドピッチへの対応において、接続歩留り、接続信頼性などの観点で、大きな品質的課題も発生している状況である。   In addition, there are frequent defects in the positional accuracy of Au and other metal bumps and wire bonding of metal wires, and the connection yield and connection reliability are required in response to the narrow pad pitch accompanying the downsizing of semiconductor devices, which will be indispensable in the future. From this point of view, there are big quality issues.

本発明は、前記従来技術の課題を解決することに指向するものであり、特に、複数の溝を有する凹凸部を形成する先端形状として、のこぎり歯状の先鋭で短い先端を複数有するプローブ針を用いることにより、プローブ針と電極パッド部との接触点数を増すことができる。これにより、低荷重でプロービングする検査が可能となり、電極パッド部の直下にあるトランジスタ部の特性変動や層間膜のクラック等の耐ダメージに対する十分なマージンを確保できる。   The present invention is directed to solving the problems of the prior art, and in particular, a probe needle having a plurality of sawtooth-like sharp and short tips as a tip shape for forming an uneven portion having a plurality of grooves. By using it, the number of contact points between the probe needle and the electrode pad portion can be increased. As a result, it is possible to perform an inspection for probing with a low load, and it is possible to secure a sufficient margin for damage resistance such as characteristic variation of the transistor portion directly under the electrode pad portion and cracks in the interlayer film.

また、酸化膜の付いた電極パッド部のＡＬ材を削り、かつ電極パッド部直下のＴｉＮ膜を露出させることなく、電極パッド部の開口部内に複数の溝を有する凹凸部を形成して、プローブ針と電極パッド部との規格内の接触抵抗（２Ω以下）を確保し、電気的に安定したプローブ検査が可能となる。   In addition, the surface of the electrode pad portion with the oxide film is scraped off, and a concavo-convex portion having a plurality of grooves is formed in the opening portion of the electrode pad portion without exposing the TiN film immediately below the electrode pad portion. Contact resistance (2Ω or less) within the standard between the needle and the electrode pad portion is ensured, and an electrically stable probe inspection is possible.

また、ＴｉＮ膜の露出を防止するために電極パッド部の膜厚を大きくすることも可能である。さらに、電極パッド部の中央部に形成したプローブ痕には、凹凸部つまり複数の溝を有していることから、その部分にＡｕ等の金属メッキを形成することで、金属バンプまたは金属線のワイヤーボンディングにおいて電極パッド部上でのＡｕ−ＡＬ合金率が高くなり、より高い接続信頼性を確保することができ、さらに、金属バンプまたは金属線のワイヤーボンディングにおける位置精度を向上でき小型化も図ることができる半導体装置とこの検査方法および検査装置を提供することを目的する。   Further, it is possible to increase the film thickness of the electrode pad portion in order to prevent the TiN film from being exposed. Furthermore, since the probe mark formed in the central portion of the electrode pad portion has an uneven portion, that is, a plurality of grooves, by forming a metal plating such as Au on the portion, metal bumps or metal wires are formed. In wire bonding, the Au-AL alloy ratio on the electrode pad portion is increased, so that higher connection reliability can be ensured. Further, the position accuracy in wire bonding of metal bumps or metal wires can be improved, and miniaturization is also achieved. It is an object of the present invention to provide a semiconductor device capable of performing the above, and an inspection method and an inspection apparatus.

この目的を達成するために、本発明に係る請求項１に記載される半導体装置は、複数の半導体素子上に形成した金属層からなり、中央部に複数の溝を有する凹凸部を形成した外部接続用の電極パッド部を備え、電極パッド部の凹凸部上に金属バンプを形成し、半導体素子を支持する半導体キャリア基板上に、半田あるいは導電性接着剤とエポキシ系の封止樹脂を介してフリップチップ実装した構成によって、電極パッド部と金属バンプとの電気的接続性を向上させ、金属バンプ形成の位置精度が向上して小型化できる。   In order to achieve this object, a semiconductor device according to claim 1 of the present invention is an external device comprising a metal layer formed on a plurality of semiconductor elements and having an uneven portion having a plurality of grooves in the central portion. Provided with electrode pads for connection, metal bumps are formed on the concave and convex portions of the electrode pads, and a semiconductor carrier substrate that supports the semiconductor element is interposed via solder or a conductive adhesive and an epoxy-based sealing resin With the flip-chip mounted configuration, the electrical connectivity between the electrode pad portion and the metal bump can be improved, the position accuracy of the metal bump formation can be improved, and the size can be reduced.

また、請求項２に記載される半導体装置は、複数の半導体素子上に形成した金属層からなり、中央部に複数の溝を有する凹凸部を形成した外部接続用の電極パッド部を備え、電極パッド部の凹凸部上に金属線よりなるワイヤーをボンディングし、外部のリード端子と電気的に接続させ、エポキシ系のモールド樹脂で樹脂硬化した構成によって、電極パッド部とワイヤーボンディングする金属線との電気的接続性を向上させ、金属線のワイヤーボンディングの位置精度が向上して小型化できる。   According to a second aspect of the present invention, there is provided a semiconductor device including an electrode pad portion for external connection, which is formed of a metal layer formed on a plurality of semiconductor elements, and has an uneven portion having a plurality of grooves at a central portion. A wire made of a metal wire is bonded onto the concavo-convex portion of the pad portion, electrically connected to an external lead terminal, and cured with an epoxy-based mold resin so that the electrode pad portion and the metal wire to be wire-bonded The electrical connectivity is improved, the position accuracy of the wire bonding of the metal wire is improved, and the size can be reduced.

また、請求項３に記載される半導体装置は、請求項１，２の半導体装置であって、電極パッド部の中央部に形成した複数の溝を有する凹凸部を、半導体ウエハー上にある複数の半導体素子の特性検査を行う検査工程において、凹凸部を形成する先端部を有するプローブ針が電極パッド部直下のチタンナイトライド（ＴｉＮ）膜に未突出の状態で電極パッド部の複数箇所を削って接触するプローブ検査によって形成した構成によって、半導体装置の検査工程で形成される凹凸部を利用し、またＴｉＮ膜は露出しないため、例えば、ＴｉＮ膜と金属バンプに用いるＡｕは接着しないことから、Ａｕ−ＡＬ合金相が十分に形成できず金属バンプと電極パッド部との不着による接続不具合を回避し、電気的接続性を向上できる。   According to a third aspect of the present invention, there is provided a semiconductor device according to the first or second aspect, wherein the uneven portion having a plurality of grooves formed in the central portion of the electrode pad portion is provided on the semiconductor wafer. In an inspection process for inspecting characteristics of a semiconductor element, a plurality of portions of the electrode pad portion are shaved with a probe needle having a tip portion forming an uneven portion not protruding from a titanium nitride (TiN) film immediately below the electrode pad portion. Depending on the structure formed by the contact probe inspection, the uneven portion formed in the inspection process of the semiconductor device is used, and the TiN film is not exposed. For example, the Au used for the TiN film and the metal bump does not adhere. -Al alloy phase cannot be sufficiently formed, and connection failure due to non-bonding of metal bump and electrode pad portion can be avoided, and electrical connectivity can be improved.

また、請求項４に記載される半導体装置は、請求項１〜３の半導体装置であって、電極パッド部の中央部に形成した複数の溝を有する凹凸部が、電極パッド部の開口部を除く半導体素子上面を覆ったシリコンナイトライド（ＳｉＮ）保護膜と非接触の大きさで、かつ電極パッド部表面に溝が形成される深さから電極パッド部直下のチタンナイトライド（ＴｉＮ）膜に未突出の深さまでの寸法である構成によって、半導体装置の検査工程で形成される凹凸部を利用して、金属バンプ形成や金属線のワイヤーボンディングの位置精度が向上して小型化でき、金属バンプと電極パッド部との不着による接続不具合を回避して電気的接続性を向上できる。   According to a fourth aspect of the present invention, there is provided the semiconductor device according to any one of the first to third aspects, wherein the concavo-convex portion having a plurality of grooves formed in the central portion of the electrode pad portion serves as an opening of the electrode pad portion. The titanium nitride (TiN) film is formed in a non-contact size with a silicon nitride (SiN) protective film covering the upper surface of the semiconductor element except from the depth at which the groove is formed on the surface of the electrode pad part. Metal bumps can be miniaturized by improving the position accuracy of metal bump formation and wire bonding of metal wires by using the irregularities formed in the inspection process of semiconductor devices, due to the structure that has dimensions up to the unprojected depth. The electrical connectivity can be improved by avoiding a connection failure due to non-bonding between the electrode pad portion and the electrode pad portion.

また、請求項５に記載される半導体装置は、請求項１，２記載の半導体装置であって、凹凸部にある複数の溝に、外部端子と接続する金属バンプあるいは金属線との電気的接続性を向上させるために金属メッキを施した構成によって、金属バンプ形成や金属線のボンディングにおいて電極パッド部上での金属合金率が高くなりさらに電気的接続性を向上できる。   The semiconductor device according to claim 5 is the semiconductor device according to claim 1 or 2, wherein the plurality of grooves in the concavo-convex portion are electrically connected to metal bumps or metal wires connected to external terminals. With the configuration in which metal plating is performed in order to improve the property, the metal alloy ratio on the electrode pad portion is increased in metal bump formation and metal wire bonding, and the electrical connectivity can be further improved.

また、請求項６に記載される半導体装置の検査方法は、複数の半導体素子上に形成した金属層からなる電極パッド部の中央部を、複数の溝を有する凹凸部を形成する先端部をもつプローブ針により金属層の表面を削って接触し半導体素子を検査する検査工程と、検査工程で発生した金属屑をプローブ針に設けた真空吸着穴により処理する金属屑処理工程と、プローブ針により凹凸部の溝を形成した電極パッド部に金属バンプを形成する工程と、金属バンプに半田あるいは導電性接着材を転写した半導体素子を、支持体である半導体キャリア基板上にフリップチップ実装し、エポキシ系の封止樹脂を塗布して硬化する工程とからなる方法によって、プローブ針の先端部が酸化膜を除去し、電極パッド部の金属層の表面を削って接触することで、低荷重で電気的に安定接続された状態で特性検査ができ、また、検査時に発生する金属屑はプローブ針で真空吸着され隣接する電極パッド部間のショート不良を防ぐことができる。   According to a sixth aspect of the present invention, there is provided a method for inspecting a semiconductor device, wherein a central portion of an electrode pad portion made of a metal layer formed on a plurality of semiconductor elements has a tip portion that forms an uneven portion having a plurality of grooves. An inspection process in which the surface of the metal layer is scraped and inspected by the probe needle to inspect the semiconductor element, a metal scrap generated in the inspection process is processed by a vacuum suction hole provided in the probe needle, and an unevenness by the probe needle Forming a metal bump on the electrode pad portion in which the groove is formed, and flip-chip mounting a semiconductor element in which a solder or a conductive adhesive is transferred to the metal bump on a semiconductor carrier substrate as a support, By a method comprising a step of applying and curing the sealing resin, the tip of the probe needle removes the oxide film, and scrapes and contacts the surface of the metal layer of the electrode pad, Electrically can characteristic inspection in a stable connected state with a load, also the metal scrap generated during the inspection can prevent a short circuit failure between the electrode pad portions adjacent vacuum-sucked by the probe needles.

また、請求項７に記載される半導体装置の検査方法は、複数の半導体素子上に形成した金属層からなる電極パッド部の中央部を、複数の溝を有する凹凸部を形成する先端部をもつプローブ針により金属層の表面を削って接触し半導体素子を検査する検査工程と、検査工程で発生した金属屑をプローブ針に設けた真空吸着穴により処理する金属屑処理工程と、半導体素子をリードフレーム上のダイパッド部にペースト材を介してダイスボンド実装し、プローブ針により凹凸部を形成した電極パッド部と外部リードの端子部を電気的に接続する金属線よりなるワイヤーでボンディングする工程と、エポキシ系のモールド樹脂でモールド硬化してリード加工のパッケージ形成する工程とからなる方法によって、プローブ針の先端部が酸化膜を除去し、電極パッド部の金属層の表面を削って接触することで、低荷重で電気的に安定接続された状態で特性検査ができ、また、検査時に発生する金属屑はプローブ針で真空吸着され隣接する電極パッド部間のショート不良を防ぐことができる。   According to a seventh aspect of the present invention, there is provided a method for inspecting a semiconductor device, wherein a central portion of an electrode pad portion made of a metal layer formed on a plurality of semiconductor elements has a tip portion that forms an uneven portion having a plurality of grooves. An inspection process in which the surface of the metal layer is scraped and contacted by the probe needle to inspect the semiconductor element, a metal scrap processing process in which the metal scrap generated in the inspection process is processed by a vacuum suction hole provided in the probe needle, and the semiconductor element is lead Die bond mounting on the die pad part on the frame via a paste material, and bonding with a wire made of a metal wire that electrically connects the electrode pad part formed with the concavo-convex part with the probe needle and the terminal part of the external lead; The tip of the probe needle removes the oxide film by a method that consists of mold curing with epoxy mold resin and forming a package for lead processing. By scraping and contacting the surface of the metal layer of the electrode pad part, it is possible to inspect the characteristics in a state of being electrically stably connected with a low load, and the metal dust generated at the time of inspection is vacuum-adsorbed by the probe needle and adjacent. Short-circuit defects between electrode pad portions can be prevented.

また、請求項８に記載される半導体装置の検査方法は、請求項６，７の検査方法であって、検査工程において、半導体ウエハー上にある複数の半導体素子の特性検査を行うプローブ針の先端部が、電極パッド部直下のチタンナイトライド（ＴｉＮ）膜に未突出の状態で、かつ電極パッド部の複数箇所を削って接触する方法によって、低荷重で電気的に安定接続された状態で特性検査ができ、形成される凹凸部において、チタンナイトライド（ＴｉＮ）膜を露出により生じる金属バンプと電極パッド部との不着による接続不具合を回避し、電気的接続性を向上できる。   An inspection method for a semiconductor device according to claim 8 is the inspection method according to claims 6 and 7, wherein a tip of a probe needle for inspecting characteristics of a plurality of semiconductor elements on a semiconductor wafer in the inspection step. The part is in a state in which it is not stably protruding to the titanium nitride (TiN) film directly under the electrode pad part, and is electrically stably connected with a low load by a method of scraping and contacting a plurality of parts of the electrode pad part. Inspection can be performed, and in the formed concavo-convex portion, it is possible to avoid a connection failure due to non-bonding between the metal bump and the electrode pad portion caused by exposing the titanium nitride (TiN) film, and to improve electrical connectivity.

また、請求項９に記載される半導体装置の検査方法は、請求項６〜８の半導体装置の検査方法であって、検査工程において、電極パッド部の中央部に形成した複数の溝を有する凹凸部が、電極パッド部の開口部を除く半導体素子上面を覆ったシリコンナイトライド（ＳｉＮ）保護膜と非接触の大きさで、かつ電極パッド部表面に溝が形成される深さから電極パッド部直下のチタンナイトライド（ＴｉＮ）膜に未突出の深さまでの寸法である凹凸部を形成する方法によって、低荷重で電気的に安定接続された状態で特性検査ができ、形成される凹凸部において、チタンナイトライド（ＴｉＮ）膜を露出により生じる金属バンプと電極パッド部との不着による接続不具合を回避し、電気的接続性を向上できる。   A semiconductor device inspection method according to a ninth aspect is the semiconductor device inspection method according to any one of the sixth to eighth aspects, wherein the unevenness having a plurality of grooves formed in the central portion of the electrode pad portion in the inspection step. The electrode pad portion has a size that is not in contact with the silicon nitride (SiN) protective film covering the upper surface of the semiconductor element excluding the opening of the electrode pad portion, and the depth at which the groove is formed on the surface of the electrode pad portion. By the method of forming a concavo-convex portion that is a dimension up to the unprojected depth on the titanium nitride (TiN) film directly below, the characteristic inspection can be performed in a state of being electrically connected stably with a low load. In addition, it is possible to avoid a connection failure due to non-bonding between the metal bump and the electrode pad portion caused by exposing the titanium nitride (TiN) film, and to improve electrical connectivity.

また、請求項１０に記載の半導体装置の検査方法は、請求項６，７の半導体装置の検査方法であって、金属屑処理工程において、電極パッド部にプローブ針を接触させる検査工程で発生する金属屑を、プローブ針の中央部に設けた真空吸着穴より瞬時に吸着して電極パッド部上から除去する方法によって、検査時に発生する金属屑はプローブ針で真空吸着され隣接する電極パッド部間のショート不良を防ぐことができる。   The semiconductor device inspection method according to claim 10 is the semiconductor device inspection method according to claim 6 or 7, and is generated in an inspection process in which a probe needle is brought into contact with an electrode pad portion in a metal scrap treatment process. Metal scrap generated during inspection is vacuum-sucked by the probe needle and removed between the adjacent electrode pad parts by a method of instantly sucking metal scraps from the vacuum suction hole provided in the center part of the probe needle and removing it from the electrode pad part. Can prevent short circuit failure.

また、請求項１１に記載の半導体装置の検査装置は、半導体ウエハー上に有する複数の半導体素子の特性検査を行う検査装置において、半導体素子と接続するため電極パッド部の中央部に複数の溝を有する凹凸部を形成する先端部にのこぎり歯状の先鋭で短い先端を複数有し、先端部により電極パッド部を形成する金属層を削って接触するプローブ針を備えた構成によって、複数の先端部により接続されるため電極パッド部とプローブ針との接触抵抗を低減し、かつ低荷重で電気的に安定接続された状態で特性検査ができる。   The inspection apparatus for a semiconductor device according to claim 11 is an inspection apparatus for inspecting characteristics of a plurality of semiconductor elements on a semiconductor wafer, wherein a plurality of grooves are formed in a central portion of the electrode pad portion for connection to the semiconductor elements. A plurality of tip portions having a plurality of sawtooth-like sharp and short tips at the tip portion forming the concavo-convex portion having a probe needle that scrapes and contacts the metal layer forming the electrode pad portion by the tip portion. Therefore, the contact resistance between the electrode pad portion and the probe needle can be reduced, and the characteristics can be inspected in an electrically stable connection with a low load.

また、請求項１２に記載される半導体装置の検査装置は、請求項１１の検査装置であって、プローブ針の先端部中央に、電極パッド部との接触により発生する金属屑を吸着吸引するお椀型の受け皿と、受け皿の中央部および周辺部に複数設けた真空吸着穴とを備えた構成によって、検査において発生する金属屑を、電極パッド部上から効率よく吸着除去でき、隣接する電極パッド部間のショート不良を防ぐことができる。   According to a twelfth aspect of the present invention, there is provided an inspection apparatus for a semiconductor device according to the eleventh aspect, wherein the metal scrap generated by contact with the electrode pad portion is adsorbed and sucked at the center of the tip portion of the probe needle. Adhesive removal of metal scraps generated in the inspection from the electrode pad part can be efficiently performed by the configuration provided with a mold tray and a plurality of vacuum suction holes provided in the central and peripheral parts of the tray, and adjacent electrode pad parts. It is possible to prevent a short circuit failure.

また、請求項１３に記載される半導体装置の検査装置は、請求項１１の検査装置であって、プローブ針の先端部が、電極パッド部の中央部に複数の溝を有する凹凸部を形成する剛性を有した金属材からなる構成によって、電極パッド部の絶縁膜、および金属層を削って接触し、電気的に安定接続された状態で特性検査ができる。   A semiconductor device inspection apparatus according to a thirteenth aspect is the inspection apparatus according to the eleventh aspect, wherein a tip portion of the probe needle forms an uneven portion having a plurality of grooves in a central portion of the electrode pad portion. Due to the configuration made of a metal material having rigidity, it is possible to inspect the characteristics in a state where the insulating film and the metal layer of the electrode pad portion are scraped and brought into contact with each other and are electrically stably connected.

以上説明したように、本発明によれば、凹凸部を形成する先端形状としてのこぎり歯状の先鋭で短い先端を複数、かつ剛性を有するプローブ針により電極パッド部表面の酸化膜を除去しＡＬ材を削りながら接触し電気的検査を行うため、また、プローブ検査において発生するＡＬ屑を、検査工程中に真空吸着穴で吸着処理して除去することから、従来よりも低いプローブ荷重での検査を可能として電極パッド直下のトランジスタ部の特性変動や層間膜のクラック発生を防止でき、また、検査によって複数の溝が形成される凹凸部のプローブ痕により、電極パッド部と金属バンプまたは金属線との接触面積が大きくなって接合強度が向上し、安定した接触抵抗値や生産上での管理幅を大きく確保でき、さらに、プローブ痕により、電極パッド部との金属バンプまたは金属線のワイヤーボンディングが容易に安定して形成でき、さらなる電極パッド部の狭ピッチ化に対応した小型，薄型化で高機能な半導体装置の高い接続信頼性を確保し、高い接続歩留を実現した生産性の向上化を図ることができるという効果を奏する。   As described above, according to the present invention, the oxide material on the surface of the electrode pad portion is removed with a plurality of sawtooth-like sharp and short tips as the tip shape for forming the concavo-convex portion and the probe needle having rigidity. In order to perform electrical inspection by touching while scraping, and because AL waste generated in probe inspection is removed by suction treatment in the vacuum suction hole during the inspection process, inspection with a probe load lower than before is performed. It is possible to prevent fluctuations in the characteristics of the transistor part directly under the electrode pad and cracks in the interlayer film.In addition, the probe marks on the uneven part where a plurality of grooves are formed by inspection, the electrode pad part and the metal bump or metal line The contact area is increased and the bonding strength is improved, so that a stable contact resistance value and a large control range in production can be secured. Wire bonding of metal bumps or metal wires can be easily and stably formed, and high connection reliability is ensured by ensuring high connection reliability of highly functional semiconductor devices that are smaller and thinner to accommodate further narrower electrode pad pitches. There is an effect that the productivity can be improved by realizing the yield.

以下、図面を参照して本発明における実施の形態を詳細に説明する。   Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

本実施の形態における半導体装置とこの検査方法および検査装置により、半導体素子へのダメージを大きく低減させた低荷重のプローブ検査工程の実現が可能である。また、電極パッド部のＡＬ材とプローブ針との接触抵抗の安定化や、金属屑であるＡＬ屑による不具合の発生防止や、Ａｕ等の金属バンプや金属線（ワイヤー）のボンディングの形成位置精度が著しく向上することなどが可能となる。これにより、高い接続信頼性を確保し、かつ半導体装置の薄型化や電極パッドの狭ピッチ化した接続も容易に実現することができる。   With the semiconductor device and this inspection method and inspection apparatus in the present embodiment, it is possible to realize a low-load probe inspection process in which damage to the semiconductor element is greatly reduced. In addition, it stabilizes the contact resistance between the AL material of the electrode pad and the probe needle, prevents the occurrence of defects due to the AL scrap, which is a metal scrap, and the accuracy of the bonding position of metal bumps such as Au and metal wires (wires) Can be remarkably improved. As a result, high connection reliability can be ensured, and a connection with a thin semiconductor device and a narrow pitch of electrode pads can be easily realized.

以下、本発明の半導体装置とこの検査方法および検査装置に係る実施の形態について図面を参照しながら説明する。   Hereinafter, embodiments of a semiconductor device, an inspection method, and an inspection apparatus according to the present invention will be described with reference to the drawings.

まず、本実施の形態１として半導体装置の検査装置によるプローブ検査について説明する。図１（ａ）の上面図と図１（ｂ）の断面図に示すように、半導体素子１表面の複数の電極パッド部２上面に、ＳｉＮ保護膜３に接触しない領域で、プローブ針４を接触させて複数の溝を有する凹凸部のプローブ痕８を形成する。この構成例として、のこぎり歯状の複数の先端部４ａを有し、さらに先端部４ａはタングステン材料等の金属材を用いた剛性を有するプローブ針４を構成する。このプローブ針４によって電極パッド部２上にプローブ痕８を形成する。プローブ針４による荷重のＯＤ量を付加して、プローブ針４を電極パッド部２のＡＬ材を削りながら電気的に接続する。   First, probe inspection by a semiconductor device inspection apparatus will be described as the first embodiment. As shown in the top view of FIG. 1A and the cross-sectional view of FIG. 1B, the probe needle 4 is placed on the top surface of the plurality of electrode pad portions 2 on the surface of the semiconductor element 1 in a region not in contact with the SiN protective film 3. The probe trace 8 of the uneven | corrugated | grooved part which is made to contact and has a some groove | channel is formed. As an example of this configuration, a plurality of sawtooth-shaped tip portions 4a are provided, and the tip portions 4a constitute a probe needle 4 having rigidity using a metal material such as a tungsten material. A probe mark 8 is formed on the electrode pad portion 2 by the probe needle 4. The OD amount of the load by the probe needle 4 is added, and the probe needle 4 is electrically connected while cutting the AL material of the electrode pad portion 2.

このプローブ針４の先端外周には、凹凸部を形成する先端部４ａが複数箇所存在するため、これにより酸化膜５を除去しさらにＡＬ材を削りながら電気的接触を図れる。この接触点数とその酸化膜５の除去確立は非常に高く、接触抵抗値の規格範囲（２Ω以下）を満たし、接触抵抗値のバラツキσも非常に小さくなり、工程管理上、安定した接触のプローブによる検査工程を実施できる。   Since there are a plurality of tip portions 4a forming the concavo-convex portions on the outer periphery of the tip of the probe needle 4, it is possible to achieve electrical contact while removing the oxide film 5 and further scraping the AL material. The number of contact points and their removal of the oxide film 5 are very high, satisfy the standard range (2Ω or less) of the contact resistance value, and the variation σ of the contact resistance value is also very small. The inspection process can be carried out.

また、図２（ａ）の断面図、図２（ｂ）の斜視図に示すプローブ針４の先端部分に、検査工程で発生したＡＬ屑６を半導体素子１上の複数の電極パッド部２の上面から除去する構成を設けたものである。図２（ａ），（ｂ）に示すように、プローブ針４の先端中央部に設けたＡＬ屑６を吸着吸引するお椀型受け皿のＡＬ屑吸着パッド材７と、その周辺部および中心部に設けた複数の真空吸着穴７ａを通じて、ＡＬ屑６を吸着吸引して半導体素子１上にある複数の電極パッド部２の上面から除去する機構を設けた検査装置によりプローブ検査を行う（図２（ｃ）参照）。   Further, the AL scrap 6 generated in the inspection process is formed on the tip of the probe needle 4 shown in the cross-sectional view of FIG. 2A and the perspective view of FIG. A configuration for removing from the upper surface is provided. As shown in FIGS. 2 (a) and 2 (b), the AL waste adsorbing pad material 7 of the bowl-shaped tray for sucking and sucking AL waste 6 provided at the center of the tip of the probe needle 4, and its peripheral and central portions Probe inspection is performed by an inspection apparatus provided with a mechanism for adsorbing and sucking AL waste 6 from the upper surfaces of the plurality of electrode pad portions 2 on the semiconductor element 1 through the plurality of vacuum suction holes 7a provided (FIG. 2 ( c)).

次に、図３は本発明の実施の形態２における第１の実施例として、前記図１，図２に示したプローブ検査により電極パッド部上面の中央部に形成したプローブ痕８を有する半導体素子１を用いて、組立試作した半導体装置を示す断面図である。   Next, FIG. 3 shows, as a first example of the second embodiment of the present invention, a semiconductor element having a probe mark 8 formed at the center of the upper surface of the electrode pad portion by the probe inspection shown in FIGS. 1 is a cross-sectional view showing a semiconductor device assembled and prototyped using 1. FIG.

図３に示すように、半導体装置のプローブ検査により半導体素子１上にある複数の電極パッド部２の中央部にはギザギザ形状のプローブ痕８が存在する。このプローブ痕８は、電極パッド部２上の平面より凹んだ構造であり、電極パッド部２の直下にあるＴｉＮ膜に突出していない状態で形成している。なお、突出した場合でも電極パッド部２の膜厚を拡散工程において変えることも十分可能である。このギザギザ形状のプローブ痕８の上面にＡｕ等の金属バンプ９を形成して平坦化した後、その部分に導電性接着剤１０が塗布されている。   As shown in FIG. 3, a jagged probe mark 8 is present at the center of the plurality of electrode pad portions 2 on the semiconductor element 1 by probe inspection of the semiconductor device. The probe mark 8 has a structure that is recessed from the plane on the electrode pad portion 2, and is formed in a state where it does not protrude from the TiN film immediately below the electrode pad portion 2. Even in the case of protrusion, the film thickness of the electrode pad portion 2 can be sufficiently changed in the diffusion process. After a metal bump 9 such as Au is formed on the upper surface of the jagged probe mark 8 and planarized, a conductive adhesive 10 is applied to that portion.

この半導体素子１を反転させて、半導体素子１を支持する多層回路基板である半導体キャリア基板１１の上面に配置した複数の配線電極部１２と金属バンプ９とを接続するフリップチップ実装を行って、エポキシ系の液状封止樹脂１３を介して半導体素子１の電極パッド部２と半導体キャリア基板１１表面の配線電極部１２とが、金属バンプ９と導電性接着剤１０を介して電気的に接続した構造を有している。なお、半導体キャリア基板１１は、その裏面に外部端子１４を有し、表層面の配線電極部１２とは、半導体キャリア基板１１内に形成したビア１５により内部接続している。   By flipping the semiconductor element 1, flip chip mounting is performed to connect the plurality of wiring electrode portions 12 arranged on the upper surface of the semiconductor carrier substrate 11 which is a multilayer circuit board supporting the semiconductor element 1 and the metal bumps 9, The electrode pad portion 2 of the semiconductor element 1 and the wiring electrode portion 12 on the surface of the semiconductor carrier substrate 11 are electrically connected to each other via the metal bump 9 and the conductive adhesive 10 through the epoxy liquid sealing resin 13. It has a structure. The semiconductor carrier substrate 11 has an external terminal 14 on its back surface, and is internally connected to the wiring electrode portion 12 on the surface layer surface by a via 15 formed in the semiconductor carrier substrate 11.

一方、前述の半導体装置の製造方法について図４を参照しながら以下に説明する。図４（ａ）に示すように、半導体素子１を複数個有する半導体ウエハー１６の状態で、図２に示す先端部外周に凹凸部のギザギザ形状を形成する先端部４ａが複数箇所存在するプローブ針４を用いて、半導体ウエハー１６に複数個ある個々の半導体素子１の電極パッド部２上面を削って接触し特性検査をする。   On the other hand, a method for manufacturing the semiconductor device will be described below with reference to FIG. As shown in FIG. 4A, in the state of a semiconductor wafer 16 having a plurality of semiconductor elements 1, a probe needle having a plurality of tip portions 4a that form a jagged shape of uneven portions on the outer periphery of the tip portion shown in FIG. 4, the upper surface of the electrode pad portion 2 of each of the semiconductor elements 1 on the semiconductor wafer 16 is scraped and brought into contact with the semiconductor wafer 16 to inspect the characteristics.

この検査において、電極パッド部２上に発生したＡＬ屑６をプローブ針４の中央部にあるＡＬ屑吸着パッド材７（複数の真空吸着穴７ａ含む）を通じて、吸着吸引して検査で発生したＡＬ屑６を全て一括で吸着廃棄して、ＡＬ屑６を除去処理するプローブ検査を行う。   In this inspection, the AL waste 6 generated on the electrode pad portion 2 is sucked and sucked through the AL waste suction pad material 7 (including a plurality of vacuum suction holes 7a) in the center portion of the probe needle 4 and generated by the inspection. All the scraps 6 are sucked and discarded at once, and a probe inspection for removing the AL scrap 6 is performed.

前記プローブ検査の終了後、半導体ウエハー１６から切り出した半導体素子１の電極パッド部２に形成されるプローブ痕８上に（図４（ｂ）参照）、Ａｕ等の金属バンプ９を形成する工程と（図４（ｃ）参照）、このＡｕ等の金属バンプ９の頭頂部を平坦化するレベリング工程と（図４（ｄ）参照）、導電性接着剤１０を転写塗布する工程と、半導体素子１を反転させるフリップチップ工程と（図４（ｅ）参照）、半導体素子１を支持する多層回路基板である半導体キャリア基板１１の表面にある複数の配線電極部１２と金属バンプ９とを接続してフリップチップ実装して、エポキシ系の液状封止樹脂１３を注入・塗布し、かつ熱硬化する工程（図４（ｆ）参照）により接続抵抗値の安定化を図ることができる半導体装置を製造する。   After the probe inspection is completed, a step of forming metal bumps 9 such as Au on the probe marks 8 formed on the electrode pad portion 2 of the semiconductor element 1 cut out from the semiconductor wafer 16 (see FIG. 4B); (See FIG. 4C), a leveling step of flattening the top of the metal bump 9 such as Au (see FIG. 4D), a step of transferring and applying the conductive adhesive 10, and the semiconductor element 1 A flip chip process for inverting the substrate (see FIG. 4E), and connecting the plurality of wiring electrode portions 12 on the surface of the semiconductor carrier substrate 11 which is a multilayer circuit substrate supporting the semiconductor element 1 and the metal bumps 9 A semiconductor device in which the connection resistance value can be stabilized by a process of flip-chip mounting, injecting and applying an epoxy-based liquid sealing resin 13 and thermosetting (see FIG. 4F) is manufactured. .

また、図４（ｂ）に示す電極パッド部２を形成するプローブ痕８上に金属（Ａｕ）メッキを施すことによって、Ａｕ−ＡＬ合金率が高くなり、電極パッド部２と金属バンプ９とのより高い接続信頼性を確保することができる。   Further, by applying metal (Au) plating on the probe mark 8 forming the electrode pad portion 2 shown in FIG. 4B, the Au-AL alloy ratio is increased, and the electrode pad portion 2 and the metal bump 9 are Higher connection reliability can be ensured.

また、第２の実施例として、電極パッド部にプローブ痕８を有する半導体素子１を用いて組立試作した図５に示すもう１つの半導体装置（ＮＳＤ−ＣＳＰ）について説明する。この半導体装置は、図１，図２に示したプローブ検査で形成した電極パッド部２上面のプローブ痕８を有する半導体素子１を用いた半導体装置である。図５に示すように、半導体素子１上の複数の電極パッド部２の中央部にはプローブ痕８が存在する。このプローブ痕８に形成した金属バンプ９の頭頂部を平坦化することなく半導体素子１を反転させて、半導体素子１を支持する有機基板を絶縁基体とした多層回路基板の半導体キャリア基板１１ａ表面で複数の配線電極部１２に対応させて、エポキシ系のシール状の封止樹脂材である封止シート材１３ａを介して、熱圧着接合して構成したものである。   Further, as a second embodiment, another semiconductor device (NSD-CSP) shown in FIG. 5 fabricated by using the semiconductor element 1 having the probe mark 8 in the electrode pad portion will be described. This semiconductor device is a semiconductor device using the semiconductor element 1 having the probe marks 8 on the upper surface of the electrode pad portion 2 formed by the probe inspection shown in FIGS. As shown in FIG. 5, a probe mark 8 is present at the center of the plurality of electrode pad portions 2 on the semiconductor element 1. The semiconductor element 1 is inverted without flattening the top of the metal bump 9 formed on the probe mark 8, and the surface of the semiconductor carrier substrate 11a of the multilayer circuit board using the organic substrate supporting the semiconductor element 1 as an insulating base. Corresponding to the plurality of wiring electrode portions 12, they are configured by thermocompression bonding via a sealing sheet material 13a which is an epoxy-based sealing resin material.

図６に示すように、図４で説明した各工程の半導体装置の製造方法と異なる点は、半導体素子１のプローブ痕８に形成した金属バンプ９の頭頂部を平坦化することなく、半導体キャリア基板１１ａ表面に封止シート材１３ａ配置した（図６（ｄ）参照）のちフリップチップ実装を行って熱と圧力を付加した熱圧着接合工程による熱圧着接合を行っている。   As shown in FIG. 6, the semiconductor device manufacturing method in each step described in FIG. 4 is different from the semiconductor carrier manufacturing method without flattening the top of the metal bump 9 formed on the probe mark 8 of the semiconductor element 1. After the sealing sheet material 13a is disposed on the surface of the substrate 11a (see FIG. 6D), thermocompression bonding is performed by a thermocompression bonding process in which flip chip mounting is performed and heat and pressure are applied.

なお、第１の実施例と同様に半導体キャリア基板１１ａは、その裏面に外部端子１４を有し、表面の配線電極部１２ａとは、半導体キャリア基板１１ａ内に形成したビア１５により内部接続している。   As in the first embodiment, the semiconductor carrier substrate 11a has an external terminal 14 on its back surface, and is internally connected to the wiring electrode portion 12a on the front surface by a via 15 formed in the semiconductor carrier substrate 11a. Yes.

さらに、第３の実施例として、電極パッド部にプローブ痕８を有する半導体素子１を用いて組立試作した図７に示すもう１つ別の半導体装置について説明する。この半導体装置は、図７に示すように、半導体素子１上にある複数の電極パッド部２の中央部にプローブ痕８が存在する。このプローブ痕８は、電極パッド部２の直下にあるＴｉＮ膜には突出していない状態で形成している。また、突出した場合でも、拡散工程において電極パッド部２の膜厚を変えることも十分可能である。このプローブ痕８の上面にＡｕ等の金属線であるワイヤー１７を形成し、外部のリード端子部１８と２ｎｄボンディングした構造であり、その部分を覆い被すように、エポキシ系のモールド樹脂１９でモールド硬化したモールド型の半導体装置である。   Further, as a third embodiment, another semiconductor device shown in FIG. 7 fabricated by using the semiconductor element 1 having the probe mark 8 in the electrode pad portion will be described. In this semiconductor device, as shown in FIG. 7, a probe mark 8 is present at the center of a plurality of electrode pad portions 2 on the semiconductor element 1. The probe mark 8 is formed so as not to protrude from the TiN film immediately below the electrode pad portion 2. Moreover, even if it protrudes, it is also possible to change the film thickness of the electrode pad part 2 in a diffusion process. A wire 17, which is a metal wire such as Au, is formed on the upper surface of the probe mark 8 and bonded to the external lead terminal portion 18 by 2nd, and an epoxy mold resin 19 is used to cover that portion. This is a mold-type semiconductor device obtained by mold curing.

一方、このモールド型の半導体装置の製造方法について図８を用いて説明する。まず、図８（ａ）に示すように、半導体素子１を複数個有する半導体ウエハー１６の状態で、図２に示す先端部外周に凹凸部のギザギザ形状を形成する先端部４ａが複数箇所存在するプローブ針４を用いて、半導体ウエハー１６に複数個ある個々の半導体素子１の電極パッド部２上面を削りながら接触し特性検査を行う。   On the other hand, a method of manufacturing this mold type semiconductor device will be described with reference to FIG. First, as shown in FIG. 8A, in the state of the semiconductor wafer 16 having a plurality of semiconductor elements 1, there are a plurality of tip portions 4a that form a jagged shape of uneven portions on the outer periphery of the tip portion shown in FIG. Using the probe needle 4, contact is made while scraping the upper surface of the electrode pad portion 2 of each semiconductor element 1 on the semiconductor wafer 16, and the characteristic inspection is performed.

この検査で電極パッド部２上に発生したＡＬ屑６をプローブ針４の中央部にあるＡＬ屑吸着パッド材７（複数の真空吸着穴７ａ含む）を通じて、吸着吸引して発生したＡＬ屑６を全て一括で吸着廃棄し、ＡＬ屑６を除去処理するプローブ検査を行う。   The AL waste 6 generated on the electrode pad portion 2 by this inspection is sucked and sucked through the AL waste suction pad material 7 (including a plurality of vacuum suction holes 7a) in the center portion of the probe needle 4. All of them are sucked and discarded at once, and a probe inspection for removing the AL waste 6 is performed.

プローブ検査の終了後、半導体ウエハー１６から切り出したプローブ痕８を有する半導体素子１を、リードフレーム材２０のダイパッド部２１に（図８（ｂ）参照）、導電性ペースト材２２を介して半導体素子１がマウントされるＡｇ（銀）ペースト材を介してダイスボンドする工程と（図８（ｃ），（ｄ）参照）、電極パッド部２の中央部に設けたプローブ痕８の真上に、Ａｕ等によるワイヤー１７をボンディング形成する工程と（図８（ｅ）参照）、モールド樹脂１９を充填させて樹脂硬化する工程（図８（ｆ）参照）により、接続抵抗値の安定化を図ることができるモールド型の半導体装置を製造する。   After the probe inspection, the semiconductor element 1 having the probe mark 8 cut out from the semiconductor wafer 16 is placed on the die pad portion 21 of the lead frame material 20 (see FIG. 8B), and the semiconductor element is interposed via the conductive paste material 22. A step of die-bonding via an Ag (silver) paste material on which 1 is mounted (see FIGS. 8C and 8D), directly above the probe mark 8 provided in the central portion of the electrode pad portion 2, The connection resistance value is stabilized by bonding the wire 17 made of Au or the like (see FIG. 8E) and filling the mold resin 19 and curing the resin (see FIG. 8F). A mold type semiconductor device that can be manufactured is manufactured.

以上、説明したように本実施の形態によれば、実装位置精度の向上化が図れ、昨今必要不可欠となってきている多ピン化に伴う電極パッドにおいて狭ピッチ化への対応化が実現でき、かつ高い接続信頼性をも確保することができる半導体装置を実現できる。   As described above, according to the present embodiment, it is possible to improve the mounting position accuracy, and it is possible to realize a reduction in pitch in the electrode pad accompanying the increase in the number of pins that has become indispensable in recent years. In addition, it is possible to realize a semiconductor device that can ensure high connection reliability.

また、プローブ針４の先端部分に凹凸部のギザギザ形状を形成する先端部４ａを複数有しているため、プローブ検査時に酸化膜を破り易く、かつ電気的接触点数が増加することから、プローブ検査の荷重が分散できＯＤ量を小さく設定することができる。これにより、電極パッド部２の直下にあるトランジスタ部２３や層間膜２４への大きな応力負荷が発生しにくい構造であり、トランジスタ部２３の特性変動や層間膜２４のクラック２５を防止できる。   In addition, since the tip portion of the probe needle 4 has a plurality of tip portions 4a that form a jagged shape of the concavo-convex portion, the oxide film is easily broken at the time of probe inspection, and the number of electrical contact points increases. Can be dispersed and the OD amount can be set small. Thereby, the structure is such that a large stress load is not easily generated on the transistor part 23 and the interlayer film 24 immediately below the electrode pad part 2, and the characteristic variation of the transistor part 23 and the crack 25 of the interlayer film 24 can be prevented.

さらに、プローブ検査時に削られて電極パッド部２とプローブ針４との接着面積が高く、密着強度が向上するため、プローブ検査の生産管理項目である接触抵抗データを規格範囲の２Ω以下を実現でき、かつ安定した接触抵抗値を得ることができる。従来と本発明とのプローブ検査を比較した接触抵抗のデータ比較をした実験結果を図９に示す。図９に示すように、本発明のプローブ検査で得た接触抵抗値データは、バラツキ範囲が小さいことが解る。   Furthermore, since the adhesion area between the electrode pad 2 and the probe needle 4 is high and the adhesion strength is improved by cutting during probe inspection, the contact resistance data, which is a production management item for probe inspection, can be realized within 2Ω of the standard range. In addition, a stable contact resistance value can be obtained. FIG. 9 shows the result of an experiment comparing the contact resistance data comparing the conventional probe inspection with the present invention. As shown in FIG. 9, it can be seen that the contact resistance value data obtained by the probe inspection of the present invention has a small variation range.

また、安定した生産管理範囲を確保していることから、再度検査する回数や時間を大幅に削減することができ、非常に安定して生産検査することができ、これにより、大幅な生産性向上をも実現する。   In addition, since a stable production management range is secured, the number and time of reinspections can be greatly reduced, and production inspections can be performed very stably, which greatly improves productivity. Is also realized.

また、電極パッド部２上面の中央部に形成した、凹凸部のギザギザ形状のプローブ痕８は、複数の溝を有しており、そこにＡｕ等の金属バンプ９や金属線などのワイヤー１７をボンディングにおける形成位置精度を大きく向上できることから、電極パッド部２から大きく外れたＡｕ等の金属バンプ９を形成する組立不良品を完全になくすことができる。さらに、電極パッド部２が凹んだ構造であるため、半導体装置の高さを低くできるので薄型化した半導体装置を実現できる。   In addition, the rugged probe mark 8 formed in the center of the upper surface of the electrode pad 2 has a plurality of grooves, and a metal bump 9 such as Au or a wire 17 such as a metal wire is provided there. Since the formation position accuracy in the bonding can be greatly improved, it is possible to completely eliminate an assembly failure product that forms the metal bumps 9 such as Au greatly deviated from the electrode pad portion 2. Furthermore, since the electrode pad portion 2 has a recessed structure, the height of the semiconductor device can be reduced, so that a thin semiconductor device can be realized.

本発明に係る半導体装置とこの検査方法および検査装置は、プローブ針で低荷重で確実な接触を得ることができ、半導体素子の特性検査等を行う検査工程だけでなく、プローブ針を接触させる手法の全ての工程に適用でき、プロービングによる処理に用いて有用である。   The semiconductor device according to the present invention, the inspection method and the inspection device can obtain a reliable contact with a probe needle with a low load, and a method of contacting the probe needle as well as an inspection process for performing a characteristic inspection of the semiconductor element, etc. It can be applied to all of the above processes, and is useful for processing by probing.

本発明の実施の形態１における半導体装置のプローブ検査を示す（ａ）は上面図、（ｂ）は断面図1A is a top view and FIG. 2B is a cross-sectional view showing probe inspection of a semiconductor device according to the first embodiment of the present invention. 本発明の実施の形態１における半導体装置のプローブ検査の（ａ）はプローブ針の先端部分の断面図、（ｂ）は斜視図、（ｃ）はＡＬ屑を除去する構成を示す図(A) of the probe inspection of the semiconductor device in Embodiment 1 of this invention is sectional drawing of the front-end | tip part of a probe needle, (b) is a perspective view, (c) is a figure which shows the structure which removes AL waste. 本発明の実施の形態２における第１の実施例の半導体装置を示す断面図Sectional drawing which shows the semiconductor device of the 1st Example in Embodiment 2 of this invention 第１の実施例の半導体装置の製造方法（ａ）〜（ｆ）を示す図The figure which shows the manufacturing method (a)-(f) of the semiconductor device of a 1st Example. 本実施の形態２における第２の実施例の半導体装置を示す断面図Sectional drawing which shows the semiconductor device of the 2nd Example in this Embodiment 2. FIG. 第２の実施例の半導体装置の製造方法（ａ）〜（ｆ）を示す図The figure which shows the manufacturing method (a)-(f) of the semiconductor device of 2nd Example. 本実施の形態２における第３の実施例の半導体装置を示す断面図Sectional drawing which shows the semiconductor device of the 3rd Example in this Embodiment 2. FIG. 第３の実施例の半導体装置の製造方法（ａ）〜（ｆ）を示す図The figure which shows the manufacturing method (a)-(f) of the semiconductor device of 3rd Example. プローブ検査方法の本発明と従来を示す接触抵抗データ分布図Contact resistance data distribution diagram showing the present invention and the conventional probe inspection method 従来の半導体素子のプローブ検査の一部を示す断面図Sectional drawing which shows a part of probe inspection of the conventional semiconductor element

符号の説明Explanation of symbols

１ 半導体素子
２ 電極パッド部
３ ＳｉＮ保護膜
４ プローブ針
４ａ 先端部
５ 酸化膜
６ ＡＬ屑
７ ＡＬ屑吸着パッド材
７ａ 真空吸着穴
８ プローブ痕
９ 金属バンプ
１０ 導電性接着剤
１１ 半導体キャリア基板（セラミック基板）
１１ａ 半導体キャリア基板（有機基板）
１２ 配線電極部（セラミック基板）
１２ａ 配線電極部（有機基板）
１３ 液状封止樹脂
１３ａ 封止シート材
１４ 外部端子
１５ ビア
１６ 半導体ウエハー
１７ ワイヤー（金属線）
１８ リード端子部
１９ モールド樹脂
２０ リードフレーム材
２１ ダイパッド部
２２ 導電性ペースト材
２３ トランジスタ部
２４ 層間膜
２５ クラック DESCRIPTION OF SYMBOLS 1 Semiconductor element 2 Electrode pad part 3 SiN protective film 4 Probe needle 4a Tip part 5 Oxide film 6 AL waste 7 AL waste adsorption pad material 7a Vacuum suction hole 8 Probe mark 9 Metal bump 10 Conductive adhesive 11 Semiconductor carrier substrate (ceramic) substrate)
11a Semiconductor carrier substrate (organic substrate)
12 Wiring electrode part (ceramic substrate)
12a Wiring electrode part (organic substrate)
13 Liquid sealing resin 13a Sealing sheet material 14 External terminal 15 Via 16 Semiconductor wafer 17 Wire (metal wire)
18 Lead terminal portion 19 Mold resin 20 Lead frame material 21 Die pad portion 22 Conductive paste material 23 Transistor portion 24 Interlayer film 25 Crack

Claims (13)

複数の半導体素子上に形成した金属層からなり、中央部に複数の溝を有する凹凸部を形成した外部接続用の電極パッド部を備え、前記電極パッド部の凹凸部上に金属バンプを形成し、前記半導体素子を支持する半導体キャリア基板上に、半田あるいは導電性接着剤とエポキシ系の封止樹脂を介してフリップチップ実装したことを特徴とする半導体装置。   An electrode pad portion for external connection, which is formed of a metal layer formed on a plurality of semiconductor elements and has a concavo-convex portion having a plurality of grooves in the central portion, and metal bumps are formed on the concavo-convex portion of the electrode pad portion. A semiconductor device, wherein the semiconductor device is flip-chip mounted on a semiconductor carrier substrate supporting the semiconductor element via solder or a conductive adhesive and an epoxy-based sealing resin. 複数の半導体素子上に形成した金属層からなり、中央部に複数の溝を有する凹凸部を形成した外部接続用の電極パッド部を備え、前記電極パッド部の凹凸部上に金属線よりなるワイヤーをボンディングし、外部のリード端子と電気的に接続させ、エポキシ系のモールド樹脂で樹脂硬化したことを特徴とする半導体装置。   A wire composed of a metal layer formed on a plurality of semiconductor elements, including an electrode pad portion for external connection in which a concavo-convex portion having a plurality of grooves is formed at a central portion, and a wire made of a metal wire on the concavo-convex portion of the electrode pad portion A semiconductor device characterized in that is bonded to an external lead terminal and electrically cured with an epoxy mold resin. 前記電極パッド部の中央部に形成した複数の溝を有する凹凸部を、半導体ウエハー上にある複数の半導体素子の特性検査を行う検査工程において、前記凹凸部を形成する先端部を有するプローブ針が前記電極パッド部直下のチタンナイトライド（ＴｉＮ）膜に未突出の状態で前記電極パッド部の複数箇所を削って接触するプローブ検査によって形成したことを特徴とする請求項１または２記載の半導体装置。   In an inspection process for inspecting the characteristics of a plurality of semiconductor elements on a semiconductor wafer, a probe needle having a tip portion for forming the concavo-convex part is formed in the concavo-convex part having a plurality of grooves formed in the central part of the electrode pad part. 3. The semiconductor device according to claim 1, wherein the semiconductor device is formed by a probe inspection in which a plurality of portions of the electrode pad portion are scraped and brought into contact with a titanium nitride (TiN) film immediately below the electrode pad portion without protruding. . 前記電極パッド部の中央部に形成した複数の溝を有する凹凸部が、前記電極パッド部の開口部を除く半導体素子上面を覆ったシリコンナイトライド（ＳｉＮ）保護膜と非接触の大きさで、かつ前記電極パッド部表面に溝が形成される深さから前記電極パッド部直下のチタンナイトライド（ＴｉＮ）膜に未突出の深さまでの寸法であることを特徴とする請求項１〜３のいずれか１項に記載の半導体装置。   The uneven portion having a plurality of grooves formed in the central portion of the electrode pad portion has a non-contact size with a silicon nitride (SiN) protective film covering the upper surface of the semiconductor element excluding the opening of the electrode pad portion, The dimension from the depth at which the groove is formed on the surface of the electrode pad portion to the depth at which the groove is not projected on the titanium nitride (TiN) film immediately below the electrode pad portion. 2. The semiconductor device according to claim 1. 前記凹凸部にある複数の溝に、外部端子と接続する金属バンプあるいは金属線との電気的接続性を向上させるために金属メッキを施したことを特徴とする請求項１または２記載の半導体装置。   3. The semiconductor device according to claim 1, wherein the plurality of grooves in the concavo-convex portion are subjected to metal plating in order to improve electrical connectivity with metal bumps or metal wires connected to external terminals. . 複数の半導体素子上に形成した金属層からなる電極パッド部の中央部を、複数の溝を有する凹凸部を形成する先端部をもつプローブ針により前記金属層の表面を削って接触し前記半導体素子を検査する検査工程と、前記検査工程で発生した金属屑を前記プローブ針に設けた真空吸着穴により処理する金属屑処理工程と、前記プローブ針により凹凸部の溝を形成した前記電極パッド部に金属バンプを形成する工程と、前記金属バンプに半田あるいは導電性接着材を転写した前記半導体素子を、支持体である半導体キャリア基板上にフリップチップ実装し、エポキシ系の封止樹脂を塗布して硬化する工程とからなることを特徴とする半導体装置の検査方法。   The center portion of the electrode pad portion made of a metal layer formed on a plurality of semiconductor elements is contacted by scraping the surface of the metal layer with a probe needle having a tip portion forming a concavo-convex portion having a plurality of grooves. An inspection step for inspecting metal scrap, a metal scrap processing step for processing metal scrap generated in the inspection step by a vacuum suction hole provided in the probe needle, A step of forming a metal bump, and the semiconductor element obtained by transferring solder or a conductive adhesive to the metal bump is flip-chip mounted on a semiconductor carrier substrate as a support, and an epoxy-based sealing resin is applied. A method for inspecting a semiconductor device comprising the step of curing. 複数の半導体素子上に形成した金属層からなる電極パッド部の中央部を、複数の溝を有する凹凸部を形成する先端部をもつプローブ針により前記金属層の表面を削って接触し前記半導体素子を検査する検査工程と、前記検査工程で発生した金属屑を前記プローブ針に設けた真空吸着穴により処理する金属屑処理工程と、前記半導体素子をリードフレーム上のダイパッド部にペースト材を介してダイスボンド実装し、前記プローブ針により凹凸部を形成した前記電極パッド部と外部リードの端子部を電気的に接続する金属線よりなるワイヤーでボンディングする工程と、エポキシ系のモールド樹脂でモールド硬化してリード加工のパッケージ形成する工程とからなることを特徴とする半導体装置の検査方法。   The center portion of the electrode pad portion made of a metal layer formed on a plurality of semiconductor elements is contacted by scraping the surface of the metal layer with a probe needle having a tip portion forming a concavo-convex portion having a plurality of grooves. An inspection process for inspecting, a metal scrap processing process for processing metal scrap generated in the inspection process by a vacuum suction hole provided in the probe needle, and a paste material on a die pad part on a lead frame via a paste material A step of bonding with a wire made of a metal wire that electrically connects the electrode pad portion on which the concavo-convex portion is formed by the probe needle and the terminal portion of the external lead, and die hardening with an epoxy mold resin. A method for inspecting a semiconductor device, comprising: forming a package for lead processing. 前記検査工程において、半導体ウエハー上にある複数の半導体素子の特性検査を行うプローブ針の先端部が、前記電極パッド部直下のチタンナイトライド（ＴｉＮ）膜に未突出の状態で、かつ前記電極パッド部の複数箇所を削って接触することを特徴とする請求項６または７記載の半導体装置の検査方法。   In the inspection step, the tip of the probe needle for inspecting the characteristics of a plurality of semiconductor elements on the semiconductor wafer is not protruding from the titanium nitride (TiN) film immediately below the electrode pad, and the electrode pad 8. The method of inspecting a semiconductor device according to claim 6, wherein a plurality of portions of the portion are cut and contacted. 前記検査工程において、電極パッド部の中央部に形成した複数の溝を有する凹凸部が、前記電極パッド部の開口部を除く半導体素子上面を覆ったシリコンナイトライド（ＳｉＮ）保護膜と非接触の大きさで、かつ前記電極パッド部表面に溝が形成される深さから前記電極パッド部直下のチタンナイトライド（ＴｉＮ）膜に未突出の深さまでの寸法であることを特徴とする請求項６〜８のいずれか１項に記載の半導体装置の検査方法。   In the inspection step, the concavo-convex portion having a plurality of grooves formed in the central portion of the electrode pad portion is not in contact with the silicon nitride (SiN) protective film covering the upper surface of the semiconductor element excluding the opening of the electrode pad portion. 7. The size is from a depth at which a groove is formed on the surface of the electrode pad portion to a depth that does not protrude into a titanium nitride (TiN) film immediately below the electrode pad portion. The inspection method of the semiconductor device of any one of -8. 前記金属屑処理工程において、電極パッド部にプローブ針を接触させる検査工程で発生する金属屑を、前記プローブ針の中央部に設けた真空吸着穴より瞬時に吸着して前記電極パッド部上から除去することを特徴とする請求項６または７記載の半導体装置の検査方法。   In the metal scrap treatment process, the metal scrap generated in the inspection process in which the probe needle is brought into contact with the electrode pad portion is instantaneously sucked and removed from the electrode pad portion through the vacuum suction hole provided in the center portion of the probe needle. 8. A method for inspecting a semiconductor device according to claim 6 or 7, wherein: 半導体ウエハー上に有する複数の半導体素子の特性検査を行う検査装置において、前記半導体素子と接続するため電極パッド部の中央部に複数の溝を有する凹凸部を形成する先端部にのこぎり歯状の先鋭で短い先端を複数有し、前記先端部により前記電極パッド部を形成する金属層を削って接触するプローブ針を備えたことを特徴とする半導体装置の検査装置。   In an inspection apparatus for inspecting characteristics of a plurality of semiconductor elements provided on a semiconductor wafer, a sawtooth-shaped sharp tip is formed at a tip portion forming an uneven portion having a plurality of grooves in a central portion of an electrode pad portion for connection with the semiconductor elements. An inspection apparatus for a semiconductor device, comprising: a plurality of short tips, and a probe needle that contacts the metal layer that forms the electrode pad portion by the tip portion. 前記プローブ針の先端部中央に、電極パッド部との接触により発生する金属屑を吸着吸引するお椀型の受け皿と、前記受け皿の中央部および周辺部に複数設けた真空吸着穴とを備えたことを特徴とする請求項１１記載の半導体装置の検査装置。   In the center of the tip of the probe needle, a bowl-shaped saucer that sucks and sucks metal scrap generated by contact with the electrode pad part, and a plurality of vacuum suction holes provided in the center part and the peripheral part of the saucer are provided. The semiconductor device inspection apparatus according to claim 11. 前記プローブ針の先端部が、前記電極パッド部の中央部に複数の溝を有する凹凸部を形成する剛性を有した金属材からなることを特徴とする請求項１１記載の半導体装置の検査装置。   12. The inspection apparatus for a semiconductor device according to claim 11, wherein a tip portion of the probe needle is made of a metal material having rigidity for forming an uneven portion having a plurality of grooves at a central portion of the electrode pad portion.
JP2004125432A 2004-04-21 2004-04-21 Semiconductor device and inspection method, and device therefor Pending JP2005311043A (en)

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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100852626B1 (en) 2006-08-11 2008-08-18 가부시키가이샤 니혼 마이크로닉스 Inspection Apparatus for Display Panel, Probe Unit and Probe Assembly
JP2009060028A (en) * 2007-09-03 2009-03-19 Fujikura Ltd Semiconductor device and method of manufacturing the same
JP2009530864A (en) * 2006-03-21 2009-08-27 プロメラス， エルエルシー Methods and materials useful for chip stacking and chip / wafer bonding
KR101318159B1 (en) 2011-02-28 2013-10-16 가부시키가이샤 니혼 마이크로닉스 Probe System and Method of Cleaning Device under Test
US9263416B2 (en) 2006-03-21 2016-02-16 Sumitomo Bakelite Co., Ltd. Methods and materials useful for chip stacking, chip and wafer bonding

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009530864A (en) * 2006-03-21 2009-08-27 プロメラス， エルエルシー Methods and materials useful for chip stacking and chip / wafer bonding
US9263416B2 (en) 2006-03-21 2016-02-16 Sumitomo Bakelite Co., Ltd. Methods and materials useful for chip stacking, chip and wafer bonding
KR100852626B1 (en) 2006-08-11 2008-08-18 가부시키가이샤 니혼 마이크로닉스 Inspection Apparatus for Display Panel, Probe Unit and Probe Assembly
JP2009060028A (en) * 2007-09-03 2009-03-19 Fujikura Ltd Semiconductor device and method of manufacturing the same
KR101318159B1 (en) 2011-02-28 2013-10-16 가부시키가이샤 니혼 마이크로닉스 Probe System and Method of Cleaning Device under Test

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