JP2008192660A - Semiconductor device and its manufacturing process - Google Patents

Semiconductor device and its manufacturing process Download PDF

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Publication number
JP2008192660A
JP2008192660A JP2007022528A JP2007022528A JP2008192660A JP 2008192660 A JP2008192660 A JP 2008192660A JP 2007022528 A JP2007022528 A JP 2007022528A JP 2007022528 A JP2007022528 A JP 2007022528A JP 2008192660 A JP2008192660 A JP 2008192660A
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semiconductor chip
semiconductor device
semiconductor
protrusions
chip mounting
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Yoji Makise
陽二 牧瀬
Toshiyuki Fukuda
敏行 福田
Yukiko Nakaoka
由起子 中岡
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Panasonic Holdings Corp
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Matsushita Electric Industrial Co Ltd
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Priority to JP2007022528A priority Critical patent/JP2008192660A/en
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    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
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  • Die Bonding (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To wet and spread a die bonding material applied to the surface of a semiconductor chip mounting portion such as a die pad thoroughly up to the end on the lower surface of the semiconductor chip, and to prevent the die bonding material from flowing over the semiconductor chip mounting portion or creeping up to the upper surface of the semiconductor chip. <P>SOLUTION: In least in the outside region corresponding to each side defining the mounting region of a semiconductor chip 1 on the semiconductor chip mounting portion such as a die pad 2, a protrusion 11 is provided to protrude toward the central part of the mounting region of the semiconductor chip 1. A die bonding material 4 under the semiconductor chip 1 is ready to flow over the central part on the side of the semiconductor chip 1 to the outside, but it is guided by the protrusion 11 to the end side of the semiconductor chip 1, thus improving the wettability. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

本発明は半導体装置およびその製造方法に関し、特に半導体チップを固着するダイボンド材の濡れ広がり性を改善した半導体装置およびその製造方法に関するものである。   The present invention relates to a semiconductor device and a manufacturing method thereof, and more particularly to a semiconductor device and a manufacturing method thereof in which wetting and spreading property of a die bond material for fixing a semiconductor chip is improved.

ウェハーからダイシングにより個片化された半導体チップは、リードフレームのダイパッド部や回路基板のアイランド部に固着されており、そのダイボンドの際には作業性やコストの面からペースト状のダイボンド材が最も一般的に使用されている。   Semiconductor chips separated by dicing from the wafer are fixed to the die pad part of the lead frame and the island part of the circuit board, and the paste-like die bond material is the most suitable for die bonding from the viewpoint of workability and cost. Commonly used.

図１７（ａ）（ｂ）は従来の半導体装置の平面図および断面図である。半導体チップ１をダイパッド２上にダイボンド材４を介して固着し、半導体チップ１の上面の電極パッド１ａを金属細線５によりリード６に接続し、半導体チップ１（およびダイパッド２）と金属細線５とリード６の接続領域とを封止樹脂８で封止している。   17A and 17B are a plan view and a cross-sectional view of a conventional semiconductor device. The semiconductor chip 1 is fixed on the die pad 2 via the die bonding material 4, the electrode pad 1 a on the upper surface of the semiconductor chip 1 is connected to the lead 6 by the metal thin wire 5, and the semiconductor chip 1 (and the die pad 2) and the metal thin wire 5 are connected. The connection region of the lead 6 is sealed with a sealing resin 8.

図１８はダイボンドの際のダイボンド材４の濡れ広がりを示す。
図１８(ａ)はダイボンド材４の塗布量が少なめの時の平面図である。ダイボンド材４上に載せた半導体チップ１の下面の各辺の中央部では、図１８(a′)にもａ−ａ′断面を示すように、ダイボンド材４の濡れ広がりを確保でき、一部が半導体チップ１の外側へのはみ出し４ａとなる。一方、半導体チップ１のコーナー部では、図１８(a″)にもｂ−ｂ′断面を示すように、ダイボンド材４の濡れ不足領域４ｂが発生する。 FIG. 18 shows the wetting and spreading of the die bond material 4 during die bonding.
FIG. 18A is a plan view when the coating amount of the die bond material 4 is small. In the central part of each side of the lower surface of the semiconductor chip 1 placed on the die bond material 4, as shown in FIG. Becomes a protrusion 4 a to the outside of the semiconductor chip 1. On the other hand, in the corner portion of the semiconductor chip 1, an insufficiently wetted region 4 b of the die bond material 4 is generated as shown in the bb ′ cross section in FIG.

この場合、半導体チップ１のワイヤーボンド時に、はみ出し４ａ部分のダイボンド材４の付着が発生したり、樹脂封止後に、濡れ不足領域４ｂ部分に空間ができ、水分などの進入で剥離が進行し、ハンダ実装の際に耐熱できなくなったり、後工程（パッケージダイシングや、検査工程）での物理的衝撃強度で、パッケージクラックの起点になる可能性がでてくる等の問題がある。   In this case, during wire bonding of the semiconductor chip 1, sticking of the die bonding material 4 in the protruding portion 4 a occurs, or after resin sealing, a space is created in the insufficiently wetted region 4 b portion, and peeling progresses due to entry of moisture or the like, There are problems such that heat resistance cannot be achieved during solder mounting, and the physical impact strength in a subsequent process (package dicing or inspection process) may cause a package crack.

図１８(ｂ)はダイボンド材４の塗布量が多めの時の平面図である。図１８(ｂ′)にもａ−ａ′断面を示すように、ダイボンド材４のチップ上面への這い上がり４ｃ，ダイパッド裏面への垂れ４ｄが発生する。   FIG. 18B is a plan view when the application amount of the die bond material 4 is large. As shown in FIG. 18B ′, the section aa ′ also shows that the die bond material 4 creeps up to the top surface of the chip 4c and droops 4d onto the back surface of the die pad.

この場合、這い上がり４ｃ部分のダイボンド材４が、半導体チップ１のワイヤーボンド時に用いるコレットに付着したり、半導体チップ１上面の電極パッド（図１７参照）に付着し、ワイヤーボンディング不良等の問題が発生する。ダイパッド２裏面への垂れ４ｄ部分により、ダイボンダー設備のダイボンドプレートの汚れが生じ、後続する他の製品も不良にしてしまう恐れもある。ダイボンド材４の塗布量が多過ぎなくとも、半導体チップ１とダイパッド２との大きさがほぼ同じである場合には、ダイボンド材４がダイパッド２からはみ出し、同様の問題が起こる。   In this case, the die bonding material 4 of the scooping 4c portion adheres to the collet used at the time of wire bonding of the semiconductor chip 1 or adheres to the electrode pad on the upper surface of the semiconductor chip 1 (see FIG. 17). appear. The portion 4d dripping onto the back surface of the die pad 2 may contaminate the die bond plate of the die bonder equipment, and may cause other subsequent products to be defective. Even if the application amount of the die bond material 4 is not too large, if the sizes of the semiconductor chip 1 and the die pad 2 are substantially the same, the die bond material 4 protrudes from the die pad 2 and the same problem occurs.

このため、図１９に示すように、ダイパッド２の周縁部に半導体チップ１の端辺に沿う方向の直線状の突起部９を配置することで、ダイボンド材４のはみ出しを防止し、塗布量のバラツキに対応するものもある。突起部９に代えて溝を配置したものもある（特許文献１、２参照）。
特開平３−８５７３５公報 特開平２−２８３０４１公報 For this reason, as shown in FIG. 19, by disposing the linear protrusion 9 in the direction along the edge of the semiconductor chip 1 at the peripheral edge of the die pad 2, the die bonding material 4 is prevented from protruding and the amount of coating is reduced. There is also a thing corresponding to variation. Some have a groove instead of the protrusion 9 (see Patent Documents 1 and 2).
Japanese Patent Laid-Open No. 3-85735 Japanese Patent Laid-Open No. 2-283401

しかしながら、図１９に示すようにダイパッド２上に直線状の突起部９を配置した場合も、ダイボンド材４の供給量を増加したときには、半導体チップ１上面への這い上がり、コレットや電極パッドへの付着が起こり、依然として、ワイヤーボンディング不良等の原因となっていた。   However, even when the linear protrusion 9 is arranged on the die pad 2 as shown in FIG. 19, when the supply amount of the die bond material 4 is increased, it rises to the upper surface of the semiconductor chip 1 to the collet or electrode pad. Adhesion occurred and still caused wire bonding failure.

一方、半導体装置の高信頼性の要求に伴い、従来は問題視されていなかった僅かな濡れ不足が問題視されるようになってきた。
本発明は、上記の問題に鑑み、ダイパッド等の半導体チップ搭載部の表面に塗布したダイボンド材を、その上に載せて押圧する半導体チップの下面の端部まで万遍なく濡れ広がらせ、かつ、半導体チップ搭載部からはみ出したり、半導体チップ上面へ這い上がることを防止することを目的とする。 On the other hand, with the demand for high reliability of semiconductor devices, a slight lack of wetness, which has not been regarded as a problem in the past, has become a problem.
In view of the above problems, the present invention uniformly spreads the die bond material applied to the surface of the semiconductor chip mounting portion such as a die pad to the end portion of the lower surface of the semiconductor chip to be placed thereon and pressed, and The object is to prevent the semiconductor chip from protruding from the semiconductor chip mounting portion or climbing up to the upper surface of the semiconductor chip.

上記課題を解決するために、本発明の半導体装置は、半導体チップ搭載部上にその中央部に向かう方向に凸状をなす突起部を設けることで、ダイボンド材の濡れ性を改善するようにしたものである。   In order to solve the above-described problems, the semiconductor device of the present invention improves the wettability of the die bond material by providing a protrusion on the semiconductor chip mounting portion that protrudes in the direction toward the center. Is.

すなわち、本発明の半導体装置は、半導体チップと、前記半導体チップを搭載するための半導体チップ搭載部と、前記半導体チップを半導体チップ搭載部上に固着したダイボンド材と、前記半導体チップ搭載部の外側に内部端子が配置された導体と、前記半導体チップと前記導体の内部端子とを電気的に接続した金属細線と、前記半導体チップと前記金属細線と前記導体の接続領域とを覆った封止樹脂とを有した半導体装置において、前記半導体チップ搭載部上における半導体チップ搭載領域を画する各辺に対応する少なくとも外側領域に、前記半導体チップ搭載領域の中央部に向かう方向に凸状をなす前記半導体チップよりも低い突起部が設けられていることを特徴とする。   That is, the semiconductor device of the present invention includes a semiconductor chip, a semiconductor chip mounting portion for mounting the semiconductor chip, a die bond material that fixes the semiconductor chip on the semiconductor chip mounting portion, and an outer side of the semiconductor chip mounting portion. A sealing resin that covers a conductor in which an internal terminal is disposed, a metal wire that electrically connects the semiconductor chip and the internal terminal of the conductor, and a connection region between the semiconductor chip, the metal wire, and the conductor The semiconductor device having a convex shape in a direction toward the central portion of the semiconductor chip mounting region at least in an outer region corresponding to each side defining the semiconductor chip mounting region on the semiconductor chip mounting portion A protrusion lower than the chip is provided.

（１）半導体チップ搭載領域の外側領域（周辺）に、半導体チップ側に向いた凸形部を有する突起部を設ける。たとえば、半導体チップ側に向いた外形円弧状の凸形部を有する突起部を設ける。あるいは、半導体チップ側に１つの角部が向いた断面三角形の凸形部を有する突起部を設ける。
ダイボンドの際に、半導体チップ搭載部の半導体チップ搭載領域上にペースト状のダイボンド材を塗布し、その上に半導体チップを載せて押圧すると、半導体チップ下のダイボンド材は半導体チップの各辺の中央部に先に到達し、そこから外側に濡れ広がる傾向にある。 (1) Protruding portions having convex portions facing the semiconductor chip side are provided in the outer region (periphery) of the semiconductor chip mounting region. For example, a protrusion having an outer-arc-shaped convex portion facing the semiconductor chip side is provided. Alternatively, a protrusion having a convex portion having a triangular cross section with one corner facing the semiconductor chip is provided.
When die bonding is performed, a paste-like die bonding material is applied on the semiconductor chip mounting area of the semiconductor chip mounting portion, and the semiconductor chip is placed on the semiconductor chip mounting surface. Then, the die bonding material under the semiconductor chip is centered on each side of the semiconductor chip. It tends to reach the part first and then spread outward from there.

上記のような半導体チップ側に向いた凸形部を有する突起部を設けておくと、半導体チップの各辺の中央部から外側に濡れ広がったダイボンド材は、凸形部の先端に接触し、続いて凸形部の両側へと流れることになり、半導体チップ下のダイボンド材は各辺の端部側へ案内される。このため、半導体チップの裏面全体にダイボンド材が濡れ広がる。   If a protrusion having a convex portion facing the semiconductor chip side as described above is provided, the die bond material that has spread outward from the central portion of each side of the semiconductor chip contacts the tip of the convex portion, Subsequently, it flows to both sides of the convex portion, and the die bond material under the semiconductor chip is guided to the end portion side of each side. For this reason, the die bond material spreads over the entire back surface of the semiconductor chip.

（２）半導体チップ搭載領域とその外側領域とにわたる突起部を放射状に設ける。
上述したように、ダイボンドの際には、半導体チップ下のダイボンド材は半導体チップの各辺の中央部に先に到達し、そこから外側に濡れ広がる傾向にある。
上記のような放射状の突起部を設けておくと、半導体チップの中央領域から各辺の中央部に向かう経路が狭まり、移動量が制限されるため、半導体チップ下のダイボンド材は各辺の端部側へと案内される。このため、半導体チップの裏面全体にダイボンド材が濡れ広がる。 (2) Protrusions extending radially between the semiconductor chip mounting region and the outer region thereof are provided radially.
As described above, at the time of die bonding, the die bonding material under the semiconductor chip tends to reach the central part of each side of the semiconductor chip first and then spread outward from there.
When the radial protrusions as described above are provided, the path from the central region of the semiconductor chip toward the central portion of each side is narrowed and the amount of movement is limited. Guided to the club side. For this reason, the die bond material spreads over the entire back surface of the semiconductor chip.

ダイボンド材がこのように半導体チップの裏面全体に濡れ広がるため、半導体チップの外側への濡れ広がりを抑えること、つまり塗布量を従来よりも抑えることが可能になり、ダイボンド材の半導体チップ上面への這い上がりや半導体チップ搭載部からのはみ出しが防止されることとなる。   Since the die bond material spreads over the entire back surface of the semiconductor chip in this way, it becomes possible to suppress the wetting spread to the outside of the semiconductor chip, that is, the amount of coating can be suppressed more than before, and the die bond material can be applied to the upper surface of the semiconductor chip. Crawling up and protruding from the semiconductor chip mounting portion are prevented.

最終的には、ペースト状態で塗布され硬化されたダイボンド材は、半導体チップの外側まで濡れ広がり、前記半導体チップの各辺の中央よりも端部寄りの位置での前記ダイボンド材の濡れ広がり距離が大きいものとなる。   Eventually, the die bond material applied and cured in a paste state wets and spreads to the outside of the semiconductor chip, and the wet spread distance of the die bond material at a position closer to the end than the center of each side of the semiconductor chip is It will be big.

チップ搭載部は金属板よりなり、導体として、前記チップ搭載部に内部端子が対向する複数本のリードが設けられているものであってよい。いわゆるリードフレームから構成されるものである。   The chip mounting part may be made of a metal plate, and may be provided with a plurality of leads as conductors facing the internal terminals of the chip mounting part. It is composed of a so-called lead frame.

チップ搭載部は樹脂あるいはセラミックスを基材とする基板の表面に設けられており、前記導体として、前記チップ搭載部の外側の基板表面に内部端子を有する配線が形成されているものであってよい。いわゆる回路基板から構成されるものである。   The chip mounting portion may be provided on the surface of a substrate made of resin or ceramic as a base material, and a wiring having an internal terminal may be formed on the substrate surface outside the chip mounting portion as the conductor. . It is composed of a so-called circuit board.

半導体チップが平面視で長方形であり、前記半導体チップ側に向いた突起部の凸形部が外形円弧状あるいは断面三角形であるときには、前記半導体チップの短辺に対向する凸形部の頂部が長辺に対向する凸形部の頂部よりも極率あるいは角度が小さいことが好ましい。   When the semiconductor chip is rectangular in plan view and the convex part of the projecting part facing the semiconductor chip side has an outer circular arc shape or a triangular cross section, the top part of the convex part facing the short side of the semiconductor chip is long. It is preferable that the polarity or angle is smaller than the top of the convex portion facing the side.

放射状の突起部は、半導体チップの各辺に対応して一対ずつ形成することができる。半導体チップが平面視で長方形であるときに、半導体チップの短辺に対応する各一対の突起部間の角度が長辺に対応する各一対の突起部間の角度よりも小さいことが好ましい。各一対の突起部は、各々の長手方向の端部に、先端に近づくにしたがって幅狭まるように傾斜部が設けられており、その傾斜方向は、先端に近づくにしたがって双方の傾斜部が互いに接近する方向であることが好ましい。
突起部は各々、半導体チップ搭載領域内に位置する一端に向かって徐々に薄くなる楔状に形成されていてもよいし、厚みが均一であってもよい。 A pair of radial protrusions can be formed corresponding to each side of the semiconductor chip. When the semiconductor chip is rectangular in plan view, the angle between each pair of protrusions corresponding to the short side of the semiconductor chip is preferably smaller than the angle between each pair of protrusions corresponding to the long side. Each pair of protrusions is provided with an inclined portion at each longitudinal end so as to become narrower as it approaches the tip, and both inclined portions approach each other as it approaches the tip. It is preferable that the direction is.
Each of the protrusions may be formed in a wedge shape that gradually becomes thinner toward one end located in the semiconductor chip mounting region, or may have a uniform thickness.

上記の半導体装置を製造する際には、突起部を有する半導体チップ搭載部とその外側に内部端子が配置された導体とを有した半導体チップ支持体を準備する工程と、前記半導体チップ搭載部上にペースト状のダイボンド材を塗布する工程と、半導体チップを前記ダイボンド材上に載せ、押圧して、前記ダイボンド材を前記突起部により案内して前記半導体チップと前記半導体チップ搭載部との間で濡れ広げる工程と、前記ダイボンド材を硬化させて当該ダイボンド材を介して前記半導体チップを半導体チップ搭載部上に固着する工程と、前記半導体チップに形成された電極部と前記導体の内部端子とを金属細線により電気的に接続させる工程と、前記半導体チップと前記金属細線と前記導体の接続部分とを封止樹脂で覆って封止する工程とを少なくとも行うことを特徴とする。   When manufacturing the above semiconductor device, a step of preparing a semiconductor chip support having a semiconductor chip mounting portion having a protrusion and a conductor having an internal terminal disposed on the outside thereof, and on the semiconductor chip mounting portion A step of applying a paste-like die bond material to the semiconductor chip, placing the semiconductor chip on the die bond material, pressing, and guiding the die bond material by the protrusions between the semiconductor chip and the semiconductor chip mounting portion. A step of wetting and spreading, a step of curing the die bond material and fixing the semiconductor chip on the semiconductor chip mounting portion via the die bond material, an electrode portion formed on the semiconductor chip, and an internal terminal of the conductor A step of electrically connecting with a fine metal wire, and a step of covering and sealing the semiconductor chip, the fine metal wire, and the connecting portion of the conductor with a sealing resin. And carrying out even without.

半導体チップ支持体を準備する工程において、半導体チップ搭載部を金属板で構成するときには、その所定箇所にプレス加工により突起部を形成することができる。また、半導体チップ搭載部上の所定箇所にマスクを用いて樹脂を塗布することで突起部を形成することができる。また、半導体チップ搭載部上の所定箇所に別途に個片として形成した突起部を接着することができる。   In the step of preparing the semiconductor chip support, when the semiconductor chip mounting portion is made of a metal plate, a protrusion can be formed at a predetermined location by pressing. Further, the protrusion can be formed by applying resin to a predetermined location on the semiconductor chip mounting portion using a mask. In addition, it is possible to bond a protrusion formed as a separate piece to a predetermined location on the semiconductor chip mounting portion.

本発明によれば、半導体チップ搭載部上にその中央部に向かう方向に凸状をなす突起部を設けることにより、ダイボンド材の濡れ性を改善して、半導体チップの裏面全体に濡れ広げながら、半導体チップ搭載部からのはみ出し、半導体チップ上面へ這い上がり、それによる電極パッド等への付着を防止することができ、高信頼性、耐湿性を確保した半導体装置を実現できる。   According to the present invention, by providing a protrusion on the semiconductor chip mounting portion that protrudes in the direction toward the center portion, improving the wettability of the die bond material and spreading it over the entire back surface of the semiconductor chip, The semiconductor device can be prevented from sticking out from the semiconductor chip mounting portion and climbing up to the upper surface of the semiconductor chip and thereby being attached to the electrode pad and the like, and a semiconductor device with high reliability and moisture resistance can be realized.

以下、本発明の実施の形態を図面を参照しつつ説明する。
図１は本発明の第１実施形態にかかる半導体装置の構成を示す。図１（ａ）は同半導体装置の平面図、図１（ｂ）は同半導体装置の一部拡大斜視図、図１（ｃ）は同半導体装置の図１（ａ）におけるａ−ａ’ラインでの断面図である。 Hereinafter, embodiments of the present invention will be described with reference to the drawings.
FIG. 1 shows a configuration of a semiconductor device according to a first embodiment of the present invention. 1A is a plan view of the semiconductor device, FIG. 1B is a partially enlarged perspective view of the semiconductor device, and FIG. 1C is an aa ′ line in FIG. 1A of the semiconductor device. FIG.

図１（ａ）（ｂ）（ｃ）において、半導体装置は、主面に複数の電極パッド１ａを有する半導体チップ１と、半導体チップ１を搭載するためのダイパッド２と、ダイパッド２に内部端子６ａが対向するように且つダイパッド２の周囲を囲むように配列された複数本のリード６と、半導体チップ１をダイパッド２上に固着したダイボンド材４と、半導体チップ１の電極パッド１ａとリード６とを電気的に接続した金属細線５と、半導体チップ１、ダイパッド２、金属細線５、リード６の接続部分を覆った封止樹脂８とで構成されており、封止樹脂８の四方の外側にリード６の外部端子６ｂが突出している。このような形状の半導体装置はＱＦＰ（Quad-Flat-Package）と呼称されている。   1A, 1B, and 1C, a semiconductor device includes a semiconductor chip 1 having a plurality of electrode pads 1a on a main surface, a die pad 2 for mounting the semiconductor chip 1, and an internal terminal 6a on the die pad 2. A plurality of leads 6 arranged so as to face each other and surround the periphery of the die pad 2, a die bond material 4 that fixes the semiconductor chip 1 on the die pad 2, an electrode pad 1 a of the semiconductor chip 1, and a lead 6. And a sealing resin 8 covering the connecting portion of the semiconductor chip 1, the die pad 2, the metal thin wire 5, and the lead 6, and on the outside of the four sides of the sealing resin 8. The external terminal 6b of the lead 6 protrudes. Such a semiconductor device is called QFP (Quad-Flat-Package).

なお、図１（ａ）では、内部構成が分かり易いように、封止樹脂８の上部と金属細線５の一部を除去して図示している。実際には、図示した電極パッド１ａは全て金属細線５によりリード６に接続されている。後述する各図について、特に断らなくても同様であることとする。   In FIG. 1A, the upper portion of the sealing resin 8 and a part of the thin metal wire 5 are removed for easy understanding of the internal configuration. Actually, the illustrated electrode pads 1 a are all connected to the leads 6 by the thin metal wires 5. It is assumed that the same applies to each of the drawings described later, unless otherwise specified.

この半導体装置が、先に図１７、１９を用いて説明した従来の半導体装置と相違するのは、ダイパッド２上における半導体チップ１（平面視で概ね正方形）が搭載される領域（以下、半導体チップ搭載領域という）の外側領域、つまり半導体チップ１の各辺（したがって半導体チップ搭載領域を画する各辺）に対応する四方の領域にそれぞれ、半導体チップ１側に向いた外形円弧状の突出部１１ａを持った突起部１１が設けられている点である。４つの外形円弧状の突出部１１ａ（以下、円弧部１１ａという）は、同一形状、同一寸法であり、各々、半導体チップ１の各辺を２分する上下方向の中線に円弧部１１ａの頂部が対向しており、頂部の両側は対称形である。   This semiconductor device is different from the conventional semiconductor device described above with reference to FIGS. 17 and 19 in that a region on the die pad 2 where a semiconductor chip 1 (approximately square in plan view) is mounted (hereinafter referred to as a semiconductor chip). The outer region of the mounting area), that is, four regions corresponding to each side of the semiconductor chip 1 (and thus each side that defines the semiconductor chip mounting area), respectively, have a circular arc-shaped protruding portion 11a facing the semiconductor chip 1 side. This is the point that the protrusion 11 having the shape is provided. The four outer-arc-shaped projecting portions 11a (hereinafter referred to as arc-shaped portions 11a) have the same shape and the same dimensions, and each of the top portions of the arc-shaped portions 11a is a middle line in the vertical direction dividing each side of the semiconductor chip 1 into two. Are opposite and both sides of the top are symmetrical.

ダイパッド２、リード６、吊りリード７は、いわゆるリードフレームの一部であり、ダイパッド２は、既に切り離されているため図示していない外枠部に対して吊りリード７により連結され、リード６は前記外枠部の内周に櫛歯状に配列されていたものである。リードフレームは一般に、Ｃｕ合金、Ｆｅ−Ｎｉ合金、Ａｌ合金などの金属板で作製されている。   The die pad 2, the lead 6, and the suspension lead 7 are part of a so-called lead frame. Since the die pad 2 has already been separated, it is connected to the outer frame portion (not shown) by the suspension lead 7, and the lead 6 is It is arranged in a comb-teeth shape on the inner periphery of the outer frame portion. The lead frame is generally made of a metal plate such as a Cu alloy, an Fe—Ni alloy, or an Al alloy.

ダイボンド材４としては、エポキシ樹脂やシリコーン樹脂などが用いられ、放熱性が要求される場合には金属粉（例えばＡｇフィラー）入りのものが選択され、放熱性がそれほど重要でない場合には金属粉を含まないものが選択される。金属細線５としては、金（Ａｕ）線やアルミニウム（Ａｌ）線や銅（Ｃｕ）線などが用いられ、封止樹脂８としては、エポキシ樹脂、シリコーン樹脂、ポリイミド樹脂等が用いられる。   As the die bond material 4, an epoxy resin, a silicone resin, or the like is used. When heat dissipation is required, a material containing metal powder (for example, Ag filler) is selected. When heat dissipation is not so important, metal powder is used. Those that do not contain are selected. As the metal thin wire 5, a gold (Au) wire, an aluminum (Al) wire, a copper (Cu) wire, or the like is used, and as the sealing resin 8, an epoxy resin, a silicone resin, a polyimide resin, or the like is used.

図２は、上記の半導体装置（リードフレームを用いたＱＦＰ）の製造方法の第１例を示す断面図である。
図２（ａ）（ｂ）に示すようにして、突起部１１を有するダイパッド２とリード６と外枠部（図示せず）とを有したリードフレーム１４（半導体チップ支持体）を準備する。 FIG. 2 is a cross-sectional view showing a first example of a manufacturing method of the semiconductor device (QFP using a lead frame).
As shown in FIGS. 2A and 2B, a lead frame 14 (semiconductor chip support) having a die pad 2 having protrusions 11, leads 6, and an outer frame portion (not shown) is prepared.

詳細には、ダイパッド２とリード６と外枠部（図示せず）とを打ち抜いたリードフレーム１４を、プレス金型の上型１２、下型１３でプレス加工することにより、ダイパッド２とリード６（および外枠部）とに段差をつけるなどの加工を施すと同時に、プレス金型の凹部１２ａ，凸部１３ａによってダイパッド２に突起部１１を形成する。   Specifically, the die pad 2, the lead 6, and the outer frame (not shown) are punched out and the lead frame 14 is pressed with the upper die 12 and the lower die 13 of the press die, thereby the die pad 2 and the lead 6. At the same time as forming a step in (and the outer frame portion), the protrusion 11 is formed on the die pad 2 by the concave portion 12a and the convex portion 13a of the press mold.

図２（ｃ）に示すように、ダイパッド２の中央にディスペンサ１５によりダイボンド材４を塗布し、図２（ｄ）（ｅ）に示すように、コレット１６により半導体チップ１をダイボンド材４上に載せ、ボンディング荷重ｗで押圧して、ダイボンド材４を半導体チップ４の下面とダイパッド２との間に塗り広げる。   As shown in FIG. 2C, a die bond material 4 is applied to the center of the die pad 2 by a dispenser 15, and as shown in FIGS. 2D and 2E, the semiconductor chip 1 is placed on the die bond material 4 by a collet 16. The die bonding material 4 is spread between the lower surface of the semiconductor chip 4 and the die pad 2 by pressing with a bonding load w.

この際に、ダイボンド材４を半導体チップ１の各辺の端部まで塗り広げることが重要である。このようにすると、ダイボンド材４は、半導体チップ１の裏面全体に十分に濡れ広がり、ダイパッド２からはみ出したり、半導体チップ１上面へ這い上がることはなく、電極パッド１ａへの付着、コレット１６への付着を防止できる。   At this time, it is important to spread the die-bonding material 4 to the end of each side of the semiconductor chip 1. In this way, the die bond material 4 is sufficiently wetted and spreads over the entire back surface of the semiconductor chip 1 and does not protrude from the die pad 2 or crawl up to the upper surface of the semiconductor chip 1, but adheres to the electrode pad 1 a and adheres to the collet 16. Adhesion can be prevented.

この状態でダイボンド材４を加熱硬化させることにより、当該ダイボンド材４を介して半導体チップ１をダイパッド２上に固着させる。上記のように半導体チップ１の裏面全体にダイボンド材４が十分に濡れ広がっているので良好にダイボンドできることとなる。   In this state, the die bond material 4 is heat-cured to fix the semiconductor chip 1 on the die pad 2 via the die bond material 4. As described above, since the die bonding material 4 is sufficiently wetted and spread over the entire back surface of the semiconductor chip 1, the die bonding can be satisfactorily performed.

その後に、図２（ｆ）に示すように、半導体チップ１上面の電極パッド（図示せず）とリード６とを金属細線５によって電気的に接続し、図２（ｇ）に示すように、半導体チップ１とダイパッド２と金属細線５とリード６の接続部分とを封止樹脂８で覆って封止する。最後に、図２（ｈ）に示すように、リード６を外枠部（図示せず）から切り離し、外部端子６ｂを所定形状に折り曲げ加工する。   Thereafter, as shown in FIG. 2 (f), an electrode pad (not shown) on the upper surface of the semiconductor chip 1 and the lead 6 are electrically connected by a thin metal wire 5, and as shown in FIG. 2 (g), The semiconductor chip 1, the die pad 2, the fine metal wire 5, and the connection portion of the lead 6 are covered with a sealing resin 8 and sealed. Finally, as shown in FIG. 2 (h), the lead 6 is separated from the outer frame (not shown), and the external terminal 6b is bent into a predetermined shape.

上記のようにして半導体チップ１をダイボンドするときのダイボンド材４の濡れ広がりについて、図３（ａ）〜（ｄ）の平面図、対応する（ａ′）〜（ｄ′）の断面図を参照して詳述する。   Regarding the wetting and spreading of the die-bonding material 4 when die-bonding the semiconductor chip 1 as described above, refer to the plan views of FIGS. 3A to 3D and the corresponding cross-sectional views of (a ′) to (d ′). And will be described in detail.

図３（ａ）（ａ′）では、ダイパッド２の中央部にダイボンド材４を円形に塗布している。このダイボンド材４上に、コレット１６に吸着した半導体チップ１を、図３（ｂ）（ｂ′）に示すように載せ、ボンディング荷重ｗで押圧する。   3A and 3A, the die bond material 4 is circularly applied to the central portion of the die pad 2. The semiconductor chip 1 adsorbed on the collet 16 is placed on the die bond material 4 as shown in FIGS. 3B and 3B and pressed with a bonding load w.

このことにより、半導体チップ１下のダイボンド材４は、ほぼ円形のまま濡れ広がり、半導体チップ１の各辺の中央部に先に到達し、そこから外側に濡れ広がる。この時点では、ダイボンド材４は半導体チップ１の各辺の中央部まで濡れ広がっているが、各辺の端部までは濡れ広がっていない。   As a result, the die bond material 4 under the semiconductor chip 1 wets and spreads in a substantially circular shape, reaches the center of each side of the semiconductor chip 1 first, and then spreads wet from there. At this time, the die bond material 4 wets and spreads to the center of each side of the semiconductor chip 1 but does not spread to the end of each side.

さらにボンディング荷重ｗを加えると、図３（ｃ）（ｃ′）に示すように、半導体チップ１の各辺の中央部から外側に濡れ広がったダイボンド材４は、突起部１１の円弧部１１ａの頂部に接触し、続いて、図３（ｄ）（ｄ′）に示すように、円弧部１１ａの両側へと流れ、半導体チップ１下のダイボンド材４は半導体チップ１の各辺の端部側へ案内されることとなる。   When the bonding load w is further applied, as shown in FIGS. 3C and 3C, the die bond material 4 that has spread outward from the central portion of each side of the semiconductor chip 1 is formed on the arc portion 11a of the protruding portion 11. Next, as shown in FIGS. 3 (d) and 3 (d ′), the die bond material 4 below the semiconductor chip 1 flows to both sides of the arc part 11 a, and the die bond material 4 below the end of each side of the semiconductor chip 1. Will be guided to.

このため、ダイボンド材４は半導体チップ１の裏面全体に濡れ広がり、最終的には、ダイボンド材４の濡れ広がり形状は、半導体チップ１の各辺の中央部よりもその両側部でのはみ出し距離が大きい、４つ葉のクローバーのような形状となる。   For this reason, the die bond material 4 wets and spreads over the entire back surface of the semiconductor chip 1, and finally the die bond material 4 has a wet spread shape in which both sides of the semiconductor chip 1 protrude beyond the center of each side. It looks like a large four-leaf clover.

このように、突起部１１の円弧部１１ａを利用してダイボンド材４の濡れ広がりをコントロールすることができ、半導体チップ１の裏面全体、コーナー部まで、ダイボンド材４の十分な濡れ広がりを確保することが可能である。   In this way, the wetting and spreading of the die bond material 4 can be controlled using the arc portion 11a of the protruding portion 11, and sufficient wetting and spreading of the die bonding material 4 is ensured up to the entire back surface and corner portion of the semiconductor chip 1. It is possible.

円弧部１１ａの長さ（半導体チップ１の各辺に沿う方向の長さ）は、半導体チップ１の各辺の長さの１／４〜３／４の範囲で効果があり、好ましくは１／２程度である。円弧部１１ａの厚さは、半導体チップ１の厚さの１／４〜１／１の範囲が効果的であり、好ましくは３／４程度である。円弧部１１ａがこのようなサイズであれば、ダイパッド２からはみ出したり、半導体チップ１上面へ這い上がるのを抑えることができる。   The length of the arc portion 11a (the length in the direction along each side of the semiconductor chip 1) is effective in the range of 1/4 to 3/4 of the length of each side of the semiconductor chip 1, and preferably 1 / It is about 2. The thickness of the arc portion 11a is effectively in the range of 1/4 to 1/1 of the thickness of the semiconductor chip 1, and is preferably about 3/4. If the arc portion 11a has such a size, it can be prevented from protruding from the die pad 2 or creeping up to the upper surface of the semiconductor chip 1.

以上のように、円弧部１１ａをもった突起部１１によって、ダイボンド材４の半導体チップ１の裏面全体への十分な濡れ広がりを確保しながら、ダイパッド２からのはみ出しや、半導体チップ１上面への這い上がりを防止することができるので、小型、薄型化に対応した高信頼性、高耐湿性の半導体装置を実現できる。携帯電話、ＤＳＣ（デジタルスチルカメラ）、ＤＶＤやＢＤディスクレコーダー、ＨＤＤレコーダーのような、いわゆるデジタル家電の小型化、薄型化および品質の向上に寄与するものである。   As described above, the protrusion 11 having the circular arc portion 11a ensures sufficient wetting and spreading of the die bonding material 4 over the entire back surface of the semiconductor chip 1, while protruding from the die pad 2 and to the upper surface of the semiconductor chip 1. Since creeping up can be prevented, a highly reliable and highly moisture-resistant semiconductor device corresponding to a small size and a thin shape can be realized. This contributes to the miniaturization, thinning, and quality improvement of so-called digital home appliances such as mobile phones, DSCs (digital still cameras), DVD and BD disc recorders, and HDD recorders.

図４は、上記の半導体装置の製造方法の第２例を示す断面図である。
先に図２を用いて説明した製造方法と異なるのは、図４（ａ）〜（ｅ）に示す、突起部１１を有するダイパッド２とリード６と外枠部（図示せず）とを有したリードフレーム１４を準備する工程である。 FIG. 4 is a cross-sectional view showing a second example of the method for manufacturing the semiconductor device.
2 differs from the manufacturing method described above with reference to FIG. 2 in that it has a die pad 2 having a protrusion 11, a lead 6, and an outer frame (not shown) shown in FIGS. In this step, the lead frame 14 prepared is prepared.

図４（ａ）に示すように、ダイパッド２とリード６と外枠部（図示せず）とを打ち抜いたリードフレーム１４上にマスク１７を重ね、その上に樹脂１１′を塗布し、しかる後に図４（ｂ）に示すようにマスク１７上の樹脂１１′を取り除くことにより、図４（ｃ）に示すように突起部１１を形成する。   As shown in FIG. 4A, a mask 17 is overlaid on the lead frame 14 in which the die pad 2, the lead 6 and the outer frame (not shown) are punched, and a resin 11 'is applied thereon, and thereafter As shown in FIG. 4B, the protrusion 11 is formed as shown in FIG. 4C by removing the resin 11 ′ on the mask 17.

その後に、図４（ｄ）（ｅ）に示すように、プレス金型の上型１２、下型１３でプレス加工することにより、ダイパッド２とリード６（および外枠部）とに段差をつけるなどの加工を施す。このときに、突起部１１を潰さないように、突起部１１に対応する凹部１１ｂを設けたプレス金型を用いる。以下の工程は図２の方法と同様なので説明を省略する。   Thereafter, as shown in FIGS. 4D and 4E, a step is formed between the die pad 2 and the lead 6 (and the outer frame portion) by pressing with the upper mold 12 and the lower mold 13 of the press mold. Apply processing such as. At this time, a press die provided with a recess 11 b corresponding to the protrusion 11 is used so as not to crush the protrusion 11. The subsequent steps are the same as the method of FIG.

図５は、上記の半導体装置の製造方法の第３例を示す断面図である。
先に図２を用いて説明した製造方法と異なるのは、図５（ａ）〜（ｄ）に示す、突起部１１を有するダイパッド２とリード６と外枠部（図示せず）とを有したリードフレーム１４を準備する工程である。この工程のみ以下に説明して、他の工程の説明を省略する。 FIG. 5 is a cross-sectional view showing a third example of the method for manufacturing the semiconductor device.
2 differs from the manufacturing method described above with reference to FIG. 2 in that it has a die pad 2 having protrusions 11, leads 6, and an outer frame (not shown) shown in FIGS. In this step, the lead frame 14 prepared is prepared. Only this process will be described below, and description of other processes will be omitted.

図５（ａ）に示すように、樹脂フィルム１１″を所望の形状およびサイズにカットし（例えば短冊状に剪断したり、所望形状のパンチで打ち抜く）、図５（ｂ）に示すように、ダイパッド２上の所望の位置に貼り付けることで、突起部１１を形成する。   As shown in FIG. 5 (a), the resin film 11 ″ is cut into a desired shape and size (for example, sheared into a strip shape or punched with a punch having a desired shape), and as shown in FIG. 5 (b), The protrusion 11 is formed by pasting at a desired position on the die pad 2.

その後に、図５（ｃ）（ｄ）に示すように、プレス金型の上型１２、下型１３でプレス加工することにより、ダイパッド２とリード６（および外枠部）とに段差をつけるなどの加工を施す。このときに、突起部１１を潰さないように、突起部１１に対応する凹部１１ｂを設けたプレス金型を用いる。以下の工程は図２の方法と同様なので説明を省略する。   Thereafter, as shown in FIGS. 5C and 5D, a step is formed between the die pad 2 and the lead 6 (and the outer frame portion) by pressing with the upper mold 12 and the lower mold 13 of the press mold. Apply processing such as. At this time, a press die provided with a recess 11 b corresponding to the protrusion 11 is used so as not to crush the protrusion 11. The subsequent steps are the same as the method of FIG.

図６は本発明の第２実施形態にかかる半導体装置の構成を示す。図６（ａ）は同半導体装置の平面図、図６（ｂ）は同半導体装置の一部拡大斜視図、図６（ｃ）は同半導体装置の図６（ａ）におけるａ−ａ’ラインでの断面図である。   FIG. 6 shows a configuration of a semiconductor device according to the second embodiment of the present invention. 6A is a plan view of the semiconductor device, FIG. 6B is a partially enlarged perspective view of the semiconductor device, and FIG. 6C is an aa ′ line in FIG. 6A of the semiconductor device. FIG.

この半導体装置が図１の半導体装置と異なるのは、ダイパッド２とリード６とが段差なく配列され、それぞれの下面が封止樹脂８から露出していて、露出したリード６の下面が外部端子６ｂとされている点である。このようにリード６の下面が外部端子６ｂとなる形状の半導体装置はＱＦＮ（Quad-Flat-Nonlead-Package）と呼称されている。またダイパッド２の下面が露出する形態は、ＨＱＦＮ（Heatslag-Quad-Flat-Nonlead-Package、放熱板露出タイプＱＦＮ）と呼称されている。   This semiconductor device is different from the semiconductor device of FIG. 1 in that the die pad 2 and the lead 6 are arranged without a step, and the lower surface of each is exposed from the sealing resin 8, and the exposed lower surface of the lead 6 is the external terminal 6b. This is the point. The semiconductor device in which the lower surface of the lead 6 is the external terminal 6b is called QFN (Quad-Flat-Nonlead-Package). The form in which the lower surface of the die pad 2 is exposed is referred to as HQFN (Heatslag-Quad-Flat-Nonlead-Package, heat sink exposed type QFN).

突起部１１の配置および形状は、図１のものと同様である。このため、突起部１１によって上述したのと同様の効果が得られる。つまり、円弧部１１ａをもった突起部１１によって、ダイボンド材４の半導体チップ１の裏面全体への十分な濡れ広がりを確保しながら、ダイパッド２からのはみ出しや、半導体チップ１上面への這い上がりを防止することができる。   The arrangement and shape of the protrusions 11 are the same as those in FIG. For this reason, the effect similar to what was mentioned above by the projection part 11 is acquired. In other words, the protrusion 11 having the arc portion 11 a prevents the die bond material 4 from protruding from the die pad 2 and creeping up to the upper surface of the semiconductor chip 1 while ensuring sufficient wetting and spreading of the die bond material 4 over the entire back surface of the semiconductor chip 1. Can be prevented.

この半導体装置（ＱＦＮ）は、図１に示した半導体装置（ＱＦＰ）に比較すると、外部端子の数が少ない構造（多くできない構造）ではあるが、外部端子６ｂを下面に配置する分、小型化が可能である。かかる半導体装置（ＱＦＮ）の寸法精度の要求は半導体装置（ＱＦＰ）よりも厳しい。このため、上記のように突起部１１によってダイボンド材４のダイパッド２からのはみ出しを防止できることは、より有効となる。   This semiconductor device (QFN) has a structure with a smaller number of external terminals (a structure that cannot be increased) than the semiconductor device (QFP) shown in FIG. Is possible. The requirement of dimensional accuracy of such a semiconductor device (QFN) is stricter than that of the semiconductor device (QFP). For this reason, it is more effective that the protrusion 11 prevents the die bonding material 4 from protruding from the die pad 2 as described above.

ただし、ダイパッド２が露出していない構造、ＬＧＡのような構造であってもよく、このような構造でも突起部１１による上述の効果が有効であることは言うまでもない。
図７は本発明の第３実施形態にかかる半導体装置の構成を示す。図７（ａ）は同半導体装置の平面図、図７（ｂ）は同半導体装置の一部拡大斜視図、図７（ｃ）は同半導体装置の図７（ａ）におけるａ−ａ’ラインでの断面図である。 However, a structure in which the die pad 2 is not exposed or a structure such as LGA may be used, and it goes without saying that the above-described effect by the protrusion 11 is effective even in such a structure.
FIG. 7 shows a configuration of a semiconductor device according to the third embodiment of the present invention. 7A is a plan view of the semiconductor device, FIG. 7B is a partially enlarged perspective view of the semiconductor device, and FIG. 7C is an aa ′ line in FIG. 7A of the semiconductor device. FIG.

この半導体装置は、図１の半導体装置と同じくＱＦＰ（Quad-Flat-Package）である。この半導体装置が図１の半導体装置と異なるのは、図１の突起部１１とは形状が異なる突起部２１、つまり、半導体チップ１側に向いた断面三角形の突出部２１ａ（以下、三角部２１ａという）を持った突起部２１が形成されている点である。   This semiconductor device is a QFP (Quad-Flat-Package) like the semiconductor device of FIG. This semiconductor device is different from the semiconductor device of FIG. 1 in that a protrusion 21 having a shape different from that of the protrusion 11 in FIG. 1, that is, a protrusion 21a having a triangular cross section facing the semiconductor chip 1 side (hereinafter referred to as a triangle 21a). That is, the protrusion 21 having the above is formed.

４つの突起部２１は、同一形状、同一寸法であり、各々、半導体チップ１の各辺を２分する上下方向の中線に三角部２１ａの頂部が対向しており、頂部の両側は対称形である。突起部２１の配置は図１の突起部１１と同様である。   The four protrusions 21 have the same shape and the same dimensions, and the tops of the triangular portions 21a are opposed to the vertical middle lines that bisect each side of the semiconductor chip 1, and both sides of the tops are symmetrical. It is. The arrangement of the protrusions 21 is the same as that of the protrusions 11 in FIG.

このため、突起部１１によって、ダイボンド材４の半導体チップ１の裏面全体への十分な濡れ広がりを確保しながら、ダイパッド２からのはみ出しや、半導体チップ１上面への這い上がりを防止することができる。   Therefore, the protrusion 11 can prevent the die bond material 4 from protruding from the die pad 2 and creeping up to the upper surface of the semiconductor chip 1 while ensuring sufficient wetting and spreading of the die bond material 4 over the entire back surface of the semiconductor chip 1. .

三角部２１ａの長さは、半導体チップ１の各辺の長さの１／４〜３／４の範囲で効果があり、好ましくは１／２程度である。三角部２１ａの厚さは、半導体チップの厚さの１／４〜１／１の範囲が効果的であり、好ましくは３／４程度である。半導体チップ１に対向する頂部に、丸みをもたせてもよい。半導体チップ１のサイズなどが変化すると、ダイボンド材４の濡れ広がり性が変化するため、半導体チップ１に対向している三角部２１ａの頂部の角度、その両側の辺の長さを変化させることで対応する。   The length of the triangular portion 21a is effective in the range of ¼ to ¾ of the length of each side of the semiconductor chip 1, and is preferably about ½. The thickness of the triangular portion 21a is effectively in the range of 1/4 to 1/1 of the thickness of the semiconductor chip, and preferably about 3/4. The top portion facing the semiconductor chip 1 may be rounded. When the size or the like of the semiconductor chip 1 is changed, the wetting and spreading property of the die bond material 4 is changed, so that the angle of the top of the triangular portion 21a facing the semiconductor chip 1 and the lengths of the sides on both sides thereof are changed. Correspond.

図８は本発明の第４実施形態にかかる半導体装置の構成を示す。図８（ａ）は同半導体装置の平面図、図８（ｂ）は同半導体装置の一部拡大斜視図、図８（ｃ）は同半導体装置の図８（ａ）におけるａ−ａ’ラインでの断面図である。   FIG. 8 shows a configuration of a semiconductor device according to the fourth embodiment of the present invention. 8A is a plan view of the semiconductor device, FIG. 8B is a partially enlarged perspective view of the semiconductor device, and FIG. 8C is an aa ′ line in FIG. 8A of the semiconductor device. FIG.

この半導体装置は、図７の半導体装置と同じくＱＦＰ（Quad-Flat-Package）である。この半導体装置が図７の半導体装置と異なるのは、半導体チップ１が平面視で長方形であり、半導体チップ１の長辺側と短辺側とで突起部２１の形状がやや異なる点である。   This semiconductor device is a QFP (Quad-Flat-Package) like the semiconductor device of FIG. This semiconductor device is different from the semiconductor device of FIG. 7 in that the semiconductor chip 1 is rectangular in plan view, and the shape of the protrusion 21 is slightly different between the long side and the short side of the semiconductor chip 1.

つまり、半導体チップ１の長辺側に、半導体チップ１に向いた断面三角形の突出部２１Ａａ（以下、三角部２１Ａａという）を持った突起部２１Ａが形成され、半導体チップ１の短辺側に、半導体チップ１に向いた断面三角形の突出部２１Ｂａ（以下、三角部２１Ｂａという）を持った突起部２１Ｂが形成されている。   That is, on the long side of the semiconductor chip 1, a protruding portion 21 </ b> A having a protruding portion 21 </ b> Aa having a triangular cross section facing the semiconductor chip 1 (hereinafter referred to as a triangular portion 21 </ b> Aa) is formed, and on the short side of the semiconductor chip 1, A protruding portion 21B having a protruding portion 21Ba having a triangular cross section facing the semiconductor chip 1 (hereinafter referred to as a triangular portion 21Ba) is formed.

突起部２１Ａの三角部２１Ａａの頂部の角度は、突起部２１Ｂの三角部２１Ｂａの頂部の角度よりも大きい。突起部２１Ａ，２１Ｂは、半導体チップ１の長辺または短辺と直交する方向の寸法は同一であり、したがって三角部２１Ａａ，２１Ｂａの互いに対応する２辺の長さは異なっている。各１対の突起部２１Ａ，２１Ｂは各々、同一形状、同一寸法であり、半導体チップ１の各辺を２分する上下方向の中線に三角部２１Ａａ，２１Ｂａの頂部が対向しており、頂部の両側は対称形である。   The angle of the top of the triangular portion 21Aa of the protrusion 21A is larger than the angle of the top of the triangular portion 21Ba of the protrusion 21B. The protrusions 21A and 21B have the same dimension in the direction orthogonal to the long side or the short side of the semiconductor chip 1, and therefore the lengths of the two corresponding sides of the triangular portions 21Aa and 21Ba are different. Each of the pair of protrusions 21A and 21B has the same shape and dimensions, and the tops of the triangular parts 21Aa and 21Ba are opposed to the middle line in the vertical direction that bisects each side of the semiconductor chip 1. Both sides are symmetrical.

これは、上記のように半導体チップ１が長方形であるときには、半導体チップ１の外側にはみ出るダイボンド材４は長辺からの量が短辺からの量よりも多いので、三角部２１Ａａ，２１Ｂａの頂角や大きさを変えることで対処したものである。   This is because, when the semiconductor chip 1 is rectangular as described above, the die bond material 4 that protrudes outside the semiconductor chip 1 has a larger amount from the long side than the amount from the short side, so that the tops of the triangular portions 21Aa and 21Ba This is dealt with by changing the angle and size.

この突起部２１（２１Ａ，２１Ｂ）によっても、ダイボンド材４の半導体チップ１の裏面全体への十分な濡れ広がりを確保しながら、ダイパッド２からのはみ出しや、半導体チップ１上面への這い上がりを防止することができる。   The protrusions 21 (21A, 21B) also prevent the die bonding material 4 from protruding from the die pad 2 and creeping up to the upper surface of the semiconductor chip 1 while ensuring sufficient wetting and spreading of the die bonding material 4 over the entire back surface of the semiconductor chip 1. can do.

図９は本発明の第５実施形態にかかる半導体装置の構成を示す。図９（ａ）は同半導体装置の平面図、図９（ｂ）は同半導体装置の一部拡大斜視図、図９（ｃ）は同半導体装置の図９（ａ）におけるａ−ａ’ラインでの断面図である。   FIG. 9 shows a configuration of a semiconductor device according to the fifth embodiment of the present invention. 9A is a plan view of the semiconductor device, FIG. 9B is a partially enlarged perspective view of the semiconductor device, and FIG. 9C is an aa ′ line in FIG. 9A of the semiconductor device. FIG.

この半導体装置は、上述してきたようなリードフレームを用いるのでなく、回路基板３０を用いて構成されている。回路基板３０は、樹脂（セラミックス等でもよい）を基材として構成され、半導体チップ１を搭載する領域であるアイランド３１が上面に設けられ、その周囲に内部端子３２ａを有する配線３２が形成され、下面に外部端子（図示せず）が格子状に配置され、内部端子３２ａおよび外部端子以外の配線３２は保護膜３３で覆われている。格子状配置の外部端子上にはボール電極３４が搭載されている。   This semiconductor device is configured using the circuit board 30 instead of using the lead frame as described above. The circuit board 30 is made of resin (ceramics or the like) as a base material, and an island 31 that is an area on which the semiconductor chip 1 is mounted is provided on the upper surface, and a wiring 32 having an internal terminal 32a is formed around the island 31. External terminals (not shown) are arranged on the lower surface in a grid pattern, and the internal terminals 32 a and wirings 32 other than the external terminals are covered with a protective film 33. Ball electrodes 34 are mounted on the external terminals arranged in a lattice pattern.

すなわち、この半導体装置は、主面に複数の電極パッド１ａを有する半導体チップ１と、アイランド３１および配線３２を有する回路基板３０と、半導体チップ１をアイランド３１上に固着したダイボンド材４と、半導体チップ１の電極パッド１ａと配線３２の内部端子３２ａとを電気的に接続した金属細線５と、半導体チップ１、アイランド３１、金属細線５、配線３２を含む回路基板３０上面を覆った封止樹脂８と、上述の格子状配置の外部端子上に搭載したボール電極３４とで構成されている。このような形状の半導体装置はＢＧＡ（Ball-Grid-Arrey-Package）と呼称されている。   That is, this semiconductor device includes a semiconductor chip 1 having a plurality of electrode pads 1a on the main surface, a circuit board 30 having islands 31 and wirings 32, a die bond material 4 that fixes the semiconductor chip 1 on the islands 31, and a semiconductor. Sealing resin covering the upper surface of the circuit board 30 including the metal wire 5 electrically connecting the electrode pad 1a of the chip 1 and the internal terminal 32a of the wire 32, and the semiconductor chip 1, the island 31, the metal wire 5 and the wire 32 8 and the ball electrode 34 mounted on the external terminal in the above-described lattice arrangement. The semiconductor device having such a shape is called a BGA (Ball-Grid-Arrey-Package).

そして、回路基板３０のアイランド３１上に、図１と同様の配置、形状の突起部１１が形成されている。つまり、アイランド３１上における半導体チップ搭載領域の外側領域、半導体チップ１の各辺に対応する四方の領域にそれぞれ、半導体チップ１側に向いた円弧部１１ａを持った突起部１１が設けられている。４つの突起部１１は、同一形状、同一寸法であり、各々、半導体チップ１の各辺を２分する上下方向の中線に円弧部１１ａの頂部が対向しており、頂部の両側は対称形である。   And the protrusion part 11 of the arrangement | positioning and shape similar to FIG. 1 is formed on the island 31 of the circuit board 30. That is, the protrusion 11 having the arc portion 11a facing the semiconductor chip 1 side is provided in the outer region of the semiconductor chip mounting region on the island 31 and in the four regions corresponding to the respective sides of the semiconductor chip 1. . The four protrusions 11 have the same shape and the same dimensions, and the tops of the circular arcs 11a are opposed to the vertical middle line that bisects each side of the semiconductor chip 1, and both sides of the tops are symmetrical. It is.

この半導体装置でも、突起部１１によって、ダイボンド材４の半導体チップ１の裏面全体への十分な濡れ広がりを確保しながら、ダイパッド２からのはみ出しや、半導体チップ１上面への這い上がりを防止することができる。   Also in this semiconductor device, the protrusion 11 prevents the protrusion from the die pad 2 and the creeping up to the upper surface of the semiconductor chip 1 while ensuring sufficient wetting and spreading of the die bonding material 4 over the entire back surface of the semiconductor chip 1. Can do.

なお、回路基板３０は、両面基板や複数層構造に形成される。配線３２は、基材が樹脂であれば、Ｃｕを用いて形成され、表面に露出している部分がＮｉ−Ａｕで被覆されることが多く、また基材がセラミックであれば、一般にタングステンなどを用いて形成され、表面に露出している部分がＡｕなどで被覆されることが多い。ボール電極３４としては、はんだやＣｕなどの金属ボールが搭載されるが、ボール電極３４に代えて突起電極を設けてもよいし、ボール電極３４を設けないＬＧＡ（Land-Grid-Arrey-Package）として構成してもよい。   The circuit board 30 is formed in a double-sided board or a multi-layer structure. If the base material is a resin, the wiring 32 is formed using Cu, and the portion exposed on the surface is often covered with Ni—Au, and if the base material is ceramic, tungsten or the like is generally used. In many cases, a portion exposed by the surface is covered with Au or the like. As the ball electrode 34, a metal ball such as solder or Cu is mounted, but a protruding electrode may be provided instead of the ball electrode 34, or an LGA (Land-Grid-Arrey-Package) without the ball electrode 34. You may comprise as.

図１０は、上記の半導体装置（回路基板を用いたＢＧＡ）の製造方法の第１例を示す断面図である。
図１０（ａ）（ｂ）に示すように、突起部１１を有するアイランド３１と配線３２とを有した回路基板３０（半導体チップ支持体）を準備する。 FIG. 10 is a cross-sectional view showing a first example of a manufacturing method of the semiconductor device (BGA using a circuit board).
As shown in FIGS. 10A and 10B, a circuit board 30 (semiconductor chip support) having islands 31 having protrusions 11 and wirings 32 is prepared.

詳細には、図１０（ａ）に示すように、アイランド３１と配線３２とを有した回路基板３０上にマスク１７を重ねておき、その上に樹脂（レジスト）１１′を塗布し、しかる後に図１０（ｂ）に示すようにマスク１７上の樹脂１１′を取り除くことにより、図１０（ｃ）に示すように突起部１１を形成する。   Specifically, as shown in FIG. 10A, a mask 17 is overlaid on a circuit board 30 having islands 31 and wirings 32, and a resin (resist) 11 'is applied thereon, and thereafter By removing the resin 11 'on the mask 17 as shown in FIG. 10 (b), the protrusion 11 is formed as shown in FIG. 10 (c).

この後は先に図２を用いて説明した方法とほぼ同様なので説明を省略する。ボール電極３４は最後に搭載する。保護膜の図示は省略している。
図１１は、上記の半導体装置の製造方法の第２例を示す断面図である。 After this, since it is almost the same as the method described with reference to FIG. The ball electrode 34 is mounted last. The illustration of the protective film is omitted.
FIG. 11 is a cross-sectional view showing a second example of the method for manufacturing the semiconductor device.

図１１（ａ）（ｂ）に示すように、突起部１１を有するアイランド３１と配線３２とを有した回路基板３０を準備する。
詳細には、図１１（ａ）に示すように、樹脂フィルム１１″を所望の形状およびサイズにカットし（例えば短冊状に剪断したり、所望形状のパンチで打ち抜く）、図１１（ｂ）に示すように、ダイパッド２上の所望の位置に貼り付けることで、突起部１１を形成する。 As shown in FIGS. 11A and 11B, a circuit board 30 having an island 31 having protrusions 11 and wirings 32 is prepared.
Specifically, as shown in FIG. 11A, the resin film 11 ″ is cut into a desired shape and size (for example, sheared into a strip shape or punched with a punch having a desired shape). As shown, the protrusion 11 is formed by pasting at a desired position on the die pad 2.

この後は先に図２を用いて説明した方法とほぼ同様なので説明を省略する。ボール電極３４は最後に搭載する。保護膜の図示は省略している。
図１２は本発明の第６実施形態にかかる半導体装置の構成を示す。図１２（ａ）は同半導体装置の平面図、図１２（ｂ）は同半導体装置の一部拡大斜視図、図１２（ｃ）は同半導体装置の図１２（ａ）におけるａ−ａ’ラインでの断面図である。 After this, since it is almost the same as the method described with reference to FIG. The ball electrode 34 is mounted last. The illustration of the protective film is omitted.
FIG. 12 shows a configuration of a semiconductor device according to the sixth embodiment of the present invention. 12A is a plan view of the semiconductor device, FIG. 12B is a partially enlarged perspective view of the semiconductor device, and FIG. 12C is an aa ′ line in FIG. 12A of the semiconductor device. FIG.

この半導体装置は、図１の半導体装置と同じくリードフレームを用いたＱＦＰ（Quad-Flat-Package）である。この半導体装置が図１の半導体装置と異なるのは、ダイパッド２上に、半導体チップ搭載領域の外側だけでなく領域内にも入り込むかたちの突起部４１（４１Ａ，４１Ｂ）が放射状に形成されている点である。突起部４１Ａ，４１Ｂは一対をなすもので、半導体チップ１の各辺に対応して一対ずつ形成されている。   This semiconductor device is a QFP (Quad-Flat-Package) using a lead frame like the semiconductor device of FIG. This semiconductor device is different from the semiconductor device of FIG. 1 in that protrusions 41 (41A, 41B) are formed on the die pad 2 so as to enter not only the outside of the semiconductor chip mounting region but also the region. Is a point. The protrusions 41 </ b> A and 41 </ b> B form a pair, and a pair is formed corresponding to each side of the semiconductor chip 1.

なお図１２（ａ）において、突起部４１Ａ，４１Ｂは断面では表われないが、理解しやすいように斜線を付している。後述する各図について、特に断らなくても同様であることとする。   In FIG. 12A, the protrusions 41A and 41B are not shown in cross section, but are hatched for easy understanding. It is assumed that the same applies to each of the drawings described later, unless otherwise specified.

各一対の突起部４１Ａ，４１Ｂは、各々の長手方向の端部に、先端に近づくにしたがって幅狭まるように傾斜部４１Ａ′，４１Ｂ′が設けられており、その傾斜方向は、先端に近づくにしたがって双方の傾斜部４１Ａ′，４１Ｂ′が互いに接近する方向である。言い換えると、各一対の突起部４１Ａ，４１Ｂは平面視で各々台形であり、より長い底辺どうしが対向し、傾斜部４１Ａ′，４１Ｂ′は互いに背反している。このため、突起部４１（４１Ａ，４１Ｂ）が周方向に等間隔で配置されていても、一対の突起部４１Ａ，４１Ｂの先端どうしの間隔は、隣り合う一方の対の突起部４１Ａともう一方の対の突起部４１Ｂとの先端どうしの間隔よりも狭い。   Each pair of protrusions 41A and 41B is provided with inclined portions 41A ′ and 41B ′ at the end portions in the longitudinal direction so as to become narrower as they approach the tip, and the inclination direction approaches the tip. Therefore, both inclined portions 41A 'and 41B' are in the direction in which they approach each other. In other words, each of the pair of protrusions 41A and 41B has a trapezoidal shape in plan view, the longer bases face each other, and the inclined portions 41A 'and 41B' are opposite to each other. For this reason, even if the protrusions 41 (41A, 41B) are arranged at equal intervals in the circumferential direction, the distance between the tips of the pair of protrusions 41A, 41B is different from that of the adjacent pair of protrusions 41A and the other. It is narrower than the distance between the tips of the pair of protrusions 41B.

また、各突起部４１Ａ，４１Ｂは、半導体チップ搭載領域内に位置する内端に向かって徐々に薄くなる楔状に形成されている。このため、楔状の突起部４１Ａ，４１Ｂ上に半導体チップ１の下面のエッジが支持されている。半導体チップ１の外側へはみ出たダイボンド材４の外端部の厚みは、突起部４１Ａ，４１Ｂの外端部の厚みより小さい。   Each protrusion 41A, 41B is formed in a wedge shape that gradually becomes thinner toward the inner end located in the semiconductor chip mounting region. Therefore, the edge of the lower surface of the semiconductor chip 1 is supported on the wedge-shaped protrusions 41A and 41B. The thickness of the outer end portion of the die bond material 4 that protrudes to the outside of the semiconductor chip 1 is smaller than the thickness of the outer end portions of the protrusions 41A and 41B.

上記のダイパッド２上に半導体チップ１をダイボンドするときのダイボンド材４の濡れ広がりについて、図１３（ａ）〜（ｃ）の平面図、対応する（ａ′）〜（ｃ′）の断面図を参照して説明する。   13 (a) to 13 (c) and corresponding cross-sectional views (a ') to (c') regarding the wetting and spreading of the die bonding material 4 when the semiconductor chip 1 is die-bonded on the die pad 2 described above. The description will be given with reference.

図１３（ａ）（ａ′）では、ダイパッド２の中央にダイボンド材４を円形に塗布している。このダイボンド材４上に、コレット１６に吸着した半導体チップ１を、図１３（ｂ）（ｂ′）に示すように載せ、ボンディング荷重ｗで押圧する。   13A and 13A, the die bond material 4 is applied in a circular shape at the center of the die pad 2. The semiconductor chip 1 adsorbed by the collet 16 is placed on the die bond material 4 as shown in FIGS. 13B and 13B and pressed with a bonding load w.

このことにより、半導体チップ１下のダイボンド材４は、放射状の突起部４１（４１Ａ，４１Ｂ）の間に濡れ広がる。この際に、上述のように、一対の突起部４１Ａ，４１Ｂの先端どうしの間隔は、隣り合う一方の対の突起部４１Ａともう一方の対の突起部４１Ｂとの先端どうしの間隔よりも狭いため、半導体チップ１の各辺の中央部に向かう方向よりも対角線方向に多めにダイボンド材４が濡れ広がっていく。   Thereby, the die-bonding material 4 under the semiconductor chip 1 wets and spreads between the radial protrusions 41 (41A, 41B). At this time, as described above, the distance between the tips of the pair of protrusions 41A and 41B is narrower than the distance between the tips of the adjacent pair of protrusions 41A and the other pair of protrusions 41B. Therefore, the die-bonding material 4 spreads more and more in the diagonal direction than in the direction toward the center of each side of the semiconductor chip 1.

さらにボンディング荷重ｗを加えると、図１３（ｃ）（ｃ′）に示すように、半導体チップ１の下面の各辺（エッジ）が楔状の突起部４１（４１Ａ，４１Ｂ）の上面（傾斜面）に当接する。   When a bonding load w is further applied, as shown in FIGS. 13C and 13C, each side (edge) of the lower surface of the semiconductor chip 1 is an upper surface (inclined surface) of the wedge-shaped protrusion 41 (41A, 41B). Abut.

このときまでダイボンド材４は半導体チップ１の裏面全体、半導体チップ１の各辺の中央部および端部まで濡れ広がり、半導体チップ１下には突起部４１（４１Ａ，４１Ｂ）の当接点の高さ（楔形状に依存する）で規定される適量が保持される。   Until this time, the die-bonding material 4 wets and spreads to the entire back surface of the semiconductor chip 1 and to the center and end of each side of the semiconductor chip 1, and the height of the contact point of the protrusion 41 (41A, 41B) below the semiconductor chip 1 The appropriate amount defined by (depending on the wedge shape) is maintained.

最終的には、ダイボンド材４の濡れ広がり形状は、半導体チップ１の各辺の中央部よりもその両側部分のはみ出し距離が大きい、４つ葉のクローバーのような形状となる。
このように、突起部４１の放射状の配置と形状とを利用して、ダイボンド材４の濡れ広がりをコントロールすることができ、半導体チップ１の裏面全体、コーナー部まで、ダイボンド材４の十分な濡れ広がりを確保することが可能である。 Ultimately, the die-bonding material 4 has a wet and spread shape such as a four-leaf clover in which the protruding distances at both side portions are larger than the central portion of each side of the semiconductor chip 1.
Thus, the wetting and spreading of the die bond material 4 can be controlled using the radial arrangement and shape of the protrusions 41, and the die bond material 4 can be sufficiently wetted to the entire back surface and the corner portion of the semiconductor chip 1. It is possible to ensure the spread.

またダイボンド材４がこのように半導体チップ１の裏面全体に濡れ広がるため、半導体チップ１の外側への濡れ広がりを抑えること、つまり塗布量を従来よりも抑えることが可能になり、ダイボンド材４の半導体チップ１上面への這い上がりやダイパッド２からのはみ出しが防止されることとなる。   In addition, since the die bond material 4 spreads over the entire back surface of the semiconductor chip 1 in this way, it is possible to suppress the wet spread to the outside of the semiconductor chip 1, that is, to reduce the coating amount as compared with the conventional case. The creeping up to the upper surface of the semiconductor chip 1 and the protrusion from the die pad 2 are prevented.

図１４は本発明の第７実施形態にかかる半導体装置の構成を示す。図１４（ａ）は同半導体装置の平面図、図１４（ｂ）は同半導体装置の一部拡大斜視図、図１４（ｃ）は同半導体装置の図１４（ａ）におけるａ−ａ’ラインでの断面図である。   FIG. 14 shows a configuration of a semiconductor device according to the seventh embodiment of the present invention. 14A is a plan view of the semiconductor device, FIG. 14B is a partially enlarged perspective view of the semiconductor device, and FIG. 14C is an aa ′ line in FIG. 14A of the semiconductor device. FIG.

この半導体装置は、図１２の半導体装置と同じくＱＦＰ（Quad-Flat-Package）である。この半導体装置が図１３の半導体装置と異なるのは、半導体チップ１が平面視で長方形であり、放射状に配置された突起部５１の形状が半導体チップ１の長辺側と短辺側とでやや異なる点である。   This semiconductor device is a QFP (Quad-Flat-Package) like the semiconductor device of FIG. This semiconductor device is different from the semiconductor device of FIG. 13 in that the semiconductor chip 1 is rectangular in plan view, and the shape of the protrusions 51 arranged radially is slightly on the long side and the short side of the semiconductor chip 1. It is a different point.

つまり、半導体チップ１の長辺側に各一対の突起部５１Ａ，５１Ｂが角度θ１をなすように形成され、半導体チップ１の短辺側に各一対の突起部５１Ｃ，５１Ｄが角度θ２（＜θ１）をなすように形成されている。長辺と直交する方向の突起部５１Ａ，５１Ｂの寸法と、短辺と直交する方向の突起部５１Ｃ，５１Ｄの寸法とは同等である。   That is, the pair of protrusions 51A and 51B are formed on the long side of the semiconductor chip 1 so as to form an angle θ1, and the pair of protrusions 51C and 51D are formed on the short side of the semiconductor chip 1 at an angle θ2 (<θ1). ). The dimensions of the protrusions 51A and 51B in the direction orthogonal to the long side are the same as the dimensions of the protrusions 51C and 51D in the direction orthogonal to the short side.

各一対の突起部５１Ａ，５１Ｂ，突起部５１Ｃ，５１Ｄが、各々の長手方向の端部に、傾斜部５１Ａ′，５１Ｂ′，傾斜部５１Ｃ′，５１Ｄ′を有すること、および、各突起部５１Ａ，５１Ｂ，５１Ｃ，５１Ｄが楔状に形成されていることは、図１３の半導体装置と同様である。   Each pair of protrusions 51A, 51B and protrusions 51C, 51D has inclined portions 51A ′, 51B ′, inclined portions 51C ′, 51D ′ at the respective longitudinal ends, and each protrusion 51A. , 51B, 51C, 51D are formed in a wedge shape, as in the semiconductor device of FIG.

これは、上記のように半導体チップ１が長方形であるときには、半導体チップ１の外側にはみ出るダイボンド材４は長辺からの量が短辺からの量よりも多いので、突起部５１Ａ，５１Ｂ，突起部５１Ｃ，５１Ｄの挟角や大きさを変えることで対処したものである。   This is because when the semiconductor chip 1 is rectangular as described above, the die bond material 4 that protrudes outside the semiconductor chip 1 has a larger amount from the long side than the amount from the short side. This is dealt with by changing the included angles and sizes of the parts 51C and 51D.

この突起部５１（５１Ａ，５１Ｂ，５１Ｃ，５１Ｄ）によっても、ダイボンド材４の半導体チップ１の裏面全体への十分な濡れ広がりを確保しながら、ダイパッド２からのはみ出しや、半導体チップ１上面への這い上がりを防止することができる。   The protrusions 51 (51A, 51B, 51C, 51D) also ensure that the die bond material 4 protrudes from the die pad 2 to the entire back surface of the semiconductor chip 1 and spreads over the top surface of the semiconductor chip 1. Crawling can be prevented.

なおここでは、図示したように、短辺に対応するθ２を鋭角とし、長辺に対応するθ１を鈍角としているが、それぞれの角度は半導体チップ１の長辺、短辺の長さの比率によって決めればよい。   Here, as shown in the figure, θ2 corresponding to the short side is an acute angle and θ1 corresponding to the long side is an obtuse angle, but each angle depends on the ratio of the length of the long side to the short side of the semiconductor chip 1. Just decide.

図１５は本発明の第８実施形態にかかる半導体装置の構成を示す。図１５（ａ）は同半導体装置の平面図、図１５（ｂ）は同半導体装置の一部拡大斜視図、図１５（ｃ）は同半導体装置の図１５（ａ）におけるａ−ａ’ラインでの断面図である。   FIG. 15 shows a configuration of a semiconductor device according to the eighth embodiment of the present invention. 15A is a plan view of the semiconductor device, FIG. 15B is a partially enlarged perspective view of the semiconductor device, and FIG. 15C is an aa ′ line in FIG. 15A of the semiconductor device. FIG.

この半導体装置は、図１２の半導体装置と同じくリードフレームを用いたＱＦＰ（Quad-Flat-Package）である。この半導体装置が図１２の半導体装置と異なるのは、突起部６１が、内端から外端まで均一な厚みに形成されている点である。   This semiconductor device is a QFP (Quad-Flat-Package) using a lead frame like the semiconductor device of FIG. This semiconductor device is different from the semiconductor device of FIG. 12 in that the protrusion 61 is formed with a uniform thickness from the inner end to the outer end.

各一対の突起部６１Ａ，６１Ｂは、図１２の突起部４１Ａ，４１Ｂと同様の放射状の配置、ほぼ同様の形状を有しており、各々の長手方向の端部に、傾斜部６１Ａ′，６１Ｂ′を有している。   Each of the pair of protrusions 61A and 61B has the same radial arrangement and substantially the same shape as the protrusions 41A and 41B in FIG. 12, and inclined portions 61A ′ and 61B are provided at the end portions in the longitudinal direction. 'have.

この突起部６１（６１Ａ，６１Ｂ）によっても、ダイボンド材４の半導体チップ１の裏面全体への十分な濡れ広がりを確保しながら、ダイパッド２からのはみ出しや、半導体チップ１上面への這い上がりを防止することができる。   The protrusions 61 (61A, 61B) also prevent the die bond material 4 from protruding from the die pad 2 and creeping up to the upper surface of the semiconductor chip 1 while ensuring sufficient wetting and spreading of the die bonding material 4 over the entire back surface of the semiconductor chip 1. can do.

この構造の利点は、楔状の突起部４１を設けている場合には必要である半導体チップ１の微妙な傾き調整が不要であることである。したがってこの構造は、特に半導体チップ１の傾きを抑制する必要がある、センサー、光学チップ、特にＭＥＭＳやイメージセンサーなどに有用である。かかるセンサー等として構成する場合、半導体チップ１（光学チップ）の上面は樹脂封止せずに光が入射できるようにする。   The advantage of this structure is that the fine tilt adjustment of the semiconductor chip 1 that is necessary when the wedge-shaped protrusion 41 is provided is unnecessary. Therefore, this structure is particularly useful for sensors, optical chips, particularly MEMS and image sensors, where it is necessary to suppress the tilt of the semiconductor chip 1. When configured as such a sensor, the upper surface of the semiconductor chip 1 (optical chip) is not sealed with resin so that light can enter.

図１６は本発明の第９実施形態にかかる半導体装置の構成を示す。図１６（ａ）は同半導体装置の平面図、図１６（ｂ）は同半導体装置の一部拡大斜視図、図１６（ｃ）は同半導体装置の図１６（ａ）におけるａ−ａ’ラインでの断面図である。   FIG. 16 shows a configuration of a semiconductor device according to the ninth embodiment of the present invention. 16A is a plan view of the semiconductor device, FIG. 16B is a partially enlarged perspective view of the semiconductor device, and FIG. 16C is an aa ′ line in FIG. 16A of the semiconductor device. FIG.

この半導体装置は、上述してきたようなリードフレームを用いるのでなく、図９の半導体装置と同様の回路基板３０を用いて構成されたＢＧＡ（Ball-Grid-Arrey-Package）である。回路基板３０上に、図１２と同様の放射状の配置、形状（楔状）の突起部４１が形成されている。   This semiconductor device is a BGA (Ball-Grid-Arrey-Package) configured using a circuit board 30 similar to that of the semiconductor device of FIG. 9 instead of using the lead frame as described above. On the circuit board 30, there are formed protrusions 41 having the same radial arrangement and shape (wedge shape) as in FIG.

この半導体装置でも、突起部４１（４１Ａ，４１Ｂ）によって、ダイボンド材４の半導体チップ１の裏面全体への十分な濡れ広がりを確保しながら、ダイパッド２からのはみ出しや、半導体チップ１上面への這い上がりを防止することができる。   Also in this semiconductor device, the protrusion 41 (41A, 41B) secures sufficient wetting and spreading of the die bonding material 4 over the entire back surface of the semiconductor chip 1, while protruding from the die pad 2 and scooping up to the upper surface of the semiconductor chip 1. The rise can be prevented.

本発明によれば、半導体チップ搭載部上にダイボンドする際に、ダイボンド材の半導体チップの裏面全体への十分な濡れ広がりを確保しながら、半導体チップ搭載部からのはみ出しや半導体チップ上面への這い上がりを防止することができるので、小型、薄型化に対応した高信頼性、高耐湿性の半導体装置を実現できる。したがって、携帯電話等の電子機器の小型化、薄型化および品質の向上に有用である。   According to the present invention, when die bonding is performed on a semiconductor chip mounting portion, the die bonding material is sufficiently protruded from the semiconductor chip mounting portion and crawls onto the upper surface of the semiconductor chip while ensuring sufficient wetting and spreading over the entire back surface of the semiconductor chip. Since the rise can be prevented, a highly reliable and highly moisture-resistant semiconductor device corresponding to a small size and a thin shape can be realized. Therefore, it is useful for reducing the size, thickness, and quality of electronic devices such as mobile phones.

本発明の第１実施形態にかかる半導体装置の構成図1 is a configuration diagram of a semiconductor device according to a first embodiment of the present invention. 図１の半導体装置の製造方法の第１例を示す断面図Sectional drawing which shows the 1st example of the manufacturing method of the semiconductor device of FIG. 図２の半導体装置の製造方法における一工程の説明図Explanatory drawing of one process in the manufacturing method of the semiconductor device of FIG. 図１の半導体装置の製造方法の第２例を示す断面図Sectional drawing which shows the 2nd example of the manufacturing method of the semiconductor device of FIG. 図１の半導体装置の製造方法の第３例を示す断面図Sectional drawing which shows the 3rd example of the manufacturing method of the semiconductor device of FIG. 本発明の第２実施形態にかかる半導体装置の構成図The block diagram of the semiconductor device concerning 2nd Embodiment of this invention. 本発明の第３実施形態にかかる半導体装置の構成図The block diagram of the semiconductor device concerning 3rd Embodiment of this invention. 本発明の第４実施形態にかかる半導体装置の構成図The block diagram of the semiconductor device concerning 4th Embodiment of this invention. 本発明の第５実施形態にかかる半導体装置の構成図The block diagram of the semiconductor device concerning 5th Embodiment of this invention. 図９の半導体装置の製造方法の第１例を示す断面図Sectional drawing which shows the 1st example of the manufacturing method of the semiconductor device of FIG. 図９の半導体装置の製造方法の第２例を示す断面図Sectional drawing which shows the 2nd example of the manufacturing method of the semiconductor device of FIG. 本発明の第６実施形態にかかる半導体装置の構成図The block diagram of the semiconductor device concerning 6th Embodiment of this invention. 図１２の半導体装置の製造方法における一工程の説明図Explanatory drawing of one process in the manufacturing method of the semiconductor device of FIG. 本発明の第７実施形態にかかる半導体装置の構成図Configuration diagram of a semiconductor device according to a seventh embodiment of the present invention 本発明の第８実施形態にかかる半導体装置の構成図Schematic diagram of a semiconductor device according to an eighth embodiment of the present invention. 本発明の第９実施形態にかかる半導体装置の構成図Configuration of a semiconductor device according to a ninth embodiment of the invention 従来の半導体装置の構成図Configuration diagram of a conventional semiconductor device 図１７の半導体装置の製造方法における一工程の説明図Explanatory drawing of one process in the manufacturing method of the semiconductor device of FIG. 従来の他の半導体装置の構成図Configuration diagram of another conventional semiconductor device

符号の説明Explanation of symbols

１ 半導体チップ
1a 電極パッド
２ ダイパッド
４ ダイボンド材
５ 金属細線
６ リード
6a 内部端子
6b 外部端子
８ 封止樹脂
11 突起部
11a 円弧部
11′ 樹脂
11″ 樹脂フィルム
14 リードフレーム
17 マスク
21 突起部
21A，21B 突起部
30 回路基板
31 アイランド
32 配線
34 ボール電極
41,41A,41B 突起部
41A′,41B′ 傾斜部
51,51A,51B,51C,51D 突起部
51A′,51B′,51C′,51D′傾斜部
61,61A,61B 突起部
61A′,61B′ 傾斜部 1 Semiconductor chip
1a Electrode pad 2 Die pad 4 Die bond material 5 Metal wire 6 Lead
6a Internal terminal
6b External terminal 8 Sealing resin
11 Protrusion
11a Arc part
11 ′ resin
11 ″ resin film
14 Lead frame
17 Mask
21 Protrusion
21A, 21B Protrusion
30 Circuit board
31 island
32 Wiring
34 Ball electrode
41, 41A, 41B Protrusion
41A ′, 41B ′ Inclined part
51,51A, 51B, 51C, 51D Protrusion
51A ', 51B', 51C ', 51D' inclined part
61,61A, 61B Protrusion
61A ′, 61B ′ Inclined part

Claims (15)

半導体チップと、前記半導体チップを搭載するための半導体チップ搭載部と、前記半導体チップを半導体チップ搭載部上に固着したダイボンド材と、前記半導体チップ搭載部の外側に内部端子が配置された導体と、前記半導体チップと前記導体の内部端子とを電気的に接続した金属細線と、前記半導体チップと前記金属細線と前記導体の接続領域とを覆った封止樹脂とを有した半導体装置において、
前記半導体チップ搭載部上における半導体チップ搭載領域を画する各辺に対応する少なくとも外側領域に、前記半導体チップ搭載領域の中央部に向かう方向に凸状をなす前記半導体チップよりも低い突起部が設けられていることを特徴とする半導体装置。 A semiconductor chip, a semiconductor chip mounting portion for mounting the semiconductor chip, a die bond material in which the semiconductor chip is fixed onto the semiconductor chip mounting portion, and a conductor having an internal terminal disposed outside the semiconductor chip mounting portion. In the semiconductor device having a metal thin wire electrically connecting the semiconductor chip and the internal terminal of the conductor, and a sealing resin covering the semiconductor chip, the metal thin wire and the connection region of the conductor,
Protrusions lower than the semiconductor chip projecting in the direction toward the center of the semiconductor chip mounting area are provided in at least the outer area corresponding to each side defining the semiconductor chip mounting area on the semiconductor chip mounting area. A semiconductor device characterized in that the semiconductor device is provided. チップ搭載部は金属板よりなり、導体として、前記チップ搭載部に内部端子が対向する複数本のリードが設けられていることを特徴とする請求項１記載の半導体装置。   2. The semiconductor device according to claim 1, wherein the chip mounting portion is made of a metal plate, and a plurality of leads having internal terminals facing the chip mounting portion are provided as conductors. チップ搭載部は樹脂あるいはセラミックスを基材とする基板の表面に設けられており、前記導体として、前記チップ搭載部の外側の基板表面に内部端子を有する配線が形成されていることを特徴とする請求項１記載の半導体装置。   The chip mounting portion is provided on the surface of a substrate based on resin or ceramics, and a wiring having an internal terminal is formed on the substrate surface outside the chip mounting portion as the conductor. The semiconductor device according to claim 1. 突起部は、半導体チップ搭載領域の外側領域に形成されていて、半導体チップ側に向いた凸形部を有していることを特徴とする請求項１記載の半導体装置。   2. The semiconductor device according to claim 1, wherein the protruding portion is formed in an outer region of the semiconductor chip mounting region and has a convex portion facing the semiconductor chip side. 半導体チップが平面視で長方形であり、前記半導体チップ側に向いた突起部の凸形部が外形円弧状あるいは断面三角形であるときには、前記半導体チップの短辺に対向する凸形部の頂部が長辺に対向する凸形部の頂部よりも極率あるいは角度が小さいことを特徴とする請求項４記載の半導体装置。   When the semiconductor chip is rectangular in plan view and the convex part of the projecting part facing the semiconductor chip side has an outer circular arc shape or a triangular cross section, the top part of the convex part facing the short side of the semiconductor chip is long. 5. The semiconductor device according to claim 4, wherein the polarity or angle is smaller than that of the top of the convex portion facing the side. 半導体チップ搭載領域とその外側領域とにわたる突起部が放射状に形成されていることを特徴とする請求項１記載の半導体装置。   2. The semiconductor device according to claim 1, wherein protrusions extending between the semiconductor chip mounting region and the outer region thereof are formed radially. 突起部は、半導体チップの各辺に対応して一対ずつ形成されていることを特徴とする請求項６記載の半導体装置。   7. The semiconductor device according to claim 6, wherein a pair of protrusions are formed corresponding to each side of the semiconductor chip. 半導体チップが平面視で長方形であるときに、半導体チップの短辺に対応する各一対の突起部間の角度が長辺に対応する各一対の突起部間の角度よりも小さいことを特徴とする請求項７記載の半導体装置。   When the semiconductor chip is rectangular in plan view, the angle between each pair of protrusions corresponding to the short side of the semiconductor chip is smaller than the angle between each pair of protrusions corresponding to the long side The semiconductor device according to claim 7. 各一対の突起部は、各々の長手方向の端部に、先端に近づくにしたがって幅狭まるように傾斜部が設けられており、その傾斜方向は、先端に近づくにしたがって双方の突起部の傾斜部が互いに接近する方向であることを特徴とする請求項７記載の半導体装置。   Each pair of protrusions is provided with an inclined part at each longitudinal end so that the width thereof becomes narrower as it approaches the tip, and the inclination direction of the two protrusions approaches the tip. The semiconductor device according to claim 7, wherein the directions are close to each other. 突起部は各々、半導体チップ搭載領域内に位置する一端に向かって徐々に薄くなる楔状に形成されていることを特徴とする請求項６記載の半導体装置。   7. The semiconductor device according to claim 6, wherein each of the protrusions is formed in a wedge shape that gradually becomes thinner toward one end located in the semiconductor chip mounting region. 突起部は各々、厚みが均一であることを特徴とする請求項６記載の半導体装置。   The semiconductor device according to claim 6, wherein each of the protrusions has a uniform thickness. 請求項１記載の半導体装置の製造方法であって、
突起部を有する半導体チップ搭載部とその外側に内部端子が配置された導体とを有した半導体チップ支持体を準備する工程と、前記半導体チップ搭載部上にペースト状のダイボンド材を塗布する工程と、半導体チップを前記ダイボンド材上に載せ、押圧して、前記ダイボンド材を前記突起部により案内して前記半導体チップと前記半導体チップ搭載部との間で濡れ広げる工程と、前記ダイボンド材を硬化させて当該ダイボンド材を介して前記半導体チップを半導体チップ搭載部上に固着する工程と、前記半導体チップに形成された電極部と前記導体の内部端子とを金属細線により電気的に接続させる工程と、前記半導体チップと前記金属細線と前記導体の接続部分とを封止樹脂で覆って封止する工程とを含むことを特徴とする半導体装置の製造方法。 A method of manufacturing a semiconductor device according to claim 1,
A step of preparing a semiconductor chip support having a semiconductor chip mounting portion having a protrusion and a conductor having an internal terminal disposed outside thereof; and a step of applying a paste-like die bond material on the semiconductor chip mounting portion; A step of placing a semiconductor chip on the die bond material, pressing it, guiding the die bond material by the protrusions and spreading it between the semiconductor chip and the semiconductor chip mounting portion, and curing the die bond material. Fixing the semiconductor chip on the semiconductor chip mounting portion via the die bonding material, electrically connecting the electrode portion formed on the semiconductor chip and the internal terminal of the conductor by a thin metal wire, A step of covering the semiconductor chip, the fine metal wire, and the connection portion of the conductor with a sealing resin and sealing the semiconductor chip. Method. 半導体チップ支持体を準備する工程において、半導体チップ搭載部を金属板で構成するときには、その所定箇所にプレス加工により突起部を形成することを特徴とする請求項１２記載の半導体装置の製造方法。   13. The method of manufacturing a semiconductor device according to claim 12, wherein, in the step of preparing the semiconductor chip support, when the semiconductor chip mounting portion is made of a metal plate, a protrusion is formed at a predetermined position by press working. 半導体チップ支持体を準備する工程において、半導体チップ搭載部上の所定箇所にマスクを用いて樹脂を塗布することで突起部を形成することを特徴とする請求項１２記載の半導体装置の製造方法。   13. The method of manufacturing a semiconductor device according to claim 12, wherein in the step of preparing the semiconductor chip support, the protrusion is formed by applying a resin to a predetermined location on the semiconductor chip mounting portion using a mask. 半導体チップ支持体を準備する工程において、半導体チップ搭載部上の所定箇所に別途に個片として形成した突起部を接着することを特徴とする請求項１２記載の半導体装置の製造方法。   13. The method of manufacturing a semiconductor device according to claim 12, wherein, in the step of preparing the semiconductor chip support, a protrusion formed as a separate piece is adhered to a predetermined location on the semiconductor chip mounting portion.
JP2007022528A 2007-02-01 2007-02-01 Semiconductor device and its manufacturing process Pending JP2008192660A (en)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009064835A (en) * 2007-09-04 2009-03-26 Denso Corp Bare chip mounting structure
JP2017069401A (en) * 2015-09-30 2017-04-06 日亜化学工業株式会社 Substrate and light-emitting device, and method of manufacturing light-emitting device
KR101737053B1 (en) * 2010-12-31 2017-05-18 삼성전자주식회사 Semiconductor packages

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009064835A (en) * 2007-09-04 2009-03-26 Denso Corp Bare chip mounting structure
KR101737053B1 (en) * 2010-12-31 2017-05-18 삼성전자주식회사 Semiconductor packages
JP2017069401A (en) * 2015-09-30 2017-04-06 日亜化学工業株式会社 Substrate and light-emitting device, and method of manufacturing light-emitting device

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