JP2005252242A5 - - Google Patents
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- JP2005252242A5 JP2005252242A5 JP2005024322A JP2005024322A JP2005252242A5 JP 2005252242 A5 JP2005252242 A5 JP 2005252242A5 JP 2005024322 A JP2005024322 A JP 2005024322A JP 2005024322 A JP2005024322 A JP 2005024322A JP 2005252242 A5 JP2005252242 A5 JP 2005252242A5
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- thin film
- film integrated
- integrated circuits
- forming
- integrated circuit
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Claims (14)
前記剥離層上に複数の薄膜集積回路を形成し、
前記複数の薄膜集積回路の境界に溝を形成することにより、前記剥離層を露出させ、
前記複数の薄膜集積回路上に開口部及びアンテナが形成されたアンテナ用基板を張り合わせ、
前記開口部にハロゲン化物を含む気体又は液体を導入し、前記剥離層を除去することによって前記絶縁基板を剥離し、かつ前記アンテナ用基板により前記複数の薄膜集積回路は一体化された状態となっていることを特徴とする薄膜集積回路の作製方法。 Forming a release layer on an insulating substrate;
Forming a plurality of thin film integrated circuits on the release layer;
Forming a groove at a boundary between the plurality of thin film integrated circuits to expose the release layer;
Laminating an antenna substrate having an opening and an antenna formed on the plurality of thin film integrated circuits,
A gas or liquid containing a halide is introduced into the opening, and the peeling layer is removed to peel off the insulating substrate, and the plurality of thin film integrated circuits are integrated by the antenna substrate. A method for manufacturing a thin film integrated circuit.
前記剥離層上に複数の薄膜集積回路を形成し、
前記複数の薄膜集積回路の境界に溝を形成することにより、前記剥離層を露出させ、
前記複数の薄膜集積回路上に開口部及びアンテナが形成されたアンテナ用基板を張り合わせ、
前記開口部にハロゲン化物を含む気体又は液体を導入し、前記剥離層を除去することによって前記絶縁基板を剥離し、かつ前記アンテナ用基板により前記複数の薄膜集積回路は一体化された状態となり、一体化された前記複数の薄膜集積回路をフレキシブル基板へ接着することを特徴とする薄膜集積回路の作製方法。 Forming a release layer on an insulating substrate;
Forming a plurality of thin film integrated circuits on the release layer;
Forming a groove at a boundary between the plurality of thin film integrated circuits to expose the release layer;
Laminating an antenna substrate having an opening and an antenna formed on the plurality of thin film integrated circuits,
A gas or liquid containing a halide is introduced into the opening, the insulating substrate is peeled by removing the peeling layer, and the plurality of thin film integrated circuits are integrated by the antenna substrate, A method for manufacturing a thin film integrated circuit, wherein the plurality of integrated thin film integrated circuits are bonded to a flexible substrate.
前記剥離層上に複数の薄膜集積回路を形成し、
前記複数の薄膜集積回路の境界に溝を選択的に形成することにより、前記剥離層の一部を露出させ、かつ前記薄膜集積回路の一部からなる接続領域を形成し、
前記溝にハロゲン化物を含む気体又は液体を導入し、前記剥離層を除去することによって前記絶縁基板を剥離し、かつ前記接続領域により前記複数の薄膜集積回路は一体化された状態となっていることを特徴とする薄膜集積回路の作製方法。 Forming a release layer on an insulating substrate;
Forming a plurality of thin film integrated circuits on the release layer;
By selectively forming a groove at a boundary between the plurality of thin film integrated circuits, exposing a part of the peeling layer and forming a connection region including a part of the thin film integrated circuit;
The insulating substrate is peeled by introducing a gas or liquid containing a halide into the groove, and the peeling layer is removed, and the plurality of thin film integrated circuits are integrated by the connection region. A method for manufacturing a thin film integrated circuit.
前記剥離層上に複数の薄膜集積回路を形成し、
前記複数の薄膜集積回路の境界に溝を選択的に形成することにより、前記剥離層の一部を露出させ、かつ前記薄膜集積回路の一部からなる接続領域を形成し、
前記溝にハロゲン化物を含む気体又は液体を導入し、前記剥離層を除去することによって前記絶縁基板を剥離し、かつ前記接続領域により前記複数の薄膜集積回路は一体化された状態となり、一体化された前記薄膜集積回路にアンテナを張り合わせることを特徴とする薄膜集積回路の作製方法。 Forming a release layer on an insulating substrate;
Forming a plurality of thin film integrated circuits on the release layer;
By selectively forming a groove at a boundary between the plurality of thin film integrated circuits, exposing a part of the peeling layer and forming a connection region including a part of the thin film integrated circuit;
A gas or liquid containing a halide is introduced into the groove, and the insulating layer is peeled off by removing the peeling layer, and the plurality of thin film integrated circuits are integrated by the connection region. A method for manufacturing a thin film integrated circuit, wherein an antenna is attached to the thin film integrated circuit.
前記剥離層上に複数の薄膜集積回路を形成し、
前記複数の薄膜集積回路の境界に溝を選択的に形成することにより、前記剥離層の一部を露出させ、かつ前記薄膜集積回路の一部からなる接続領域を形成し、
前記溝にハロゲン化物を含む気体又は液体を導入し、前記剥離層を除去することによって前記絶縁基板を剥離し、かつ前記接続領域により前記複数の薄膜集積回路は一体化された状態となり、一体化された前記複数の薄膜集積回路をフレキシブル基板へ接着し、一体化された前記薄膜集積回路上にアンテナを張り合わせることを特徴とする薄膜集積回路の作製方法。 Forming a release layer on an insulating substrate;
Forming a plurality of thin film integrated circuits on the release layer;
By selectively forming a groove at a boundary between the plurality of thin film integrated circuits, exposing a part of the peeling layer and forming a connection region including a part of the thin film integrated circuit;
A gas or liquid containing a halide is introduced into the groove, and the insulating layer is peeled off by removing the peeling layer, and the plurality of thin film integrated circuits are integrated by the connection region. A method for manufacturing a thin film integrated circuit, comprising: bonding the plurality of thin film integrated circuits to a flexible substrate, and attaching an antenna on the integrated thin film integrated circuit.
前記剥離層上に複数の薄膜集積回路を形成し、
前記複数の薄膜集積回路の境界に溝を選択的に形成することにより、前記剥離層の一部を露出させ、かつ前記薄膜集積回路の一部からなる接続領域を形成し、
前記複数の薄膜集積回路上に開口部及びアンテナが形成されたアンテナ用基板を張り合わせ、前記溝及び前記開口部にハロゲン化物を含む気体又は液体を導入し、前記剥離層を除去することによって前記絶縁基板を剥離し、かつ前記アンテナ用基板により前記複数の薄膜集積回路は一体化された状態となっていることを特徴とする薄膜集積回路の作製方法。 Forming a release layer on an insulating substrate;
Forming a plurality of thin film integrated circuits on the release layer;
By selectively forming a groove at a boundary between the plurality of thin film integrated circuits, exposing a part of the peeling layer and forming a connection region including a part of the thin film integrated circuit;
The insulating substrate is formed by laminating an antenna substrate having an opening and an antenna formed on the plurality of thin film integrated circuits, introducing a gas or liquid containing a halide into the groove and the opening, and removing the release layer. A method for manufacturing a thin film integrated circuit, wherein the substrate is peeled off and the plurality of thin film integrated circuits are integrated by the antenna substrate.
前記ハロゲン化物として、ClF3を用いることを特徴とする薄膜集積回路の作製方法。 In any one of Claims 1 thru | or 6 ,
A method for manufacturing a thin film integrated circuit, wherein ClF 3 is used as the halide.
異方性導電体、又は紫外線硬化樹脂を用いて前記薄膜集積回路にアンテナを張り合わせることを特徴とする薄膜集積回路の作製方法。 In any one of Claims 1, 2, 4 thru | or 7 ,
Anisotropic conductor, or a method for manufacturing a thin film integrated circuit, characterized in that laminating the antenna to the thin film integrated circuit by using an ultraviolet curable resin.
前記アンテナは、液滴吐出法、印刷法、フォトリソグラフィー法及びメタルマスクを用いた蒸着法のいずれか、又はそれらを組み合わせた方法により形成することを特徴とする薄膜集積回路の作製方法。 In any one of claims 1, 2, 4 to 8 ,
The antenna, a droplet discharge method, printing method, off O preparative lithography and any of an evaporation method using a metal mask, or a method for manufacturing a thin film integrated circuit and forming a combined method thereof .
前記剥離層は珪素を有する非晶質半導体、セミアモルファス半導体、微結晶半導体、及び結晶性半導体のいずれかを有することを特徴とする薄膜集積回路の作製方法。 In any one of Claims 1 thru | or 9 ,
The method for manufacturing a thin film integrated circuit, wherein the peeling layer includes any one of an amorphous semiconductor containing silicon, a semi-amorphous semiconductor, a microcrystalline semiconductor, and a crystalline semiconductor.
前記複数の薄膜集積回路はそれぞれソース領域、ドレイン領域、及びチャネル形成領域を有する半導体膜を有し、
前記ソース領域、ドレイン領域、及びチャネル形成領域は、実装物品を曲げる方向に対して垂直となるように形成することを特徴とする薄膜集積回路の作製方法。 In any one of Claims 1 thru | or 10 ,
Wherein the plurality of thin film integrated circuits are source regions, respectively, the drain region, and has a semiconductor film to have a channel forming region,
The method for manufacturing a thin film integrated circuit, wherein the source region, the drain region, and the channel formation region are formed so as to be perpendicular to a direction in which the mounting article is bent.
スクライビング、又はレーザカット法により、前記複数の薄膜集積回路を切断し、各薄膜集積回路を形成することを特徴とする薄膜集積回路の作製方法。 In any one of Claims 1 thru | or 11 ,
Scan Kuraibingu or by a laser cutting method, cutting the plurality of thin film integrated circuit, a method for manufacturing a thin film integrated circuit, characterized in that forming each thin film integrated circuit.
前記アンテナ用基板は、アンテナ及び開口部を有し、前記開口部と一致するように、前記薄膜集積回路間に溝が設けられていることを特徴とする薄膜集積回路用素子基板。 An insulating substrate on which a plurality of thin film integrated circuits are formed via a release layer; and an antenna substrate provided to face the insulating substrate;
The element substrate for a thin film integrated circuit , wherein the antenna substrate has an antenna and an opening, and a groove is provided between the thin film integrated circuits so as to coincide with the opening.
前記アンテナ用基板は、アンテナ及び開口部を有し、前記開口部と一致するように、前記薄膜集積回路間に溝が設けられ、かつ前記薄膜集積回路内に開口部が設けられていることを特徴とする薄膜集積回路用素子基板。
An insulating substrate on which a plurality of thin film integrated circuits are formed via a release layer, and the plurality of thin film integrated circuits are integrated by a connection region, and an antenna substrate provided opposite to the insulating substrate. Have
The antenna substrate has an antenna and an opening, a groove is provided between the thin film integrated circuits so as to coincide with the opening, and an opening is provided in the thin film integrated circuit. An element substrate for a thin film integrated circuit .
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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JP2005024322A JP4836465B2 (en) | 2004-02-06 | 2005-01-31 | Method for manufacturing thin film integrated circuit and element substrate for thin film integrated circuit |
Applications Claiming Priority (3)
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JP2004031064 | 2004-02-06 | ||
JP2004031064 | 2004-02-06 | ||
JP2005024322A JP4836465B2 (en) | 2004-02-06 | 2005-01-31 | Method for manufacturing thin film integrated circuit and element substrate for thin film integrated circuit |
Publications (3)
Publication Number | Publication Date |
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JP2005252242A JP2005252242A (en) | 2005-09-15 |
JP2005252242A5 true JP2005252242A5 (en) | 2008-01-17 |
JP4836465B2 JP4836465B2 (en) | 2011-12-14 |
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JP2005024322A Expired - Fee Related JP4836465B2 (en) | 2004-02-06 | 2005-01-31 | Method for manufacturing thin film integrated circuit and element substrate for thin film integrated circuit |
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Families Citing this family (12)
Publication number | Priority date | Publication date | Assignee | Title |
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WO2006043685A1 (en) * | 2004-10-19 | 2006-04-27 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device having antenna and method for manufacturing thereof |
WO2007043285A1 (en) | 2005-09-30 | 2007-04-19 | Semiconductor Energy Laboratory Co., Ltd. | Manufacturing method of semiconductor device |
JP5063066B2 (en) * | 2005-09-30 | 2012-10-31 | 株式会社半導体エネルギー研究所 | Method for manufacturing semiconductor device |
JP2007128433A (en) * | 2005-11-07 | 2007-05-24 | Philtech Inc | Rf powder and its manufacturing method |
JP5132135B2 (en) * | 2005-12-02 | 2013-01-30 | 株式会社半導体エネルギー研究所 | Method for manufacturing semiconductor device |
KR101319468B1 (en) * | 2005-12-02 | 2013-10-30 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | Manufacturing method of semiconductor device |
JP2007241999A (en) * | 2006-02-08 | 2007-09-20 | Semiconductor Energy Lab Co Ltd | Semiconductor device |
CN101400599B (en) | 2006-03-10 | 2010-12-01 | 松下电器产业株式会社 | Method for mounting anisotropically-shaped member |
US8154456B2 (en) | 2008-05-22 | 2012-04-10 | Philtech Inc. | RF powder-containing base |
US8188924B2 (en) | 2008-05-22 | 2012-05-29 | Philtech Inc. | RF powder and method for manufacturing the same |
JP5006429B2 (en) * | 2010-06-11 | 2012-08-22 | トレックス・セミコンダクター株式会社 | Semiconductor sensor device and manufacturing method thereof |
JP6582134B2 (en) * | 2016-07-28 | 2019-09-25 | 株式会社日立システムズ | Rotating atomizing head, rotating atomizing head management system, and rotating atomizing head management method |
Family Cites Families (4)
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JP4748859B2 (en) * | 2000-01-17 | 2011-08-17 | 株式会社半導体エネルギー研究所 | Method for manufacturing light emitting device |
JP2002353235A (en) * | 2001-05-23 | 2002-12-06 | Matsushita Electric Ind Co Ltd | Active matrix substrate, display using the same, and its manufacturing method |
EP2565924B1 (en) * | 2001-07-24 | 2018-01-10 | Samsung Electronics Co., Ltd. | Transfer method |
JP2003318133A (en) * | 2002-04-22 | 2003-11-07 | Seiko Epson Corp | Forming method for film pattern, film pattern forming device, conductive film wiring method, mount structure of semiconductor chip, semiconductor apparatus, light emission device, electronic optical apparatus, electronic apparatus, and non-contact card medium |
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