CN101840885B - Method of manufacturing electronic device and display - Google Patents
Method of manufacturing electronic device and display Download PDFInfo
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- CN101840885B CN101840885B CN2010101349666A CN201010134966A CN101840885B CN 101840885 B CN101840885 B CN 101840885B CN 2010101349666 A CN2010101349666 A CN 2010101349666A CN 201010134966 A CN201010134966 A CN 201010134966A CN 101840885 B CN101840885 B CN 101840885B
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- electronic device
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- sacrifice layer
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
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- H—ELECTRICITY
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- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
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- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
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- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1218—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or structure of the substrate
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- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/1262—Multistep manufacturing methods with a particular formation, treatment or coating of the substrate
- H01L27/1266—Multistep manufacturing methods with a particular formation, treatment or coating of the substrate the substrate on which the devices are formed not being the final device substrate, e.g. using a temporary substrate
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- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
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- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/1201—Manufacture or treatment
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- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
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- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
- H10K71/80—Manufacture or treatment specially adapted for the organic devices covered by this subclass using temporary substrates
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- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68318—Auxiliary support including means facilitating the separation of a device or wafer from the auxiliary support
- H01L2221/68322—Auxiliary support including means facilitating the selective separation of some of a plurality of devices from the auxiliary support
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- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68354—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used to support diced chips prior to mounting
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- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68368—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used in a transfer process involving at least two transfer steps, i.e. including an intermediate handle substrate
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- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
- H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
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- H01L2224/95001—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips involving a temporary auxiliary member not forming part of the bonding apparatus, e.g. removable or sacrificial coating, film or substrate
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- H01L2224/95143—Passive alignment, i.e. self alignment, e.g. using surface energy, chemical reactions, thermal equilibrium
- H01L2224/95146—Passive alignment, i.e. self alignment, e.g. using surface energy, chemical reactions, thermal equilibrium by surface tension
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- H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
Abstract
A method of manufacturing an electronic device includes the steps of: forming a sacrifice layer made of at least one of an alkali metal oxide and an alkali earth metal oxide in a part of a first substrate; forming a supporting layer covering the sacrifice layer; forming an electronic device on the sacrifice layer with the supporting layer in between; exposing at least a part of a side face of the sacrifice layer by removing a part of the supporting layer; forming a support body between the electronic device and the supporting layer, and a surface of the first substrate; removing the sacrifice layer; breaking the support body and transferring the electronic device onto a second substrate by bringing the electronic device into close contact with an adhesion layer provided on a surface of the second substrate; removing a fragment of the support body belonging to the electronic device; removing at least an exposed region in the adhesion layer not covered with the electronic device; and forming a fixing layer on a surface of the electronic device and the surface of the second substrate.
Description
The reference of correlation technique
The application is included in disclosed related subject among the Japanese priority patent application JP 2009-068774 that submitted to Japan Office on March 19th, 2009, and its full content is hereby expressly incorporated by reference.
Technical field
The present invention relates to a kind of method of using transfer technique to make electronic device, and the display that comprises the electronic device of this transfer printing.
Background technology
In recent years, but the development in what is called printed electronic field is remarkable.For such development, by making electronic component with printing process and nano-imprinting method, reduced by all using the cost of the expensive electronic building brick of semiconductor fabrication manufacturing, by with replacement substrates such as films, provide flexible apparatus.Therefore, active development goes out material and printing technology such as organic semiconductor and nano metal ink.Although reached reduction and the K cryogenic treatment of cost, had to sacrifice reliability and performance as the problem of cost.
Simultaneously, in the twentieth century later stage nineties, made the active-matrix substrate that uses transfer technique.For example; in No. the 3447619th, Japan Patent, disclosed after glass substrate forms etch stop layer and formed TFT (thin-film transistor) element; covering the TFT element with interposer (interconnection substrate) to protect it to avoid under the etched condition for the etching solution of glass substrate, etching is also removed glass substrate fully.By optionally being transferred on another substrate from interposer, produce final product.
In No. the 3809710th, Japan Patent, form hydrogenated amorphous silicon layer etc. at glass substrate, and at formation TFT elements such as hydrogenated amorphous silicon layers.The TFT element is fixed on the substrate of wanting transfer printing with adhesive, laser is from carrying on the back surface irradiation TFT element to heat.Along with the increase of the pressure of the hydrogen that separates, the TFT element will strip down from glass substrate.
Summary of the invention
Yet, in these existing methods, in the step after transfer printing, owing to consist of the thermal deformation of the resin of adhesion layer, thus there is the deteriorated problem of positional precision of the TFT element of institute's transfer printing.
In view of above-mentioned reason, be desirable to provide manufacture method and the display of the deteriorated electronic device of the positional precision of the electronic device that suppresses transfer printing.
According to the embodiment of the present invention, provide a kind of method of making electronic device, may further comprise the steps (A) to (J):
(A) part at first substrate forms by at least a sacrifice layer that consists of in alkali metal oxide and the alkaline earth oxide;
(B) form the supporting layer that covers sacrifice layer;
(C) form electronic device at sacrifice layer, wherein between sacrifice layer and electronic device, have supporting layer;
(D) by removing the part of supporting layer, expose at least a portion of the side of sacrifice layer;
(E) between the surface of electronic device and supporting layer and first substrate, form supporter;
(F) remove sacrifice layer;
(G) by making electronic device and being arranged on the lip-deep adhesion layer close contact of second substrate, break supporter and electronic device is transferred on the second substrate;
(H) remove the fragment of the supporter that belongs to electronic device;
(I) remove at least the exposed region that in adhesion layer, is not covered by electronic device; And
(J) form fixed bed on the surface of electronic device and the surface of second substrate.
According to the embodiment of the present invention, provide a kind of display, it comprises following element (A) to (F):
(A) second substrate;
(B) be configured in electronic device on the second substrate;
(C) supporting layer that forms at upper surface or the lower surface of electronic device;
(D) fixed bed that forms on the surface of the surface of electronic device and second substrate;
(E) distribution, its by be arranged in the fixed bed contact hole or by being arranged on the contact hole in fixed bed and the supporting layer, be connected with electronic device; And
(F) display element that forms at electronic device and distribution wherein has interlayer dielectric between electronic device and distribution and display element.
In the display according to embodiment of the present invention, dispose electronic device at second substrate, and form fixed bed on the surface of electronic device and the surface of second substrate.Therefore, by fixed bed, electronic device directly is fixed on the second substrate, and can suppresses the deteriorated of positional precision.
Manufacturing electronic device method according to the embodiment of the present invention, after being transferred to electronic device on the second substrate, remove the fragment of the supporter that belongs to electronic device, at least remove the exposed region that in adhesion layer, does not have the overlay electronic device, and form fixed bed on the surface of electronic device and the surface of second substrate.Positional precision deteriorated that therefore, can suppress the transfer printing electronic device.
Display according to the embodiment of the present invention disposes electronic device at second substrate, and forms fixed bed on the surface of electronic device and the surface of second substrate.Positional precision deteriorated that therefore, can suppress the transfer printing electronic device.
Other will become more apparent in the following detailed description with further purpose, feature and advantage the present invention.
Description of drawings
Fig. 1 shows the flow chart according to the manufacture method of the electronic device of first embodiment of the invention.
Fig. 2 A to Fig. 2 E is the sectional view that shows manufacture method shown in Figure 1 according to the order of step.
Fig. 3 shows sectional view and the plane graph of the step after Fig. 2 A to Fig. 2 E.
Fig. 4 shows sectional view and the plane graph of the step after Fig. 3.
Fig. 5 is the sectional view for the structure of explanation supporter.
Fig. 6 A to Fig. 6 D shows the sectional view of the step after Fig. 4.
Fig. 7 is the diagram for the application example of the manufacture method shown in key diagram 6A to Fig. 6 D.
Fig. 8 shows the sectional view of the modification of Fig. 4.
Fig. 9 shows the sectional view of another modification of Fig. 4.
Figure 10 A to Figure 10 C shows the sectional view of the step after Fig. 6 A to Fig. 6 D.
Figure 11 A to Figure 11 C shows the sectional view of the step after Figure 10 A to Figure 10 C.
Figure 12 shows the flow chart according to the flow process of the manufacture method of the electronic device of second embodiment of the invention.
Figure 13 A to Figure 13 D is the sectional view that shows manufacture method shown in Figure 12 according to step order.
Figure 14 A to Figure 14 C shows the sectional view of the step after Figure 13 A to Figure 13 D.
Figure 15 shows the flow chart according to the flow process of the manufacture method of the electronic device of third embodiment of the invention.
Figure 16 A and Figure 16 B are the sectional views that shows manufacture method shown in Figure 15 according to step order.
Figure 17 shows sectional view and the plane graph of the step after Figure 16 A and Figure 16 B.
Figure 18 shows sectional view and the plane graph of the step after Figure 17.
Figure 19 shows the sectional view of another example of electronic device.
Figure 20 shows the sectional view of the another example of electronic device.
Figure 21 shows the sectional view of the another example of electronic device.
Figure 22 shows the sectional view of the example of electronic device group.
Figure 23 A and Figure 23 B show sectional view and the plane graph of another example of electronic device group.
Figure 24 shows the plane graph of the another example of electronic device group.
Figure 25 is the plane graph that the mode of amplifying shows the part of the electronic device group shown in Figure 24.
Figure 26 shows the equivalent circuit diagram of the electronic device group shown in Figure 25.
Figure 27 shows the sectional view of the structure of having used liquid crystal display of the present invention.
Figure 28 is the diagram that electronic device is fixed on the example of the additional fixing means on the second substrate for explanation.
Figure 29 is the diagram that electronic device is fixed on another example of the additional fixing means on the second substrate for explanation.
Figure 30 is the diagram that electronic device is fixed on the another example of the additional fixing means on the second substrate for explanation.
Embodiment
Describe below with reference to accompanying drawings embodiments of the present invention in detail.To be described in the following order:
1. the first execution mode (example that adhesion layer is completely removed)
2. the second execution mode (only the exposed region of adhesion layer be removed example)
3. the 3rd execution mode (supporting layer and supporter form the example of the layer that separates)
4. the first application example (electronic device)
5. the second application example (electronic device group)
6. the 3rd application example (display)
7. the first modification example of fixing means (additional)
1. the first execution mode
Fig. 1 shows the indicative flowchart according to the manufacture method of the electronic device of first embodiment of the invention.Fig. 2 A to Fig. 2 E, Fig. 3, Fig. 4, Fig. 5, Fig. 6 A to Fig. 6 D, Fig. 7, Fig. 8, Fig. 9, Figure 10 A to Figure 10 C and Figure 11 A to Figure 11 C show this manufacture method according to the order of step.At first, shown in Fig. 2 A, form by at least a sacrifice layer 12 (step S101) of making in alkali metal oxide and the alkaline earth oxide at first substrate 11.
Particularly, the example of alkali metal oxide, alkali carbonate, alkali metal sulfates or alkali metal hydroxide comprises: lithia (Li
2O), lithium carbonate (Li
2CO
3), sodium carbonate (soda) (Na
2CO
3), SODIUM PERCARBONATE (Na
2CO
4), sodium dithionite (Na
2S
2O
4), sodium sulfite (Na
2SO
3), sodium hydrogensulfite (NaHSO
3), sodium sulphate (saltcake) (Na
2SO
4), sodium thiosulfate (hypo) (Na
2S
2O
3), natrium nitrosum (NaNO
2), sodium nitrate (NaNO
3), potassium nitrate (KNO
3), potassium nitrite (KNO
2), potassium sulfite (K
2SO
3), potassium sulfate (K
2SO
4), potash (K
2CO
3), saleratus (KHCO
3) and potassium percarbonate (K
2CO
4).
The example of alkaline earth oxide, alkaline earth metal carbonate, alkali earth metal sulfate or alkaline earth metal hydroxide comprises: beryllium oxide (BeO), magnesium sulfate (MgSO
4), magnesium oxide (MgO), magnesium carbonate (MgCO
3), magnesium sulfate (CaSO
4), calcium carbonate (CaCO
3), calcium oxide (CaO), calcium hydroxide (Ca (OH)
2), strontium oxide strontia (SrO), strontium titanates (SrTiO
3), strontium chromate (SrCrO
4), strontianite (SrCO
3Strontium carbonate), celestine (SrSO
4Strontium sulfate), strontium nitrate (Sr (NO
3)
2), barium peroxide (BaO
2), barium monoxide (BaO), barium hydroxide (Ba (OH)
2), barium titanate (BaTiO
3), barium sulfate (BaSO
4), brium carbonate (BaCO
3), barium acetate (Ba (CH
3COO)
2) and barium chromate (BaCrO
4).
Next, shown in Fig. 2 B, form the etchant resist that does not illustrate in the drawings at sacrifice layer 12, and by using photoetching that the etchant resist patterning is formed reservation shape (step S102).Then, carry out etching by utilizing etchant resist as mask, remove the part of sacrifice layer 12, thereby sacrifice layer 12 patternings are formed reservation shape (step S103).Thereby, form sacrifice layer in the part (will form the zone of electronic device) of first substrate 11.
Next, shown in Fig. 2 C, form supporting layer 13 (step S104) on the whole surface of first substrate 11.In supporting layer 13, the hardness of formed part and thickness are enough to bear stress distribution in the layer of electronic device 14 described later and indeformable on the upper surface of sacrifice layer 12.Simultaneously, being desirably in the part that forms on the side of sacrifice layer 12 is breakable in transfer step described later.Supporting layer 13 also can be used as diaphragm; thereby described later sacrifice layer 12 is carried out can not damaging electronic device etched the time; and supporting layer 13 preferably is made of the material of the solution of the sacrifice layer 12 that is insoluble to the etching above-mentioned material, perhaps is made of the material with about rate of etch below 1/5.In addition, need to not form supporting layer 13 on the whole surface of first substrate 11, if but supporting layer 13 to cover at least sacrifice layer 12 just enough.
Such supporting layer 13 has for example thickness of 10nm to 100000nm (comprising two end values), and is made of oxide, nitride, metal or resin.The example of oxide comprises SiO
2, Al
2O
3, ZnO, NiO, SnO
2, TiO
2, VO
2And In
2O
3The example of nitride comprises SiNx, GaN, InN, TiN, BN, AlN and ZrN.The example of metal comprises Au, Ag, Pt, Cu, Cr, Ni, Al, Fe and Ta.Other examples of metal comprise the Al-Nd alloy that has added impurity, and AlSi.The example of resin comprises acrylic resin, epoxy resin and polyimide resin.
Then, shown in Fig. 2 D, form electronic device 14 at sacrifice layer 12, supporting layer 13 is arranged on sacrifice layer 12 and electronic device 14 middle (S105).Therefore, can eliminate when removing sacrifice layer 12, etching causes the risk of damage to electronic device 14.Although in Fig. 2 A to Fig. 2 E, Fig. 3 and Fig. 4, omitted the description to concrete structure, but electronic device 14 can be TFT, capacitor, resistor, distribution, transparency electrode, EL (electroluminescence) element, colour filter, optical element etc., as long as it is the electronic device with desired function.
Shown in Fig. 2 E, after forming electronic device 14, form protective layer 15 (step S106) at electronic device 14.The thickness of protective layer 15 for example is 10nm to 100000nm (comprising two end values), and this protective layer 15 is made of oxide, nitride or resin.The example of oxide comprises SiO
2, Al
2O
3, ZnO, NiO, SnO
2, TiO
2, VO
2And In
2O
3The example of nitride comprises SiNx, GaN, InN, TiN, BN, AlN and ZrN.The example of resin comprises acrylic resin, epoxy resin and polyimide resin.
After forming protective layer 15, form not shown etchant resist at protective layer 15, by using photoetching the etchant resist patterning is formed reservation shape (step S107).As shown in Figure 3, etchant resist as mask, by dry etching or wet etching, is removed the part of protective layer 15 and the part of supporting layer 13, thereby with at least a portion of the side of sacrifice layer 12 come out (step S108).At this moment, leave the part of supporting layer 13 in the side of sacrifice layer 12, thereby formed supporter 13B described later.
As shown in Figure 4, after exposing partial sacrifice layer 12, by using etching sacrifice layer 12 is removed (step S109).Thereby, formed transfer printing electronic device substrate 10.
In transfer printing electronic device substrate 10, supporting layer 13 all comprises supporter 13B in the both sides of body 13A.Upper surface at body 13A forms electronic device 14.Owing to removed sacrifice layer 12, have the gap between the surface of body 13A and first substrate 11, thereby the support by supporter 13B so that the electronic device 14 on body 13A and the body 13A be suspended in the air.
For the ease of transfer printing electronic device 14, the shape condition of supporting layer 13 is as follows.As shown in Figure 5, by the support of supporter 13B, electronic device 14 is suspended in the aerial of first substrate 11 tops.At this moment, preferably, the inclination angle " a " that forms between supporter 13B and the electronic device 14 is approximately 90 ° to 150 ° (comprising two end values).Thereby, with supporter 13B be level or compare near the situation of level, when transfer printing electronic device 14, stress just concentrates on the bend of supporter 13B, thereby can preferentially break bend.
The width of expectation supporter 13B is below 1: 1 with the ratio of the width of electronic device 14.In this case, by with larger density configuration electronic device 14, can aspect productivity ratio, obtain higher effect.
In addition, as the transfer printing condition, formula 1 is set up in expectation, wherein, σ (D2) is the adhesion stress between electronic device 14 and the second substrate 21, and A (D2) is adhered area, σ (sus) is the crushing stress of the material of supporter 13B, " w (sus) " is the width of supporter 13B, and " t (sus) " is the thickness of supporter 13B, and " n " is the quantity for the supporter 13B of an electronic device 14.
(D2)×A(D2)＞σ(sus)×w(sus)×t(sus)×n
As shown in Figure 6A, after removing sacrifice layer 12, prepare the interposer 31 of being made by glass or resin molding, and formed the adhesion layer 32 that comprises lug boss 32C on the surface of interposer 31.Can pass through depositing silicon rubber (for example, PDMS) forms adhesion layer 32, also can form adhesion layer 32 by the adhesive that those adhesion strengths of deposition used the ultraviolet ray irradiation to reduce.
Then, make lug boss 32C in the adhesion layer 32 of interposer 31 and electronic device 14 close contacts on the first substrate 11, and first substrate 11 is separated.As shown in Figure 6A, only optionally will be transferred to (step S501) on the interposer 31 with the contacted electronic device 14 of lug boss 32C.
Shown in Fig. 6 B, after optionally being transferred to electronic device 14 on the interposer 31, preparation second substrate 21, and at the surface of second substrate 21 formation adhesion layer 22 (step S201).Second substrate 21 can freely be selected from silicon (Si), synthetic quartz, glass, metal, resin molding, paper etc.This is because transfer step mainly is mechanical step, is not subjected to the restriction of light and heat.
Next, shown in Fig. 6 B, make the electronic device 14 on the interposer 31 and be arranged on second substrate 21 lip-deep adhesion layer 22 close contacts.Then, shown in Fig. 6 C, after interposer 31 was separated, electronic device 14 was transferred to (step S301) on the second substrate 21 from interposer 31.Be in the situation about being made by silicon rubber at the adhesion layer 32 on the interposer 31, because electronic device 14 is in temporary bonding to the state of interposer 31, so electronic device 14 is transferred on the second substrate 21 easily.Be in the situation about being made by the resin that adhesion strength reduces because of ultraviolet ray irradiation at the adhesion layer 32 on the interposer 31, need to applying transfer printing electronic device 14 ultraviolet the time.
In the same manner described above, optionally and repeatedly transfer printing stay electronic device 14 on the first substrate 11.After extracting all electronic devices 14, remove unwanted assembly in the first substrate 11 by etching, can reuse first substrate 11.First substrate 11 can be represented by formula 2 by reusable number of times.
With this selectivity transfer printing, for example can carry out at the application example shown in Fig. 7.That is to say that at first, to shown in the C part, independently substrate 11A, 11B and 11C form TFT, capacitor Cs and light receiving element PD as electronic device 14 at three of first substrate respectively such as the A among Fig. 7 part.Next, shown in the part of the D among Fig. 7, select in the transfer step TFT to be transferred on the second substrate 21 from first substrate 11A first.Then, shown in the part of the E among Fig. 7, select also capacitor Cs to be transferred on the second substrate 21 from first substrate 11B in the transfer step second.Then, shown in the part of the F among Fig. 7, select again light receiving element PD to be transferred on the second substrate 21 from first substrate 11C in the transfer step the 3rd.Shown in the G among Fig. 7 part, after transfer printing light receiving element PD optionally, between the light receiving element PD of the capacitor Cs of the TFT of transfer printing, transfer printing and transfer printing, form distribution W.The step of distribution will be described later.
In this application example, form TFT, capacitor Cs and light receiving element PD at first substrate 11A to 11C independently, therefore can realize the high-performance of each element.Usually, form TFT, capacitor Cs and light receiving element PD at same substrate, and consider manufacture process, part layer shares.Therefore, existence need to deviate from the situation that the performance of expectation designs according to each element.First substrate 11A to 11C can be by making such as the various materials of synthetic quartz, silicon (Si) and wafer.The range of choice that is used for the material of second substrate 21 increases in the mode identical with the first execution mode.Owing to can on first substrate 11, dispose to high-density electronic device 14, therefore can reduce the quantity of material of removing by etching etc., and can realize effective utilization.Therefore, can realize high production rate, and not need the multiaspect manufacturing.
In addition, electronic device 14 repeatedly is transferred to than on the large second substrate 21 of first substrate 11, thereby can realizes the device manufacturing of large substrates.To form step be essential although large substrates is used transfer device and distribution, do not need the TFT manufacturing step of large substrates, thereby possess such advantage: suppressed widely the equipment investment at initial stage.
Shown in Fig. 6 D, after electronic device 14 is transferred to second substrate 21, can be by using such as CF
4The dry etching of fluoridizing etching gas remove the fragment (step S701) of the supporter 13B that belongs to electronic device 14, only keep body 13A.
When removing supporter 13B, because whole second substrate 21 all is exposed to etching gas, need to prevent as far as possible that the part except supporter 13B is etched.Therefore, as shown in Figure 8, compare with the thickness T 13B of supporter 13B, expectation fully increases the thickness T 15 of diaphragm 15.Alternatively, as shown in Figure 9, be desirably in and form etch stop layer 16 on the protective layer 15.In situation shown in Figure 9, the supporting layer 13 that comprises supporter 13B is by such as SiO
2Make with the oxide of SiNx, carry out dry etching at this oxide, and etch stop layer 16 is made by the material with high resistance etching such as metal.Particularly, the example of this material comprises titanium (Ti), chromium (Cr), molybdenum (Mo) or aluminium (Al).
Shown in Figure 10 A, after removing supporter 13B, contain aerobic by use and carry out ashing (ashing) as the plasma P of main component, the resin that consists of adhesion layer 22 is decomposed, thereby adhesion layer 22 is removed (step S702).By removing adhesion layer 22, when the structure that forms after a while such as distribution, just can suppress the deteriorated of the positional precision that caused by the thermal deformation of the resin that consists of adhesion layer 22.
When ashing, use the low condition of etching anisotropy.For example, by using the RF plasma device, second substrate 21 is configured on the anode, and has used the anode coupled mode that reduces the bias plasma of second substrate 21.Therefore, shown in Figure 10 B, the adhesion layer 22 below electronic device 14 isotropically decomposes gradually.At last, shown in Figure 10 C, whole adhesion layer 22 is removed, and realized that body 13A and second substrate 21 in the supporting layer 13 are in direct contact with one another.
Shown in Figure 11 A, after removing adhesion layer 22, by for example using the CVD method on the surface of electronic device 14 and protective layer 15 and the surface of second substrate 21 forms fixed bed 26 (step S703).In the state shown in Figure 10 C, electronic device 14 is not fixed on the second substrate 21, and only by electrostatic force or Van der Waals force (Van derWaals ' force) and second substrate 21 close contacts.Yet, by fixed bed 26, electronic device 14 can be fixed on the second substrate 21 definitely.Expectation fixed bed 26 is the continuous films that are made of thermal resistance height and the large material of Young's modulus, thereby suppresses the position movement of the electronic device 14 that causes owing to subsequently heating steps.Particularly, fixed bed 26 has for example thickness of 10nm to 500nm (comprising two end values), and by SiO
2Or SiNx consists of.
Shown in Figure 11 B, after forming fixed bed 26, for example by using etching, contact hole TH (step S704) is set in fixed bed 26 and protective layer 15.Contact hole TH is for distribution is connected with electronic device 14, and forms so that expose the part of the electrode of electronic device 14.Forming in the situation of etch stop layer 16 at protective layer 15 as shown in Figure 9, in the step that contact hole TH is set, remove etch stop layer 16.
Shown in Figure 11 C, in fixed bed 26 and protective layer 15, contact hole TH is set after, distribution W is by contact hole TH be connected with electronic device 14 (step S705).Do not use in the situation of interposer 31 when transfer printing electronic device 14, supporting layer 13 and fixed bed 26 are configured on the upper surface of electronic device 14 of transfer printing, distribution W is connected with electronic device 14 with contact hole in the fixed bed 26 by being arranged on supporting layer 13.
Like this, in this embodiment, owing to being transferred to electronic device 14 on the second substrate 21 after, remove adhesion layer 22, so when the structure that forms after a while such as distribution, can suppress the deteriorated of the positional precision that caused by the thermal deformation of the resin that consists of adhesion layer 22.In addition; because after removing adhesion layer 22; formed fixed bed 26 on the surface of electronic device 14 and protective layer 15 and the surface of second substrate 21, so electronic device 14 is fixed on definitely on the second substrate 21, and can suppresses position movement of electronic device 14 etc.
2. the second execution mode
Figure 12 shows the schematic flow according to the manufacture method of the electronic device of second embodiment of the invention, and Figure 13 A to Figure 13 D and Figure 14 A to Figure 14 C show manufacture method according to the order of step.In this embodiment, adhesion layer 22 is made of ultraviolet curable resin, and only removes after adhesion layer 22 is cured and do not have the exposed region of overlay electronic device 14 22D.The step identical with the first execution mode describes with reference to Fig. 2 A to Fig. 2 E, Fig. 3, Fig. 4, Fig. 5, Fig. 6 A to Fig. 6 D, Fig. 7, Fig. 8, Fig. 9, Figure 10 A to Figure 10 C and Figure 11 A to 11C.
At first; according to the mode identical with the first execution mode; by such as Fig. 2 A to 2E, step shown in Figure 3; form sacrifice layer 12, supporting layer 13, electronic device 14 and protective layer 15 at first substrate 11; and the part of protective layer 15 and the part of supporting layer 13 removed, in order at least a portion of sacrifice layer 12 come out (step S101 to S108).
Next, according to the mode identical with the first execution mode, by step as shown in Figure 4, remove sacrifice layer 12 (step S109) by using etching.
Next, according to the mode identical with the first execution mode, by step as shown in Figure 6A, form the adhesion layer 32 that comprises lug boss 32C at interposer 31.Can form lug boss 32C with the clone method identical with the first execution mode and direct processing method.Then, according to the mode identical with the first execution mode, by step as shown in Figure 6A, make the lug boss 32C close contact in the adhesion layer 32 of electronic device 14 and interposer 31 on the first substrate 11, and separate first substrate 11.Only optionally will be transferred to (step S501) on the interposer 31 with the contacted electronic device 14 of lug boss 32C.
According to the mode identical with the first execution mode, by the step shown in Fig. 6 B, after optionally being transferred to electronic device 14 on the interposer 31, preparation second substrate 21 forms adhesion layer 22 (step S201) on the surface of second substrate 21.At this moment, adhesion layer 22 is made of ultraviolet curable resin.
Next, shown in Fig. 6 B, according to the mode identical with the first execution mode, make electronic device 14 and lip-deep adhesion layer 22 close contacts that are arranged on second substrate 21 on the interposer 31.Then, as shown in FIG. 13A, after separating interposer 31, electronic device 14 is transferred to (step S301) on the second substrate 21 from interposer 31.
Shown in Figure 13 B, according to the mode identical with the first execution mode, after electronic device 14 is transferred to second substrate 21, for example, belong to the fragment of the supporter 13B of electronic device 14 by using the step shown in Fig. 6 D to utilize dry etching to remove, and only keep body 13A.
Shown in Figure 13 C, after removing supporter 13B, shine from the back side of second substrate 21 with ultraviolet (UV), thereby solidify adhesion layer 22 (step S706).
Shown in Figure 13 D, after solidifying adhesion layer 22, carry out ashing by using with oxygen as the plasma P of main component, keep the zone of the adhesion layer 22 that is coated with electronic device 14, and only remove the exposed region 22D (step S702) that is not covered by electronic device 14.Like this, after adhesion layer 22 is cured, only remove exposed region 22D, can be in heating steps described later the distortion of anti-adhesion layer 22.In addition, after form structure such as distribution in, can suppress to consist of the deteriorated of the positional precision that caused by the thermal deformation of the resin of adhesion layer 22.In ashing, for example, as RIE (active-ion-etch) pattern, expectation possesses the anisotropic condition of etching.
After the exposed region 22D in removing adhesion layer 22; shown in Figure 14 A; according to the mode identical with the first execution mode; by the step shown in Figure 11 A, by for example using the CVD method on the surface of electronic device 14 and protective layer 15 and the surface of second substrate 21 forms fixed bed 26 (step S703).
After forming fixed bed 26, as shown in Figure 14B, according to the mode identical with the first execution mode, by the step shown in Figure 11 B, for example by using etching, contact hole TH (step S704) is set in fixed bed 26 and protective layer 15.
After in fixed bed 26 and protective layer 15, contact hole TH being set, shown in Figure 14 C, with distribution W by contact hole TH be connected with electronic device 14 (step S705).When transfer printing electronic device 14, do not use in the situation of interposer 31, at the upper surface of the electronic device 14 of transfer printing supporting layer 13 and fixed bed 26 are set, and distribution W is connected with electronic device 14 with contact hole in the fixed bed 26 by being arranged on supporting layer 13.
Like this, in this embodiment, adhesion layer 22 is made of ultraviolet curable resin, and only exposed region 22D is removed after adhesion layer 22 solidifies, so except the effect of the first execution mode, can also the distortion of anti-adhesion layer 22 in heating steps described later.
3. the 3rd execution mode
Figure 15 shows the schematic flow process according to the method for the manufacturing electronic device of third embodiment of the invention, and Figure 16 A, Figure 16 B, Figure 17 and Figure 18 show manufacture method according to step order.Different from the first execution mode is, this execution mode forms supporter in the mode that is separated with supporting layer 13.Therefore, the step identical with the first execution mode uses identical reference number to be described with reference to Fig. 2 A to 2E, Fig. 3, Fig. 4, Fig. 5, Fig. 6 A to Fig. 6 D, Fig. 7, Fig. 8, Fig. 9, Figure 10 A to Figure 10 C and Figure 11 A to Figure 11 C.
At first, according to the mode identical with the first execution mode, by the step shown in Fig. 2 A, form by at least a sacrifice layer of making 12 (step S101) in alkali metal oxide and the alkaline earth oxide at first substrate 11.
Next, according to the mode identical with the first execution mode, by the step shown in Fig. 2 B, form not shown etchant resist at sacrifice layer 12, and by photoetching the etchant resist patterning is formed reservation shape (step S102).Then, by etchant resist is carried out etching as mask, the part of sacrifice layer 12 is removed, thereby sacrifice layer 12 patternings are formed reservation shape (step S103).Therefore, in the part (will form the zone of electronic device) of first substrate 11, form sacrifice layer 12.
Next, according to the mode identical with the first execution mode, by the step shown in Fig. 2 C, form supporting layer 13 (step S104) on the whole surface of first substrate 11.
Then, according to the mode identical with the first execution mode, by the step shown in Fig. 2 D, form electronic device 14 at sacrifice layer 12, wherein supporting layer 13 is arranged between sacrifice layer 12 and the electronic device 14 (step S105).
After forming electronic device 14, according to the mode identical with the first execution mode, by the step shown in Fig. 2 E, form protective layer 15 (step S106) at electronic device 14.
After forming protective layer 15, form not shown etchant resist at protective layer 15, and by using photoetching that the etchant resist patterning is formed reservation shape (step S107).Shown in Figure 16 A, by with etchant resist as mask, use dry etching or wet etching that the part of protective layer 15 and the part of supporting layer 13 are removed, thus with at least a portion of sacrifice layer 12 come out (step S108).At this moment, only stay supporting layer 13 and protective layer 15 at the upper surface of sacrifice layer 12, and come out all in the whole side of sacrifice layer 12.
Shown in Figure 16 B, after the part of a part of removing protective layer 15 and supporting layer 13, form support body layer 17A (step S111) on the surface of electronic device 14, supporting layer 13, protective layer 15, sacrifice layer 12 and first substrate 11.Support body layer 17A for example has the thickness of 50nm, and preferably is made of the indefatigable material of solution tool for etch sacrificial layer 12, and can use dry etching to process.Particularly, the examples of materials of support body layer 17A comprises amorphous silicon (a-Si), silicon dioxide (SiO
2) and silicon nitride (SiNx).Other examples that are used for the material of support body layer 17A comprise the metal such as aluminium (Al) or molybdenum (Mo).
After forming support body layer 17A, form not shown etchant resist at support body layer 17A, and by using photoetching that the etchant resist patterning is formed reservation shape (step S112).Next, as shown in figure 17, with etchant resist as mask, by using dry etching or wet etching, a part of removing support body layer 17A, and form supporter 17 (step S113).Supporter 17 can be arranged on the both sides of for example supporting layer 13, electronic device 14 and protective layer 15.Like this, by with supporting layer 13 support body layer 17A being set discretely, support body layer 17A is made of the material that is different from supporting layer 13, thereby can independently control the thickness of support body layer 17A and supporting layer 13.Therefore, can realize simultaneously the reliability of electronic device 14 and the easiness of design parameter and transfer printing.
As shown in figure 18, after forming supporter 17, by etching sacrifice layer 12 is removed (step S109).Thereby, form transfer printing electronic device substrate 10A.
In transfer printing electronic device substrate 10A, electronic device 14 is inserted between supporting layer 13 and the protective layer 15, and form supporter 17 in the both sides of supporting layer 13, electronic device 14 and protective layer 15.Between the surface of supporting layer 13 and first substrate 11, have the gap that forms by removing sacrifice layer 12, thereby the support by supporter 17 so that supporting layer 13, electronic device 14 and protective layer 15 be suspended in the air.In transfer printing electronic device substrate 10A, according to the mode identical with the first execution mode, can and be fixed on the second substrate 21 electronic device 14 transfer printings.
Like this, in this embodiment, owing to only after the upper surface of sacrifice layer 12 keeps supporting layer 13, form supporter 17, so supporting layer 13 and supporter 17 are made of the material that differs from one another, and can control independently the thickness of supporting layer 13 and supporter 17.Thereby, can realize simultaneously the reliability of electronic device 14 and the easiness of design parameter and transfer printing.
In this embodiment, form discretely support body layer 17A or supporter 17 although described with protective layer 15, also can form publicly and use support body layer 17A or supporter 17 and protective layer 15.
The first application example
For example, to shown in Figure 21, the manufacture method of top execution mode can be applicable to various electronic devices 14 such as Figure 19.Figure 19 shows the example of TFT, wherein forms in the following order on supporting layer 13: grid 111, gate insulating film 112, hydrogenated amorphous silicon layer 113, n
+ Amorphous silicon layer 114 and source/drain 115.Grid 111 has for example thickness of 200nm, and is made of chromium (Cr).Gate insulating film 112 has for example thickness of 300nm, and is made of silicon nitride (SiNx).Hydrogenated amorphous silicon layer 113 has for example thickness of 300nm, and is made of amorphous silicon hydride (a-Si:H).n
+ Amorphous silicon layer 114 has for example thickness of 50nm, and by n
+Amorphous silicon (n
+A-Si:H) consist of.Source/drain electrodes 115 has for example thickness of 200nm, and is made of chromium (Cr).
Figure 20 shows the example of capacitor, wherein forms in the following order on supporting layer 13: electrode 121, dielectric film 122 and electrode 123.Electrode 121 has for example thickness of 200nm, and is made of chromium (Cr).Dielectric film 122 has for example thickness of 200nm, and by silicon dioxide (SiO
2) consist of.Electrode 123 has for example thickness of 200nm, and is made of chromium (Cr).
Figure 21 shows the example of EL element (inorganic EL element), wherein forms in the following order on supporting layer 13: transparency electrode 131, dielectric film 132, EL layer 133, dielectric film 134 and electrode 135.Transparency electrode 131 has for example thickness of 400nm, and is made of ITO.Dielectric film 132 has for example thickness of 100nm, and by silicon dioxide (SiO
2) consist of.EL layer 133 has for example thickness of 1 μ m, and is made of ZnS:Mn.Dielectric film 134 has for example thickness of 5 μ m, and is made of SiNx.Electrode 135 has for example thickness of 500nm, and is made of chromium (Cr).
The second application example
Such as Figure 22, Figure 23 A, Figure 23 B and shown in Figure 24, the manufacture method of top execution mode for example can be applicable to, form the situation of the electronic device group 14A that comprises a plurality of electronic devices 14 at sacrifice layer 12, wherein between sacrifice layer 12 and electronic device group 14A, supporting layer 13 is set.Thereby, for example, transfer printing electronic circuit etc. easily.
For example, Figure 22 shows situation about forming as TFT and the capacitor Cs of electronic device group 14A.For example, TFT comprises on sacrifice layer 12 in the following order: grid 41, dielectric film 42, hydrogenated amorphous silicon layer 43, etch stop layer 44, hydrogenated amorphous silicon layer (n
+A-Si:H) 45 and source/drain 46, wherein between sacrifice layer 12 and TFT, be provided with supporting layer 13.For example, capacitor Cs comprises on sacrifice layer 13 in the following order: public electrode 61, dielectric film 42 and by source/drain 46 is out of shape formed counter electrode wherein are provided with supporting layer 13 between sacrifice layer 13 and capacitor Cs.
For example, Figure 23 A and Figure 23 B show except TFT and capacitor Cs, have also formed the cross part IS of distribution as the situation of electronic device group 14A.Cross part IS comprises, for example, and cross part and the distribution X2 of gate wirings X1 and drain electrode distribution Y1 and leak the cross part of polar reciprocal lines Y1.
For example, Figure 24 shows the active matrix driving circuit of formation OLED display as the situation of electronic device group 14A.Figure 25 shows the part of the electronic device group 14A that is surrounded by dotted line 14B among Figure 24 with the form of amplifying, and Figure 26 shows its equivalent electric circuit simultaneously.In Figure 24, with dashed lines illustrates sacrifice layer 12.
Supporting layer 13 preferably comprises the through hole 13F that exposes sacrifice layer 12 in the position of avoiding electronic device 14 positions.In this case, can carry out etching to sacrifice layer 12 from through hole 13F, even and when sacrifice layer 12 has larger area, the required time of etching also can be reduced.In through hole 13F, supporter 17 can be arranged, can there be supporter 17 yet.
Make the TFT2 conducting in response to the control signal that provides from gate wirings X1, the signal potential of the vision signal that provided by drain electrode distribution Y1 is sampled, to keep the signal potential among the capacitor Cs.TFT1 supplies with from the distribution X2 received current that is in supply voltage Vdd, and provides drive current according to the signal potential that remains among the capacitor Cs to organic EL OLED.The drive current that organic EL OLED passes through to provide, luminous with the brightness according to the signal potential of vision signal.
The 3rd application example
Figure 27 shows the cross-sectional configuration of the liquid crystal display that is made of the active matrix TFT substrate that comprises electronic device group 14A, and wherein electronic device group 14A comprises TFT and the capacitor Cs shown in Figure 23 A and Figure 23 B.Liquid crystal display can be as liquid crystal TV set for example, and this liquid crystal display has the structure that second substrate 21 wherein faces with each other as active matrix TFT substrate, the subtend substrate 71 made by glass.The periphery of second substrate 21 and subtend substrate 71 seals with sealant 81, and at second substrate 21, subtend substrate 71 and the sealant 81 inner liquid crystal layers 82 that formed by liquid crystal that arrange.Provide respectively Polarizer 83 at second substrate 21 and subtend substrate 71 outsides.Second substrate 21 is corresponding to the instantiation of " substrate " of display of the present invention.
On second substrate 21, configuration is by the electronic device group 14A of the method institute transfer printing of above-mentioned execution mode.Lower surface at electronic device 14 (TFT and capacitor Cs) forms supporting layer 13.On the surface of electronic device 14 and protective layer 15 and on the surface of second substrate 21, form fixed bed 26.Electronic device 14 is by being connected with distribution W with contact hole TH in the protective layer 15 being arranged on fixed bed 26, and forms transparency electrodes 53 at electronic device 14, wherein is provided with interlayer dielectric 52 between electronic device 14 and the transparency electrode 53.Surface in transparency electrode 53 forms oriented film 54.When transfer printing electronic device 14, do not use in the situation of interposer 31, at upper surface configuration supporting layer 13 and the fixed bed 26 of the electronic device 14 of transfer printing, and distribution W is connected with electronic device 14 with contact hole in the fixed bed 26 by being arranged on supporting layer 13.
In subtend substrate 71, form in order: transparency electrode 75 and the oriented film 76 made as the optical screen film 72 of black matrix, redness, green and blue colour filter 73, surrounding layer 74, by ITO.LCD element is made of transparency electrode 53, liquid crystal layer 82 and transparency electrode 75.
The first modification
Figure 28 to Figure 30 shows additional step in the above-described embodiment, and this additional step is so that after being transferred to electronic device 14 on the second substrate 21, can be fixed on electronic device 14 more firmly on the second substrate 21.Figure 28 to Figure 30 shows formation TFT as shown in figure 19 as the situation of electronic device 14.
The first additional fixing means
For example, shown in the A part of Figure 28, the surface of electronic device 14 or protective layer 15 and the surface of adhesion layer 22 are modified with silanol group (SiOH), and heat with about 120 ℃ temperature, and dewater after transfer printing.Thereby shown in the B of Figure 28 part, form and fixing Si-O-Si key.At this moment, on the surface of electronic device 14 or protective layer 15, form by such as SiO
2The film (not shown) made of oxide, and by using O
2Plasma treatment, UV-O
3Process or the Ozone Water processing, use hydroxyl that this film is modified.
The second additional fixing means
Shown in the A part of Figure 29, on the surface of electronic device 14 or protective layer 15 and on the surface of adhesion layer 22, deposition has different qualities but comprises because being in contact with one another the silane coupler of the chemically combined functional group that produces.Shown in the B part of Figure 29, make electronic device 14 or protective layer 15 and the adhesion layer 22 mutual close contacts processed with independent mode, and heat to promote chemical bond.
The example of the compound of silane coupler comprise following these.
1. comprise the silane coupler of isocyanate group and comprise amino silane coupler
Example) comprises the example of the silane coupler of isocyanate group
3-isocyanic acid propyl-triethoxysilicane
3-isocyanic acid propyltrichlorosilan
Example) comprises the example of amino silane coupler
N-2 (aminoethyl) 3-aminopropyl methyl dimethoxysilane
N-2 (aminoethyl) 3-TSL 8330
The 3-TSL 8330
2. comprise the silane coupler of epoxy radicals and comprise amino silane coupler
Example) comprises the example of the silane coupler of epoxy radicals
2-(3,4 epoxycyclohexyl) ethyl trimethoxy silane
The 3-glycidyl ether oxygen propyl trimethoxy silicane
The 3-glycidoxypropyltrietandysilane andysilane
Example) comprises the example of amino silane coupler
N-2 (amino-ethyl) 3-aminopropyl methyl dimethoxysilane
N-2 (amino-ethyl) 3-TSL 8330
The 3-TSL 8330
The 3rd additional fixing means
Shown in the A of Figure 30 part, on the surface of protective layer 15, form the metal film 15A such as the special metal of Au, Ag, Cu, Pd and Pt, with comprising that the silane coupler of following functional group modifies the surface of adhesion layer 22.Shown in the B part of Figure 30, make electronic device 14 or protective layer 15 and the adhesion layer 22 mutual close contacts processed with independent mode, and heat to promote chemical bond.
1. sulfydryl
Example) 3-sulfydryl propyl group methyl dimethoxysilane
3-sulfydryl propyl trimethoxy silicane
2. amino
Example) N-2 (amino-ethyl) 3-aminopropyl methyl dimethoxysilane
N-2 (amino-ethyl) 3-TSL 8330
The 3-TSL 8330
3. phenyl
Example) phenyltrimethoxysila,e
Hereinbefore, with reference to execution mode the present invention has been described.Yet the present invention is not limited to these execution modes, but can carry out various modifications.For example, the material of each layer, thickness, deposition process, sedimentary condition etc. are not limited to the description of above-mentioned execution mode.Also can adopt other materials, other thickness, other deposition processs and other sedimentary conditions.
In the above-described embodiment, the structure by using TFT, capacitor etc. as electronic equipment 14 row specific descriptions, yet, do not need to comprise all layers, and can comprise in addition other layer.
Except liquid crystal display cells and organic EL display element, the present invention also can be applicable to use the display such as other display elements of inorganic el element, electro-deposition type display element or electrochromism type display element.
Except the element of describing in the above execution mode, as the electronic device 14 of transfer printing object can also be diode, solar power generation element, image pickup device, IC such as the RFID label that comprises large-scale circuit, optics, such as the acoustical device of microphone.Certainly, electronic device 14 is not limited to this.
In the above-described embodiment, as transfer printing electronic device substrate 10, described and removed sacrifice layer 12, thereby and between the surface of the lower surface of body 13A and first substrate 11, the situation that the gap can be carried out transfer printing immediately has been set.Yet, be provided with sacrifice layer 12 in distribution phase or delivery phase, and sacrifice layer 12 can be removed before transfer printing.
It will be understood by those skilled in the art that according to designing requirement and other factors multiple modification, combination, sub-portfolio and distortion can be arranged, all should be included within the scope of appended claim or its equivalent.
Claims (8)
1. the manufacture method of an electronic device may further comprise the steps:
Part at first substrate forms by at least a sacrifice layer of making in alkali metal oxide and the alkaline earth oxide;
Form the supporting layer that covers described sacrifice layer;
Form electronic device at described sacrifice layer, wherein, described supporting layer is between described sacrifice layer and described electronic device;
Part by removing described supporting layer is with at least a portion of the side that exposes described sacrifice layer;
Leave the part of described supporting layer in the side of described sacrifice layer, thereby form supporter;
Remove described sacrifice layer;
By making described electronic device and being arranged on the lip-deep adhesion layer close contact of second substrate, break described supporter and described electronic device is transferred on the described second substrate;
Remove the fragment of the described supporter that belongs to described electronic device;
At least remove the exposed region that in described adhesion layer, is not covered by described electronic device; And
Form fixed bed on described electronic device surface and described second substrate surface;
Wherein, in removing the step of described adhesion layer, remove whole described adhesion layer.
2. the manufacture method of electronic device according to claim 1 also comprises: the step that contact hole is set in described fixed bed and by described contact hole distribution is connected with described electronic device.
3. the manufacture method of electronic device according to claim 1, wherein
In the step of a part of removing described supporting layer, only the upper surface at described sacrifice layer keeps described supporting layer, and
The step that forms described supporter may further comprise the steps:
Surface at described electronic device, described supporting layer, described sacrifice layer and described first substrate forms support body layer; And
Form described supporter by a part of removing described support body layer.
4. the manufacture method of electronic device according to claim 1, wherein
In the step that forms described sacrifice layer, in the zone that will form the electronic device group that comprises a plurality of described electronic devices, form described sacrifice layer,
In forming the step of described electronic device, form described electronic device group at described sacrifice layer, wherein, described supporting layer between described sacrifice layer and described electronic device group, and
In the step of a part of removing described supporting layer, the through hole that exposes described sacrifice layer is set in the position of the described electronic device of avoiding described supporting layer.
5. the manufacture method of an electronic device may further comprise the steps:
Part at first substrate forms by at least a sacrifice layer of making in alkali metal oxide and the alkaline earth oxide;
Form the supporting layer that covers described sacrifice layer;
Form electronic device at described sacrifice layer, wherein, described supporting layer is between described sacrifice layer and described electronic device;
Part by removing described supporting layer is with at least a portion of the side that exposes described sacrifice layer;
Leave the part of described supporting layer in the side of described sacrifice layer, thereby form described supporter;
Remove described sacrifice layer;
By making described electronic device and being arranged on the lip-deep adhesion layer close contact of second substrate, break described supporter and described electronic device is transferred on the described second substrate;
Remove the fragment of the described supporter that belongs to described electronic device;
At least remove the exposed region that in described adhesion layer, is not covered by described electronic device; And
Form fixed bed on described electronic device surface and described second substrate surface;
Wherein,
Described adhesion layer is made by ultraviolet curable resin, and
In removing the step of described adhesion layer, after shining to solidify described adhesion layer by ultraviolet ray, remove the described exposed region in the described adhesion layer, and keep the zone that is coated with described electronic device in the described adhesion layer.
6. the manufacture method of electronic device according to claim 5 also comprises: the step that contact hole is set in described fixed bed and by described contact hole distribution is connected with described electronic device.
7. the manufacture method of electronic device according to claim 5, wherein
In the step of a part of removing described supporting layer, only the upper surface at described sacrifice layer keeps described supporting layer, and
The step that forms described supporter may further comprise the steps:
Surface at described electronic device, described supporting layer, described sacrifice layer and described first substrate forms support body layer; And
Form described supporter by a part of removing described support body layer.
8. the manufacture method of electronic device according to claim 5, wherein
In the step that forms described sacrifice layer, in the zone that will form the electronic device group that comprises a plurality of described electronic devices, form described sacrifice layer,
In forming the step of described electronic device, form described electronic device group at described sacrifice layer, wherein, described supporting layer between described sacrifice layer and described electronic device group, and
In the step of a part of removing described supporting layer, the through hole that exposes described sacrifice layer is set in the position of the described electronic device of avoiding described supporting layer.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2009068774A JP4821871B2 (en) | 2009-03-19 | 2009-03-19 | Method for manufacturing electronic device and method for manufacturing display device |
| JP2009-068774 | 2009-03-19 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101840885A CN101840885A (en) | 2010-09-22 |
| CN101840885B true CN101840885B (en) | 2013-03-27 |
Family
ID=42675211
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2010101349666A Expired - Fee Related CN101840885B (en) | 2009-03-19 | 2010-03-12 | Method of manufacturing electronic device and display |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US8551818B2 (en) |
| JP (1) | JP4821871B2 (en) |
| KR (1) | KR20100105391A (en) |
| CN (1) | CN101840885B (en) |
| DE (1) | DE102010011010A1 (en) |
| TW (1) | TW201044467A (en) |
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|---|---|---|---|---|
| WO2011114891A1 (en) | 2010-03-16 | 2011-09-22 | 日本電気株式会社 | Digital receiver and optical communication system that uses same |
| JP5605563B2 (en) * | 2010-11-01 | 2014-10-15 | 国立大学法人宇都宮大学 | Probe for thermal conductivity measurement and manufacturing method thereof |
| JP2014523633A (en) * | 2011-05-27 | 2014-09-11 | エムシー１０ インコーポレイテッド | Electronic, optical and / or mechanical devices and systems and methods of manufacturing these devices and systems |
| JP6012018B2 (en) * | 2012-04-05 | 2016-10-25 | 住友化学株式会社 | Organic EL device and manufacturing method thereof |
| KR101968637B1 (en) * | 2012-12-07 | 2019-04-12 | 삼성전자주식회사 | Flexible semiconductor device and method of manufacturing the same |
| JP6236778B2 (en) * | 2012-12-19 | 2017-11-29 | 株式会社リコー | Metal oxide film forming coating solution, metal oxide film, field effect transistor, and method of manufacturing field effect transistor |
| CN107482137B (en) * | 2013-03-11 | 2019-06-07 | 应用材料公司 | The plasma curing of PECVD HMDSO film for OLED application |
| KR102385339B1 (en) * | 2015-04-21 | 2022-04-11 | 삼성디스플레이 주식회사 | Display device and manufacturing method thereof |
| KR102354973B1 (en) * | 2015-06-10 | 2022-01-25 | 삼성디스플레이 주식회사 | Flexible display apparatus and manufacturing method thereof |
| KR20180029739A (en) * | 2016-09-13 | 2018-03-21 | 엘지디스플레이 주식회사 | Method of manufacturing organic light emitting display device |
| TWI626776B (en) * | 2017-08-17 | 2018-06-11 | 華碩電腦股份有限公司 | Flexible display and manufacturing method thereof |
| JP7193840B2 (en) * | 2018-11-02 | 2022-12-21 | 株式会社フィルネックス | Semiconductor device manufacturing method and semiconductor substrate |
| JP6431631B1 (en) * | 2018-02-28 | 2018-11-28 | 株式会社フィルネックス | Manufacturing method of semiconductor device |
| DE102018104785A1 (en) | 2018-03-02 | 2019-09-05 | Osram Opto Semiconductors Gmbh | Method for producing a plurality of transferable components and component assembly of components |
| CN110061112B (en) * | 2019-02-28 | 2022-07-08 | 华灿光电(苏州）有限公司 | GaN-based light emitting diode epitaxial wafer and preparation method thereof |
| KR102371130B1 (en) * | 2019-03-14 | 2022-03-07 | 한국전자기술연구원 | Micro device transferring method |
| JP7200884B2 (en) * | 2019-08-27 | 2023-01-10 | 信越化学工業株式会社 | Microstructure mounting method |
| WO2022019200A1 (en) * | 2020-07-20 | 2022-01-27 | Ａｇｃ株式会社 | Transparent display device and manufacturing method therefor |
| CN112967984B (en) * | 2020-09-24 | 2022-03-25 | 重庆康佳光电技术研究院有限公司 | Huge transfer method of microchip and display back plate |
| CN112606586B (en) * | 2020-12-02 | 2022-04-26 | 潍坊歌尔微电子有限公司 | Device transfer printing processing method and micro microphone dustproof device transfer printing processing method |
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| JP2002134806A (en) * | 2000-10-19 | 2002-05-10 | Canon Inc | Piezoelectric film actuator, liquid injection head, and method of manufacturing the same |
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| EP1889307B1 (en) * | 2005-06-07 | 2011-04-20 | FUJIFILM Corporation | Functional film containing structure and method of manufacturing functional film |
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| JP2009068774A (en) | 2007-09-13 | 2009-04-02 | Jfe Steel Kk | Method for controlling combustion of fuel gas |
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- 2010-02-09 TW TW099103985A patent/TW201044467A/en unknown
- 2010-03-10 KR KR1020100021135A patent/KR20100105391A/en not_active Application Discontinuation
- 2010-03-11 DE DE102010011010A patent/DE102010011010A1/en not_active Withdrawn
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| CN1355551A (en) * | 2000-09-14 | 2002-06-26 | 株式会社半导体能源研究所 | Semiconductor device and manufacturing method thereof |
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Also Published As
| Publication number | Publication date |
|---|---|
| KR20100105391A (en) | 2010-09-29 |
| DE102010011010A1 (en) | 2010-10-07 |
| US8551818B2 (en) | 2013-10-08 |
| JP4821871B2 (en) | 2011-11-24 |
| CN101840885A (en) | 2010-09-22 |
| US20100237380A1 (en) | 2010-09-23 |
| TW201044467A (en) | 2010-12-16 |
| JP2010225668A (en) | 2010-10-07 |
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