JP2005243899A - Printed circuit board and its manufacturing method - Google Patents

Printed circuit board and its manufacturing method Download PDF

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Publication number
JP2005243899A
JP2005243899A JP2004051329A JP2004051329A JP2005243899A JP 2005243899 A JP2005243899 A JP 2005243899A JP 2004051329 A JP2004051329 A JP 2004051329A JP 2004051329 A JP2004051329 A JP 2004051329A JP 2005243899 A JP2005243899 A JP 2005243899A
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wiring
insulating layer
wiring board
printed wiring
printed
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Toshio Ofusa
俊雄 大房
Yutaka Yoshikawa
吉川  裕
Akihisa Takahashi
明久 高橋
Yasutaka Meiraku
泰孝 明楽
Toshiaki Ishii
俊明 石井
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Toppan Inc
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Toppan Printing Co Ltd
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a printed circuit board and the manufacturing method of the same having a wiring structure which has solved a problem that danger of separating the wiring is lowered and migration is hardly generated while securing connecting property with a semiconductor element or the like upon forming a minute wiring, in the printed circuit board constituted of an insulating layer and a conductor layer which are laminated sequentially, and wiring circuits communicated with respective conductor layers through conductor passages. <P>SOLUTION: In the printed circuit board, the wiring is formed on the insulating layer on the surface of the printed circuit board, and a positional relation between one part of the wiring and the insulating layer forming an insulating substrate is under a condition that one part of bottom surface of the wiring is buried into the peripheral insulating layer and the height position of surface of the insulating layer is formed between the height position of bottom surface of the wiring and the height position of upper surface of the wiring while the height position of the section of wiring with maximal width or the sharpened and projected part such as corners or the like is not formed at the height position of the same plane as that of surface of the insulating layer. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

微細な配線を有する各種の電子機器用又は半導体装置用のプリント配線板であって、特に可撓性を有する薄型プリント配線板及びその製造方法に関する。   The present invention relates to a printed wiring board for various electronic devices or semiconductor devices having fine wiring, and more particularly to a flexible thin printed wiring board and a manufacturing method thereof.

従来のプリント配線板は、絶縁基板の上に配線を貼り付けた構造であり、必要に応じて配線上に保護用樹脂膜を形成したものが一般的に使用されている。また、ロータリースイッチや整流子等の摺動部など特殊用途向けには、配線を完全に埋め込んで配線の上面と絶縁基板の段差をなくした、いわゆるフラッシュプリント配線板が一部で使用されている。   A conventional printed wiring board has a structure in which wiring is attached on an insulating substrate, and a protective resin film formed on the wiring as needed is generally used. In addition, for special applications such as sliding parts such as rotary switches and commutators, so-called flash printed wiring boards that completely embed the wiring and eliminate the step between the upper surface of the wiring and the insulating substrate are used in part. .

図5は、従来技術による配線と絶縁基板との位置関係を示す断面図である。従来のプリント配線板は、基板の表面の絶縁基板表面上に配線(7)が形成され、特定した部位の配線(7a)は、配線の上面まで絶縁基板の層内に沈み込ませ、接着力を増強した配線が形成されている。従来のプリント配線板は、導体層、絶縁層がこの順に積層され、該導体層は導通路を介して導通された配線回路を形成し、該プリント配線板の基板の表面の絶縁基板上には、入出用の接続端子用の配線の部位及び配線回路の配線が形成されている。図5に示す配線(7)は、その配線底面高さ位置6が、基板表面上(絶縁層表面の高さ位置9)に形成され、配線を保護する絶縁樹脂層、例えばソルダーレジスト等を配線以外の部分に形成する。一方の配線(7a)は、ソルダーレジスト層を形成せず、その配線の上面高さ位置5が絶縁基板の表面(絶縁層表面の高さ位置9)まで沈み込み、強固な接着強度が維持されている。   FIG. 5 is a cross-sectional view showing the positional relationship between the wiring and the insulating substrate according to the prior art. In the conventional printed wiring board, the wiring (7) is formed on the surface of the insulating substrate on the surface of the substrate, and the wiring (7a) of the specified portion is submerged in the layer of the insulating substrate to the upper surface of the wiring, and the adhesive strength The wiring which strengthened is formed. In a conventional printed wiring board, a conductor layer and an insulating layer are laminated in this order, and the conductor layer forms a wiring circuit that is conducted through a conduction path, and is formed on the insulating substrate on the surface of the printed wiring board substrate. The part of the wiring for the connection terminal for input / output and the wiring of the wiring circuit are formed. The wiring (7) shown in FIG. 5 has a wiring bottom surface height position 6 formed on the substrate surface (height position 9 on the surface of the insulating layer) and wiring an insulating resin layer, such as a solder resist, for protecting the wiring. Form in other parts. One wiring (7a) does not form a solder resist layer, and the upper surface height position 5 of the wiring sinks to the surface of the insulating substrate (height position 9 on the surface of the insulating layer), thereby maintaining a strong adhesive strength. ing.

特許文献1は、表面が平滑で精緻な回路パターンを有することが可能なフラッシュプリント配線板とその製造方法について提示している。これは、支持基板上に熱可塑性樹脂を介して銅箔が貼り付けられた素材を使用し、銅箔をエッチングして配線パターンを形成後、ガラスエポキシ等のプリプレグと重ね合わせて積層プレスし、支持基板と熱可塑性樹脂を剥離することによって、プリプレグに埋め込まれた配線を有するフラッシュプリント配線板を得る転写法に属する製造方法である。   Patent Document 1 presents a flash printed wiring board capable of having a smooth and fine circuit pattern on the surface and a manufacturing method thereof. This uses a material in which a copper foil is attached to a support substrate via a thermoplastic resin, forms a wiring pattern by etching the copper foil, and then stacks and presses with a prepreg such as glass epoxy, This is a manufacturing method belonging to a transfer method in which a flash printed wiring board having wiring embedded in a prepreg is obtained by peeling a supporting substrate and a thermoplastic resin.

特許文献2は、熱可塑性樹脂に配線パターンを埋め込むことを特徴とする転写法による製造方法を示している。特許文献3は、厚手の銅箔を片面からハーフエッチングして配線に対応する凸部とその周囲の凹部を形成し、転写法と同様に配線に対応する凸部を内側にして積層プレスした後、埋め込まれた配線パターンを残してエッチングする工程を有するプリント配線板とその製造方法であり、絶縁基板表面に部分的に埋め込まれた配線は、その製造方法から6角形に近い断面形状を呈し、最も幅の広い部分が絶縁基板表面にあると考えられる。特許文献4は、硬化性組成物を絶縁基板として形成し、絶縁基板上に配線パターンを形成した後、上部から加圧して配線を埋め込み、最後に絶縁基板を硬化させる回路基板の製造方法である。   Patent Document 2 shows a manufacturing method by a transfer method characterized by embedding a wiring pattern in a thermoplastic resin. In Patent Document 3, a thick copper foil is half-etched from one side to form a convex portion corresponding to the wiring and a peripheral concave portion thereof, and after the lamination press with the convex portion corresponding to the wiring inside as in the transfer method. A printed wiring board having a step of etching while leaving an embedded wiring pattern and a manufacturing method thereof, and the wiring partially embedded in the surface of the insulating substrate exhibits a cross-sectional shape close to a hexagon from the manufacturing method, The widest part is considered to be on the surface of the insulating substrate. Patent Document 4 is a circuit board manufacturing method in which a curable composition is formed as an insulating substrate, a wiring pattern is formed on the insulating substrate, a wiring is embedded by pressing from above, and finally the insulating substrate is cured. .

以下に公知文献を記す。
特開2000−138444号公報 特開2003−218500号公報 特開2001−36200号公報 特開2003−60355号公報
The known literature is described below.
JP 2000-138444 A JP 2003-218500 A JP 2001-36200 A JP 2003-60355 A

従来の技術のうち配線が埋め込まれていないタイプでは、配線の微細化が進み、わずかな衝撃で配線が剥離する危険性が高くなっている。そして、配線の微細化は今後更に進展し、それによる配線の剥離の危険性は加速度的に増加すると予想される。また、エッチングのみで形成した配線は角が尖っていることも、更に剥離の危険性を助長している。現在、配線の引き剥がし強度は、9.8〜14.7N/cmであり、これ以上の引き剥がし強度の向上と微細配線形成の両立は困難になっている。つまり、現在の引き剥がし強度のままで配線の幅が10μmになると、わずか9.8×10-3〜14.7×10-3N/cmの力で剥離してしまうことになる。更に、フレキシブル系のプリント配線板では折り曲げによる配線剥離の危険性もあり、カバーレジストが必須だった。しかし、特に半導体素子との接続部や他のプリント配線板との接続部は保護できない部分がどうしても生じることが多く、その対策が求められていた。特に、ワイヤーボンディングによる接続ではわずかな位置ズレでも配線の転びと剥離が発生しやすい。 Among the conventional techniques, in the type in which the wiring is not embedded, the miniaturization of the wiring has progressed, and there is a high risk that the wiring will be peeled off with a slight impact. Further, the miniaturization of the wiring will further progress in the future, and it is expected that the risk of the peeling of the wiring will increase at an accelerated rate. In addition, the wiring formed by etching alone has sharp corners, which further promotes the risk of peeling. At present, the peeling strength of the wiring is 9.8 to 14.7 N / cm, and it is difficult to achieve both the improvement of the peeling strength and the formation of fine wiring. That is, when the width of the wiring becomes 10 μm with the current peeling strength, the peeling occurs with a force of only 9.8 × 10 −3 to 14.7 × 10 −3 N / cm. Furthermore, a flexible printed wiring board has a risk of wiring peeling due to bending, and a cover resist is indispensable. However, there are many parts that cannot be protected in particular, especially in connection parts with semiconductor elements and connection parts with other printed wiring boards, and countermeasures have been demanded. In particular, in connection by wire bonding, even if a slight misalignment occurs, the wiring easily falls and peels off.

一方、配線を完全に埋め込んだ場合は、配線の剥離等の危険性はほとんどないが、例えば半導体素子との接合において周囲の樹脂によって接合を阻害することがあり、多くの場合、接続端子としては周囲の樹脂より出っ張った形状であることが望ましい。また、特許文献3に示された絶縁基板表面に部分的に埋め込まれた配線は、埋め込まれることによるピール強度の向上とそれに付随する信頼性向上に対しては一定の効果があると考えられるが、表裏別々にエッチングして形成するものであるため、表裏の正確な位置合わせが難しく、テープ基板で要求される40μmピッチ以下の微細配線への適用は極めて難しい。そして、マイグレーション進行経路となりうるエッチング残さの存在しやすい絶縁基板表面と、マイグレーション発生の起点となる最も配線幅の広い部分もしくはコーナー部等の尖って張り出している部分が同一平面上に位置しているため、通常のプリント配線板のような配線が埋め込まれていないタイプと同様、微細配線を形成しようとする場合にはマイグレーションによる絶縁性低下が生じやすい構造に変わりない。更に、特許文献3で示されたプリント配線板を始めとする一般的なプリント配線板では全く問題のなかったマイグレーションなどの絶縁信頼性を、テープ基板で要求される40μmピッチ以下の微細配線を形成したプリント配線板では保つことが非常に難しく、特に間隙が15μm以下の配線になると急速に絶縁信頼性が低下してしまうことが知られている。そのため、従来からのプロセスで通常にエッチングし、十分に洗浄しても絶縁信頼性を保つことができなくなってきたため、銅以外の導電性物質を除去できるような特殊なプロセスの追加が必要になっている。   On the other hand, if the wiring is completely embedded, there is almost no danger of peeling of the wiring, but the bonding may be hindered by the surrounding resin in bonding with the semiconductor element, for example, as a connection terminal in many cases It is desirable that the shape protrudes from the surrounding resin. Further, the wiring partially embedded in the surface of the insulating substrate shown in Patent Document 3 is considered to have a certain effect on the improvement of peel strength and the accompanying reliability improvement by being embedded. Since it is formed by etching the front and back separately, it is difficult to accurately position the front and back, and it is extremely difficult to apply to fine wiring with a pitch of 40 μm or less required for a tape substrate. The surface of the insulating substrate that is likely to have etching residue that can become a migration progress path and the widest wiring width or the sharply protruding portion such as a corner that is the starting point of migration are located on the same plane. For this reason, as in the case of a type in which a wiring is not embedded, such as a normal printed wiring board, when a fine wiring is to be formed, there is no change to a structure in which an insulation deterioration due to migration is likely to occur. In addition, insulation reliability such as migration, which was not a problem at all with general printed wiring boards such as the printed wiring board disclosed in Patent Document 3, is formed as fine wiring with a pitch of 40 μm or less required for a tape substrate. It is very difficult to maintain with the printed wiring board, and it is known that the insulation reliability rapidly decreases especially when the gap is 15 μm or less. For this reason, since it is no longer possible to maintain insulation reliability even if it is normally etched in a conventional process and sufficiently cleaned, it is necessary to add a special process that can remove conductive materials other than copper. ing.

本発明の課題は、微細配線を形成した場合でも配線の剥離する危険性を低下させることとマイグレーションを生じ難くすること、そして半導体素子等との接続性を確保するという課題を解決できる配線構造を持つプリント配線板及びその製造方法を提供することである。   An object of the present invention is to provide a wiring structure capable of solving the problems of reducing the risk of separation of a wiring even when a fine wiring is formed, making migration difficult, and ensuring connectivity with a semiconductor element or the like. It is providing the printed wiring board which has, and its manufacturing method.

本発明の請求項1に係る発明は、絶縁層と、その上に配線を形成した導体層とをこの順に積層し、各々の導体層に導通路を介して導通した配線回路を形成したプリント配線板において、プリント配線板の最表面の絶縁層上に形成した配線は、少なくともその一部の配線と、絶縁基板を形成する絶縁層との位置関係が、配線の底面が周辺の絶縁層を伴って沈み込んでいるか、又は絶縁層内に配線の底面の一部が周辺の絶縁層の内部まで埋め込まれた状態であって、絶縁層表面の高さの位置が、配線の底面の高さ位置から配線の上面の高さ位置までの間に形成され、且つ配線の断面の幅が最大となる部分、又は配線のコーナー
部等の尖って張り出している部分の高さ位置が、絶縁層表面の高さ位置とは、同一平面上の高さ位置に形成されていないことを特徴とするプリント配線板である。
The invention according to claim 1 of the present invention is a printed wiring in which an insulating layer and a conductor layer on which wiring is formed are laminated in this order, and a wiring circuit is formed in which each conductor layer is conducted through a conduction path. In the board, the wiring formed on the insulating layer on the outermost surface of the printed wiring board has a positional relationship between at least a part of the wiring and the insulating layer forming the insulating substrate, and the bottom surface of the wiring is accompanied by a peripheral insulating layer. Or the part of the bottom surface of the wiring is embedded in the surrounding insulating layer, and the height position of the insulating layer surface is the height position of the bottom surface of the wiring. The height position of the portion that is formed between the height of the upper surface of the wiring and the height of the cross section of the wiring, or the sharply protruding portion such as the corner of the wiring, is the surface of the insulating layer. The height position is not formed on the same plane. A printed wiring board, wherein the door.

本発明では、上記配線と基板を形成する絶縁層との位置関係において、該配線底面が沈み込んでいるか埋め込まれており、基板を形成する絶縁層表面の位置が、配線の底面と上面との間に位置していることを特徴とするプリント配線板である。また、微細配線を形成した場合でも配線の剥離する危険性を低下させることとマイグレーションを生じ難くすること、そして半導体素子等との接続性確保という課題を共に満足させるため、配線の底面を基板に少し埋め込んだ状態で完全には埋め込まない構造とした。   In the present invention, in the positional relationship between the wiring and the insulating layer forming the substrate, the bottom surface of the wiring is sunk or embedded, and the position of the insulating layer surface forming the substrate is between the bottom surface and the top surface of the wiring. It is a printed wiring board characterized by being located in between. In addition, in order to satisfy both the problems of reducing the risk of wiring separation and migrating migration even when fine wiring is formed, and ensuring connectivity with semiconductor elements, etc., the bottom surface of the wiring is attached to the substrate. The structure is a little embedded but not completely embedded.

本発明の請求項2に係る発明は、前記一部の配線の底面の高さ位置は、絶縁層表面の高さ位置より、該配線の厚みに対し、1〜90%の深さの範囲まで絶縁層の内部に埋め込まれた状態で形成されており、同じ種類の部位の全ての配線は、配線の底面からの高さが同一となる位置で、絶縁層表面が形成されていることを特徴とする請求項1記載のプリント配線板である。   In the invention according to claim 2 of the present invention, the height position of the bottom surface of the part of the wiring is in a range of 1 to 90% of the thickness of the wiring from the height position of the surface of the insulating layer. It is formed in an embedded state in the insulating layer, and all the wirings of the same type of part have the insulating layer surface formed at the same height from the bottom of the wiring. The printed wiring board according to claim 1.

本発明では、表面層の配線において、該配線の銅の厚みに対し、底面からの高さ1〜90%の位置に基板を形成する絶縁層表面が位置しており、同じ層の配線で同じ種類の部位は底面からの高さがほぼ同じ位置に絶縁層表面が位置していること特徴とするプリント配線板であって、配線が少しでも埋め込まれている事によって配線の密着性が向上する特徴と、半導体素子等との接続に必要な配線高さとが両立する範囲を示したものである。   In the present invention, in the wiring of the surface layer, the surface of the insulating layer that forms the substrate is located at a height of 1 to 90% from the bottom with respect to the copper thickness of the wiring. The type of part is a printed wiring board characterized in that the surface of the insulating layer is located at almost the same height from the bottom, and the wiring adhesion is improved by embedding the wiring even a little. The range in which the characteristics and the wiring height necessary for connection with a semiconductor element or the like are compatible is shown.

本発明の請求項3に係る発明は、前記一部の配線が、半導体素子、又は他のプリント配線板等との接続端子の部位であって、該接続端子の接続操作において熱及び/又は圧力を加える部位を含む配線であることを特徴とする請求項1、又は2記載のプリント配線板である。   The invention according to claim 3 of the present invention is that the part of the wiring is a part of a connection terminal with a semiconductor element or another printed wiring board, etc., and heat and / or pressure is applied in a connection operation of the connection terminal. The printed wiring board according to claim 1, wherein the printed wiring board is a wiring including a portion to which a point is added.

本発明では、前記プリント配線板において、底面が埋め込まれた配線が半導体素子との接続端子または他のプリント配線板等との接続端子など、接続操作において熱及び/又は圧力を加える部位を含む配線であることを特徴とするプリント配線板のうち、接続操作で特に剥離が生じやすい部位について示したものである。具体的には半導体素子との接続部はワイヤーボンディング用パッド、フリップチップ接続用パッドなどが含まれ、配線幅の微細化が著しく進展しているCOF(chip on film)接続用パッドなどには特に望ましいが、該接続用パッドの下に絶縁基板がある構造であればこれ以外の接続方式でも良い。同様に、他のプリント配線板等と接続する端子についても該接続用端子の下に絶縁基板がある構造であれば接続方式は問わない。   In the present invention, in the printed wiring board, the wiring in which the bottom surface is embedded includes a portion to which heat and / or pressure is applied in a connection operation, such as a connection terminal with a semiconductor element or a connection terminal with another printed wiring board. Of the printed wiring board characterized by the above, a part that is particularly easily peeled off by a connection operation is shown. Specifically, the connection portion with the semiconductor element includes a wire bonding pad, a flip chip connection pad, and the like, and particularly in a COF (chip on film) connection pad and the like whose wiring width is remarkably advanced. Although it is desirable, other connection methods may be used as long as the structure has an insulating substrate under the connection pads. Similarly, any connection method may be used for terminals connected to other printed wiring boards or the like as long as an insulating substrate is provided under the connection terminals.

本発明の請求項4に係る発明は、前記配線が、配線側面が緩やかな曲面により形成されており、配線底面に対する配線の上面の幅の比が66.7%以上の配線を有し、少なくとも配線の一部が幅30μm以下であることを特徴とする請求項1乃至3のいずれか1項記載のプリント配線板である。   In the invention according to claim 4 of the present invention, the wiring has a wiring whose side surface is formed by a gently curved surface, and the ratio of the width of the top surface of the wiring to the bottom surface of the wiring is 66.7% or more. 4. The printed wiring board according to claim 1, wherein a part of the wiring has a width of 30 μm or less. 5.

本発明では、配線側面が緩やかな曲面により形成されており、配線底面に対する配線上部の幅の比が66.7%以上の配線を有し、少なくとも配線の一部が幅30μm以下であることを特徴とするプリント配線板であって、配線側面にはマイグレーションのきっかけとなりやすい不要な凹凸のない緩やかな曲面をもち、埋め込まれやすい形状の配線について示したものである。   In the present invention, the wiring side surface is formed by a gently curved surface, the ratio of the width of the upper part of the wiring to the wiring bottom surface is 66.7% or more, and at least a part of the wiring is 30 μm or less in width. This is a characteristic printed wiring board, which shows a wiring that has a gentle curved surface without unnecessary irregularities that tends to cause migration on the side surface of the wiring and is easily embedded.

本発明の請求項5に係る発明は、前記絶縁層は、異なる樹脂からなる1層または2層以上の複合絶縁層であり、少なくとも表面に位置する絶縁層の樹脂が熱可塑性樹脂または熱
硬化性樹脂からなり、可撓性を有することを特徴とする請求項1乃至4のいずれか1項記載のプリント配線板である。
In the invention according to claim 5 of the present invention, the insulating layer is one or more composite insulating layers made of different resins, and at least the resin of the insulating layer located on the surface is a thermoplastic resin or a thermosetting resin. 5. The printed wiring board according to claim 1, wherein the printed wiring board is made of resin and has flexibility.

本発明の請求項6に係る発明は、絶縁層と、その上に配線を形成した導体層とをこの順に積層し、各々の導体層に導通路を介して導通した配線回路を形成したプリント配線板の製造方法において、請求項1乃至5のいずれか1項記載のプリント配線板の表面の絶縁層上に形成した配線を製造する方法であって、少なくともその一部の配線の製造方法は、エッチングまたはめっきによって形成した後、熱によって配線と接する部分及びその周辺の絶縁層を一時的に軟化させ、配線に圧力を加えることで、配線を絶縁層に沈み込ませるプロセスを含むことを特徴とするプリント配線板の製造方法である。   The invention according to claim 6 of the present invention is a printed wiring in which an insulating layer and a conductor layer on which wiring is formed are laminated in this order, and a wiring circuit is formed in which each conductor layer is conducted through a conduction path. In the board manufacturing method, a method of manufacturing a wiring formed on the insulating layer on the surface of the printed wiring board according to any one of claims 1 to 5, wherein at least a part of the wiring manufacturing method includes: After forming by etching or plating, it includes a process of temporarily softening a portion in contact with the wiring by heat and its surrounding insulating layer and applying pressure to the wiring to sink the wiring into the insulating layer. A method for manufacturing a printed wiring board.

本発明の請求項7に係る発明は、前記少なくともその一部の配線の製造方法は、エッチングまたはめっきによって配線形成後、転写法によって別の基板の絶縁層に配線を形成するプロセスを含むことを特徴とする請求項6記載のプリント配線板の製造方法である。   According to a seventh aspect of the present invention, the method for manufacturing at least a part of the wiring includes a process of forming a wiring on an insulating layer of another substrate by a transfer method after the wiring is formed by etching or plating. The printed wiring board manufacturing method according to claim 6, wherein the printed wiring board is a manufacturing method.

本発明では、エッチングまたはめっきによって配線形成後、熱によって配線と接する部分に位置する絶縁層を一時的に軟化させ、配線に圧力を加えることで、配線を絶縁層に沈み込ませるプロセスを含むことを特徴とするプリント配線板の製造方法である。又別の製造方法としては、エッチングまたはめっきによって配線形成後、転写法によって別の基板に配線を形成するプロセスを含むことを特徴とするプリント配線板の製造方法である。   In the present invention, after the wiring is formed by etching or plating, the process includes a process of temporarily softening the insulating layer located in a portion in contact with the wiring by heat and applying pressure to the wiring to sink the wiring into the insulating layer. Is a method for producing a printed wiring board. Another manufacturing method is a method for manufacturing a printed wiring board, which includes a process of forming a wiring on another substrate by a transfer method after the wiring is formed by etching or plating.

本発明により、前述の従来技術における各課題が解消され、他に新たな効果が生じた。まず、従来の技術のうち配線が埋め込まれていないタイプで課題となっていた、配線の微細化と剥離強度の向上の両立が図れ、今後の配線の微細化にも十分対応できるようになった。   According to the present invention, the above-described problems in the prior art are solved, and other new effects are produced. First of all, it was possible to achieve both the miniaturization of the wiring and the improvement of the peel strength, which had been a problem with the conventional technology in which the wiring was not embedded, and it was possible to sufficiently cope with the future miniaturization of the wiring. .

また、半導体素子との接続部や他のプリント配線板との接続部の配線が剥離しにくくなって接続信頼性が向上したことともに、半導体素子を搭載する部分の直下にある配線の凹凸が軽減されて半導体素子搭載の信頼性が向上した。特に、半導体素子とのACF(Anisotropic Conductive film)接続における配線間の埋め込み性改善とCOF接続パッドの更なる微細化達成と剥離防止、ダイボンディングの安定性向上に顕著な効果が見られた。   In addition, the connection reliability with the connection part with the semiconductor element and the connection part with other printed wiring boards is improved, and the connection reliability is improved, and the unevenness of the wiring directly under the part where the semiconductor element is mounted is reduced. As a result, the reliability of mounting semiconductor elements has been improved. In particular, remarkable effects were seen in improving the embedding property between the wirings in the ACF (Anisotropic Conductive Film) connection with the semiconductor element, achieving further miniaturization of the COF connection pad, preventing peeling, and improving the stability of the die bonding.

これとは別に、見掛け上の配線厚さが減少したことにより、配線上にオーバーコートを施した場合、配線間の凹部に発生しやすかった気泡(ボイド)や充填不足(カスレ)の発生が防止でき、オーバーコートの膜厚を薄くすることも可能となった。   Apart from this, the apparent thickness of the wiring has been reduced, preventing the occurrence of air bubbles (voids) and underfilling (scratching) that were likely to occur in the recesses between the wires when overcoating is applied to the wires. It was also possible to reduce the thickness of the overcoat.

更に、マイグレーションによる絶縁性低下が生じ難くなり、配線間隔20μm以下、特に15μm以下の配線間隔が必要とされるCOF基板の絶縁信頼性が大幅に向上した。   In addition, the insulation is less likely to deteriorate due to migration, and the insulation reliability of the COF substrate, which requires a wiring interval of 20 μm or less, particularly 15 μm or less, is greatly improved.

それは、従来技術でのマイグレーションによる絶縁性の低下は、断面形状が鋭角的になった配線コーナー部、中でも底面の角が、エッチングによる微小な残さが生じやすいことと、隣接する配線との間隔が最も接近している場合がほとんどのため、特に生じやすい部位だった。そのため、配線間の絶縁層表面をそこから遠ざけることで、マイグレーションの発生源と進行経路を分断することになり、20μm以下、特に15μm以下の間隙を形成した配線の絶縁信頼性が大幅に向上したと考えられる。   This is because the degradation of insulation due to migration in the prior art is because the wiring corners, especially the corners of the bottom surface, where the cross-sectional shape is acute, are likely to leave a minute residue due to etching, and the spacing between adjacent wirings. It was a particularly prone part because it was most close. For this reason, by separating the surface of the insulating layer between the wirings, the migration source and the traveling path are separated, and the insulation reliability of the wirings having a gap of 20 μm or less, particularly 15 μm or less, is greatly improved. it is conceivable that.

一方、配線を完全に埋め込んだ場合に問題となっていた半導体素子との接合阻害が発生し難くなり、組立時の不具合発生がほとんど無くなった。   On the other hand, it has become difficult to inhibit the junction with the semiconductor element, which has been a problem when the wiring is completely embedded, and the occurrence of problems during assembly has been almost eliminated.

図1(a)及び図1(b)は、本発明による配線と絶縁基板との位置関係を示す断面図である。図1(a)の本発明のプリント配線板は、基板の表面の絶縁基板表面上に配線(7)が形成され、特定した部位の配線(7a)は、絶縁基板の層内まで沈み込み、接着力を増強した配線が形成されている。前記プリント配線板は、導体層、絶縁層がこの順に積層され、該導体層は導通路を介して導通された配線回路を形成し、該プリント配線板の基板の表面の絶縁基板上には、入出用の接続端子用の配線の部位及び配線回路の配線が形成されている。図1(a)に示す配線(7)では、基板表面上に形成され、配線を保護する絶縁樹脂層、例えばソルダーレジスト等を形成する。一方の配線(7a)では、ソルダーレジスト等を形成せず、配線底面が絶縁基板の層内まで沈み込み、強固な接着強度を維持し、且つ該配線(7a)の上面までの高さが同じ高さになるように調整されている。図1(b)の本発明のプリント配線板は、基板の表面の絶縁基板表面上に配線(7)が形成され、特定した部位の配線(7a)は、周辺の絶縁基板表面を伴って沈み込み、接着力を増強した配線が形成されている。図1(b)に示す配線(7)では、基板表面上に形成され、配線を保護する絶縁樹脂層、例えばソルダーレジスト等を形成する。一方の配線(7a)では、ソルダーレジスト等を形成せず、配線底面が周辺の絶縁基板表面を伴って沈み込み、強固な接着強度を維持し、且つ該配線(7a)の上面までの高さが同じ高さになるように調整されている。前記配線(7a)は、特定した部位の配線であり、その位置は各々離散して配置され、その位置の配線の部位のみを、加熱、加圧による積層プレス方法を用いて、配線底面を絶縁基板の表面より下方に沈み込ませる。   FIG. 1A and FIG. 1B are cross-sectional views showing the positional relationship between the wiring and the insulating substrate according to the present invention. In the printed wiring board of the present invention shown in FIG. 1A, the wiring (7) is formed on the surface of the insulating substrate on the surface of the substrate, and the wiring (7a) at the specified portion sinks into the layer of the insulating substrate, Wiring with enhanced adhesion is formed. In the printed wiring board, a conductor layer and an insulating layer are laminated in this order, the conductor layer forms a wiring circuit that is conducted through a conduction path, and on the insulating substrate on the surface of the substrate of the printed wiring board, Wiring portions for connection terminals for input / output and wiring for wiring circuits are formed. In the wiring (7) shown in FIG. 1A, an insulating resin layer, for example, a solder resist, which is formed on the substrate surface and protects the wiring is formed. In one wiring (7a), a solder resist or the like is not formed, and the bottom surface of the wiring sinks into the layer of the insulating substrate, maintains a strong adhesive strength, and has the same height to the top surface of the wiring (7a). The height is adjusted. In the printed wiring board of the present invention shown in FIG. 1B, the wiring (7) is formed on the surface of the insulating substrate on the surface of the substrate, and the wiring (7a) at the specified portion sinks with the surrounding insulating substrate surface. In other words, a wiring with enhanced adhesion is formed. In the wiring (7) shown in FIG. 1B, an insulating resin layer, for example, a solder resist, which is formed on the substrate surface and protects the wiring is formed. In one wiring (7a), a solder resist or the like is not formed, and the bottom surface of the wiring sinks with the surface of the surrounding insulating substrate, maintains a strong adhesive strength, and has a height up to the top surface of the wiring (7a). Are adjusted to be the same height. The wiring (7a) is the wiring of the specified part, and the positions thereof are discretely arranged, and only the wiring part at the position is insulated from the bottom of the wiring by using a laminating press method by heating and pressing. Sink below the surface of the substrate.

以下に実施例について説明する。   Examples will be described below.

図2は、本発明の実施例1の主な工程での状態を示す断面図である。厚みが50μmのポリイミドフィルム(12)(ユーピレックスS(商品名):宇部興産株式会社製)の片面に厚み12μmの接着剤(19)(タイプX(商品名)、株式会社巴川製紙所製)をラミネートした絶縁基板を金型で打抜き、スプロケットホールを形成した(図2a参照)。ラミネータの設定温度120℃、ラミネートローラー圧0.2MPa、ラミネート速度1.2m/分で接着剤側に厚みが18μmの銅箔(11)をラミネートした(図2b参照)。通常品はラミネート後に加熱して接着剤を硬化させるが、本実施例では省略し、銅箔表面を洗浄後、厚みが10μmのドライフィルムレジスト(14)(SUNFORT SPG−102(商品名):旭化成株式会社製)をロール温度105℃、圧力0.3MPa、ラミネート速度1.5m/分でラミネートした(図2c参照)。投影型露光装置で配線パターンを露光し、30℃の1%炭酸ナトリウム溶液を約30秒間スプレーで吹き付けて現像後、50℃に加熱した塩化第2鉄溶液をスプレーで吹き付けて露出した銅をエッチングし、50℃の3%水酸化ナトリウム溶液をスプレーで吹き付けてドライフィルムレジストパターン(15)を剥離した(図2d〜f参照)。以上のプロセスにてポリイミドフィルム上に所望の銅配線パターンを形成した。この状態では絶縁基板を成す接着剤上に厚みが約18μmの銅配線パターンが形成された状態である。   FIG. 2 is a cross-sectional view showing a state in the main process of the first embodiment of the present invention. Adhesive (19) (type X (trade name), Yodogawa Paper Co., Ltd.) having a thickness of 12 μm on one side of a polyimide film (12) having a thickness of 50 μm (Upilex S (trade name): Ube Industries, Ltd.) The laminated insulating substrate was punched with a mold to form a sprocket hole (see FIG. 2a). A copper foil (11) having a thickness of 18 μm was laminated on the adhesive side at a laminator setting temperature of 120 ° C., a laminating roller pressure of 0.2 MPa, and a laminating speed of 1.2 m / min (see FIG. 2 b). Usually, the adhesive is cured by heating after laminating, but this is omitted in this example, and after cleaning the copper foil surface, a dry film resist having a thickness of 10 μm (14) (SUNFORT SPG-102 (trade name): Asahi Kasei Co., Ltd.) was laminated at a roll temperature of 105 ° C., a pressure of 0.3 MPa, and a laminating speed of 1.5 m / min (see FIG. 2c). After exposing the wiring pattern with a projection type exposure apparatus, spraying a 30% 1% sodium carbonate solution with a spray for about 30 seconds, developing, then spraying a ferric chloride solution heated to 50 ° C with a spray, etching the exposed copper Then, a dry film resist pattern (15) was peeled off by spraying a 3% sodium hydroxide solution at 50 ° C. by spraying (see FIGS. 2d to 2f). A desired copper wiring pattern was formed on the polyimide film by the above process. In this state, a copper wiring pattern having a thickness of about 18 μm is formed on the adhesive forming the insulating substrate.

次に、リジッド基板用の積層プレスで段階的に加熱・加圧して最終的には140℃、圧力約1MPaにて、接着剤からの気泡の発生を抑えながら、加熱により接着剤を軟化させ、圧力によって軟化させた接着剤(29)に銅の配線(17a)を10μm程度沈み込ませ、接着剤を硬化させた(図2g参照)。   Next, the adhesive is softened by heating while suppressing generation of bubbles from the adhesive at 140 ° C. and a pressure of about 1 MPa finally by heating and pressurizing step by step with a laminating press for a rigid substrate, The copper wiring (17a) was submerged by about 10 μm in the adhesive (29) softened by pressure, and the adhesive was cured (see FIG. 2g).

更に、140℃のオーブンに5時間入れて接着剤を完全に硬化させた後、ソルダーレジストを印刷し、電解金めっきを施して、パッド幅80〜85μm、パッド間隙15〜20μmで、100μmピッチのワイヤーボンディング用パッドを含む半導体素子搭載用テー
プ基板を完成させた(図示せず)。
Furthermore, after putting the adhesive in an oven at 140 ° C. for 5 hours to completely cure the adhesive, a solder resist is printed, and electrolytic gold plating is applied, and the pad width is 80 to 85 μm, the pad gap is 15 to 20 μm, and the pitch is 100 μm. A semiconductor device mounting tape substrate including a wire bonding pad was completed (not shown).

図3は、本発明の実施例2の主な工程での状態を示す断面図である。厚みが50μmのポリエーテルエーテルケトン系の熱可塑性樹脂フィルム(22)(三菱樹脂株式会社製)の片面に厚み12μmの銅箔(21)をラミネートした基板を金型で打抜き、スプロケットホールを形成した。銅箔表面を洗浄後、ポジ型液状レジスト(24)(PMER−P(商品名):東京応化工業株式会社製)を乾燥後の厚みが2〜3μmになるような条件で塗布し乾燥させた(図3b参照)。投影型露光装置で配線パターンを露光し、25℃の専用現像液に浸漬することによって現像後、50℃に加熱した塩化第2鉄溶液をスプレーで吹き付けて露出した銅をエッチングし、50℃の3%水酸化ナトリウム溶液をスプレーで吹き付けてレジストパターン(25)を剥離した(図3c〜e参照)。   FIG. 3 is a cross-sectional view illustrating a state in the main process of the second embodiment of the present invention. A substrate obtained by laminating a 12 μm thick copper foil (21) on one side of a polyether ether ketone thermoplastic resin film (22) (manufactured by Mitsubishi Plastics Co., Ltd.) having a thickness of 50 μm was punched with a die to form a sprocket hole. . After cleaning the copper foil surface, a positive liquid resist (24) (PMER-P (trade name): manufactured by Tokyo Ohka Kogyo Co., Ltd.) was applied and dried under conditions such that the thickness after drying was 2 to 3 μm. (See FIG. 3b). After exposing the wiring pattern with a projection type exposure apparatus and immersing it in a special developer at 25 ° C., the exposed copper is etched by spraying a ferric chloride solution heated to 50 ° C. with a spray. A resist pattern (25) was peeled off by spraying a 3% sodium hydroxide solution (see FIGS. 3c to 3e).

以上のプロセスにて熱可塑性フィルム上に所望の銅の配線(27)のパターンを形成した。この状態では絶縁基板を成す熱可塑性樹脂上に厚みが約12μmの銅配線パターンが形成された状態で、形成した配線パターンの底面が最大幅となる台形に近い形状で、配線上部の幅10μm、底面の幅14μmで間隙16μmの配線パターンとなった。また、この時の配線底面に対する配線上部の幅の比を計算すると71.4%であった。なお、この割合が60%以下になると、配線はいわゆる裾をひいた断面形状になり、プレスによって配線を押しこんだ時に、裾の部分が押されずに変形してしまい、折れ曲がった状態となってしまうため、悪くても60%以上、できれば66.7%以上の裾引きの少ない形状が望ましく、数値は大きければ大きいほど埋め込み性は良い。また、配線側面は凹凸のないなだらかな形状を呈していた。   The pattern of the desired copper wiring (27) was formed on the thermoplastic film by the above process. In this state, a copper wiring pattern having a thickness of about 12 μm is formed on the thermoplastic resin constituting the insulating substrate, and the bottom surface of the formed wiring pattern has a shape close to a trapezoid whose maximum width is 10 μm. A wiring pattern having a bottom width of 14 μm and a gap of 16 μm was obtained. Further, the ratio of the width of the upper portion of the wiring with respect to the bottom surface of the wiring at this time was calculated to be 71.4%. When this ratio is 60% or less, the wiring has a cross-sectional shape with a so-called hem, and when the wiring is pushed in by a press, the hem portion is deformed without being pushed and is bent. Therefore, a shape with less tailing of 60% or more, preferably 66.7% or more is desirable at best, and the larger the numerical value, the better the embedding property. Further, the side surface of the wiring had a gentle shape with no irregularities.

次に、リジッド基板用の積層プレスで段階的に加熱・加圧して最高温度240℃、最大圧力1MPaの条件で熱可塑性樹脂フイルム(22)を軟化させ、軟化した樹脂フイルム内に銅配線(27a)を4〜8μm程度沈み込ませた(図3f参照)。沈み込ませる量は予め条件出しによって確認し、適切な沈み込み量となるよう調節することが望ましく、接続パッドなどの種類によって最適な数値に設定する必要がある。COF(Chip On
Film)接続用パッドの場合、10μmを若干下回る高さとその前後が、配線の加工性を含めて総合的に判断すると最適であった。表面にソルダーレジストを印刷し、錫めっきを施すことによって、30μmピッチのCOF接続用パッドを含む半導体素子搭載用テープ基板を完成させた(図示せず)。
Next, the thermoplastic resin film (22) is softened under the conditions of a maximum temperature of 240 ° C. and a maximum pressure of 1 MPa by stepwise heating and pressurizing with a laminating press for a rigid substrate, and copper wiring (27a ) Was submerged by about 4 to 8 μm (see FIG. 3 f). It is desirable to confirm the amount of subsidence in advance by adjusting the conditions and adjust it so that the amount of subsidence is appropriate, and it is necessary to set an optimal value depending on the type of connection pad or the like. COF (Chip On
In the case of a film) connection pad, the height slightly below 10 μm and its front and back were optimal when comprehensively judged including the processability of the wiring. By printing a solder resist on the surface and performing tin plating, a semiconductor element mounting tape substrate including a COF connection pad with a pitch of 30 μm was completed (not shown).

図4は、本発明の実施例3の主な工程での状態を示す断面図である。厚みが約10μmのエポキシ樹脂フィルム(32)の片側に厚み18μmの銅箔(31)が貼りつけられ、反対側には厚み35μmの銅箔(33)が貼り付けられた複合基板の表面を洗浄し、18μm銅箔上に乾燥後の厚みが2〜3μmになるような条件でポジ型液状レジスト(34)(PMER−P(商品名):東京応化工業株式会社製)を塗布し乾燥させた(図4a〜b参照)。投影型露光装置で配線パターンを露光し、25℃の専用現像液に浸漬することによって現像後、裏面の35μm銅箔上に保護用のPETフィルム(36)を貼り合せた(図4c〜d参照)。50℃に加熱した塩化第2鉄溶液をスプレーで吹き付けて露出した銅をエッチングし、50℃の3%水酸化ナトリウム溶液をスプレーで吹き付けてレジストパターン(35)を剥離した後、裏面のPETフィルム(36)を剥離した(図4e参照)。   FIG. 4 is a cross-sectional view showing a state in the main process of the third embodiment of the present invention. Cleaning the surface of the composite substrate in which a copper foil (31) having a thickness of 18 μm is attached to one side of an epoxy resin film (32) having a thickness of about 10 μm and a copper foil (33) having a thickness of 35 μm is attached to the opposite side. Then, a positive type liquid resist (34) (PMER-P (trade name): manufactured by Tokyo Ohka Kogyo Co., Ltd.) was applied and dried on an 18 μm copper foil under conditions such that the thickness after drying was 2 to 3 μm. (See FIGS. 4a-b). The wiring pattern was exposed with a projection type exposure apparatus, developed by immersion in a dedicated developer at 25 ° C., and then a protective PET film (36) was bonded onto the back 35 μm copper foil (see FIGS. 4c to d). ). After etching the exposed copper by spraying a ferric chloride solution heated to 50 ° C. by spraying, and spraying a 3% sodium hydroxide solution at 50 ° C. by spraying to remove the resist pattern (35), the PET film on the back side (36) was peeled off (see FIG. 4e).

以上のプロセスにて、厚みが35μmの銅箔と10μmのエポキシ樹脂層からなる複合基板のエポキシ樹脂側に、厚みが約18μmの所望の銅配線パターンを形成した。この時、形成した配線パターンを調べてみると、その底面が最大幅となる台形に近い形状で、配
線上部の幅20μm、底面の幅24μmで間隙26μmの配線パターンとなった。また、配線底面に対する配線上部の幅の比は83.3%であった。
Through the above process, a desired copper wiring pattern having a thickness of about 18 μm was formed on the epoxy resin side of the composite substrate composed of a copper foil having a thickness of 35 μm and an epoxy resin layer having a thickness of 10 μm. At this time, when the formed wiring pattern was examined, it was a shape close to a trapezoid whose bottom surface had the maximum width, and the wiring pattern had a width of 20 μm at the top of the wiring, a width of 24 μm at the bottom and a gap of 26 μm. Further, the ratio of the width of the upper portion of the wiring to the bottom surface of the wiring was 83.3%.

次に、厚みが50μmのポリイミドフィルム(38)(ユーピレックスS(商品名):宇部興産株式会社製)に、ビルドアッププリント配線板用のフィルム状絶縁シート(39)(ABF−45H(商品名):味の素ファインテクノ株式会社製)と、パターン形成した複合基板を配線(37)の面が内側になるよう重ね合わせ(図4f参照)、ロールラミネーターの温度140℃、圧力約0.5MPaにて貼り合せた。貼り合せ時の加熱によりフィルム状絶縁シート(39)は軟化し、銅配線(37a)が完全に埋め込まれた状態となった(図4g参照)。その後、150℃のオーブンで30分間加熱し、フィルム状絶縁シートを硬化させた。   Next, a polyimide film (38) having a thickness of 50 μm (Upilex S (trade name): manufactured by Ube Industries, Ltd.) and a film-like insulating sheet (39) for build-up printed wiring boards (ABF-45H (trade name)) : Ajinomoto Fine-Techno Co., Ltd.) and a composite substrate with a pattern formed so that the surface of the wiring (37) is on the inside (see FIG. 4f) and pasted at a roll laminator temperature of 140 ° C. and a pressure of about 0.5 MPa Combined. The film-like insulating sheet (39) was softened by heating at the time of bonding, and the copper wiring (37a) was completely embedded (see FIG. 4g). Then, it heated for 30 minutes in 150 degreeC oven, and the film-like insulating sheet was hardened.

50℃に加熱した塩化第2鉄溶液をスプレーで吹き付けて表面に露出した35μm銅箔(33)を除去し(図4h参照)、過マンガン酸処理にて複合基板を構成していた厚み10μmのエポキシ樹脂フィルム(32)を完全に除去した(図4i参照)。この時、配線パターン間の硬化したフィルム状絶縁シートも表面から2〜5μmの深さで同時に除去した。最後に、ソルダーレジストを印刷し、電解金めっきを施して、100μmピッチのワイヤーボンディング用パッドを含む半導体素子搭載用テープ基板を完成させた(図示せず)。   A 35 μm copper foil (33) exposed on the surface was removed by spraying a ferric chloride solution heated to 50 ° C. by spraying (see FIG. 4h), and the thickness of 10 μm constituting the composite substrate by the permanganate treatment The epoxy resin film (32) was completely removed (see FIG. 4i). At this time, the cured film-like insulating sheet between the wiring patterns was simultaneously removed at a depth of 2 to 5 μm from the surface. Finally, a solder resist was printed and electrolytic gold plating was performed to complete a semiconductor element mounting tape substrate including a wire bonding pad with a pitch of 100 μm (not shown).

(a)〜(b)は、本発明による配線と絶縁基板との位置関係を示す断面図である。(A)-(b) is sectional drawing which shows the positional relationship of the wiring by this invention, and an insulated substrate. 本発明の実施例1の主な工程での状態を示す断面図である。It is sectional drawing which shows the state in the main processes of Example 1 of this invention. 本発明の実施例2の主な工程での状態を示す断面図である。It is sectional drawing which shows the state in the main processes of Example 2 of this invention. 本発明の実施例3の主な工程での状態を示す断面図である。It is sectional drawing which shows the state in the main processes of Example 3 of this invention. 従来技術による配線と絶縁基板との位置関係を示す断面図である。It is sectional drawing which shows the positional relationship of the wiring and insulating board by a prior art.

符号の説明Explanation of symbols

2…絶縁基板
5…配線の上面の高さ位置
6…配線の底面の高さ位置
7…配線
7a…配線(埋め込まれた状態)
9…絶縁層表面の高さ位置
11…銅箔
12…ポリイミドフイルム(の絶縁基板)
14…ドライフイルムレジスト
15…ドライフイルムレジストパターン
17…配線
17a…配線(埋め込まれた状態)
21…銅箔
22…熱可塑性樹脂フイルム(の絶縁基板)
24…ポジ型液状レジスト
25…レシストパターン
27…配線
27a…配線(埋め込まれた状態)
31…18μm銅箔
32…エポキシ樹脂フイルム(の絶縁基板)
31…35μm銅箔
34…ポジ型液状レジスト
35…レジストパターン
36…PETフイルム
37…配線
37a…配線(埋め込まれた状態)
38…50μmポリイミドフイルム(の絶縁基板)
39…フイルム状絶縁シート(の絶縁基板)
2 ... Insulating substrate 5 ... Height position 6 on the upper surface of the wiring 7 ... Height position on the bottom surface of the wiring 7 ... Wiring 7a ... Wiring (embedded state)
9 ... Height position of insulating layer surface 11 ... Copper foil 12 ... Polyimide film (insulating substrate)
14 ... Dried film resist 15 ... Dried film resist pattern 17 ... Wiring 17a ... Wiring (embedded state)
21 ... copper foil 22 ... thermoplastic resin film (insulating substrate)
24 ... Positive type liquid resist 25 ... Resist pattern 27 ... Wiring 27a ... Wiring (embedded state)
31: 18 μm copper foil 32: Epoxy resin film (insulating substrate)
31 ... 35 μm copper foil 34 ... positive liquid resist 35 ... resist pattern 36 ... PET film 37 ... wiring 37a ... wiring (embedded state)
38 ... 50μm polyimide film (insulating substrate)
39 ... Film-like insulating sheet (insulating substrate)

Claims (7)

絶縁層と、その上に配線を形成した導体層とをこの順に積層し、各々の導体層に導通路を介して導通した配線回路を形成したプリント配線板において、プリント配線板の最表面の絶縁層上に形成した配線は、少なくともその一部の配線と、絶縁基板を形成する絶縁層との位置関係が、配線の底面が周辺の絶縁層を伴って沈み込んでいるか、又は絶縁層内に配線の底面の一部が周辺の絶縁層の内部まで埋め込まれた状態であって、絶縁層表面の高さの位置が、配線の底面の高さ位置から配線の上面の高さ位置までの間に形成され、且つ配線の断面の幅が最大となる部分、又は配線のコーナー部等の尖って張り出している部分の高さ位置が、絶縁層表面の高さ位置とは、同一平面上の高さ位置に形成されていないことを特徴とするプリント配線板。   In a printed wiring board in which an insulating layer and a conductor layer on which a wiring is formed are laminated in this order, and a wiring circuit that is conducted to each conductor layer through a conduction path is formed, insulation on the outermost surface of the printed wiring board For the wiring formed on the layer, the positional relationship between at least a part of the wiring and the insulating layer forming the insulating substrate is such that the bottom surface of the wiring sinks with the surrounding insulating layer, or A part of the bottom of the wiring is embedded to the inside of the surrounding insulating layer, and the height of the insulating layer surface is between the height of the bottom of the wiring and the height of the top of the wiring. The height position of the portion where the width of the cross section of the wiring is the maximum, or the sharply protruding portion such as the corner portion of the wiring is the same plane height as the height position of the insulating layer surface. Printed wiring board characterized in that it is not formed in the vertical position 前記一部の配線の底面の高さ位置は、絶縁層表面の高さ位置より、該配線の厚みに対し、1〜90%の深さの範囲まで絶縁層の内部に埋め込まれた状態で形成されており、同じ種類の部位の全ての配線は、配線の底面からの高さが同一となる位置で、絶縁層表面が形成されていることを特徴とする請求項1記載のプリント配線板。   The height position of the bottom surface of the part of the wiring is formed in a state of being embedded in the insulating layer to a depth of 1 to 90% of the thickness of the wiring from the height position of the surface of the insulating layer. 2. The printed wiring board according to claim 1, wherein all of the wirings of the same type of part have an insulating layer surface formed at a position where the height from the bottom surface of the wiring is the same. 前記一部の配線が、半導体素子、又は他のプリント配線板等との接続端子の部位であって、該接続端子の接続操作において熱及び/又は圧力を加える部位を含む配線であることを特徴とする請求項1、又は2記載のプリント配線板。   The part of the wiring is a part of a connection terminal with a semiconductor element, another printed wiring board, or the like, and includes a part to which heat and / or pressure is applied in a connection operation of the connection terminal. The printed wiring board according to claim 1 or 2. 前記配線が、配線側面が緩やかな曲面により形成されており、配線底面に対する配線の上面の幅の比が66.7%以上の配線を有し、少なくとも配線の一部が幅30μm以下であることを特徴とする請求項1乃至3のいずれか1項記載のプリント配線板。   The wiring is formed by a curved surface having a gentle wiring side surface, the wiring has a wiring whose ratio of the width of the top surface of the wiring to the bottom surface of the wiring is 66.7% or more, and at least a part of the wiring has a width of 30 μm or less. The printed wiring board according to claim 1, wherein: 前記絶縁層は、異なる樹脂からなる1層または2層以上の複合絶縁層であり、少なくとも表面に位置する絶縁層の樹脂が熱可塑性樹脂または熱硬化性樹脂からなり、可撓性を有することを特徴とする請求項1乃至4のいずれか1項記載のプリント配線板。   The insulating layer is a composite insulating layer of one layer or two or more layers made of different resins, and at least the resin of the insulating layer located on the surface is made of a thermoplastic resin or a thermosetting resin and has flexibility. The printed wiring board according to claim 1, wherein the printed wiring board is a printed wiring board. 絶縁層と、その上に配線を形成した導体層とをこの順に積層し、各々の導体層に導通路を介して導通した配線回路を形成したプリント配線板の製造方法において、請求項1乃至5のいずれか1項記載のプリント配線板の表面の絶縁層上に形成した配線を製造する方法であって、少なくともその一部の配線の製造方法は、エッチングまたはめっきによって形成した後、熱によって配線と接する部分及びその周辺の絶縁層を一時的に軟化させ、配線に圧力を加えることで、配線を絶縁層に沈み込ませるプロセスを含むことを特徴とするプリント配線板の製造方法。   6. A printed wiring board manufacturing method in which an insulating layer and a conductor layer on which wiring is formed are laminated in this order, and a wiring circuit is formed in which each conductor layer is conducted through a conduction path. A method of manufacturing a wiring formed on an insulating layer on a surface of a printed wiring board according to any one of the above, wherein at least a part of the wiring is manufactured by etching or plating and then wiring by heat A method of manufacturing a printed wiring board, comprising: a step of temporarily softening a portion in contact with the insulating layer and a surrounding insulating layer and applying pressure to the wiring to sink the wiring into the insulating layer. 前記少なくともその一部の配線の製造方法は、エッチングまたはめっきによって配線形成後、転写法によって別の基板の絶縁層に配線を形成するプロセスを含むことを特徴とする請求項6記載のプリント配線板の製造方法。   7. The printed wiring board according to claim 6, wherein the manufacturing method of at least a part of the wiring includes a process of forming a wiring on an insulating layer of another substrate by a transfer method after the wiring is formed by etching or plating. Manufacturing method.
JP2004051329A 2004-02-26 2004-02-26 Printed circuit board and its manufacturing method Pending JP2005243899A (en)

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US8166652B2 (en) 2008-09-05 2012-05-01 Unimicron Technology Corp. Method of making a circuit structure of a circuit board
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JP2007234841A (en) * 2006-02-28 2007-09-13 Kyocera Corp Wiring board, mounting component, electronic apparatus, manufacturing method of wiring board, and manufacturing method of electronic apparatus
JP2008047603A (en) * 2006-08-11 2008-02-28 Seiko Epson Corp Semiconductor device and its manufacturing method
US8166652B2 (en) 2008-09-05 2012-05-01 Unimicron Technology Corp. Method of making a circuit structure of a circuit board
US8466369B2 (en) 2008-09-05 2013-06-18 Unimicron Technology Corp. Circuit structure of circuit board
JP2013507777A (en) * 2009-10-19 2013-03-04 巨擘科技股▲ふん▼有限公司 Metal layer structure of flexible multilayer substrate and manufacturing method thereof
JP2012212827A (en) * 2011-03-31 2012-11-01 Hitachi Chem Co Ltd Manufacturing method of package substrate for mounting semiconductor element
JP2013058728A (en) * 2011-08-17 2013-03-28 Daisho Denshi Co Ltd Printed wiring board and method for manufacturing the same
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DE102013226544B4 (en) * 2013-02-13 2021-02-18 Arigna Technology Ltd. Semiconductor device
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