JP2005183587A - Manufacturing method for printed-circuit board and semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To improve the insulation reliability and yield of a printed-circuit board. <P>SOLUTION: The printed-circuit board is manufactured as follows: first, a base material of a triple-layer structure is formed by gluing an insulating layer 10 to a conductive layer 12 via a thermoplastic adhesive 11. Then the conductive layer 12 is shaped into a prescribed circuit pattern, and is pressurized while being subjected to heat that is higher than the melting temperature of the thermoplastic adhesive 11, then is embedded in the thermoplastic adhesive 11. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a method for manufacturing a printed wiring board and a semiconductor device, and more particularly, a manufacturing method for improving the insulation reliability and manufacturing yield of a printed wiring board, and a semiconductor using the printed wiring board manufactured by this manufacturing method. Relates to the device.

  For example, printed circuit boards such as TAB carrier tape, COF (Chip On Film) carrier tape, and FPC (Flexible Print Circuit) are used for liquid crystal drivers such as monitors and portable devices, semiconductor ICs, or components. It is used for various purposes such as cables for mounting.

  This type of printed wiring board is generally manufactured through a complicated process as shown in FIG. That is, first, a conductor layer 12 made of copper or the like formed in a predetermined wiring circuit pattern is laminated on an insulating layer 10 made of polyimide or the like serving as a substrate of a printed wiring board, and the surface of the conductor layer 12 is degreased, chemically polished, etc. (A). Next, after the photoresist 14 is applied to the surface of the conductor layer 12 (b), the photoresist 14 is irradiated with ultraviolet rays 18 through an exposure mask 16 on which a predetermined wiring circuit pattern is formed ( c). Thereafter, the photoresist 14 is developed to leave a portion of the photoresist 14 corresponding to the wiring circuit pattern (d). Furthermore, by performing an etching process using an etching solution, the conductor layer 12 in a portion where the photoresist 14 does not remain is removed (e). Thereafter, the remaining photoresist 14 is peeled off to obtain the conductor layer 12 formed in a predetermined wiring circuit on the insulating layer 10 (f). Thereafter, the conductor layer 12 (#a) other than the connection terminal among these conductor layers 12 is embedded by the solder resist 20 (g), and the surface of the conductor layer 12 (#b) serving as the connection terminal is tin (Sn). ), Nickel (Ni), gold (Au) or the like, and surface treatment 22 is performed (h). In this way, the printed wiring board 34 is manufactured.

As for the method for manufacturing the printed wiring board 34, various inventions have been made in addition to the method shown in the above steps in order to improve manufacturability. For example, Patent Document 1 describes a manufacturing method in which a wiring circuit does not peel from an insulating layer.
JP-A-9-64514 JP 2000-332387 A

  However, such a conventional printed wiring board manufacturing method has the following problems.

  The printed wiring board 34 is manufactured through the complicated processes as described above. With the recent demands for lightness, thinness, high density, and small packaging, the wiring pitch (wiring width / wiring space) is required. Tends to become finer year by year, and the demands on the manufacturing side are becoming increasingly severe.

  For this reason, there are problems that the insulation reliability between adjacent wirings is lowered and the manufacturing yield is lowered. Therefore, there is a problem that the reliability of a semiconductor device using such a printed wiring board 34 is also lowered.

  First, in the routing portion of the printed wiring board 34, as shown in FIG. 5A, which is a partially enlarged view near the conductor layer 12 (#a) other than the connection terminals, the solder resist 20 after the wiring circuit pattern is printed. When air is laminated, air is wound around the side wall surface of the wiring circuit pattern to form the void 24. Such voids 24 are more likely to occur as the wiring pitch becomes smaller, causing a problem in appearance and causing a decrease in manufacturing yield.

  Further, when a reliability test such as a temperature cycle test, a solder heat resistance test, and a high temperature storage test is performed in a state where the void 24 exists between the wiring circuits, the air in the void 24 expands during the test, and the solder resist 20 There is a problem that partly peels off.

  Further, when the solder resist 20 is partially peeled, the exposed wiring circuit pattern is corroded, and there is a problem that reliability is lowered, such as disconnection of the wiring circuit pattern or short-circuiting of the wiring due to ion migration.

  Next, as shown in FIG. 5B, which is a partially enlarged view near the conductor layer 12 (#b), which is a connection terminal, when a semiconductor chip 26 such as an LSI or IC is mounted, the printed wiring board 34 and A gap between the semiconductor chip 26 is filled with a sealing resin 30 as a sealing material by a side potting method. At the time of sealing, the surface of the printed wiring board 34 is uneven due to the presence of the wiring circuit pattern, that is, the conductor layer 12 (#b). There is a problem in that 100% filling cannot be achieved, resulting in a decrease in manufacturing yield and reliability.

  In addition to the problem that 100% of the sealing resin 30 is not filled, a wiring circuit pattern protruding on the surface of the printed wiring board 34 due to surface tension during filling, that is, on the side wall surface of the conductor layer 12 (#b). Such voids 24 in which air is entrained to form the voids 24 have a problem in that the appearance is deteriorated and the manufacturing yield is lowered.

  Further, when a reliability test such as a temperature cycle test, a solder heat resistance test, a high temperature storage test or the like is performed in a state where such a void 24 exists, the air in the void 24 expands during the test, and the sealing resin 30 However, there is a problem that reliability is lowered, such as partial peeling (popcorn phenomenon), corrosion of the exposed wiring circuit pattern, and disconnection of the connection portion or short-circuiting of the wiring due to ion migration.

  Such a problem increases as the wiring pitch decreases. Such a problem is also pointed out in Patent Document 2 described above.

  The present invention has been made in view of such circumstances, and an object of the present invention is to provide a method for manufacturing a printed wiring board capable of improving the insulation reliability of the printed wiring board and thereby improving the manufacturing yield. And It is another object of the present invention to provide a highly reliable semiconductor device by using a printed wiring board manufactured by this manufacturing method.

  In order to achieve the above object, the present invention takes the following measures.

  That is, the invention of claim 1 forms a three-layer structure base material formed by bonding an insulating layer and a conductor layer with a thermoplastic adhesive, and forms the conductor layer in a predetermined wiring circuit pattern. This is a method for producing a printed wiring board by applying pressure while applying a temperature equal to or higher than the melting temperature of the thermoplastic adhesive and embedding it in the thermoplastic adhesive.

  The invention of claim 2 uses polyimide or epoxy as the thermoplastic adhesive in the method of the invention of claim 1.

  According to a third aspect of the present invention, in the method of the first or second aspect of the present invention, the thickness of the conductor layer and the thermoplastic adhesive in the three-layer structure base material is made substantially the same.

  Therefore, in the method for manufacturing a printed wiring board according to the first to third aspects of the invention, the solder resist embedding process, which has been performed in the prior art, becomes unnecessary by taking the above-described means. As a result, it is possible to prevent the void from being generated during the solder resist embedding process.

  Even when a semiconductor chip such as LSI or IC is mounted and a sealing resin as a sealing material is filled in a gap between the semiconductor chip by a side potting method, it is connected to the bump electrode of the semiconductor chip. Since there are no irregularities between the conductor layers, the entire gap can be filled with 100% of the sealing resin, and the generation of voids can be prevented.

  As described above, since the generation of voids can be prevented, the insulation reliability of the printed wiring board can be further improved and the manufacturing yield can be increased. Further, even when reliability tests such as a temperature cycle test, a solder heat resistance test, and a high temperature storage test are performed, it is possible to provide high reliability with no wiring short-circuit due to ion migration.

  According to the invention of claim 4, a three-layer structure base material is formed by bonding an insulating layer and a conductor layer with a thermoplastic adhesive, the conductor layer is formed in a predetermined wiring circuit pattern, and the conductor layer is This is a semiconductor device using a printed wiring board manufactured by applying pressure while applying a temperature equal to or higher than the melting temperature of the plastic adhesive and embedding it in the thermoplastic adhesive.

  The invention of claim 5 is a semiconductor device in which a bump electrode of a semiconductor element is connected to a wiring circuit pattern of a printed wiring board provided with a predetermined wiring circuit pattern. The insulating layer to be formed and the conductor layer formed in the predetermined wiring circuit pattern are bonded by a thermoplastic adhesive having a thickness equal to or greater than the thickness of the conductor layer and the height of the bump electrode. A three-layer structure substrate is formed. Next, the conductor layer is formed in the predetermined wiring circuit pattern. Further, the corresponding bump electrode is brought into contact with a predetermined position of the wiring circuit, and the bump electrode is pressurized along the height direction while applying a temperature equal to or higher than the melting temperature of the thermoplastic adhesive, and the bump electrode It is manufactured by embedding it in the thermoplastic adhesive together with a wiring circuit that comes into contact therewith.

  Therefore, in the semiconductor device according to the fourth and fifth aspects of the present invention, since the generation of voids can be prevented by using the printed wiring board manufactured by the manufacturing method as described above, the reliability is improved. It is possible to realize a semiconductor device that achieves the above.

  According to the present invention, it is possible to realize a printed wiring board manufacturing method capable of preventing the generation of small voids and thereby improving the insulation reliability of the printed wiring board and the manufacturing yield.

  Furthermore, since the thickness of the surface protective film such as solder resist can be reduced by using the printed wiring board manufactured by such a manufacturing method, the material and cost to be used can be further reduced and the flexibility is excellent. A printed wiring board can be realized.

  Further, by using a printed wiring board manufactured by such a manufacturing method, a semiconductor device with improved reliability can be realized.

  The best mode for carrying out the present invention will be described below with reference to the drawings.

  In addition, the code | symbol in the figure used for description of each following form attaches | subjects and shows the same code | symbol about the same part as FIG. 4 thru | or FIG.

[Example 1]
A first embodiment of the present invention will be described with reference to FIGS.

  FIG. 1 is a process diagram showing an example of a method for manufacturing a printed wiring board according to the present embodiment.

  That is, as shown in FIG. 1A, the printed wiring board manufacturing method according to the present embodiment is first formed in an insulating layer 10 that is a base material of a printed wiring board such as polyimide and a predetermined wiring circuit pattern. A three-layer structure base material is formed by adhering the conductor layer 12 such as copper to a thermoplastic adhesive 11 such as thermoplastic polyimide or epoxy, and the surface of the conductor layer 12 is cleaned by degreasing, chemical polishing, or the like. To do. The thicknesses of the insulating layer 10, the thermoplastic adhesive 11, and the conductor layer 12 are, for example, 25 to 50 μm, 1 to 15 μm, and 9 to 12 μm, respectively.

  Next, the conductor layer 12 is formed in a pattern composed of a predetermined wiring circuit by performing the steps shown in FIGS. 1B to 1J. That is, as shown in FIG. 1B, after a photoresist 14 is applied to the surface of the conductor layer 12, as shown in FIG. 1C, through an exposure mask 16 on which a predetermined wiring circuit pattern is formed. Then, ultraviolet rays 18 are irradiated toward the photoresist 14. Thereafter, the photoresist 14 is developed to leave a portion of the photoresist 14 corresponding to the wiring circuit pattern, as shown in FIG. Further, as shown in FIG. 1E, an etching process is performed using an etching solution to remove the conductor layer 12 in the opening portion where the photoresist 14 does not remain. Thereafter, as shown in FIG. 1F, the remaining photoresist 14 is peeled off to obtain a conductor layer 12 formed on the insulating layer 10 in a predetermined wiring circuit.

  Next, as shown in FIG. 1G, a surface protective film 19 is formed on the entire exposed surface of the conductor layer 12 formed in a predetermined wiring circuit by a conventional surface treatment method such as electrolytic or electroless plating. To do. Specifically, the surface protective film 19 is formed by depositing Ni from about 1 μm to 5 μm and further depositing Au from about 0.05 μm to 0.3 μm thereon. Alternatively, 0.05 μm to 0.3 μm of Au may be directly deposited on the entire exposed surface of the conductor layer 12. Further, tin may be used instead of Au.

  Next, as shown in FIG. 1 (h), a pair of rollers 32 (#a) and 32 (#b) provided with a heater (not shown) is heated to a temperature equal to or higher than the melting temperature of the thermoplastic adhesive 11. While applying a predetermined pressure along the arrow direction P, the rollers 32 (#a) and 32 (#b) are advanced along the traveling direction F while rotating along the rotational direction f. As a result, the conductor layer 12 is embedded in the thermoplastic adhesive 11 together with the surface protective film 19. As a result, the surface of the printed wiring board 34 is flattened as shown in FIG.

  That is, the thickness of the thermoplastic adhesive 11 is larger than the value obtained by adding the thickness of the conductor layer 12 and the thickness of the surface protective film 19. Note that the thickness of the surface protective film 19 is, for example, about 0.05 μm to 0.3 μm, and is sufficiently smaller than the thickness of the conductor layer 12 (#b) (for example, 9 to 12 μm). It can be substantially regarded as the conductor layer 12 (#b).

  The method of embedding in the thermoplastic adhesive 11 is intermittent in addition to the method described above, but the conductor layer 12 is surface-protected by heating and pressing using an existing high temperature / high pressure press while applying temperature. It is embedded in the thermoplastic adhesive 11 together with the film 19, and then this high-temperature / high-pressure press is conveyed for a predetermined distance along the direction F on the printed circuit board 34, where the conductor layer 12 is similarly applied to the surface protective film. 19 and 19 may be repeated by being embedded in the thermoplastic adhesive 11.

  Finally, as shown in FIG. 1 (j), a liquid or film-like solder resist 20 is applied or laminated to the connection terminal outside region 23 which is a region including the conductor layer 12 (#a) other than the connection terminal, A surface protective film is formed. In this way, the surface of the printed wiring board 34 is flattened. In addition, 21 is a connection terminal area | region which is an area | region including the conductor layer 12 (#b) which is a connection terminal. The solder resist 20 used here may be either photosensitive or non-photosensitive.

  In addition, a multilayer substrate can be formed by stacking a plurality of printed wiring boards 34 as shown in FIG. Since the surface of the printed wiring board 34 as shown in FIG. 1 (i) is flat, by bonding the printed wiring boards 34 together with an adhesive, the bonding condition is good, and an excess amount is obtained. A multilayer printed wiring board that does not generate a thickness can be realized. In this case, the adhesive may be bonded by the thermoplastic adhesive 11 in the region where the conductor layer 12 is not embedded without using a special adhesive.

  Next, the operation of the printed wiring board manufacturing method according to the present embodiment configured as described above will be described.

  That is, according to the method for manufacturing a printed wiring board according to the present embodiment, the void 24 generated by air entrainment in the application or lamination process of the solder resist 20 as shown in FIG. A method for manufacturing the printed wiring board 34 capable of improving the manufacturing yield and reliability can be realized.

  Further, when a multilayer substrate is formed using a plurality of printed wiring boards 34 manufactured in this way, the printed wiring boards 34 as shown in FIG. 1 (i) are easily formed by bonding them together with an adhesive. Is done. In this case, since the surface of each printed wiring board 34 is flattened, the degree of bonding is good and no extra thickness is generated.

  In this case, it is also possible to bond with the thermoplastic adhesive 11 in the region where the conductor layer 12 is not embedded. This eliminates the need for a special adhesive for bonding the printed wiring boards 34 to each other, saving resources and labor.

  In addition, the manufacturing method of the printed wiring board which concerns on a present Example as mentioned above is not only flexible printed wiring boards, such as TCP, COF, and FPC, but also the printed wiring board using normal glass-epoxy etc. It can also be applied to. In this embodiment, as shown in FIG. 1A, a three-layer structure base material in which a thermoplastic adhesive 11 is applied on an insulating layer 10 and a conductor layer 12 is laminated thereon is formed. However, conversely, the thermoplastic adhesive 11 may be applied on the conductor layer 12 and the insulating layer 10 may be laminated thereon to form a three-layer structure base material. The present invention is also applicable to a case where a thermoplastic adhesive 11 is applied to the insulating layer 10 and then a wiring circuit is formed by sputtering plating or the like.

  In this example, after the wiring circuit was formed as shown in FIG. 1 (f), the surface treatment was performed as shown in FIG. 1 (g), but after the process shown in FIG. 1 (f), FIG. Surface treatment may be performed after the treatment shown in (h) is performed and the conductor layer 12 is embedded in the thermoplastic adhesive 11.

  FIG. 2 is a cross-sectional view showing an example of a semiconductor device 36 using the printed wiring board 34 manufactured by such a manufacturing method.

  That is, the semiconductor device 36 shown in FIG. 2 aligns the conductor layer 12 (#b) of the printed wiring board 34 and the bump electrode 25 formed in advance on the semiconductor chip 26 by using a conventional alignment method, A face-down bonding method is used to connect using a Pb—Sn solder bonding material or an Au—Sn based or Sn—Ag—Cu based leadless solder bonding material. Next, a sealing resin 30 as a sealing material is filled in a gap formed by the semiconductor chip 26 and the printed wiring board 34 by a side potting method. Thus, the semiconductor device 36 using the printed wiring board 34 manufactured by the manufacturing method of the present invention is manufactured.

  In such a semiconductor device 36, since the substrate surface of the printed wiring board 34 is flat, the resistance on the surface is reduced, the flow when the sealing resin 30 is filled becomes smooth, and the void 24 is formed. Accordingly, the sealing resin 30 can be filled uniformly and completely between the corners of the semiconductor chip 26 and the printed wiring board 34.

  Furthermore, since the generation of voids 24 as shown in FIG. 5B can be prevented, the manufacturing yield can be increased. As described above, it is possible to realize the semiconductor device 36 with further improved reliability.

[Example 2]
A second embodiment of the present invention will be described with reference to FIG.

  FIG. 3 is a process diagram illustrating an example of manufacturing a semiconductor device using a printed wiring board manufactured by the method for manufacturing a printed wiring board according to the second embodiment.

  In this case, first, as shown in FIG. 3A, an insulating layer 10 which is a base material of a printed wiring board such as polyimide and a conductor layer 12 such as copper formed in a predetermined wiring circuit pattern are heated. A three-layer structure substrate formed by bonding with a thermoplastic adhesive 11 such as plastic polyimide or epoxy is formed. At this time, as shown in FIG. 3J, the thickness W of the thermoplastic adhesive 11 is equal to the thickness T of the conductor layer 12 (#b) serving as the connection terminal and the bump electrode 25 provided on the semiconductor chip 26. More than the value obtained by adding the height H, that is, W ≧ (T + H). The thickness T of the conductor layer 12 (#b) includes the thickness of the surface protective film 19, but as described above, the thickness of the surface protective film 19 is larger than the thickness of the conductor layer 12 (#b). Since it is sufficiently small, this thickness T can be regarded substantially as the conductor layer 12 (#b).

  Next, the conductor layer 12 is formed in a pattern composed of a predetermined wiring circuit by performing the steps as shown in FIGS. 3B to 3G. Since this step is the same as that shown in FIGS. 1B to 1G, duplicate explanation is avoided.

  In FIG. 3H, only the conductor layer 12 (#a) is embedded in the thermoplastic adhesive 11 together with the surface protective film 19 in the same manner as in FIG. Further, as shown in FIG. 3I, a liquid or film-like solder resist 20 is applied or laminated on the connection terminal outer region 23 to form a surface protective film.

  Next, as shown in FIG. 3 (j), with the bump electrode 25 corresponding to the semiconductor chip 26 in contact with a predetermined position of the conductor layer 12 (#b), a thermoplastic adhesive is attached to the semiconductor chip 26. While applying a temperature equal to or higher than the melting temperature of the agent 11, the pressure is applied by the high temperature / high pressure press 33 in the depth direction P indicated by the arrow in the figure. As a result, as shown in FIG. 3 (k), the conductor layer 12 (#b) and the bump electrode 25 in contact with the conductor layer 12 (#b) are both embedded in the thermoplastic adhesive 11, thereby forming a semiconductor chip on the printed wiring board 34. 26 is mounted, and the semiconductor device 36 is manufactured. In addition, when applying this manufacturing method, what approximated the mounting temperature and pressure of the semiconductor chip 26 and a base material, and the melting temperature and embedding pressure of the thermoplastic adhesive 11 is used.

  In the semiconductor device 36 manufactured in this way, the gap between the semiconductor chip 26 and the printed wiring board 34 is filled with the thermoplastic adhesive 11, so that it is not necessary to fill the sealing resin 30 that is a sealing material. Therefore, it is possible to prevent the generation of voids in the gap.

  Therefore, it is possible to further improve the insulation reliability of the semiconductor device 36 and increase the manufacturing yield. Further, even when reliability tests such as a temperature cycle test, a solder heat resistance test, and a high temperature storage test are performed, it is possible to provide high reliability with no wiring short-circuit due to ion migration.

  The best mode for carrying out the present invention has been described above with reference to the accompanying drawings, but the present invention is not limited to such a configuration. Within the scope of the invented technical idea of the scope of claims, a person skilled in the art can conceive of various changes and modifications. The technical scope of the present invention is also applicable to these changes and modifications. It is understood that it belongs to.

Process drawing which shows an example of the manufacturing method of the printed wiring board which concerns on Example 1 of this invention. FIG. 5 is an elevational sectional view showing an example of a semiconductor device using a printed wiring board manufactured by this manufacturing method. Process drawing which shows an example in the case of manufacturing a semiconductor device with the printed wiring board manufactured by the manufacturing method of the printed wiring board which concerns on Example 2 of this invention. Process drawing which shows the manufacturing method of the printed wiring board by a prior art. The printed wiring board which shows the generation | occurrence | production location of a void, and the fragmentary sectional view of a semiconductor device.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 10 ... Insulating layer, 11 ... Thermoplastic adhesive, 12 ... Conductive layer, 14 ... Photoresist, 16 ... Exposure mask, 18 ... Ultraviolet, 19 ... Surface protective film, 20 ... Solder resist, 21 ... Contact terminal area, 22 ... Surface layer treatment, 23 ... outside contact terminal area, 24 ... void, 25 ... bump electrode, 26 ... semiconductor chip, 30 ... sealing resin, 32 ... roller, 33 ... high temperature / high pressure press, 34 ... printed wiring board, 36 ... semiconductor apparatus

Claims (5)

Forming a three-layer structure substrate formed by adhering an insulating layer and a conductor layer with a thermoplastic adhesive;
Forming the conductor layer in a predetermined wiring circuit pattern;
A method in which a printed wiring board is manufactured by pressurizing the conductor layer while applying a temperature equal to or higher than the melting temperature of the thermoplastic adhesive and embedding it in the thermoplastic adhesive. The method of claim 1, wherein
A method using polyimide or epoxy as the thermoplastic adhesive. The method according to claim 1 or claim 2, wherein
A method in which the thickness of the conductor layer and the thermoplastic adhesive in the three-layer structure substrate is substantially the same. Forming a three-layer structure substrate formed by adhering an insulating layer and a conductor layer with a thermoplastic adhesive;
Forming the conductor layer in a predetermined wiring circuit pattern;
A semiconductor device using a printed wiring board manufactured by pressurizing the conductor layer while applying a temperature equal to or higher than a melting temperature of the thermoplastic adhesive and embedding the conductor layer in the thermoplastic adhesive. A semiconductor device in which bump electrodes of a semiconductor element are connected to a wiring circuit pattern of a printed wiring board provided with a predetermined wiring circuit pattern,
Heat having a thickness equal to or greater than the sum of the thickness of the conductor layer and the height of the bump electrode, the insulating layer serving as the base material of the printed wiring board and the conductor layer formed in the predetermined wiring circuit pattern Forming a three-layer structure base material bonded by a plastic adhesive;
Forming the conductor layer in the predetermined wiring circuit pattern;
Abutting the corresponding bump electrode at a predetermined position of the wiring circuit;
The bump electrode is manufactured by pressurizing along the height direction while applying a temperature equal to or higher than the melting temperature of the thermoplastic adhesive, and embedding it in the thermoplastic adhesive together with a wiring circuit contacting the bump electrode. A semiconductor device.

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