JP2005236151A - Manufacturing method of semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide the manufacturing method of a semiconductor device whereby the short circuit of its wiring patterns which is caused by particles containing Al can be prevented, and to improve the coverage of a surface protecting film formed on its wiring patterns. <P>SOLUTION: In the manufacturing method by using as a mask a photoresist film 20, a wet etching is performed to an Al-Si film 12. Thereafter, by using as a mask the photoresist film 20, a dry etching is performed by the etching gas containing Cl<SB>2</SB>, BCL<SB>3</SB>, and N<SB>2</SB>. Therefore, since the particles generated from the Al-Si film 12 by the dry etching so ride on the flow of the etching gas as not to stick to any etched surface, the short circuit generated between wiring patterns can be suppressed. Also, since the peripheral surface of the opening portion of the Al-Si film 12 becomes a gentle inclined surface, when forming a surface protecting film out of a BSG, etc., its coverage becomes favorable. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a semiconductor device manufacturing method, and more particularly to a manufacturing method including a step of forming a Ti / TiN film as a barrier metal.

When an Al-Si film or Al-Si-Cu film is used as a wiring in a MOSFET or IGBT manufacturing process, a thin Ti / TiN film is used as a barrier to prevent precipitation of Si nodules and formation of Al spikes. Sometimes formed as metal. At this time, a method of etching these films with a gas containing Cl ₂ is known (see, for example, Patent Document 1). According to this method, there is an advantage that it can be removed at once without switching the etching conditions in the middle. FIG. 5 is a cross-sectional view showing a wiring pattern manufacturing method according to the prior art. In FIG. 5, 50 is a silicon wafer, 51 is a Ti / TiN film, 52 is an Al-Si film, 70 is a photoresist film, 71 is an opening, 72 is an etching gas, 73 is a particle, and 74 is a residue.

That is, as shown in FIG. 5A, a Ti / TiN film 51 in which a TiN film is laminated on a Ti film is formed on the surface of a silicon wafer 50, and an Al-Si film 52 is further laminated thereon. Form. Next, as shown in FIG. 5B, a photoresist film 70 is formed on the Al—Si film 52, and an opening 71 and the like are formed and patterned. Further, the Al—Si film 52 and the Ti / TiN film 51 are continuously removed with a gas containing Cl ₂ or the like. Then, as shown in FIG. 5C, if the silicon wafer 50 is removed until it is exposed, the Al—Si film 52 can be formed in a predetermined wiring pattern, and Si nodules are formed from the underlying TiN film. Precipitation can be prevented.

  By the way, during this dry etching, particles containing Al may get on the surface of the Al—Si film 52 along the flow of the etching gas 72. Then, as shown in FIG. 5C, the Al—Si film 52 and the Ti / TiN film 51 below the particles 73 are not removed but remain as columnar residues 74. Since the residue 74 formed between the wiring patterns contains Al, a short circuit is likely to occur, which causes a decrease in the reliability of the semiconductor device to be manufactured.

Further, when a surface protection film is formed on a wiring pattern with a high heat-resistant polyimide such as PIX (registered trademark) or PSG (Pospho-silicate Glass) after the process shown in FIG. There was a problem that the coverage of the protective film was poor. That is, since a step is easily formed on the surface protective film at the sharp surface of the Al—Si film 52, it is difficult to flatten the surface.
JP-A-7-122567 described on pages 3 to 4 and FIGS. 1 and 5

  In view of the above problems, it is a first object of the present invention to provide a method for manufacturing a semiconductor device that can prevent a short circuit of a wiring pattern caused by particles containing Al. A second object is to improve the coverage of the surface protective film formed on the wiring pattern.

  As means for solving the above-mentioned problems, the present invention provides a method for manufacturing a semiconductor device, comprising: a first step of forming a Ti film and a TiN film on a main surface of a semiconductor substrate by stacking; A second step of forming an Al-Si film or an Al-Si-Cu film on the TiN film; and a second step of forming a photoresist film in a predetermined pattern on the Al-Si film or the Al-Si-Cu film. Step 4, wet etching the Al-Si film or the Al-Si-Cu film with the photoresist film as a mask, and the TiN film and the Ti film with the photoresist film as a mask. It has the 5th process of dry-etching.

  Therefore, according to the above means, the Al—Si film or the Al—Si—Cu film is removed by wet etching, and the TiN film and the Ti film are removed by dry etching. It is possible to prevent generation of residues between the wiring patterns without getting on and sticking to the surface being etched. In addition, since the Al—Si film or the Al—Si—Cu film is isotropically etched, the slope of the portion facing the opening of these films becomes gentle, and the coverage of the surface protective film is improved.

  The semiconductor device manufacturing method may further include a step of etching Si residue of the semiconductor substrate with hydrofluoric acid between the fourth step and the fifth step.

  Further, the present invention can further include a baking step for evaporating residual moisture of the semiconductor substrate between the fourth step and the fifth step in the method for manufacturing a semiconductor device. .

  In the present invention, the etching conditions are switched between the Al—Si film or the Al—Si—Cu film, the TiN film and the Ti film, and the generation of particles containing Al can be prevented. The reliability of the semiconductor device can be improved. Also, the coverage of the surface protective film is improved.

  The present invention provides wet etching for an Al-Si film and dry etching for a TiN film and a Ti film in a manufacturing process of a wiring pattern such as an insulated gate field effect transistor (MOSFET) or an insulated gate bipolar transistor (IGBT). The greatest feature is in performing etching. Hereinafter, embodiments having this feature will be described with reference to the drawings.

  Example 1 of the present invention will be described in detail with reference to the drawings. 1 to 3 are cross-sectional views (1) to (3) showing a manufacturing process of a wiring pattern according to the first embodiment of the present invention. 1 to 3, 10 is a silicon wafer, 11 is a Ti / TiN film, 12 is an Al-Si film, 13 is an opening, 14 is an opening, 20 is a photoresist film, 21 is an opening, and 22 is an etching. Indicates gas. 1 to 3 show only the processes related to the formation of the wiring pattern of the semiconductor device.

  As shown in FIG. 1A, a TiN film is laminated on a Ti film to form a Ti / TiN film 11 serving as a barrier metal by sputtering, and an Al-Si film 12 is further formed thereon by sputtering. In order to improve the adhesion of the Ti / TiN film 11, it is preferable to silicide the lower surface side of the Ti film with RTA before the formation of the Al—Si film 12. Then, a photoresist film 20 is formed on the Al—Si film 12, and unnecessary portions are removed so as to match the wiring pattern. At this time, the photoresist film 20 has an opening 21 for pattern formation.

Next, as shown in FIG. 1B, the Al—Si film 12 exposed to the opening 21 is removed by wet etching using the photoresist film 20 as a mask. The etching solution is preferably a mixed solution of 72% phosphoric acid (H ₃ PO ₄ ), 3% nitric acid (HNO ₃ ), and 7% acetic acid (CH ₃ COOH), but other solutions may be used. Is possible. At this time, the peripheral surface of the opening 13 formed in the Al—Si film 12 becomes an inclined surface characteristic of wet etching. This wet etching is performed until the Ti / TiN film 11 is exposed in the opening 13 as shown in FIG. In order to remove the Si residue on the surface of the Ti / TiN film 11 with certainty, it is preferable to perform etching for a short time with hydrofluoric acid after this wet etching.

Further, as shown in FIG. 2D, dry etching is performed with an etching gas 22 containing Cl ₂ , BCL _3, and N ₂ using the photoresist film 20 as a mask. Although depending on the type of the semiconductor device, the thickness of the Ti / TiN film 11 is approximately 0.3 μm or less, and the state shown in FIG. 2 (f) is reached in one minute or less. In order to remove the residue of the Ti / TiN film 11 with certainty, it is preferable to perform etching with dilute hydrofluoric acid for a short time after this dry etching.

  Then, as shown in FIG. 3E, the photoresist film 20 is removed. Although not shown, after the above steps, a surface protective film is formed with high heat resistant polyimide, PSG, BPSG (Boro-Phospho Silicate Glass), or the like so as to cover the Al—Si film 12 and the like.

  Therefore, according to the present invention, since unnecessary portions of the Al—Si film 12 are removed by wet etching, no residue is generated due to scattering and adhesion of particles. In addition, since the peripheral surface of the opening of the Al—Si film 12 is a gently inclined surface, the surface of the surface protective film can be made relatively flat. In addition, since the dry etching time becomes very short, the photoresist film 20 should be made thinner than the conventional manufacturing process in which the thickness of the photoresist film 20 must be equal to or about 1.5 times that of the Al-Si film 12. Can do.

  Furthermore, the detailed conditions regarding the above process are demonstrated. FIG. 4 is an explanatory diagram showing detailed conditions of the manufacturing process according to the embodiment of the present invention. The conditions shown in FIG. 4 indicate the process from the formation of the Ti / TiN film 11 to the baking of the Al—Si film 12, and it has been found preferable by the study of the present inventors. However, conditions such as processing time differ somewhat depending on the semiconductor device to be manufactured, and the present invention is not limited to these conditions.

It is sectional drawing (1) which shows the manufacturing process of the wiring pattern which concerns on Example 1 of this invention. It is sectional drawing (2) which shows the manufacturing process of the wiring pattern which concerns on Example 1 of this invention. It is sectional drawing (3) which shows the manufacturing process of the wiring pattern which concerns on Example 1 of this invention. It is explanatory drawing which shows the detailed conditions of the manufacturing process which concerns on the Example of this invention. It is sectional drawing which shows the manufacturing method of the wiring pattern which concerns on a prior art.

Explanation of symbols

10: silicon wafer 11: Ti / TiN film 12: Al-Si film 13: opening 14: opening 20: photoresist film 21: opening 22: etching gas 50: silicon wafer 51: Ti / TiN film 52: Al -Si film 70: Photoresist film 71: Opening 72: Etching gas 73: Particle 74: Residue

Claims (3)

A first step of stacking and forming a Ti film and a TiN film on one main surface of the semiconductor substrate;
A second step of forming an Al-Si film or an Al-Si-Cu film on the TiN film;
A third step of forming a photoresist film in a predetermined pattern on the Al-Si film or the Al-Si-Cu film;
A fourth step of wet-etching the Al-Si film or the Al-Si-Cu film using the photoresist film as a mask;
A method for manufacturing a semiconductor device, comprising: a fifth step of dry etching the TiN film and the Ti film using the photoresist film as a mask. 2. The method of manufacturing a semiconductor device according to claim 1, further comprising a step of etching Si residue of the semiconductor substrate with hydrofluoric acid between the fourth step and the fifth step. 3. . The method for manufacturing a semiconductor device according to claim 1, further comprising a baking step for evaporating residual moisture of the semiconductor substrate between the fourth step and the fifth step.

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