JP2009253000A - Method of manufacturing semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To remove residues after patterning an electrode film on one principal surface side of a wafer without affecting the other principal surface side even if a curvature is generated on the wafer in a method of manufacturing an insulation gate type semiconductor device that includes a step of forming an Al-based alloy electrode film on the one principal surface of a thin wafer of 200 μm. <P>SOLUTION: In the method of manufacturing the semiconductor device, residues including Si are removed by a sheet type spin etching system in two stages of nitrohydrofluoric acid and dilute hydrofluoric acid in this order after the Al-based alloy electrode film 25 consisting principally of Al and containing at least Si is patterned when the Al-based alloy electrode film 25 is formed on a wafer 20 of not larger than 200 μm in thickness according to necessary semiconductor regions 21 and 22 after the semiconductor regions 21 and 22 are formed on the one principal surface side of the wafer 20. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a method for manufacturing a semiconductor device. In particular, an insulated gate bipolar transistor (IGBT) according to a manufacturing method in which a semiconductor functional region on the MOS gate side is formed and the opposite side is ground to a thickness necessary for withstand voltage, and then an impurity diffusion layer is formed by ion implantation and low-temperature activation processing. The present invention relates to a method for manufacturing a semiconductor device.

A conventional IGBT manufacturing method will be described with reference to a conventional IGBT manufacturing process diagram shown in FIG. FIG. 3 is a half cross-sectional view of a typical IGBT unit cell.
a) With respect to the thick FZ-n type silicon semiconductor substrate 20 of about 400 to 500 μm (hereinafter, the substrate after processing in each step is abbreviated as a wafer), it is on the MOS surface structure A side indicated by a broken line frame. Semiconductor regions such as a p base region 21 and an n ⁺ emitter region 22 required on the front surface are formed by ion implantation and thermal diffusion. Formation of gate oxide film 23, gate electrode 24 made of polysilicon, formation of interlayer insulating films such as BPSG (Boro Phospho Silicate Glass) and PSG (Phospho Silicate Glass), and Al (aluminum) / Si (silicon), Cu (copper) ) An emitter electrode film 25 pattern made of an alloy or the like is formed by photolithography. Etching residues (Si and Cu deposits) during pattern etching of the emitter electrode film 25 are removed by dry etching.
b) The back side of the wafer is ground and made as thin as possible to the thickness required for the withstand voltage (in the case of a withstand voltage of 600 V to 1200 V, a thickness of 70 μm to 200 μm). After grinding, the ground surface is smoothed and cleaned by etching or the like. Here, for example, the thickness is 130 μm.

c) The n-type FS (field stop) layer 26 is doped by P (phosphorus) ion implantation and the p ⁺ collector layer 27 is doped by B (boron) ion implantation on the ground surface on the back side, and the temperature is lowered to about 400 ° C. A functional region is obtained by activation heat treatment.
d) A protective film (polyimide film) (not shown) is applied on the surface of the emitter electrode film 25 on the front surface. A collector electrode film 28 is formed on the back side. e) The wafer is supported on the adhesive tape 30 with the collector electrode film surface of the wafer facing down, and the chip 29 is formed by dicing.
The manufacturing process of the IGBT chip is performed in this order.
In the step a), the photolithography process and the like are repeatedly performed by forming a pattern of the very fine semiconductor regions 21 and 22 on the front surface, forming a pattern of the gate electrode 24, and forming a pattern of the emitter electrode film 25, etc. It has a process that is prone to cracking. However, since the wafer is as thick as about 500 μm, there is almost no problem of wafer cracking. Further, since the wafer is in a thick wafer state, there is little wafer warpage. Therefore, residues such as Si and particles remaining after patterning of the Al-based alloy film of the emitter electrode film 25 can be removed without any problem by dry etching.
In the process of grinding the back surface of the wafer in b), since a wafer having a thickness of about 500 μm is ground into a thin wafer having a thickness of 200 μm or less, it is necessary to reduce wafer cracking during the process. For this reason, the number of processes after the back surface grinding is minimized.

However, in this IGBT manufacturing method, after forming an Al-based alloy on the IGBT MOS surface structure A (FIG. 3) side and patterning by photolithography, the back surface is ground, and the n-type FS layer 26, It has a process flow of forming the p ⁺ collector layer 27. Therefore, when the n-type FS layer 26 and the p ⁺ collector layer 27 are formed, the temperature at which the emitter electrode film 25 made of an Al-based alloy film formed on the front side is not deteriorated during ion implantation and activation heat treatment. There is a temperature limit that requires heat treatment at a melting point of aluminum of 550 ° C. or lower. In addition, the limit temperature of 550 ° C. or less is not necessarily a temperature that is necessary and sufficient as the heat treatment temperature for activation, and has problems in terms of characteristics, yield rate, and cost. In order to avoid the deterioration of the electrode film 25, the manufacturing method must be performed under the temperature limitation.
In order to eliminate the temperature limitation of the heat treatment temperature for the activation, it is necessary to change the above-described IGBT manufacturing method. For example, before forming the emitter electrode film 25 on the front surface on the MOS surface structure A side, the n-type FS layer 26 and the p ⁺ collector layer 27 are formed on the back surface side of the wafer by ion implantation and activation heat treatment. In this manufacturing method, the emitter electrode film 25 is formed after the heat treatment.

Thus, by forming the emitter electrode film 25 after the heat treatment of the back surface n-type FS layer 26, it becomes possible to remove the restriction of the heat treatment temperature described above. As a result, regarding the heat treatment temperature for activation, 500 ° C. or higher can be selected, and a donor impurity that requires an activation temperature higher than P (phosphorus) can be selected. Specifically, Se (selenium) or S (sulfur) having a diffusion coefficient larger than P (phosphorus) can be used as the impurity ion species. However, in order not to affect the impurity profile of the semiconductor regions 21 and 22 formed on the device surface side, the heat treatment temperature needs to be selected from 1000 ° C. or lower, but 500 ° C. to 1000 ° C. The temperature range of ° C. can be said to be a necessary and sufficient temperature as the activation temperature.
Use hydrofluoric acid to remove the residue after pattern etching of the Al-based alloy electrode film remaining on the Ti / TiN film, use hydrofluoric acid as a chemical solution, and remove the barrier metal residue with dilute hydrofluoric acid There is a document published on (Patent Document 1). Furthermore, it has also been disclosed to improve the uniformity of processing in the wafer surface using a single wafer spin apparatus (Patent Document 2). There is a published document about using two liquids of hydrofluoric acid and dilute hydrofluoric acid for the purpose of removing the oxide film (Patent Document 3).
Japanese Patent Laying-Open No. 2005-236151 (FIG. 4) JP 2005-191163 A Japanese Patent No. 3457719

However, a thick wafer of about 500 μm, a thin wafer after back surface grinding after the formation of the front semiconductor regions 21 and 22, and a back surface n-type FS layer 26 are formed, and then the front emitter electrode film 25 is formed. The manufacturing method for forming the wafer inevitably involves performing the wafer back grinding process before the back surface n-type FS layer 26 is formed, and therefore the wafer thinning process is performed at an early stage. For this reason, the n-type FS layer 26 and the p ⁺ collector layer 27 on the back side, the Al-based alloy film for the emitter electrode film 25 on the front surface, and the photolithography, which are handled in a thin wafer state, are used. Processes such as electrode patterning increase. As a result, the warpage of the wafer is increased, and there is a problem that the increased potential for wafer cracking during the process is increased. Therefore, simply changing the manufacturing process as described above increases cracks and decreases the yield rate, which can be a fatal problem as a mass production method.
Further, the emitter electrode film 25 of the Al-based alloy film contains a small amount of Si and / or Cu in addition to the main component Al. One or both of these trace amounts of Si and Cu are included in order to satisfy the function required for the emitter electrode film 25. In particular, the Si contained in the emitter electrode film 25 cannot be dissolved in a mixed liquid such as phosphoric acid, nitric acid, and acetic acid used as an etchant for the emitter electrode film 25 made of the Al-based alloy film. It remains as a residue when the film 25 is patterned. If this residue remains, it may cause a short circuit failure or the like and must be removed.

As a method for removing the residue, it is well known that the residue can be removed by dipping or dry etching into a hydrofluoric acid chemical solution. However, in the dipping process to the hydrofluoric acid solution, the impurity diffusion layers such as the n-type FS layer 26 and the p ⁺ collector layer 27 formed on the back surface are also exposed to the etching solution, and the p ⁺ collector layer 27 is particularly likely to disappear. There is a problem. In addition, the residue removal process by dry etching is a process while heating because the room temperature process is difficult. As a result, since the emitter electrode film 25 made of an Al-based alloy film having a large thermal expansion coefficient is formed on one surface of a thin wafer (about 70 μm to 200 μm) after back grinding, the wafer warp occurs even at room temperature. In addition, during the dry etching process with heating, the amount of warpage of the wafer occurs on the order of mm. Due to the gap on the back surface side caused by this warp, there arises a problem that the impurity diffusion layer on the back surface is also exposed to plasma and damaged. In particular, this is a critical issue because it is a fatal problem. Residue removal by dipping treatment or dry etching into the fluorinated nitric acid chemical solution is possible if a protective film is formed on the back surface side, but it is not preferable because it takes extra man-hours. Therefore, in order to change the manufacturing process of the IGBT as described above, it is first necessary to eliminate the residue removal problem.
The present invention has been made in view of the above points, and an object of the present invention is to provide a semiconductor device manufacturing method including a step of forming an Al-based alloy electrode film on one main surface of a thin wafer of 200 μm or less. In the manufacturing method of a semiconductor device, the residue after patterning of the electrode film on one main surface side can be removed without affecting the other main surface side even if the wafer is warped.

According to the first aspect of the present invention, after a required semiconductor region is formed on one main surface side of the wafer, Al is mainly contained in the wafer having a thickness of 200 μm or less in correspondence with the semiconductor region. When forming an Al-based alloy electrode film containing at least Si, after the patterning of the electrode film, at least removing hydrofluoric acid and dilute hydrofluoric acid in this order by a single wafer spin etching method to remove residues containing Si The object of the present invention is achieved by the method for manufacturing a semiconductor device according to the claims.
According to the second aspect of the present invention, the patterning is performed so that the glass-based insulating film, which is the underlayer of the Al-based alloy electrode film, is exposed on the surface of the opening. It is set as the manufacturing method of the semiconductor device of description.
According to a third aspect of the present invention, the method of manufacturing a semiconductor device according to the first or second aspect of the present invention, wherein the Al-based alloy electrode film is an Al / Si alloy.
According to invention of Claim 4 of Claim, The said Al type alloy electrode film is an Al-Si-Cu alloy, The description as described in any one of Claim 1 thru | or 3 of Claims The method for manufacturing the semiconductor device is as follows.
According to the invention of claim 5, claims 1 to 4 of claim 1, wherein the dilute hydrofluoric acid, which is the second stage chemical of the single-wafer spin etching solution, is discarded. It is set as the manufacturing method of the semiconductor device as described in any one of these.

  According to the present invention, in a method for manufacturing an insulated gate semiconductor device having a step of forming an Al-based alloy electrode film on one main surface of a thin wafer having a thickness of 200 μm or less, even if the wafer is warped, the other main surface side It is possible to provide a method for manufacturing an insulated gate semiconductor device that can remove the residue after patterning of the electrode film on one main surface side without affecting the above.

  Hereinafter, a method for manufacturing a semiconductor device of the present invention will be described in detail with reference to the drawings. The present invention is not limited to the description of the examples described below unless it exceeds the gist.

FIG. 1 is a cross-sectional view of a main part for each main manufacturing process for explaining a manufacturing method of an IGBT according to Example 1 of a manufacturing method of a semiconductor device of the present invention. The alphabet symbols shown at the beginning of the following paragraphs correspond to the alphabet symbols in FIG.
a) For a thick FZ-n type silicon semiconductor substrate 20 having a thickness of about 400 to 500 μm, semiconductor regions such as a p base region 21 and an n ⁺ emitter region 22 required on the front surface are formed by ion implantation and thermal diffusion. . A gate oxide film 23, a gate electrode 24 made of polysilicon, and an interlayer insulating film such as BPSG (Boro Phospho Silicate Glass) or PSG (Phospho Silicate Glass) are formed.
b) After forming a protective film such as a resist on the front surface side, the back surface side of the wafer is ground and processed to a thickness required for a withstand voltage (in the case of a withstand voltage of 600 V to 1200 V, a thickness of 70 μm to 200 μm), For example, the thickness is reduced to about 140 μm as much as possible. After grinding, the ground surface is smoothed and cleaned by etching such as hydrofluoric acid. As a result, the wafer thickness is about 125 μm.
c) The n-type FS layer 26 is ion-implanted with any one of P (phosphorus), Se (selenium), S (sulfur), etc., and the p ⁺ collector layer 27 is ion-implanted with B (boron) on the ground surface on the back side. Then, after removing the protective film on the front surface, a functional region is formed by activation heat treatment at a high temperature of about 800 to 950 ° C.

d) An Al / Si, Cu alloy is formed on the front surface by sputter deposition. A pattern of the emitter electrode film 25 is formed by photolithography. A mixed solution of phosphoric acid, nitric acid, acetic acid or the like is used as an etching solution. Using a single wafer type spin etching apparatus, the front surface of the wafer is adsorbed onto the spinner, and while rotating at 500 to 1000 revolutions / minute, hydrofluoric acid is dropped at a flow rate of 1 liter / minute, Etch for 80 seconds to 100 seconds. By this spin etching, a residue made of Si precipitates (and / or Cu precipitates) remaining on the interlayer insulating film such as BPSG as a base after the electrode pattern etching is removed. As a result, with the removal of the residue made of Si precipitates, etc., the underlying BPSG is also etched and thinned by about 2000 mm.
According to this spin etching, there is no need to form a protective film on the back surface side of the wafer because the etching solution does not wrap around the back surface side. Residues made of Si deposits and the like are placed on an oxide film insulating film such as BPSG, and thus are easily removed together with the etching of the upper layer portion of the base by an etching solution containing hydrofluoric acid. Subsequently, the substrate is washed with pure water for 10 seconds, spin-etched with dilute hydrofluoric acid for a short time (about 10 seconds), subsequently washed with pure water for 60 seconds and dried to complete pattern etching of the emitter electrode film 25. In the first-stage spin etching with hydrofluoric acid, the etching solution may be circulated and used. However, since etched Si, Cu and others are dissolved in the etching solution, the wafer is again applied to the wafer. There is a risk of adhesion. Therefore, as the second-stage spin etching, spin etching with dilute hydrofluoric acid is performed for a short time. Therefore, it is preferable to circulate the second stage dilute hydrofluoric acid etching solution without using it again. The subsequent steps are the same as those of the conventional IGBT manufacturing method described above.

e) A protective film (polyimide film) (not shown) is applied on the surface of the emitter electrode film 25 on the front surface. A collector electrode film 28 is formed on the back side.
f) The adhesive tape 30 is supported with the collector electrode film surface of the wafer facing down, and the chip 29 is formed by dicing.
According to the first embodiment described above, even when the thickness of the wafer is extremely thin (125 μm), even if the warp of the wafer is increased by forming an emitter electrode film made of an Al-based alloy on one side, the wafer crack increases. Due to the influence of warping, the IGBT can be manufactured at a high yield rate with high yield without causing damage to the back side during patterning of the front electrode.
Moreover, although the case where this invention was applied about the manufacturing method of IGBT was demonstrated in Example 1, this invention is not restricted to the manufacturing method of IGBT, Al type alloy electrode film is provided on the single side | surface of a thin wafer of 200 micrometers or less. If it is a manufacturing method of a semiconductor device including the process of forming, the effect of the present invention will be acquired by applying the present invention.

It is principal part sectional drawing for every main manufacturing processes for demonstrating the manufacturing method of IGBT concerning Example 1 of this invention. It is principal part sectional drawing for every main manufacturing processes for demonstrating the manufacturing method of the conventional IGBT. FIG. 2 is a half sectional view of a general IGBT unit cell.

Explanation of symbols

20 silicon semiconductor substrate 21 p base region 22 n ⁺ emitter region 23 gate oxide film 24 gate electrode 25 emitter electrode film 26 n-type FS layer 27 p ⁺ collector layer 28 collector electrode film 29 chip 30 adhesive tape

Claims (5)

After forming a required semiconductor region on one main surface side of the wafer, when forming an Al-based alloy electrode film containing Al as a main component and containing at least Si on a wafer having a thickness of 200 μm or less corresponding to the semiconductor region A method of manufacturing a semiconductor device, comprising: removing at least hydrofluoric acid and dilute hydrofluoric acid in this order by a single wafer spin etching method in this order after removing the residue containing Si after patterning the electrode film. 2. The method of manufacturing a semiconductor device according to claim 1, wherein patterning is performed so that a glass-based insulating film, which is a base layer of the Al-based alloy electrode film, is exposed on the surface of the opening. 3. The method of manufacturing a semiconductor device according to claim 1, wherein the Al-based alloy electrode film is an Al / Si alloy. The method for manufacturing a semiconductor device according to claim 1, wherein the Al-based alloy electrode film is an Al—Si—Cu alloy. 5. The method for manufacturing a semiconductor device according to claim 1, wherein a dilute hydrofluoric acid, which is a second-stage chemical solution of the single-wafer spin etching solution, is discarded.

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