JP2005223174A - Method for manufacturing double-sided circuit board - Google Patents

Method for manufacturing double-sided circuit board Download PDF

Info

Publication number
JP2005223174A
JP2005223174A JP2004030274A JP2004030274A JP2005223174A JP 2005223174 A JP2005223174 A JP 2005223174A JP 2004030274 A JP2004030274 A JP 2004030274A JP 2004030274 A JP2004030274 A JP 2004030274A JP 2005223174 A JP2005223174 A JP 2005223174A
Authority
JP
Japan
Prior art keywords
metal
layer
double
circuit board
sided circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2004030274A
Other languages
Japanese (ja)
Inventor
Daisuke Baba
大介 馬場
Yukinori Takahashi
幸徳 高橋
Makoto Nakamura
誠 中村
Osamu Nakayama
修 中山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ube Corp
Original Assignee
Ube Industries Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ube Industries Ltd filed Critical Ube Industries Ltd
Priority to JP2004030274A priority Critical patent/JP2005223174A/en
Publication of JP2005223174A publication Critical patent/JP2005223174A/en
Pending legal-status Critical Current

Links

Images

Landscapes

  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method for manufacturing a double-sided circuit board which can simplify its steps, realize its micromachining operation, and have a good mass productivity. <P>SOLUTION: The method for manufacturing a double-sided circuit board includes a laser machining step of simultaneously forming a blind via hole and a through hole having arbitrary different shapes, by laser machining from one side at desired positions in a double-sided metallic laminate having metallic layers laminated on both sides of a resin layer; a metal plating step of providing a metal plated layer by metal plating a resin surface and an exposed metallic part within the through hole made by the laser machining to electrically connect both surfaces of the metallic layers; and a metallic pattern formation step of forming metallic patterns on the both surfaces. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

この発明は、両面回路基板の製造法に関し、特に出発材料としての両面金属積層体とレ−ザ−加工とを組み合わせることによって、所望の位置にブラインドビアホ−ルと任意の異形状孔加工とが同時に行われ、かつ部品孔などの孔側面に電磁波シ−ルド機能を付与した高機能で量産性に優れた両面回路基板の製造法に関する。
この明細書において、異形状の貫通孔とは2個以上で孔の断面形状が異なる任意の異形状の貫通孔を意味する。
The present invention relates to a method for manufacturing a double-sided circuit board, and in particular, by combining a double-sided metal laminate as a starting material and a laser processing, a blind via hole and any irregularly shaped hole processing at a desired position. The present invention relates to a method for producing a double-sided circuit board that is simultaneously performed and has a high function and excellent mass productivity in which an electromagnetic shielding function is imparted to a hole side surface such as a component hole.
In this specification, the irregularly shaped through hole means any irregularly shaped through hole having two or more different sectional shapes.

最近の電子機器の小型化、高密度実装化、高性能化の要求に対し、ブラインドビアホ−ル以外に部品孔等の孔を異なる形状で複数種設ける場合が増えている。
例えば、2層CCLを使用し、片面の銅箔にフォトレジストコ−ティングしてパタ−ンを形成した後、COレ−ザ−でパタ−ンに対応する部分のポリイミドフィルムを除去してブラインドホ−ルを形成し、ブラインドホ−ル底部に堆積したポリイミド膜をデスミアした後、底部の銅箔の一部および微量のポリイミドをエッチングおよびデスミアして除去し、導電化処理した後、銅メッキしてブラインドビアホ−ルを形成することが知られている(特許文献1)。
In response to recent demands for downsizing, high-density packaging, and high performance of electronic devices, there are increasing cases in which a plurality of types of holes such as component holes are provided in different shapes in addition to blind via holes.
For example, using a two-layer CCL, photoresist co on one surface of a copper foil - after the formation of the emissions, CO 2 Le - - coating to pattern The - in pattern - a polyimide film of a portion corresponding to emissions removed After forming a blind hole and desmearing the polyimide film deposited on the bottom of the blind hole, a part of the bottom copper foil and a small amount of polyimide are removed by etching and desmearing. It is known to form blind via holes by plating (Patent Document 1).

この場合、スル−ホ−ルを設ける場合はドリルやパンチングなどによって両面の銅箔およびポリイミド層に貫通孔が形成され、ブラインドビアホ−ルを設ける場合は片側の金属箔にエッチング加工にて孔加工を施した後、CO、UV−YAGあるいはエキシマレ−ザ−などのレ−ザ−を照射してブラインドビアホ−ルが形成される。
これらの逐次開孔加工方法では、ブラインドビアホ−ルと部品孔との同時形成をリ−ル・ツ−・リ−ル搬送方式によって実施することは不可能である。レ−ザ−加工によりブラインドビアホ−ルを形成した後、プレス加工により部品孔加工を施すことが一般的に行われている。
In this case, when a through hole is provided, a through hole is formed in the copper foil and polyimide layer on both sides by drilling or punching, and when a blind via hole is provided, a hole is formed by etching in the metal foil on one side. After the processing, a blind via hole is formed by irradiating a laser such as CO 2 , UV-YAG or excimer laser.
In these sequential opening processing methods, it is impossible to simultaneously form the blind via hole and the component hole by the reel-to-roll conveying method. In general, a blind via hole is formed by laser processing and then a part hole processing is performed by pressing.

しかし、上記の方法によれば、レ−ザ−によりブラインドビアホ−ルを形成する工程とプレスにより部品孔などを形成する工程が必要であり、全ての孔を加工するために2工程が必要である。さらに、幅の狭い部品孔やリリ−スホ−ル加工などの微細加工?の場合にはプレス加工では対応不可能となる場合が生じる。このため、従来の回路基板及びその製造法は均一な品質、高生産性の点で量産性が劣る。
このため、出発材料としての両面金属積層体を使用し、パンチング加工による同時加工が提案され(特許文献2)、さらにレ−ザ−加工によりブラインドビアホ−ルと部品孔との同時加5法(特許文献3)が提案された。
However, according to the above method, a step of forming a blind via hole by a laser and a step of forming a component hole by a press are necessary, and two steps are required to process all the holes. It is. In addition, fine processing such as narrow part holes and release holes? In this case, it may be impossible to handle by press working. For this reason, the conventional circuit board and its manufacturing method are inferior in mass productivity in terms of uniform quality and high productivity.
For this reason, simultaneous processing by punching is proposed using a double-sided metal laminate as a starting material (Patent Document 2), and the simultaneous addition of blind via holes and component holes by laser processing 5 (Patent Document 3) has been proposed.

特開平10−154730号公報(第1頁)Japanese Patent Laid-Open No. 10-154730 (first page) 特開平11−135577号公報(第1頁)JP-A-11-135577 (first page) 特開2002−252256号公報(第1頁)JP 2002-252256 A (first page)

しかし、上記の特許文献2に記載の方法によれば、パンチ加工による同時加工自体がブラインドホ−ルの生産性に問題があり、適用不可能である。
また、上記の特許文献3に記載の方法によれば、装置の除去能力以上の大きさを有する部品孔として抜き落とされた部分の金属積層体が装置内に残留し、リ−ル・ツ−・リ−ル方式での連続的な運転は不可能となる。
However, according to the method described in Patent Document 2, the simultaneous processing itself by punching has a problem in the productivity of the blind hole and is not applicable.
In addition, according to the method described in Patent Document 3, a portion of the metal laminate that has been removed as a component hole having a size larger than the removal capability of the device remains in the device, and the reel tool・ Continuous operation with the reel system becomes impossible.

従って、この発明の目的は、工程を簡略化するとともに微細加工を可能とし、かつ量産性が良好な両面回路基板の製造法を提供することである。   Accordingly, an object of the present invention is to provide a method for manufacturing a double-sided circuit board that simplifies the process, enables microfabrication, and has good mass productivity.

この発明は、樹脂層の両面に金属層が積層された両面金属積層体の所望の位置に、片面からのレ−ザ−加工によってブラインドビアホ−ルと任意の異形状の貫通孔とを同時に形成するレ−ザ−加工工程、該レ−ザ−加工によって形成された貫通孔内の樹脂面および露出している金属部分に金属めっきして金属めっき層を設けて金属層の両面を電気的に接続する金属めっき工程、次いで両面に金属パタ−ンを形成する金属パタ−ン形成工程を含む両面回路基板の製造法に関する。   According to the present invention, a blind via hole and an arbitrarily shaped through-hole are simultaneously formed at a desired position of a double-sided metal laminate in which metal layers are laminated on both sides of a resin layer by laser processing from one side. The laser processing step to be formed, the resin surface in the through-hole formed by the laser processing and the exposed metal portion are metal-plated to provide a metal plating layer, and both surfaces of the metal layer are electrically The present invention relates to a method of manufacturing a double-sided circuit board including a metal plating step for connecting to a metal pattern and a metal pattern forming step for forming a metal pattern on both sides.

この発明のによれば、所望の位置にブラインドビアホ−ルと任意の種類の異形状孔を有し、孔空け加工時に発生する残滓を回収することなく、孔空け加工を単一工程で行える簡略化されたプロセスによるリ−ル・ツ−・リ−ル方式で基板側面が電磁波に対してシ−ルド機能を有した両面回路基板を1段の開孔加工(孔空加工)により高い量産性で得ることができる。   According to the present invention, a blind via hole and an arbitrarily shaped hole of any kind are provided at a desired position, and the drilling can be performed in a single step without collecting the residue generated during the drilling. High-volume production of double-sided circuit boards that have a shield function against electromagnetic waves on the side of the board with a simplified process using a one-step opening process (perforation process). Can be obtained by sex.

以下にこの発明の好ましい態様を列記する。
1)両面金属積層体が、熱融着性3層構造のポリイミドフィルムの両面に金属箔を熱圧着するか、金属箔にポリイミド前駆体溶液を流延製膜した熱融着性ポリイミド層を有する片面金属張積層体の2枚を熱圧着して積層するか、あるいはポリイミドフィルムの両面に下地金属および銅を蒸着した後に金属めっきするいずれかによってポリイミドフィルムの両面に金属層を積層したものである上記の両面回路基板の製造法。
2)レ−ザ−加工が、UV−YAGレ−ザ−による上記の両面回路基板の製造方法。
3)レ−ザ−加工が、リ−ル・ツ−・リ−ル方式により連続的に行われる上記の両面回路基板の製造法。
The preferred embodiments of the present invention are listed below.
1) The double-sided metal laminate has a heat-fusible polyimide layer in which a metal foil is thermocompression bonded to both sides of a polyimide film having a heat-fusible three-layer structure, or a polyimide precursor solution is cast on the metal foil. Two layers of a single-sided metal-clad laminate are laminated by thermocompression bonding, or a metal layer is laminated on both sides of a polyimide film by either depositing a base metal and copper on both sides of the polyimide film and then metal plating. Manufacturing method of said double-sided circuit board.
2) The method for producing a double-sided circuit board as described above, wherein the laser processing is performed by a UV-YAG laser.
3) The method for producing a double-sided circuit board as described above, wherein the laser processing is continuously performed by a reel-to-roll method.

4)レ−ザ−加工工程が、ブラインドビアホ−ルと任意の異形状の貫通孔を同時に形成した後、他面に積層した易剥離性の粘着剤付き薄膜物層を剥離することによってレ−ザ−加工によって生じた廃棄物を一緒に除去する工程を含む上記の両面回路基板の製造法。
5)金属めっき工程が、孔内のクリ−ニング、表面の酸洗浄、孔内の導電化皮膜形成、電解銅めっきによる孔内および金属層上の銅のめっき層の形成の各工程を含む上記の両面回路基板の製造法。
6)金属パタ−ン形成工程が、金属めっき層の両面にエッチングレジストを形成して露光、現像、金属層のエッチングおよびエッチングレジストの剥離により所望形状の金属パタ−ンを形成することからなる上記の両面回路基板の製造法。
7)金属パタ−ン形成工程が、片面の金属層に信号配線層と他面の金属層にグランド配線層を形成する上記の両面回路基板の製造法。
4) After the laser processing step simultaneously forms blind via holes and arbitrarily shaped through-holes, the thin film layer with adhesive layer laminated on the other surface is peeled to remove the laser. -A method for producing a double-sided circuit board as described above, comprising the step of removing together the waste produced by the processing.
5) The metal plating step includes the following steps: cleaning in the hole, acid cleaning of the surface, formation of a conductive film in the hole, formation of a copper plating layer in the hole and on the metal layer by electrolytic copper plating Manufacturing method for double-sided circuit boards.
6) The metal pattern forming step includes forming an etching resist on both surfaces of the metal plating layer and forming a metal pattern having a desired shape by exposure, development, etching of the metal layer, and peeling of the etching resist. Manufacturing method for double-sided circuit boards.
7) The above-mentioned double-sided circuit board manufacturing method, wherein the metal pattern forming step forms a signal wiring layer on one metal layer and a ground wiring layer on the other metal layer.

7)さらに、所望形状のソルダ−レジスト等の保護膜を形成する工程を有する請求項1に記載の両面回路基板の製造法。
8)ソルダ−レジストが、感光性ドライフィルムタイプであって真空下においてラミネ−トした後、露光現像操作にて所定の位置にパタ−ン形成したものである上記の両面回路基板の製造法。
9)さらに、露出している金属部分に、Ni/Au、あるいは錫等の金属めっきを施す工程を有する上記の両面回路基板の製造法。
10)金属めっきが、電解ニッケルめっき次いで電解金めっきである上記の両面回路基板の製造法。
7) The method for producing a double-sided circuit board according to claim 1, further comprising a step of forming a protective film such as a solder resist having a desired shape.
8) The method for producing a double-sided circuit board as described above, wherein the solder resist is a photosensitive dry film type, laminated in a vacuum, and then patterned at a predetermined position by exposure and development operation.
9) The method for producing a double-sided circuit board as described above, further comprising a step of performing metal plating such as Ni / Au or tin on the exposed metal portion.
10) The method for producing a double-sided circuit board as described above, wherein the metal plating is electrolytic nickel plating and then electrolytic gold plating.

以下、この発明を、この発明の方法によって得られる両面回路基板を適用したCOFの一例を示す部分概略図である図1とこの発明の両面回路基板の製造法の工程の好適な一例の部分概略図である図2(工程の前部分を示す)および図3(工程の後部分を示す)とを用いて説明する。
図1において、両面回路基板1は、金属層2および金属層3が樹脂層4の両面に積層された両面金属積層体の基板内にブラインドビアホ−ル5と異形状の貫通孔6(図示しない複数個の異形状の貫通孔が形成されている)とがレ−ザ−加工によって同時に形成され、かつ該貫通孔の孔内(すなわち側面)に金属メッキ層7を設けて電磁波に対してシ−ルド機能を付与し、露出している金属部分に金属メッキ8を設けて金属層の両面が電気的に接続され、両面に金属パタ−ンを形成してなり、さらに所望形状のソルダ−レジスト9の保護層が設けられている。
1 is a partial schematic view showing an example of a COF to which the double-sided circuit board obtained by the method of the present invention is applied, and FIG. 1 is a partial schematic diagram of a preferred example of the process of the double-sided circuit board manufacturing method of the present invention. This will be described with reference to FIGS. 2 (showing the front part of the process) and FIG. 3 (showing the back part of the process).
In FIG. 1, a double-sided circuit board 1 includes a blind via hole 5 and a through hole 6 (not shown) formed in a double-sided metal laminate in which a metal layer 2 and a metal layer 3 are laminated on both sides of a resin layer 4. Are formed at the same time by laser processing, and a metal plating layer 7 is provided in the hole (that is, the side surface) of the through hole to prevent electromagnetic waves. Provided with a shield function, metal plating 8 is provided on the exposed metal portion, both surfaces of the metal layer are electrically connected, metal patterns are formed on both surfaces, and a solder having a desired shape is further formed. A protective layer of resist 9 is provided.

図2において、両面回路基板1は、(A)工程:金属層2および金属層3が樹脂層(好適にはポリイミドフィルム)4の両面に積層された両面金属積層体の一方の面に、(B)易剥離性の粘着剤付き薄膜状物質層10を配置する工程、(C)レ−ザ−加工により他方の面の所望の位置に樹脂層まで通じた非連続孔および樹脂層をも貫通する連続孔6を形成する工程、図3において(D)前記の粘着剤付き薄膜物層10を剥離する工程、(E)このことによって開孔加工によって生じた廃棄物を一緒に除去する工程、(F)孔内および露出している金属部分を金属メッキして金属層の両面を電気的に接続する工程、および(G)両面に金属パタ−ンを形成する工程からなる製造法によって得られる。なお、図2および図3における両面回路基板1は、図示されていないがリ−ル・ツ−・リ−ル方式で長尺状のものの一部である。   In FIG. 2, the double-sided circuit board 1 has a (A) step: on one side of a double-sided metal laminate in which a metal layer 2 and a metal layer 3 are laminated on both sides of a resin layer (preferably a polyimide film) 4 ( B) Step of disposing the easily peelable thin film material layer 10 with adhesive, (C) Laser processing and penetrating through the non-continuous holes and resin layer that lead to the resin layer at the desired position on the other surface The step of forming the continuous hole 6, the step (D) of peeling the thin film layer with adhesive 10 in FIG. 3, (E) the step of removing together the waste generated by the opening process by this, (F) Obtained by a manufacturing method comprising a step of metal plating the inside and exposed metal portions and electrically connecting both sides of the metal layer, and (G) a step of forming metal patterns on both sides. . The double-sided circuit board 1 in FIGS. 2 and 3 is a part of a long-sized one in a reel-to-reel method, although not shown.

この発明における金属層としては、銅、アルミニウム、鉄、金などの金属箔や金属膜あるいはこれら金属の合金箔や合金膜が挙げられるが、好適には圧延銅箔、電解銅箔、蒸着および/またはメッキ銅膜などがあげられる。金属箔として、表面粗度の余り大きくなくかつ余り小さくない、好適にはポリイミドとの接触面のRzが3μm以下、特に0.5〜3μm、その中でも特に1.5〜3μmであるものが好ましい。このような金属箔、例えば銅箔はVLP、LP(またはHTE)として知られている。
金属箔の厚さは、1μm〜12μm程度、特に2μm〜9μm程度であることが好ましい。金属箔の厚みが大きくなるほどファインパタ−ン化に不利である。
また、Rzが小さい場合には、金属箔表面を表面処理したものを使用してもよい。
Examples of the metal layer in the present invention include metal foils and metal films of copper, aluminum, iron, gold and the like, or alloy foils and alloy films of these metals, preferably rolled copper foil, electrolytic copper foil, vapor deposition and / or Or a plated copper film etc. are mention | raise | lifted. As the metal foil, it is preferable that the surface roughness is not so large and not too small, preferably the Rz of the contact surface with the polyimide is 3 μm or less, particularly 0.5 to 3 μm, and of these, particularly 1.5 to 3 μm. . Such metal foils, such as copper foils, are known as VLP, LP (or HTE).
The thickness of the metal foil is preferably about 1 μm to 12 μm, particularly about 2 μm to 9 μm. The greater the thickness of the metal foil, the more disadvantageous for fine patterning.
Moreover, when Rz is small, you may use what surface-treated the metal foil surface.

この発明における樹脂層としてはポリイミドフィルムが好ましく、特に高耐熱性と柔軟性とを兼ね備えたガラス転移温度が275〜375℃程度であるポリイミドからなる単一層ポリイミドフィルムであってもよいが、特にガラス転移温度が300℃以上の高耐熱性ポリイミド層の両面にガラス転移温度が200〜300℃程度である熱圧着性および/または柔軟性のポリイミド層を有し全体の厚みが7〜50μm程度、特に7〜25μm程度であって引張弾性率(25℃)が400〜1000kgf/mm2程度である3層構造のポリイミドフィルムが高密度化の点から好ましい。 The resin layer in the present invention is preferably a polyimide film, and may be a single-layer polyimide film made of polyimide having a glass transition temperature of about 275 to 375 ° C., which has both high heat resistance and flexibility, particularly glass. It has a thermocompression bonding and / or flexible polyimide layer having a glass transition temperature of about 200 to 300 ° C. on both sides of a high heat resistant polyimide layer having a transition temperature of 300 ° C. or higher, and the total thickness is about 7 to 50 μm, especially A three-layered polyimide film having a tensile modulus (25 ° C.) of about 7 to 25 μm and a tensile modulus (25 ° C.) of about 400 to 1000 kgf / mm 2 is preferred from the viewpoint of high density.

この発明における両面金属積層体は、好適には金属箔と熱圧着性3層構造のポリイミドフィルムとを、好適にはダブルベルトプレスによって加熱圧着して張り合わせることによって得ることができる。
また、この発明における両面金属積層体は、特に高耐熱性ポリイミド層の両面に柔軟性のポリイミド層を有する3層構造のポリイミドフィルムまたは高耐熱性と柔軟性とを兼ね備えた単一層ポリイミドフィルムの両面に金属蒸着した後電気銅メッキすること(金属蒸着−電気銅メッキ法)によって得ることができる。この場合、ポリイミドフィルムを減圧放電処理した処理面に網目構造の凸部を有する凹凸形状を形成せしめた後連続して、あるいは減圧放電処理後いったん大気中に置いた後プラズマスクリ−ニング処理によって清浄化した後、蒸着法によって金属薄膜を形成し、少なくとも2層の金属薄膜、特に下地金属蒸着層と、その上の銅蒸着層からなる2層の金属蒸着層を積層して電気メッキすることが好ましい。
The double-sided metal laminate in the present invention can be obtained by preferably laminating a metal foil and a thermocompression-bonding three-layer polyimide film, preferably by thermocompression bonding with a double belt press.
Further, the double-sided metal laminate in the present invention is a double-sided polyimide film having a flexible polyimide layer on both sides of a high heat-resistant polyimide layer or a single-layer polyimide film having both high heat resistance and flexibility. It can obtain by carrying out electro copper plating (metal vapor deposition-electro copper plating method) after carrying out metal vapor deposition to. In this case, the polyimide film is cleaned by a plasma screening process continuously after forming a concavo-convex shape having convex portions of a network structure on the treated surface subjected to the reduced-pressure discharge treatment, or after being placed in the atmosphere once after the reduced-pressure discharge treatment. Then, a metal thin film is formed by a vapor deposition method, and at least two metal thin films, in particular, a base metal vapor deposition layer and a copper vapor deposition layer on the two layers are laminated and electroplated. preferable.

前記の金属蒸着−電気銅メッキ法における金属薄膜の材質としては、種々の組み合わせが可能である。金属蒸着膜として下地層と表面蒸着金属層を有する2層以上の構造としてもよい。下地層としては、クロム、タングステン、チタン、パラジウム、亜鉛、モリブデン、ニッケル、コバルト、ジルコニウム、鉄、ニッケル−クロム合金、ニッケル−銅合金、ニッケル−金合金、ニッケル−モリブデン合金等が挙げられる。表面層(あるいは中間層)としては銅が挙げられる。蒸着層上に設ける金属メッキ層の材質としては、銅、銅合金、銀等、特に銅が好適である。真空プラズマ放電処理したポリイミドフィルムの両面に、クロム、タングステン、チタン、パラジウム、亜鉛、錫、モリブデン、ニッケル、コバルト、ジルコニウム、鉄、ニッケル−クロム合金、ニッケル−銅合金、ニッケル−金合金、ニッケル−モリブデン合金等等の下地金属層を形成し、その上に中間層として銅の蒸着層を形成した後、銅の無電解メッキ層を形成し(無電解メッキ層を形成することは発生したピンホ−ルをつぶすのに有効である。)、あるいは、金属蒸着層の厚みを大きくして、例えば0.1〜1.0μmとして銅などの無電解金属メッキ層を省略し、表面層として電気銅メッキ層を形成してもよい。   Various combinations are possible as the material of the metal thin film in the metal vapor deposition-electro copper plating method. It is good also as a 2 or more-layer structure which has a base layer and a surface vapor deposition metal layer as a metal vapor deposition film. Examples of the underlayer include chromium, tungsten, titanium, palladium, zinc, molybdenum, nickel, cobalt, zirconium, iron, nickel-chromium alloy, nickel-copper alloy, nickel-gold alloy, and nickel-molybdenum alloy. An example of the surface layer (or intermediate layer) is copper. As a material of the metal plating layer provided on the vapor deposition layer, copper, copper alloy, silver, etc., particularly copper is suitable. On both sides of the vacuum-discharged polyimide film, chromium, tungsten, titanium, palladium, zinc, tin, molybdenum, nickel, cobalt, zirconium, iron, nickel-chromium alloy, nickel-copper alloy, nickel-gold alloy, nickel- After forming a base metal layer such as molybdenum alloy and the like, and forming a copper vapor deposition layer thereon as an intermediate layer, a copper electroless plating layer is formed (the formation of an electroless plating layer is a Or the thickness of the metal deposition layer is increased, for example, 0.1 to 1.0 μm is omitted, and an electroless metal plating layer such as copper is omitted, and an electro copper plating is used as a surface layer. A layer may be formed.

前記の電気銅メッキにおいて、例えば、硫酸銅50〜200g/l、硫酸100〜250g/lおよび光沢剤少量、温度15〜45℃、電流密度0.1〜10A(アンペア)/dm、空気攪拌、搬送速度0.1〜2m/分、適量の塩素および光沢剤の添加、陰極が銅の条件であることが好ましい。 In the above-mentioned electrolytic copper plating, for example, copper sulfate 50 to 200 g / l, sulfuric acid 100 to 250 g / l and a small amount of brightener, temperature 15 to 45 ° C., current density 0.1 to 10 A (ampere) / dm 2 , air stirring It is preferable that the conveyance speed is 0.1 to 2 m / min, the addition of appropriate amounts of chlorine and a brightening agent, and the cathode is copper.

この発明においては、前記の両面金属積層体の一方の面に易剥離性の粘着剤付き薄膜物質層を配置して、レ−ザ−加工によってブラインドビアホ−ルと貫通孔とを同時に形成することが必要である。
前記の開孔加工によって、任意形状の異形状の連続あるいは非連続の孔を形成する。
異形状の孔としては、例えばデバイスホ−ルや外形トリミングのためのリリ−スホ−ルなどを挙げることができる。
In the present invention, an easily peelable thin film material layer with an adhesive is disposed on one surface of the double-sided metal laminate, and a blind via hole and a through hole are simultaneously formed by laser processing. It is necessary.
By the above-described opening process, an irregularly shaped continuous or discontinuous hole having an arbitrary shape is formed.
Examples of the irregularly shaped hole include a device hole and a release hole for external trimming.

前記の粘着剤付き薄膜物質層の粘着剤(あるいは接着剤)として、一液性シリコンゴム粘着剤(商品名:RTVゴム KE3417/信越シリコ−ン社製)、二液性シリコンゴム粘着剤(商品名:RTVゴム KE1204/信越シリコ−ン社製)、二液性エポキシ接着剤(商品名:セメダイン ハイス−パ−5/セメダイン社製)、二液性エポキシ接着剤(商品名:セメダイン EP001/セメダイン社製)、二液性ウレタン接着剤、アクリル系粘着剤などを好適に使用することができる。
また、粘着剤付き薄膜物質層としては、前記の粘着剤を金属箔やポリイミドフィルム、ポリエステルフィルムなどのプラスチックフィルムなどの支持体に設けたものが挙げられる。
As the pressure-sensitive adhesive (or adhesive) for the thin film material layer with pressure-sensitive adhesive, a one-part silicone rubber pressure-sensitive adhesive (trade name: RTV rubber KE3417 / manufactured by Shin-Etsu Silicone), a two-part silicone rubber pressure-sensitive adhesive (product) Name: RTV Rubber KE1204 / manufactured by Shin-Etsu Silicone Co., Ltd., two-component epoxy adhesive (trade name: Cemedine High-Super-5 / produced by Cemedine), two-component epoxy adhesive (product name: Cemedine EP001 / Cemedine) (Manufactured by Co., Ltd.), two-component urethane adhesive, acrylic pressure-sensitive adhesive, and the like can be suitably used.
Moreover, as a thin film substance layer with an adhesive, what provided the said adhesive on support bodies, such as plastic films, such as metal foil, a polyimide film, and a polyester film, is mentioned.

前記のレ−ザ−加工法としてはCOレ−ザ−、UV−YAGレ−ザ−、エキシマレ−ザ−などのレ−ザ−加工のいずれか、好適にはUV−YAGが挙げられる。
前記のUV−YAGレ−ザ−によって、発振波長が260〜400nm程度の範囲にある紫外領域にあるレ−ザ−を使用することができる。
また、レ−ザ−加工は、両面金属積層体の少なくとも片面の金属層の所望の位置にレ−ザ−を照射して、好適には20〜100μmφ、特に約30〜100μmφの孔を形成する。同時にディフォ−カスしてポリイミドフィルム層にも同一形状にレ−ザ−を照射して孔を形成することができる。
Examples of the laser processing method include laser processing such as CO 2 laser, UV-YAG laser, and excimer laser, preferably UV-YAG.
With the UV-YAG laser, a laser in the ultraviolet region having an oscillation wavelength in the range of about 260 to 400 nm can be used.
In the laser processing, a laser is irradiated to a desired position of at least one metal layer of the double-sided metal laminate to form a hole of preferably 20 to 100 μmφ, particularly about 30 to 100 μmφ. . At the same time, the holes can be formed by irradiating a laser in the same shape on the polyimide film layer.

この発明においては、前記のレ−ザ−加工によって両面金属積層体の他方の面の所望の位置に樹脂層(ポリイミド層)まで貫通する非連続孔および樹脂層をも貫通する連続孔を形成して、前記の粘着剤付き薄膜物層を剥離する。
前記の方法によれば、従来の工程におけるビア形成工程で発生する金属のバリの除去のためのバフ研磨法やドライブラスト法が必要でなく、また、ビア内のポリイミド部のクリ−ニング(デスミア)のためのアルカリ性過マンガン酸塩水溶液を用いるウエットデスミア法も必須ではなくなるこのため、バフ研磨法における運搬方向にのみ比較的大きな伸びが発生しやすく、加工基板の寸法変化に異方性が生じる問題、また、ビア穴内のポリイミド部のデスミア工程によるクリ−ニング、ドライブラスト法での発塵の問題、残存する砥粒がフォトリソグラフィ−工程でのレジスト密着性不良が起こらない。
In the present invention, a non-continuous hole penetrating to the resin layer (polyimide layer) and a continuous hole penetrating through the resin layer are formed at a desired position on the other surface of the double-sided metal laminate by the laser processing. Then, the thin film layer with the adhesive is peeled off.
According to the above method, the buffing method and the drive last method for removing the metal burrs generated in the via forming process in the conventional process are not necessary, and the polyimide portion in the via is cleaned (desmeared). Therefore, the wet desmear method using an alkaline permanganate aqueous solution is not essential, so that relatively large elongation is likely to occur only in the conveying direction in the buffing method, and anisotropy occurs in the dimensional change of the processed substrate. Problems, cleaning of the polyimide part in the via hole by the desmear process, problems of dust generation in the drive last method, and residual abrasive grains do not cause poor resist adhesion in the photolithography process.

前記の開孔加工によって生じた廃棄物を一緒に除去した後、孔内を金属メッキして金属層の両面を電気的に接続する。
金属メッキ法としては、例えば特開平11−51425号公報に記載された方法によって行うことができる。
例えば、ビアホ−ル等の内部において、Pd−Sn被膜を活性化し、導電性を高めて金属メッキ、好適には電解銅メッキする方法が挙げられる。
After the waste generated by the opening process is removed together, the inside of the hole is metal-plated to electrically connect both sides of the metal layer.
As a metal plating method, it can carry out by the method described in Unexamined-Japanese-Patent No. 11-51425, for example.
For example, a method of activating a Pd—Sn film in a via hole or the like to increase conductivity and metal plating, preferably electrolytic copper plating can be used.

すなわち、パラジウム−スズコロイド触媒を用いることにより形成されるパラジウム−スズ被膜を、還元剤を含むアルカリアクセラレ−タ−浴に浸漬することによるパラジウム−スズ被膜の導電性向上方法である。
パラジウム−スズ被膜は、パラジウム−スズコロイド触媒を用いることにより得られる被膜で、この被膜は、一般にはいわゆるDPS(Direct Plating System)法の中で行われるものである。
That is, this is a method for improving the conductivity of a palladium-tin coating by immersing a palladium-tin coating formed by using a palladium-tin colloidal catalyst in an alkaline accelerator bath containing a reducing agent.
The palladium-tin coating is a coating obtained by using a palladium-tin colloidal catalyst, and this coating is generally performed in a so-called DPS (Direct Plating System) method.

具体的なDPS法は、次のようにして実施される。まず、モノエタノ−ルアミン、ノニオン系界面活性剤、カチオン系界面活性剤等を用いて、孔部の金属およびポリイミドを脱脂し、アルカリ性過マンガン酸溶液でデスミアし、次いで過硫酸ソ−ダを用いてソフトエッチング後、塩化ナトリウム、塩酸等にプレディップする。 これらの工程の後、パラジウム−スズコロイドの液に浸漬するアクチベ−ティング工程でPd−Sn被膜を形成し、最後に炭酸ソ−ダ、炭酸カリおよび銅イオンを含むアルカリアクセラレ−タ−浴および硫酸を含む酸性アクセラレ−タ−浴で活性化する際に、活性化に用いるアルカリ性アクセラレ−タ−浴に還元剤を添加すれば良い。添加することのできる還元剤の例としては、例えば、ホルムアルデヒド、アセトアルデヒド、プロピオンアルデヒド、ベンズアルデヒド等のアルデヒド類、カテコ−ル、レゾルシン、アスコルビン酸等が挙げられる。還元剤を添加するアルカリ性アクセラレ−タ−浴としては、炭酸ナトリウム、炭酸カリウムおよび銅イオンを含むものが好ましい。
前記の方法により、Pd−Snからなる抵抗値の低い被膜を得ることができ、次工程での電気銅メッキによる被覆時間を短縮することが可能となる。
A specific DPS method is implemented as follows. First, using monoethanolamine, nonionic surfactant, cationic surfactant, etc., degrease the metal and polyimide in the pores, desmear with an alkaline permanganate solution, then use persulfate soda. After soft etching, pre-dip into sodium chloride, hydrochloric acid, etc. After these steps, a Pd-Sn film is formed by an activating step of immersing in a palladium-tin colloid solution, and finally an alkaline accelerator bath containing sulfuric acid carbonate, potassium carbonate and copper ions, and sulfuric acid. When activated with an acidic accelerator bath containing, a reducing agent may be added to the alkaline accelerator bath used for activation. Examples of the reducing agent that can be added include aldehydes such as formaldehyde, acetaldehyde, propionaldehyde, and benzaldehyde, catechol, resorcin, ascorbic acid, and the like. As the alkaline accelerator bath to which the reducing agent is added, those containing sodium carbonate, potassium carbonate and copper ions are preferable.
By the above method, a coating having a low resistance value made of Pd—Sn can be obtained, and the coating time by electrolytic copper plating in the next step can be shortened.

次いで、酸洗浄した後、電気銅メッキする。
電気メッキにおいては、電流密度を2A/dm〜8A/dmに設定し、硫酸銅が180〜240g/l、硫酸45〜60g/l、塩素イオン20〜80g/l、添加剤としてチオ尿素、デキストリン又はチオ尿素と糖蜜とを添加して行うことが好ましい。
前記の方法によって厚さ3〜30μmの銅メッキ層を形成し、孔径が30〜100μm程度のビアホ−ルあるいは貫通孔を形成することができる。
Next, after acid cleaning, electrolytic copper plating is performed.
In electroplating, the current density is set to 2 A / dm 2 to 8 A / dm 2 , copper sulfate is 180 to 240 g / l, sulfuric acid is 45 to 60 g / l, chloride ion is 20 to 80 g / l, and thiourea as an additive It is preferable to carry out by adding dextrin or thiourea and molasses.
By the above method, a copper plating layer having a thickness of 3 to 30 μm can be formed, and a via hole or a through hole having a hole diameter of about 30 to 100 μm can be formed.

次いで、メッキした片面の金属層にフォトプロセスとエッチングにより、所定のパタ−ンを有するグランド配線層を形成するとともに、他面の金属層にフォトプロセスとエッチングにより、所定のパタ−ンを有する信号配線層を形成することが好ましい。
この両面に、または少なくともホ−ルが形成されているグランド配線層側に、好適にはドライフィルムタイプの感光性ソルダ−レジストを、好適には真空ラミネ−タにてラミネ−トし、露光現像操作で所望のパタ−ンを有するソルダ−レジスト層をグランド配線層、信号配線層ともに形成することにより、両面回路基板を得ることができる。
Next, a ground wiring layer having a predetermined pattern is formed on the plated metal layer on one side by a photo process and etching, and a signal having a predetermined pattern is formed on the metal layer on the other side by a photo process and etching. It is preferable to form a wiring layer.
A dry film type photosensitive solder resist is preferably laminated on the both sides or at least the ground wiring layer side on which the hole is formed, preferably by a vacuum laminator, and exposed and developed. A double-sided circuit board can be obtained by forming a solder resist layer having a desired pattern by operation together with the ground wiring layer and the signal wiring layer.

前記の感光性ソルダ−レジストとしては、インキタイプの感光性ソルダ−レジスト、例えばポリイミド(前駆体)系の感光性樹脂組成物、好適には特開2000−212446号公報に記載のイミドシロキサン系の感光性樹脂組成物や、特開2000−109541号公報に記載のエポキシアクリレ−ト系の感光性熱硬化性樹脂組成物などであってもよく、好適にはドライフィルムタイプの感光性ソルダ−レジストが挙げられる。   Examples of the photosensitive solder resist include ink-type photosensitive solder resist, for example, a polyimide (precursor) -based photosensitive resin composition, preferably an imidosiloxane-based resin described in JP-A No. 2000-212446. It may be a photosensitive resin composition or an epoxy acrylate-based photosensitive thermosetting resin composition described in JP-A-2000-109541, preferably a dry film type photosensitive solder. A resist.

特に、ソルダ−レジストとして硬化後の単体で100kgf/mm以下の引張弾性率を有するものは、実質的に反りの発生しない保護膜として使用できるため好適である。このような硬化後に保護膜として使用できるドライフィルムタイプの感光性ソルダ−レジストとして、日本ポリテック株式会社のFPC用ドライフィルムソルダ−マスク(ウレタンゴムとエポキシアクリレ−トとを主材とし、難燃剤、開始剤を含有する感光性樹脂組成物:硬化後に約40kgf/mmの引張弾性率を示す)や、宇部興産株式会社の特願2001−359790号明細書に記載のエポキシアクリレ−ト樹脂と非対称性芳香族テトラカルボン酸二無水物とα、ω−ビス(3−アミノプロピル)ポリジメチルシロキサンとの反応物であるオリゴマ−とエポキシ樹脂と光重合開始剤とを含む感光性樹脂組成物のドライフィルム(硬化後に約60kgf/mmの引張弾性率を示す)が好適である。
前記のドライフィルムタイプの感光性ソルダ−レジストによれば、従来のカバ−レイタイプに比べて、耐メッキ性良好、ブランキング不要、微細化が可能、接着剤のしみ出しがなくなるなどの効果が得られる。
In particular, a solder resist having a tensile modulus of 100 kgf / mm 2 or less as a simple substance after curing can be used as a protective film that does not substantially warp. As a dry film type photosensitive solder resist that can be used as a protective film after curing, a dry film solder mask for FPC manufactured by Nippon Polytech Co., Ltd. (based on urethane rubber and epoxy acrylate, flame retardant) And an epoxy acrylate resin described in Japanese Patent Application No. 2001-359790 of Ube Industries, Ltd., and a photosensitive resin composition containing an initiator, which exhibits a tensile elastic modulus of about 40 kgf / mm 2 after curing. Resin composition comprising an oligomer which is a reaction product of asymmetric aromatic tetracarboxylic dianhydride with α, ω-bis (3-aminopropyl) polydimethylsiloxane, an epoxy resin and a photopolymerization initiator A dry film (which exhibits a tensile modulus of about 60 kgf / mm 2 after curing) is preferred.
According to the above-mentioned dry film type photosensitive solder resist, compared to the conventional cover-lay type, there are effects such as good plating resistance, no blanking, miniaturization, and no adhesive exudation. can get.

この後、通常はソルダ−レジストの開孔部分の銅層に、それ自体公知の方法によって電解ニッケル/金メッキ層あるいは無電解すずメッキ層を形成することにより、金メッキあるいはすずメッキして両面回路基板を得ることができる。   After that, usually, by forming an electrolytic nickel / gold plating layer or an electroless tin plating layer by a well-known method on the copper layer of the solder resist opening portion, a double-sided circuit board is formed by gold plating or tin plating. Can be obtained.

以下、実施例によりこの発明を具体的に説明するが、この発明はこれらの実施例に限定されるものではない。   EXAMPLES Hereinafter, the present invention will be specifically described with reference to examples, but the present invention is not limited to these examples.

両表面に熱圧着性を付与したポリイミドフィルム(厚さ:25μm)の両面に、電解銅箔(厚さ:9μm、日本電解社製、商品名:USLPR2)を熱圧着した両面金属箔積層体(宇部興産社製、商品名:ユピセルN)の一方の面に、易剥離性の粘着剤付き銅箔(厚み25μm、圧延銅箔)を連続式ラミネ−タ−にてプレス温度80℃、圧力0.35MPa、搬送速度1.0m/分でラミネ−トし、UV−YAGレ−ザ−[エレクトロ・サイエンティフィック・インダストリ−ズ社製(ESI社)、モデル:5220、波長:355nm]にて銅箔層およびポリイミドフィルム層をダイレクト孔空け加工することにより、ブラインドビアホ−ルおよび4種類の異形状の部品孔:貫通孔を形成した。続いて、粘着剤付き銅箔を剥離し、レ−ザ−加工により抜き落とされた部品孔部分の不要な両面金属箔積層体を該銅箔に貼り付けたまま回収した。次いで、連続式表面処理装置にて銅箔表面及び孔内のクリ−ニングを行った。続いて表面をリン酸洗浄した後、孔内にDPSプロセスにより導電化皮膜を形成し、電解銅メッキ法により銅箔層上に12μmおよび開孔した側面に厚さ10μmの銅メッキ層を形成した。次に、メッキした銅層(両面とも)に厚さ30μmのドライフィルムレジスト(旭化成社製、商品名:SUNFORT、型番:AQ−3096)をラミネ−トし、フォトプロセスとエッチング(孔部分はテンティング法により保護)により、所定のパタ−ンを有する信号配線層を銅箔層3に、所定のパタ−ンを有するグランド配線層を銅箔層2に形成した。次いで、電解ニッケルメッキ(厚さ0.5μm)と電解金メッキ(厚さ0.3μm)を施し、所望の両面配線基板をリ−ル・ツ−・リ−ル方式で作製した。
上記の両面配線基板を用いてCOFを得た。このCOFの概略図を図1に示す。
Double-sided metal foil laminate in which electrolytic copper foil (thickness: 9 μm, product name: USLPR2) is thermocompression bonded to both surfaces of a polyimide film (thickness: 25 μm) with thermocompression bonding on both surfaces ( One side of Ube Industries, Ltd. (trade name: Iupicel N) is coated with an easily peelable adhesive-attached copper foil (thickness 25 μm, rolled copper foil) at a press temperature of 80 ° C. and a pressure of 0 with a continuous laminator. Laminate at .35 MPa, conveyance speed of 1.0 m / min, and UV-YAG laser [manufactured by Electro Scientific Industries (ESI), model: 5220, wavelength: 355 nm] The copper foil layer and the polyimide film layer were directly perforated to form blind via holes and four types of irregularly shaped component holes: through holes. Subsequently, the copper foil with pressure-sensitive adhesive was peeled off, and an unnecessary double-sided metal foil laminate of the component hole portion removed by laser processing was collected while being attached to the copper foil. Subsequently, the copper foil surface and the inside of a hole were cleaned with the continuous surface treatment apparatus. Subsequently, after the surface was washed with phosphoric acid, a conductive film was formed in the hole by a DPS process, and a copper plating layer having a thickness of 12 μm was formed on the copper foil layer by electrolytic copper plating and a thickness of 10 μm was formed on the opened side surface. . Next, a dry film resist (product name: SUNFORT, model number: AQ-3096) with a thickness of 30 μm is laminated on the plated copper layer (both sides), and the photo process and etching (the hole portion is tented). The signal wiring layer having a predetermined pattern was formed on the copper foil layer 3 and the ground wiring layer having a predetermined pattern was formed on the copper foil layer 2 by the protection by a ting method. Next, electrolytic nickel plating (thickness 0.5 μm) and electrolytic gold plating (thickness 0.3 μm) were applied, and a desired double-sided wiring board was produced by a reel-to-roll method.
A COF was obtained using the above double-sided wiring board. A schematic diagram of this COF is shown in FIG.

図1は、この発明の方法によって得られる両面回路基板を適用したCOFの一例を示す概略図である。FIG. 1 is a schematic view showing an example of a COF to which a double-sided circuit board obtained by the method of the present invention is applied. 図2は、この発明の両面回路基板の製造法の各工程の好適な一例((A)〜(C)の工程)の概略図である。FIG. 2 is a schematic view of a preferred example (steps (A) to (C)) of each step of the method for manufacturing a double-sided circuit board according to the present invention. 図3は、この発明の両面回路基板の製造法の工程の好適な一例((D)〜(G)の工程)の概略図である。FIG. 3 is a schematic view of a preferred example (steps (D) to (G)) of the steps of the method for producing a double-sided circuit board according to the present invention.

符号の説明Explanation of symbols

1:両面回路基板
2:金属層
3:金属層
4:樹脂層
5:ブラインドビアホ−ル
6:貫通孔
7:金属メッキ層
8:金属メッキ層
9:ソルダ−レジスト
10:粘着剤付き薄膜物層
11:端子メッキ層
12:シリコンチップ
13:センサ部
14:金バンプ
15:センシングホ−ル
1: Double-sided circuit board 2: Metal layer 3: Metal layer 4: Resin layer 5: Blind via hole 6: Through hole 7: Metal plating layer 8: Metal plating layer 9: Solder resist 10: Thin film with adhesive Layer 11: Terminal plating layer 12: Silicon chip 13: Sensor part 14: Gold bump 15: Sensing hole

Claims (12)

樹脂層の両面に金属層が積層された両面金属積層体の所望の位置に、片面からのレ−ザ−加工によってブラインドビアホ−ルと任意の異形状の貫通孔とを同時に形成するレ−ザ−加工工程、該レ−ザ−加工によって形成された貫通孔内の樹脂面および露出している金属部分に金属めっきして金属めっき層を設けて金属層の両面を電気的に接続する金属めっき工程、次いで両面に金属パタ−ンを形成する金属パタ−ン形成工程を含む両面回路基板の製造法。 A layer in which a blind via hole and an arbitrarily shaped through hole are simultaneously formed at a desired position of a double-sided metal laminate in which metal layers are laminated on both sides of a resin layer by laser processing from one side. A metal for electrically connecting both surfaces of the metal layer by providing a metal plating layer on the resin surface in the through-hole formed by the laser processing and the exposed metal portion and providing a metal plating layer A method for producing a double-sided circuit board, comprising a plating step and then a metal pattern forming step for forming a metal pattern on both sides. 両面金属積層体が、熱融着性3層構造のポリイミドフィルムの両面に金属箔を熱圧着するか、金属箔にポリイミド前駆体溶液を流延製膜した熱融着性ポリイミド層を有する片面金属張積層体の2枚を熱圧着して積層するか、あるいはポリイミドフィルムの両面に下地金属および銅を蒸着した後に金属めっきするいずれかによってポリイミドフィルムの両面に金属層を積層したものである請求項1に記載の両面回路基板の製造法。 Double-sided metal laminate is a single-sided metal having a heat-fusible polyimide layer in which a metal foil is thermocompression bonded to both sides of a polyimide film having a heat-fusible three-layer structure, or a polyimide precursor solution is cast on the metal foil. A metal layer is laminated on both sides of the polyimide film by either laminating two of the tension laminates by thermocompression bonding or by metal plating after depositing a base metal and copper on both sides of the polyimide film. 2. A method for producing a double-sided circuit board according to 1. レ−ザ−加工が、UV−YAGレ−ザ−による請求項1に記載の両面回路基板の製造方法。 2. The method for manufacturing a double-sided circuit board according to claim 1, wherein the laser processing is performed by a UV-YAG laser. レ−ザ−加工が、リ−ル・ツ−・リ−ル方式により連続的に行われる請求項1に記載の両面回路基板の製造法。 2. The method for manufacturing a double-sided circuit board according to claim 1, wherein the laser processing is continuously performed by a reel-to-roll method. レ−ザ−加工工程が、ブラインドビアホ−ルと任意の異形状の貫通孔を同時に形成した後、他面に積層した易剥離性の粘着剤付き薄膜物層を剥離することによってレ−ザ−加工によって生じた廃棄物を一緒に除去する工程を含む請求項1に記載の両面回路基板の製造法。 After the laser processing step simultaneously forms the blind via hole and any irregularly shaped through-hole, the laser peeling process is performed by peeling the thin film layer with an easily peelable adhesive laminated on the other surface. The method for producing a double-sided circuit board according to claim 1, further comprising a step of removing waste generated by the processing together. 金属めっき工程が、孔内のクリ−ニング、表面の酸洗浄、孔内の導電化皮膜形成、電解銅めっきによる孔内および金属層上の銅のめっき層の形成の各工程を含む請求項1に記載の両面回路基板の製造法。 The metal plating step includes the following steps: cleaning in the hole, acid cleaning of the surface, formation of a conductive film in the hole, formation of a copper plating layer in the hole and on the metal layer by electrolytic copper plating. A method for producing a double-sided circuit board as described in 1. 金属パタ−ン形成工程が、金属めっき層の両面にエッチングレジストを形成して露光、現像、金属層のエッチングおよびエッチングレジストの剥離により所望形状の金属パタ−ンを形成することからなる請求項1に記載の両面回路基板の製造法。 2. The metal pattern forming step comprises forming an etching resist on both surfaces of the metal plating layer and forming a metal pattern having a desired shape by exposure, development, etching of the metal layer, and peeling of the etching resist. A method for producing a double-sided circuit board as described in 1. 金属パタ−ン形成工程が、片面の金属層に信号配線層と他面の金属層にグランド配線層を形成する請求項1に記載の両面回路基板の製造法。 2. The method for manufacturing a double-sided circuit board according to claim 1, wherein the metal pattern forming step forms the signal wiring layer on the metal layer on one side and the ground wiring layer on the metal layer on the other side. さらに、所望形状のソルダ−レジスト等の保護膜を形成する工程を有する請求項1に記載の両面回路基板の製造法。 Furthermore, the manufacturing method of the double-sided circuit board of Claim 1 which has the process of forming protective films, such as solder resist of desired shape. ソルダ−レジストが、感光性ドライフィルムタイプであって真空下においてラミネ−トした後、露光現像操作にて所定の位置にパタ−ン形成したものである請求項1に記載の両面回路基板の製造法。 2. The double-sided circuit board according to claim 1, wherein the solder resist is a photosensitive dry film type, which is laminated at a predetermined position by exposure and development after laminating under vacuum. Law. さらに、露出している金属部分に、Ni/Au、あるいは錫等の金属めっきを施す工程を有する請求項1に記載の両面回路基板の製造法。 Furthermore, the manufacturing method of the double-sided circuit board of Claim 1 which has the process of performing metal plating, such as Ni / Au or tin, to the exposed metal part. 金属めっきが、電解ニッケルめっき次いで電解金めっきである請求項11に記載の両面回路基板の製造法。 The method for producing a double-sided circuit board according to claim 11, wherein the metal plating is electrolytic nickel plating and then electrolytic gold plating.
JP2004030274A 2004-02-06 2004-02-06 Method for manufacturing double-sided circuit board Pending JP2005223174A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2004030274A JP2005223174A (en) 2004-02-06 2004-02-06 Method for manufacturing double-sided circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2004030274A JP2005223174A (en) 2004-02-06 2004-02-06 Method for manufacturing double-sided circuit board

Publications (1)

Publication Number Publication Date
JP2005223174A true JP2005223174A (en) 2005-08-18

Family

ID=34998555

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2004030274A Pending JP2005223174A (en) 2004-02-06 2004-02-06 Method for manufacturing double-sided circuit board

Country Status (1)

Country Link
JP (1) JP2005223174A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011258909A (en) * 2010-06-10 2011-12-22 Subtron Technology Co Ltd Manufacturing method of circuit board
US11338393B2 (en) 2015-10-30 2022-05-24 Laser Systems Inc. Manufacturing method of processed resin substrate and laser processing apparatus

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011258909A (en) * 2010-06-10 2011-12-22 Subtron Technology Co Ltd Manufacturing method of circuit board
US11338393B2 (en) 2015-10-30 2022-05-24 Laser Systems Inc. Manufacturing method of processed resin substrate and laser processing apparatus

Similar Documents

Publication Publication Date Title
JP3941573B2 (en) Method for manufacturing flexible double-sided substrate
US7802361B2 (en) Method for manufacturing the BGA package board
KR101805743B1 (en) Method for manufacturing printed wiring board and copper foil for laser processing
JP2006173554A (en) Ball grid array substrate provided with window and its manufacturing method
JP2006073984A (en) Resistor built-in printed circuit board and its manufacturing method
JP2006108613A (en) Printed board and its manufacturing method
JP2011061176A (en) Printed circuit board manufacturing method
JP2003008199A (en) Method for roughening copper surface of printed wiring board and printed wiring board and its producing method
KR20140057861A (en) Method of manufacturing printed circuit board
JP5256747B2 (en) Manufacturing method of copper wiring insulating film by semi-additive method, and copper wiring insulating film manufactured therefrom
WO2006129734A1 (en) Mold for wiring substrate formation and process for producing the same, wiring substrate and process for producing the same, process for producing multilayered laminated wiring substrate and method for viahole formation
JP2003158364A (en) Method of manufacturing printed wiring board
TWI487451B (en) Manufacturing method of multilayer printed wiring board
JP2005175150A (en) Double sided circuit board and its manufacturing method
JP6381997B2 (en) Method for manufacturing printed wiring board
JP2007013048A (en) Multilayer wiring board manufacturing method
JP2007116191A (en) Method for electrically connecting metal layers in both sides of polyimide film in laminated body having metal layers in both sides of polyimide film
JP2003209330A (en) Double-sided circuit board and manufacturing method thereof
JPH1187931A (en) Manufacture of printed circuit board
JP2008252041A (en) Method for manufacturing build-up multilayer wiring board
JP4137279B2 (en) Printed wiring board and manufacturing method thereof
JP2005223174A (en) Method for manufacturing double-sided circuit board
JP5040346B2 (en) Method for manufacturing printed wiring board
JP2006108270A (en) Method of manufacturing flexible printed board
JP2004214410A (en) Multi-layer wiring substrate and method for manufacturing the same

Legal Events

Date Code Title Description
A621 Written request for application examination

Effective date: 20060130

Free format text: JAPANESE INTERMEDIATE CODE: A621

A131 Notification of reasons for refusal

Effective date: 20081125

Free format text: JAPANESE INTERMEDIATE CODE: A131

A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 20090324