JP2005215343A - Display device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To realize a display device capable of reducing parasitic capacitance between a pixel electrode and a source bus line in a delta array. <P>SOLUTION: A shield electrode 31 is provided in the vicinity of the pixel electrode 21 and the source bus line 18. The shield electrode is constituted so that it is overlapped at least on a source bus line 21 which forms Csd2 among a source bus line 21 which forms Csd1 and the source bus line 21 which forms Csd2. The shield electrode 31 is formed in the same layer as that of a gate bus line 15 and is formed in the same layer as that of the source bus line 18. The surroundings of the shield electrode 31 can be surrounded by an insulator and the shield electrode 31 can be connected to wiring other than the source bus line 18. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a display device such as a liquid crystal display device.

  As a display device for displaying various information, for example, a liquid crystal display device is used. For example, as shown in FIG. 22, such a display device includes a gate bus line, a source bus line, an auxiliary capacitance line, and a region surrounded by the gate bus line and the source bus line. The pixel electrode is disposed so as to overlap the line and receives a data signal from the source bus line, and the counter electrode is opposed to the pixel electrode.

As such a thing, patent documents 1, 2, etc. are mentioned, for example.
JP-A-9-96839 (publication date April 8, 1997) JP 2002-151699 A (publication date May 24, 2002)

  However, in the conventional configuration, as shown in FIG. 24, a portion where the pixel electrode and the source bus line overlap forms a source-drain parasitic capacitance (hereinafter, abbreviated as Csd). ing. Through these capacitances, the potential of the pixel is drawn by the potential fluctuation of the source bus line. Since the pull-in amount of the pixel potential differs for each horizontal line, the difference in the pull-in amount of the pixel potential appears as a luminance difference (= horizontal stripe) for each horizontal line, and a uniform display cannot be obtained. In the drawing, a black arrow indicates application of a data signal, and a white arrow indicates a potential pulling action when attention is paid to a G (green) pixel.

  The generation of the horizontal stripe will be described in detail.

  FIG. 24 schematically shows source bus lines, pixel electrodes, and source-drain parasitic capacitances of a delta array display panel.

  Here, when attention is paid to the G pixel, for example, the source bus lines adjacent to the G pixel are the source bus line for the G signal and the source bus line for the R or B signal, as can be seen from the figure. Whether the source bus line adjacent to the G pixel is R or B is alternated for each horizontal line. That is, two types of G pixels, that is, a G pixel sandwiched between the R and G lines and a G pixel sandwiched between the G and B lines are arranged for each horizontal line.

  Due to the structure, the pixel electrode and the source bus line overlap with each other through an insulating film, and therefore there is a parasitic capacitance between the source and the drain which is a parasitic capacitance. Among them, the capacity with the source bus line driving the own pixel (here, the capacity with the G line) is Csd1, and the capacity with the source bus line not driving the own pixel (here, the capacity with the R and B lines). Is Csd2. Through these capacitors, the potential of the pixel G is drawn by the potential fluctuation of the source bus line. The G pixel sandwiched between the R and G lines described above is pulled into the R and G lines, and the G pixel sandwiched between the G and B lines is pulled into the G and B lines. Among these, the pull-in by the G line is common to both, but the pull-in by the R line and the pull-in by the B line are not necessarily equal. As a result, the liquid crystal applied voltage of the G pixel differs for each horizontal line. When the G pixel is halftone display, it appears as a stripe (horizontal stripe) for each horizontal line. This phenomenon occurs not only in the green pixel G but also in the red pixel R and the blue pixel B.

  For example, when R is white display, G is halftone display, and B is black display, horizontal stripes are noticeable.

  The present invention has been made in view of the above problems, and an object of the present invention is to realize a display device capable of obtaining a uniform display by reducing a difference in the amount of pixel potential drawn for each horizontal line. It is in.

  In order to solve the above problems, a display device according to the present invention is formed on a plurality of source bus lines having meandering and recessed regions, an insulating film covering the plurality of source bus lines, and the insulating film. In a display device including a plurality of pixel electrodes at least a part of which are disposed in a recessed area, when attention is paid to one of the plurality of pixel electrodes, a source bus that does not apply a data signal to the one pixel electrode A shield electrode that reduces the capacitance between the source bus line and the pixel electrode is disposed at a position that does not contact the line and does not contact the one pixel electrode.

  With the above configuration, when attention is paid to one pixel electrode of the plurality of pixel electrodes, the pixel electrode is not in contact with a source bus line that does not apply a data signal to the pixel electrode, and is in contact with the one pixel electrode. A shield electrode for reducing the capacitance between the source bus line and the pixel electrode is disposed at a position where the source bus line is not. That is, the shield electrode works in a direction to shield an electric field between the source bus line and the pixel electrode. Therefore, the difference in the amount of pixel potential drawn by the source bus line for each horizontal line can be reduced. Therefore, there is an effect that uniform display can be obtained by suppressing the difference in the amount of pixel potential drawn by the source bus line for each horizontal line from appearing as a luminance difference (= horizontal stripe) for each horizontal line.

  In the display device according to the present invention, in addition to the above configuration, the shield electrode is formed on the side of the source bus line opposite to the surface facing the pixel electrode. It is characterized by.

  With the above configuration, the shield electrode is formed on the side of the source bus line opposite to the surface facing the pixel electrode. Therefore, in the existing manufacturing process, the shield electrode can be formed by a simple change by changing the pattern in the step of patterning the gate bus line. Therefore, in addition to the effects of the above configuration, the process can be simplified and an increase in manufacturing cost can be suppressed.

  In addition to the above structure, the display device according to the present invention is characterized in that the shield electrode is formed in the same layer as the gate bus line.

  With the above configuration, the shield electrode is formed in the same layer as the gate bus line. Therefore, in the existing manufacturing process, the shield electrode can be formed by a simple change by changing the pattern in the step of patterning the gate bus line. Therefore, in addition to the effects of the above configuration, the process can be simplified and an increase in manufacturing cost can be suppressed.

  In addition to the above structure, the display device according to the present invention is characterized in that the shield electrode is formed of a semiconductor.

  With the above configuration, the shield electrode is formed of a semiconductor. Therefore, in the existing manufacturing process, the shield electrode can be formed with a simple change by simply changing the pattern in the step of patterning a necessary semiconductor. Therefore, in addition to the effects of the above configuration, the process can be simplified and an increase in manufacturing cost can be suppressed.

  In addition to the above configuration, the display device according to the present invention is characterized in that the shield electrode is formed in the same layer as the source bus line.

  With the above configuration, the shield electrode is formed in the same layer as the source bus line. Therefore, in the existing manufacturing process, the shield electrode can be formed by a simple change by changing the pattern in the step of patterning the source bus line. Therefore, in addition to the effects of the above configuration, the process can be simplified and an increase in manufacturing cost can be suppressed.

  In addition to the above structure, the display device according to the present invention is characterized in that the shield electrode is formed between the source bus line and the pixel electrode.

  With the above configuration, the shield electrode is formed between the source bus line and the pixel electrode. Therefore, the shield electrode is highly effective in shielding the electric field between the source bus line and the pixel electrode. Therefore, in addition to the effect of the above configuration, there is an effect that the capacitance between the source bus line and the pixel electrode can be reduced more remarkably.

  In the display device according to the present invention, in addition to the above configuration, the shield electrode is formed on the side of the pixel electrode opposite to the surface facing the source bus line. It is characterized by.

  With the above configuration, the shield electrode is formed on the surface of the pixel electrode opposite to the surface facing the source bus line. Therefore, it is not necessary to arrange a shield electrode on the surface of the pixel electrode facing the source bus line. Therefore, in addition to the effect of the above configuration, there is an effect that the degree of freedom of design on the surface side of the pixel electrode facing the source bus line can be increased.

  In addition to the above configuration, the display device according to the present invention is characterized in that the entire surface of the shield electrode is surrounded by an insulator.

  With the above configuration, the entire surface of the shield electrode is surrounded by an insulator. In other words, in the layered structure constituting the display panel, the shield electrode has a floating island shape away from the surrounding conductors (source bus line, gate bus line, auxiliary capacity wiring, pixel electrode, etc.). That is. For example, it may be connected to the ground. Therefore, the electric field strength generated between the shield electrode and the source bus line can be suppressed. Therefore, in addition to the effect of the above configuration, the load on the source driver that drives the source bus line can be suppressed, and an increase in power consumption can be suppressed.

  In addition, since it is not connected to other wiring, the degree of freedom of positional relationship with other wiring is increased. Therefore, in addition to the effect of the above configuration, there is an effect that the degree of freedom of design can be increased.

  In addition to the above structure, the display device according to the present invention is characterized in that the shield electrode is connected to a wiring other than the source bus line.

  With the above configuration, the shield electrode is connected to wiring other than the source bus line. As a result, it is easy to ensure that the potential of the shield electrode is different from the potential of the source bus line. For example, it is connected to another wiring which is different from the potential of the source bus line at least at a certain time or always. Such wiring may have a constant potential during a period in which the potential of the source bus line is constant and changes to various potentials at the same timing as the potential of the source bus line changes. May be. Alternatively, wiring that always maintains a constant potential may be used. Therefore, the electric field between the shield electrode and the source bus line can be more reliably strengthened than when the shield electrode has a floating island shape. Therefore, in addition to the effect of the above configuration, there is an effect that the capacitance between the source bus line and the pixel electrode can be reduced more remarkably.

  In addition to the above configuration, the display device according to the present invention is characterized in that the shield electrode is connected to the gate bus line.

  With the above configuration, the shield electrode is connected to the gate bus line. Therefore, the electric field between the shield electrode and the source bus line can be more reliably strengthened than when the shield electrode has a floating island shape. Therefore, in addition to the effect of the above configuration, there is an effect that the capacitance between the source bus line and the pixel electrode can be reduced more remarkably.

  In addition to the above configuration, the display device according to the present invention is characterized in that the shield electrode is connected to an auxiliary capacitance line.

  With the above configuration, the shield electrode is connected to the auxiliary capacitance wiring. Therefore, the electric field between the shield electrode and the source bus line can be more reliably strengthened than when the shield electrode has a floating island shape. Therefore, in addition to the effect of the above configuration, there is an effect that the capacitance between the source bus line and the pixel electrode can be reduced more remarkably.

  In addition to the above structure, the display device according to the present invention is characterized in that the shield electrode is in the same layer as the source bus line, and an auxiliary capacitance wiring is provided below the shield electrode.

  With the above configuration, the shield electrode is in the same layer as the source bus line, and there is an auxiliary capacitance line below the shield electrode. Therefore, in addition to the effect of the above configuration, since the auxiliary capacitance wiring also functions as a shield electrode, there is an effect that the capacitance between the source bus line and the pixel electrode can be more effectively reduced.

  In order to solve the above problems, a display device according to the present invention is formed on a plurality of source bus lines having meandering and recessed regions, an insulating film covering the plurality of source bus lines, and the insulating film. In a display device including a plurality of pixel electrodes at least a part of which is disposed in the recessed area, when attention is paid to one pixel electrode among the plurality of pixel electrodes, data is stored in the one pixel electrode and the one pixel electrode. A capacitance formed between a first source bus line to which a signal is applied is Csd1, and the one pixel electrode is a source bus line adjacent to the first source bus line and the one pixel electrode. Csd2 is smaller than Csd1, where Csd2 is a capacitance formed between the second source bus line arranged on the opposite side of the first source bus line arrangement side It is characterized in that.

  With the above configuration, Csd2 is smaller than Csd1. Therefore, when Csd2 is smaller than that having a configuration in which Csd2 is greater than or equal to Csd1, the difference between the horizontal lines in the amount of pixel potential drawn by the source bus line can be reduced. Therefore, there is an effect that uniform display can be obtained by suppressing the difference in the amount of pixel potential drawn by the source bus line for each horizontal line from appearing as a luminance difference (= horizontal stripe) for each horizontal line.

  In order to solve the above problems, a display device according to the present invention is formed on a plurality of source bus lines having meandering and recessed regions, an insulating film covering the plurality of source bus lines, and the insulating film. In a display device including a plurality of pixel electrodes at least a part of which are disposed in the recessed area, when attention is paid to one pixel electrode among the plurality of pixel electrodes, the data signal is applied to the one pixel electrode. A second source bus line adjacent to one source bus line and disposed on the opposite side of the one pixel electrode from the first source bus line arrangement side is the one pixel electrode. Where the length of the second source bus line in the direction parallel to the horizontal line is L2, L2 is (source bus line width−distance between the two pixel electrodes) / 2. It is characterized by small.

  With the above configuration, L2 is smaller than (source bus line width−distance between the two pixel electrodes) / 2. Therefore, the difference in the amount of pixel potential drawn by the source bus line for each horizontal line can be reduced. Therefore, there is an effect that uniform display can be obtained by suppressing the difference in the amount of pixel potential drawn by the source bus line for each horizontal line from appearing as a luminance difference (= horizontal stripe) for each horizontal line.

  In addition to the above structure, the display device according to the present invention is characterized in that each of the plurality of source bus lines is dedicated to one color pixel.

  With the above configuration, each of the plurality of source bus lines is dedicated to one color pixel. For example, one source bus line is dedicated to R (red), one source bus line is dedicated to B (blue), and one source bus line is dedicated to G (green). This means that the bus line is sometimes for R and not for G. Therefore, in addition to the effect of the above configuration, there is an effect that the capacity between the source bus line and the pixel electrode can be more effectively reduced.

  In addition to the above structure, the display device according to the present invention is characterized in that the source bus line supplies a data signal to the pixel electrode facing the convex region.

  With the above configuration, the source bus line supplies a data signal to the pixel electrode facing the convex region. Therefore, in addition to the effect of the above configuration, there is an effect that the capacity between the source bus line and the pixel electrode can be more effectively reduced.

  As described above, in the display device according to the present invention, when attention is paid to one pixel electrode among the plurality of pixel electrodes, the display device does not contact a source bus line that does not apply a data signal to the one pixel electrode, and The shield electrode for reducing the capacitance between the source bus line and the pixel electrode is disposed at a position not in contact with the one pixel electrode.

  The display device according to the present invention is configured to apply a data signal to the one pixel electrode and the one pixel electrode when attention is paid to one pixel electrode of the plurality of pixel electrodes. The capacitance formed between the first pixel bus and the first source bus line of the one pixel electrode is a source bus line adjacent to the first pixel bus and the first source bus line. This is a configuration in which Csd2 is smaller than Csd1, where Csd2 is a capacitance formed between the second source bus line arranged on the opposite side to the second side.

  Further, the display device according to the present invention has a source bus adjacent to the first source bus line for applying a data signal to the one pixel electrode when attention is paid to one pixel electrode of the plurality of pixel electrodes. A second source bus line arranged on the opposite side of the one pixel electrode from the first source bus line arrangement side is parallel to a horizontal line at a portion overlapping the one pixel electrode. When the length of the second source bus line in the direction is L2, L2 is smaller than (source bus line width−distance between the two pixel electrodes) / 2.

  As a result, the difference between the horizontal lines in the amount of pixel potential drawn by the source bus line can be reduced. Therefore, there is an effect that uniform display can be obtained by suppressing the difference in the amount of pixel potential drawn by the source bus line for each horizontal line from appearing as a luminance difference (= horizontal stripe) for each horizontal line.

[Embodiment 1]
The display device according to this embodiment is a liquid crystal display device that performs color display in a delta arrangement, and the display pixel unit 10 includes a gate bus line 15, a source bus line 18, an auxiliary capacitor, as shown in FIGS. Wiring 16, a pixel electrode 21 that receives a data signal from the source bus line in a region surrounded by the gate bus line and the source bus line, and a counter electrode (with a liquid crystal layer interposed therebetween) It is an active matrix liquid crystal display device. The source bus line 18 can be disposed so as to overlap each pixel electrode 21 with an insulating film interposed therebetween. Reference numeral 25 denotes a reflective electrode.

  Here, the source bus line 18 meanders to have a convex region 18b and a concave region 18c. That is, if the traveling direction (the direction perpendicular to the horizontal line) is assumed to be downward in FIG. 1 for the sake of convenience of explanation, when it turns rightward (left side in FIG. 1) toward the traveling direction, it protrudes to the right. A partial area 18b is formed, and a concave area 18c is formed on the left side. When turning to the left (right side in FIG. 1) in the traveling direction, a convex region 18b is formed on the left side and a concave region 18c is formed on the right side. The source bus line 18 applies a data signal only to the pixel electrode 21 facing the convex region 18b. That is, when attention is paid to the source bus line S in FIG. 1, among the pixel electrodes 21, A, D, and E are located in the convex region 18 b of the source bus line S, and among the pixel electrodes 21, B, C, F is located in the recessed area 18c of the source bus line S. Therefore, the source bus line S applies a data signal to A, D, and E of the pixel electrode 21 and does not apply a data signal to B, C, and F of the pixel electrode 21.

  Parts A to E in FIG. 2 correspond to parts A to E in FIGS. 3 and 4, respectively.

  Reference numeral 16 denotes an auxiliary capacity wiring.

  Reference numeral 13 denotes an Si semiconductor layer, which has regions 13a, 13b, 13c, and 13d that overlap the storage capacitor wiring 16, the drain electrode 19, the gate electrodes 15a and 15b, and the source electrode of the source bus line 18, respectively.

  The source bus line 18 is connected to the Si semiconductor layer 13 through the contact hole 18a.

  A drain electrode 19 is connected to the pixel electrodes 21 and 13c through the contact hole 21a and the contact hole 19a, respectively.

  Here, in this embodiment, the shield electrode 31 is provided in the vicinity of the pixel electrode 21 and the source bus line 18. The shield electrode 31 is formed to reduce the source-drain parasitic capacitance (Csd) (hereinafter simply referred to as parasitic capacitance) between the pixel electrode 21 and the source bus line 18.

  The shield electrode refers to all conductors having a function of shielding an electric field between other electrodes. Therefore, the shield electrode includes not only one connected to a potential applying line such as a gate bus line but also one not connected to a potential applying line (so-called floating state). In addition, the conductors here generally include, for example, a semiconductor such as an n + semiconductor doped with P in addition to a good conductor such as a metal film.

  Since the pixel electrode 21 is disposed so as to overlap the source bus line 18 as described above, when a data signal is applied to the source bus line 18 for image display, the pixel electrode 21 is interposed between the pixel electrode 21 and the source bus line 18. An electric field is generated, whereby a parasitic capacitance is formed in a portion where the pixel electrode 21 and the source bus line 18 overlap. On the other hand, in the present embodiment, the shield electrode 31 made of a conductor or a semiconductor is disposed at a position where the pixel electrode 21 and the source bus line 18 are not contacted (that is, insulated). Thereby, this shield electrode 31 works in the direction which shields this electric field, and reduces the said parasitic capacitance.

  That is, in the vicinity of the source bus line 18, an electric field is generated by a signal applied to the source bus line 18 not only in a region sandwiched between the pixel electrode 21 and the source bus line 18 but also in all directions. An electric field is also generated in the direction opposite to the pixel electrode 21 when viewed from the source bus line 18. Since the pixel electrode 21 exists in the vicinity of the source bus line 18, this electric field is also applied to the pixel electrode 21. Therefore, by arranging the shield electrode 31 at the position where the electric field is generated in this way, the shield electrode 31 shields the electric field applied from the source bus line 18 to the pixel electrode 21 as described above. Can do. In other words, the capacitance between the pixel electrode 21 and the source bus line 18 is reduced. That is, as is well known, the capacitance is generally affected by the nature of the space where the electric field can exist for the two conductors. In this embodiment, the shield electrode 31 is placed in this space, so that this space is separated from the source bus line 18. It can be said that the generated lines of electric force are changed to those that are difficult to enter the pixel electrode 21. That is, this is nothing but a reduction in capacitance.

  As described above, this embodiment is a liquid crystal display device that performs color display in a delta arrangement. Hereinafter, colors assigned to each pixel are referred to as R (red), G (green), and B (blue). The source bus lines for applying the R, G, and B data signals are simply referred to as R line, G line, and B line, respectively. As described above, because of the structure, the pixel electrode 21 and the source bus line 18 overlap each other with an insulating film interposed therebetween, so that a parasitic capacitance between the source and the drain which is a parasitic capacitance exists. Of these, the capacitance (capacity with the G line here) with the source bus line 18 driving the own pixel is Csd1, and the capacitance with the source bus line 18 not driving the own pixel (here with the R and B lines). (Capacity) is Csd2. Through these capacitances, the potential of the pixel G is drawn by the potential fluctuation of the source bus line 18. The G pixel sandwiched between the R and G lines described above is pulled into the R and G lines, and the G pixel sandwiched between the G and B lines is pulled into the G and B lines. Among these, the pull-in by the G line is common to both, but the pull-in by the R line and the pull-in by the B line are not necessarily equal. That is, the cause of the horizontal stripe is the difference between the pull-in by the R line and the pull-in by the B line. Both of these (R line and B line) are drawn in via the source-drain parasitic capacitance Csd2. Therefore, if Csd2 can be reduced, horizontal stripes can be reduced. This relationship is the same when focusing on not only the G pixel but also the R and B pixels, and by reducing Csd2, horizontal stripes generated in a display panel such as a delta array can be reduced.

This is expressed as follows.
Vpix = Vs0 + (Csd1 / Cpix) × ΔVs1 + (Csd2 / Cpix) × ΔVs2
here,
Vpix: potential of the pixel electrode after drawing Vs0: potential of the pixel electrode before drawing (= potential applied to the pixel electrode through the TFT from the source line to which the data signal is applied)
Csd1: Parasitic capacitance between any one pixel electrode and a source bus line to which a data signal is applied thereto Csd2: Parasitic capacitance between any one pixel electrode and a source bus line to which no data signal is applied Cpix: Total ΔVs1 of the entire capacitance (parasitic capacitance, auxiliary capacitance, etc.) applied to any one pixel electrode: Voltage amplitude ΔVs2 of a source bus line for applying a data signal to any one pixel electrode: Data to any one pixel electrode This is the voltage amplitude of the source bus line to which no signal is applied. In order to reduce horizontal stripes, it is necessary to reduce the difference in Vpix for each horizontal line. While the first term and the second term on the right side are considered to be substantially constant regardless of the horizontal line, the third term is different for each horizontal line because ΔVs2 is different as described above. Here, it is considered that Cpix and ΔVs2 in the third term cannot be changed. Therefore, by reducing Csd2, the difference for each horizontal line in the third term can be reduced, thereby reducing the difference in Vpix for each horizontal line.

  As described above, if at least Csd2 can be reduced, the difference in Vpix for each horizontal line can be reduced, and the difference in the amount of pixel potential drawn for each horizontal line can be reduced. Here, in this embodiment, by arranging the shield electrode 31 as described above, Csd2 is reduced and Csd1 is also reduced. In this case as well, the difference in Vpix for each horizontal line can be reduced, and the difference in the amount of pixel potential drawn for each horizontal line can be reduced.

  In this embodiment, as shown in FIG. 2, the shield electrode 31 has a planar shape extending along the longitudinal direction of the source bus line 18 (direction perpendicular to the horizontal line), and has a rectangular shape.

  In this embodiment, as shown in FIG. 4, the shield electrode 31 is formed on the side of the source bus line 18 opposite to the surface facing the pixel electrode 21 (the lower side in the figure). . Here, the shield electrode 31 is formed at a position sandwiching the interlayer insulating film 17, which is an insulator below the source bus line 18.

  As shown in FIGS. 3 and 4, the source bus line 18 is arranged so as to overlap the two pixel electrodes 21. Here, the center of the shield electrode 31 in the longitudinal direction (direction perpendicular to the horizontal line) coincides with the center of the source bus line 18 in the longitudinal direction. That is, the shield electrode 31 is symmetrical with respect to a plane (not shown) (referred to as plane S) that passes through the center in the longitudinal direction of the source bus line 18 and is orthogonal to the horizontal line. As a result, in this embodiment, the parasitic capacitance between the source bus line 18 and any pixel electrode 21 is equally reduced.

  In this embodiment, the shield electrode 31 is formed in the same layer as the gate bus line 15. In this embodiment, the shield electrode 31 is formed of the same material as that of the gate bus line 15. Therefore, it is not necessary to prepare a new material, and an increase in manufacturing cost due to the shield electrode 31 can be suppressed accordingly.

  In this embodiment, the shield electrode 31 is arranged in a floating manner. Here, the floating arrangement means that the shield electrode 31 is arranged so as to be completely insulated from any electrical signal (potential) applied member, and the entire surface is surrounded by an insulator. It is an arrangement like that. This is like a “floating island” floating in an insulator. The shield electrode 31 may be connected to the ground.

  Here, a capacitance (hereinafter referred to as a shield capacitance) is also formed between the shield electrode 31 and the source bus line 18, but this capacitance is also a part of the load when viewed from a source driver (not shown). Become one. However, with such a floating arrangement, it is possible to prevent this capacity from becoming so large, and accordingly, power consumption can be reduced.

  In addition, with such a floating arrangement, it is not necessary to consider a connection method with other wirings, so that the degree of design freedom can be increased accordingly.

  A method for manufacturing the liquid crystal display device will be described. Before describing the manufacturing procedure in the case of the configuration of this embodiment, first, the procedure in the case of a general configuration will be described.

As shown in FIGS. 3 and 23, first, SiO ₂ is provided as a base coat 12 to a thickness of 100 nm on a glass substrate 11 as an insulating substrate by plasma CVD.

  Next, a Si semiconductor layer 13 (for example, a silicon layer) is provided on the base coat 12 with a thickness of 50 nm by plasma CVD. The Si semiconductor layer 13 is crystallized by laser annealing using the Si semiconductor layer 13 as a heat treatment. Further, the Si semiconductor layer 13 is patterned into a predetermined plane shape.

Further, SiO ₂ is provided as a gate insulating film 14 with a thickness of 100 nm on the Si semiconductor layer 13 by plasma CVD.

  Further, a conductive material GE made of a tantalum nitride film with a thickness of 50 nm and a tungsten film with a thickness of 370 nm is sequentially stacked on the gate insulating film 14 by a sputtering method as a conductive material. Patterning is performed in a predetermined shape to be a line 15 (including gate electrodes 15a and 15b). Note that these conductive substances GE are elements selected from Ta, W, Ti, Mo, Al, Cu instead of tantalum nitride and tungsten materials, or alloy materials or compounds containing the above elements as a main component. It can also be made of a material.

  The Si semiconductor layer 13 is doped with P (phosphorus) from above the gate electrodes 15a and 15b through the gate insulating film 14, and the Si semiconductor layers 13 on both sides of the gate electrodes 15a and 15b are doped with an n− region and an n + region (transistor of the transistor). Source region and drain region). Thereby, a transistor is formed. This is the case of N channel formation, and in the case of P channel formation, the Si semiconductor layer 13 is doped with B (boron).

  Further, heat treatment is performed to activate the impurity element added to the Si semiconductor layer 13.

  Further, as an insulating film, an interlayer insulating film 17 having a two-layer structure of a silicon nitride film and a silicon oxide film is provided with a film thickness of 950 nm by a CVD method.

  Next, contact hole portions 18a and 19a reaching the drain region and the source region of the transistor portion are formed in the gate insulating film 14 and the interlayer insulating film 17, respectively.

  Thereafter, Ti, Al, and Ti are sequentially stacked at a film thickness of 100 nm, 500 nm, and 100 nm, respectively, as a conductive material SE (here, the conductive material and the source bus line are the same material), and these are stacked. The source bus line 18 and the drain electrode 19 are formed by patterning into a predetermined shape.

  A process of hydrogenating the Si semiconductor layer 13 is performed by heat-treating the above laminated structure. This hydrogenation step is a step of terminating dangling bonds of the Si semiconductor layer 13 with hydrogen contained in the interlayer insulating film 17 made of a silicon nitride film or the like.

  Further, a resin layer 20 made of an organic insulating material is provided on the interlayer insulating film 17, the source bus line 18 and the drain electrode 19. In this case, the resin layer 20 is provided with a film thickness of 1.6 μm.

  Further, a contact hole 21a reaching the drain electrode 19 is formed, ITO (indium tin oxide) to be the pixel electrode 21 is provided with a film thickness of 100 nm by a sputtering method, and patterned into a predetermined shape to form a plurality of pixel electrodes in a matrix shape. 21 is provided.

  Thereafter, an alignment film (not shown) is printed on the pixel electrode 21 and the resin layer 20 and a rubbing process in a predetermined direction is performed, thereby completing the active matrix substrate of the present embodiment.

  A spherical spacer (not shown) is dispersed on the alignment film side of the active matrix substrate, or a resin insulating film is formed in a column shape, and then a counter substrate (not shown) is superimposed on the active matrix substrate to face the active matrix substrate. A substrate is uniformly bonded at a predetermined interval. A liquid crystal layer is sandwiched between these two substrates. A counter electrode (not shown), which is a transparent electrode, is formed on the counter substrate, and after an alignment film (not shown) is printed thereon, a rubbing process similar to the above is performed. Thus, an active liquid crystal display device as a display device using an active matrix substrate is completed.

  Next, the manufacturing method in this embodiment will be described. In addition, description of the same part as said general procedure is abbreviate | omitted.

  3 and 4, the gate insulating film 14 is provided, and then the conductive material GE is sequentially stacked on the gate insulating film 14 by a sputtering method. Along with the gate bus line 15 (including the gate electrodes 15a and 15b), patterning is performed into a predetermined shape to be the shield electrode 31.

  In this way, the shield electrode 31 can be formed by simply changing the patterning shape using an existing manufacturing process. Therefore, although the member called the shield electrode 31 is increased, it is possible to suppress an increase in manufacturing cost due to the increase.

  The present invention can be applied to a top gate structure and an inverted stagger structure.

  As shown in FIG. 5, it is good also as 31a * 31b as a shield electrode. This is a shape in which a portion including the center in the longitudinal direction of the shield electrode 31 shown in FIG. 4 is cut off. The shield electrodes 31a and 31b are the same as described above in that they are bilaterally symmetric with respect to the plane S.

  With such a configuration, the area where the shield electrode and the source bus line 18 overlap can be reduced, so that the shield capacity can be reduced accordingly.

  As another example, the shield electrode 31 may be connected to any wiring (including electrodes) other than the source bus line 18 as shown in FIG. What is necessary is just to connect to this wiring by the contact hole 31h. The contact hole 31h can be manufactured by forming a hole for a contact hole reaching the wiring on the surface on which the shield electrode 31 is formed, and appropriately changing the patterning when forming the shield electrode. .

  With such a configuration, it is easy to ensure that the potential of the shield electrode 31 is different from the potential of the source bus line 18. Therefore, the electric field between the shield electrode 31 and the source bus line 18 can be surely increased as compared with the case where the shield electrode has a floating island shape, and the capacitance between the source bus line 18 and the pixel electrode 21 is more remarkably reduced. be able to.

  For example, it is connected to another wiring which is different from the potential of the source bus line at least at a certain time or always. Such wiring may have a constant potential during a period in which the potential of the source bus line is constant and changes to various potentials at the same timing as the potential of the source bus line changes. May be.

  Alternatively, wiring that always maintains a constant potential may be used.

  Further, as shown in FIG. 7, the shield electrode 31 may be connected to the auxiliary capacitance wiring 16 as one of arbitrary wirings other than the source bus line 18.

[Embodiment 2]
In this embodiment, as shown in FIGS. 8 and 9, the center of the source bus line 18 in the longitudinal direction (direction perpendicular to the horizontal line) is on one horizontal line and is closest to the target source bus line 18. The distance between the two pixel electrodes 21 is different from the center of the distance between the two pixel electrodes 21 (center G), and the area overlapping the source bus line 18 is different. The area where the source bus line 18 and the left pixel electrode 21 in the figure overlap is smaller than the area where the source bus line 18 and the right pixel electrode 21 in the figure overlap. The area where the source bus line 18 and the pixel electrode 21 on the left side in the drawing overlap may be zero.

  The shield electrode 31 is formed in the same layer as the source bus line 18, and the shield electrode 31 is arranged along the longitudinal direction of the source bus line 18 with the source bus line 18 and the above-mentioned farther pixel electrode (in the drawing). , In the vicinity of the left pixel electrode 21), more specifically, directly below the pixel electrode 21 with the resin layer 20 interposed therebetween.

  In this embodiment, the shield electrode 31 is made of the same material as that of the source bus line 18. Therefore, it is not necessary to prepare a new material, and an increase in manufacturing cost due to the shield electrode 31 can be suppressed accordingly.

  In this embodiment, the shield electrode 31 is formed in the same layer as the source bus line 18 as described above. As a result, the shield electrode 31 can be formed simply by changing the patterning shape of the source bus line 18 using an existing manufacturing process. Therefore, although the member called the shield electrode 31 is increased, it is possible to suppress an increase in manufacturing cost due to the increase.

  In this embodiment, the shield electrode 31 is arranged in a floating manner. As a result, as already described, an increase in shield capacity can be suppressed and power consumption can be suppressed. In addition, the degree of freedom in design can be increased.

  Other than that, it is the same as described with reference to FIGS.

  As shown in FIG. 10, the shield electrode 31 a formed in the same layer as the source bus line 18 as the shield electrode 31 in FIG. 9 and the shield electrode 31 b formed in the same layer as the gate bus line 15 are used as the shield electrodes. Both may be provided.

  In the example of FIG. 10, the center of the shield electrode 31b in the longitudinal direction (direction orthogonal to the horizontal line) does not coincide with the center G, and the area overlapping the shield electrode 31b differs between the two pixel electrodes 21. It is said. The difference is opposite to the size relationship of the overlapping area between the source bus line 18 and the pixel electrode 21, and the area where the shield electrode 31 b and the left pixel electrode 21 overlap in the figure is the shield electrode 31 b and in the figure. The area is larger than the area where the right pixel electrode 21 overlaps. The area where the shield electrode 31b and the right pixel electrode 21 overlap in the drawing may be zero.

  As a result, the shield electrode 31b is connected to the source bus line 18 and the source bus line 18 more than the parasitic capacitance between the source bus line 18 and the pixel electrode 21 having a larger overlapping area with the source bus line 18. The parasitic capacitance between the pixel electrode 21 with the smaller overlapping area is further reduced.

  Further, as another example, the shield electrode 31 is not connected to the source bus line 18 as shown in FIG. 11 as in the case of FIG. It is good also as a structure connected.

[Embodiment 3]
In this embodiment, as shown in FIGS. 12 and 13, the shield electrode 31 is formed between the source bus line 18 and the pixel electrode 21. Therefore, the effect that the shield electrode 31 shields the electric field between the source bus line 18 and the pixel electrode 21 is enhanced. Therefore, the capacitance between the source bus line 18 and the pixel electrode 21 can be reduced more remarkably.

  In order to form such a shield electrode 31, in the above-described manufacturing process, the formation of the resin layer 20 is divided into the first half and the second half, and the material of the shield electrode 31 is laminated between the first half and the second half.

  The shield electrode 31 may be arranged in a floating manner, and is connected to any wiring (including electrodes) other than the source bus line 18 as shown in FIG. 14 as described in the example of FIG. It is good also as a structure.

  Other than that, it is the same as described with reference to FIGS.

[Embodiment 4]
In this embodiment, as shown in FIGS. 12 and 15, the shield electrode 31 is formed on the surface of the pixel electrode 21 opposite to the surface facing the source bus line 18. Therefore, it is not necessary to arrange a shield electrode on the surface of the pixel electrode 21 facing the source bus line 18. Therefore, the degree of freedom in design on the side facing the source bus line 18 can be increased.

  In order to form such a shield electrode 31, after the pixel electrode 21 is formed in the above-described manufacturing process, the insulating film 22 is further formed in the first half and the second half, and between the first half and the second half. In addition, the material of the shield electrode 31 may be laminated.

  The shield electrode 31 may be arranged in a floating manner, or may be configured to be connected to any wiring (including electrodes) other than the source bus line 18 as described in the example of FIG.

  Other than that, it is the same as described with reference to FIGS.

[Embodiment 5]
In this embodiment, as shown in FIGS. 16 and 17, Csd2 is reduced by shifting the arrangement of the source bus lines 18 to the pixel electrode 21 side (the right side in FIG. 17) that forms Csd1. In the first to fourth embodiments, the shield electrode 31 is arranged to reduce Csd2 and Csd1. However, as described above, if at least Csd2 can be reduced, the difference in Vpix for each horizontal line. , And the difference in the amount of pixel potential drawn for each horizontal line can be reduced.

  More specifically, when attention is paid to any one of the colors (for example, G), between the one pixel electrode and a first source bus line that applies a data signal to the one pixel electrode. Csd1 is defined as the capacitance formed in the first pixel bus and the source bus line adjacent to the first source bus line, opposite to the first source bus line arrangement side of the one pixel electrode. Csd2 is smaller than Csd1, where Csd2 is the capacity formed between the second source bus line arranged on the side.

  In this way, Csd2 can be reduced compared to a configuration in which the capacitance is Csd1 on both sides of the pixel electrode, and the generation of stripes (horizontal stripes) for each horizontal line can be suppressed accordingly.

  In order to make Csd2 smaller than Csd1, specifically, an area where a source bus line for applying a data signal to one pixel electrode for the target color overlaps the pixel electrode is defined as S1, and the pixel for the target color The source bus line for applying a data signal to the electrode has a pixel electrode for a color different from the target color and overlaps with the pixel electrode arranged on the same horizontal line as the target color pixel electrode. When S2, it can be configured such that S2 is smaller than S1. S2 may be 0.

  Also, a source bus line adjacent to the first source bus line for applying a data signal to the one pixel electrode and disposed on a side opposite to the first source bus line arrangement side of the one pixel electrode. When the length of the second source bus line in the direction parallel to the horizontal line of the portion where the second source bus line overlaps with the one pixel electrode is L2, L2 is (source bus line The width may be smaller than the distance between the two pixel electrodes) / 2.

  The length of the second source bus line in the direction parallel to the horizontal line at the portion where the first source bus line for applying the data signal to the one pixel electrode overlaps with the one pixel electrode is L1. Then, L1 becomes larger than (source bus line width−distance between the two pixel electrodes) / 2.

  Note that the length in the direction parallel to the horizontal line of the portion where the source bus line for applying the data signal to one pixel electrode for the target color overlaps the pixel electrode is L1, and data is stored in the pixel electrode for the target color. The source bus line to which a signal is applied is a pixel line for a color different from the target color, and a horizontal line in a portion overlapping with a pixel electrode arranged on the same horizontal line as the target color pixel electrode The length in the direction parallel to L may be L2.

  As shown in FIG. 18, the same shield electrode 31 of FIG. 4 may coexist. At this time, as shown in FIG. 18, the shield electrode 31 can be configured to be shifted to the pixel electrode 21 side (the right side in the figure) on which Csd1 is formed.

  As shown in FIG. 19, a shield electrode 31 similar to the shield electrode 31b of FIG. 10 may coexist.

  As shown in FIG. 20, the same shield electrodes 31a and 31b of FIG. 5 may coexist. At this time, as shown in FIG. 20, the shield electrodes 31a and 31b can be configured to be shifted to the pixel electrode 21 side (right side in the figure) on which Csd1 is formed.

  As shown in FIG. 21, a shield electrode 31a similar to the shield electrode 31 of FIG. 9 and a shield electrode 31b similar to the shield electrode 31b of FIG. 10 may coexist. At this time, as shown in FIG. 21, the source bus line 18 can be configured not to overlap the pixel electrode 21 side (the left side in the figure) on which Csd2 is formed.

  The display device according to the present invention is arranged so as to overlap with the source bus line in a region surrounded by the gate bus line, the source bus line, and the gate bus line and the source bus line. In a display device having a pixel electrode that receives a data signal for each color from the source bus line, when attention is paid to any one of the pixel electrodes, contact is made with a source bus line that does not apply a data signal to the pixel electrode. In addition, a shield electrode that reduces the capacitance between the source bus line and the pixel electrode may be disposed at a position that does not contact the pixel electrode.

  With the above configuration, when attention is paid to any one of the pixel electrodes, the source is not in contact with a source bus line that does not apply a data signal to the pixel electrode and is not in contact with the pixel electrode. A shield electrode for reducing the capacitance between the bus line and the pixel electrode is disposed. That is, the shield electrode works in a direction to shield an electric field between the source bus line and the pixel electrode. As a result, the pixel electrode for a color different from the target color and the capacitance between the pixel electrode and the source bus line arranged on the same horizontal line as the target color pixel electrode can be reduced. it can. Here, the capacitance between the source bus line for the target color and the pixel electrode is constant regardless of the horizontal line. Therefore, the difference in the amount of pixel potential drawn by the source bus line for each horizontal line can be reduced. Therefore, it is possible to suppress a difference in the amount of pixel potential drawn by the source bus line for each horizontal line from appearing as a luminance difference (= horizontal stripe) for each horizontal line, and a uniform display can be obtained.

  In addition, the display device according to the present invention is arranged to overlap the source bus line in a region surrounded by the gate bus line, the source bus line, and the gate bus line and the source bus line. In a display device having a pixel electrode that receives a data signal for each color from the source bus line, when attention is paid to any one of the colors, the source bus applies a data signal to one pixel electrode for the target color The area where the line overlaps the pixel electrode is S1, and the source bus line for applying a data signal to the pixel electrode for the target color is a pixel electrode for a color different from the target color, and the pixel electrode for the target color When the area overlapping with the pixel electrode arranged on the same horizontal line is S2, S2 (including the case of 0) is configured to be smaller than S1. Good.

  With the above configuration, the pixel electrode for a color different from the target color and the capacitance between the pixel electrode and the source bus line arranged on the same horizontal line as the pixel electrode for the target color is reduced. be able to. Here, the capacitance between the source bus line for the target color and the pixel electrode is constant regardless of the horizontal line. Therefore, the difference in the amount of pixel potential drawn by the source bus line for each horizontal line can be reduced. Therefore, it is possible to suppress a difference in the amount of pixel potential drawn by the source bus line for each horizontal line from appearing as a luminance difference (= horizontal stripe) for each horizontal line, and a uniform display can be obtained.

  In addition, the display device according to the present invention is arranged to overlap the source bus line in a region surrounded by the gate bus line, the source bus line, and the gate bus line and the source bus line. In a display device having a pixel electrode that receives a data signal for each color from the source bus line, when attention is paid to any one of the colors, the source bus applies a data signal to one pixel electrode for the target color The length of the portion where the line overlaps the pixel electrode in the direction parallel to the horizontal line is L1, and the source bus line for applying the data signal to the pixel electrode for the target color is a pixel for a color different from the target color The length in the direction parallel to the horizontal line of the portion overlapping the pixel electrode arranged on the same horizontal line as the pixel electrode for the target color is L2 To time, L2 is - may be configured to be less than (a source bus line width distance between the two pixel electrode) / 2.

  With the above configuration, the pixel electrode for a color different from the target color and the capacitance between the pixel electrode and the source bus line arranged on the same horizontal line as the pixel electrode for the target color is reduced. be able to. Here, the capacitance between the source bus line for the target color and the pixel electrode is constant regardless of the horizontal line. Therefore, the difference in the amount of pixel potential drawn by the source bus line for each horizontal line can be reduced. Therefore, it is possible to suppress a difference in the amount of pixel potential drawn by the source bus line for each horizontal line from appearing as a luminance difference (= horizontal stripe) for each horizontal line, and a uniform display can be obtained.

  In the display device according to the present invention, in the delta arrangement, the shield electrode overlaps at least the source bus line forming Csd2 out of the source bus line forming Csd1 and the source bus line forming Csd2. You may comprise.

  In addition, the display device according to the present invention includes at least one pixel electrode and a source bus line in a cross section in a direction parallel to a horizontal line of a source bus line that is arranged around the pixel electrode and forms Csd2 in a delta arrangement. The length of the facing portion of the pixel may be smaller than (source bus line width--the distance between the pixel electrode forming Csd1 and the pixel electrode forming Csd2) / 2.

  The display device according to the present invention includes a gate bus line, a source bus line, a storage capacitor line, and a vicinity of an intersection of the gate bus line and the source bus line in a region surrounded by the gate bus line and the source bus line. In a display device having a thin film transistor disposed in the pixel, a pixel electrode connected to the transistor and a counter electrode facing the pixel electrode, the left-right balance of the layout of the source bus lines is changed, and among the parasitic capacitance between the source and drain, You may comprise so that the capacity | capacitance (Csd2) between the source bus line and drain which does not drive a self-pixel can be reduced.

  That is, by shifting the position of the source bus line to the Csd1 side, the overlapping area with the pixel electrode is reduced.

  The display device according to the present invention includes a gate bus line, a source bus line, a storage capacitor line, and a vicinity of an intersection of the gate bus line and the source bus line in a region surrounded by the gate bus line and the source bus line. In a display device having a thin film transistor disposed in a pixel electrode, a pixel electrode connected to the transistor and a counter electrode facing the pixel electrode, a shield electrode is disposed in the vicinity of the source bus line, and a capacitance between the source bus line and the drain ( The arrangement may be such that Csd) can be reduced.

  That is, the electric field is shielded by disposing another electrode in the vicinity of the source bus line.

  Furthermore, the present invention is not limited to the above-described embodiments, and various modifications are possible within the scope shown in the claims, and obtained by appropriately combining technical means disclosed in different embodiments. Such embodiments are also included in the technical scope of the present invention.

  The present invention can also be applied to applications that display various information using a liquid crystal display device.

It is a top view which shows the structural example of the display panel of the liquid crystal display device which concerns on this invention. FIG. 2 is a plan view showing a configuration example of a display panel of a liquid crystal display device according to the present invention, in which a shield electrode is formed of the same material as a gate bus line and is arranged in a floating manner. It is sectional drawing which shows the structural example of the display panel of the liquid crystal display device which concerns on this invention. FIG. 2 is a cross-sectional view illustrating a configuration example of a display panel of a liquid crystal display device according to the present invention, in which a shield electrode is formed of the same material as a gate bus line. FIG. 2 is a cross-sectional view illustrating a configuration example of a display panel of a liquid crystal display device according to the present invention, in which a shield electrode is formed of the same material as a gate bus line. FIG. 1 is a plan view showing a configuration example of a display panel of a liquid crystal display device according to the present invention, in which a shield electrode is formed of the same material as a gate bus line and is connected to an arbitrary electrode other than a source bus line. is there. FIG. 2 is a plan view showing a configuration example of a display panel of a liquid crystal display device according to the present invention, in which a shield electrode is formed of the same material as a gate bus line and is connected to an auxiliary capacitance wiring. FIG. 3 is a plan view showing a configuration example of a display panel of a liquid crystal display device according to the present invention, in which a shield electrode is formed of the same material as that of a source bus line and is arranged in a floating manner. FIG. 2 is a cross-sectional view illustrating a configuration example of a display panel of a liquid crystal display device according to the present invention, in which a shield electrode is formed of the same material as a source bus line. 1 shows an example of a configuration of a display panel of a liquid crystal display device according to the present invention, in which one shield electrode is formed of the same material as a source bus line, and another shield electrode is formed of the same material as a gate bus line. It is sectional drawing which shows a structure. FIG. 2 is a plan view illustrating a configuration example of a display panel of a liquid crystal display device according to the present invention, in which a shield electrode is formed of the same material as a source bus line and is connected to an arbitrary electrode other than the source bus line. is there. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a plan view illustrating a configuration example of a display panel of a liquid crystal display device according to the present invention, in which a shield electrode is formed of an arbitrary material and is arranged in a floating manner. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a cross-sectional view illustrating a configuration example of a display panel of a liquid crystal display device according to the present invention, in which a shield electrode is formed of an arbitrary material. FIG. 2 is a plan view illustrating a configuration example of a display panel of a liquid crystal display device according to the present invention, in which a shield electrode is formed of an arbitrary material and connected to an arbitrary electrode other than a source bus line. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a cross-sectional view illustrating a configuration example of a display panel of a liquid crystal display device according to the present invention, in which a shield electrode is formed of an arbitrary material. FIG. 2 is a plan view illustrating a configuration example of a display panel of a liquid crystal display device according to the present invention, in which a source bus line is arranged so as to be shifted from a center between pixel electrodes. FIG. 2 is a cross-sectional view illustrating a configuration example of a display panel of a liquid crystal display device according to the present invention, in which a source bus line is arranged so as to be shifted from the center between pixel electrodes. FIG. 2 is a cross-sectional view illustrating a configuration example of a display panel of a liquid crystal display device according to the present invention, in which a source bus line is arranged so as to be shifted from the center between pixel electrodes. FIG. 2 is a cross-sectional view illustrating a configuration example of a display panel of a liquid crystal display device according to the present invention, in which a source bus line is arranged so as to be shifted from the center between pixel electrodes. FIG. 2 is a cross-sectional view illustrating a configuration example of a display panel of a liquid crystal display device according to the present invention, in which a source bus line is arranged so as to be shifted from the center between pixel electrodes. FIG. 2 is a cross-sectional view illustrating a configuration example of a display panel of a liquid crystal display device according to the present invention, in which a source bus line is arranged so as to be shifted from the center between pixel electrodes. It is a top view which shows the structural example of the display panel of the conventional liquid crystal display device. It is sectional drawing which shows the structural example of the display panel of the conventional liquid crystal display device. It is a schematic diagram which shows a mode that the source-drain parasitic capacitance is produced | generated.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 Display pixel part 11 Glass substrate 12 Base coat 13 Si semiconductor layer 13a Region 13b Region 13c Region 13d Region 14 Gate insulating film 15 Gate bus line 15a Gate electrode 15b Gate electrode 16 Auxiliary capacity wiring 17 Interlayer insulating film 18 Source bus line 18a Contact hole 18b Convex region 18c Concave region 19 Drain electrode 19a Contact hole 20 Resin layer (insulating film)
21 Pixel electrode 21a Contact hole 22 Insulating film 25 Reflective electrode 31 Shield electrode 31h Contact hole

Claims (16)

A plurality of source bus lines having meandering concave regions, an insulating film covering the plurality of source bus lines, and a plurality of pixel electrodes formed on the insulating film and at least partially disposed in the concave regions. In the display device,
When attention is paid to one of the plurality of pixel electrodes,
A shield electrode that reduces the capacitance between the source bus line and the pixel electrode at a position that does not contact the source bus line that does not apply a data signal to the one pixel electrode and that does not contact the one pixel electrode. A display device, wherein:   The display device according to claim 1, wherein the shield electrode is formed on a side of the source bus line opposite to a surface facing the pixel electrode.   The display device according to claim 1, wherein the shield electrode is formed in the same layer as the gate bus line.   The display device according to claim 1, wherein the shield electrode is formed of a semiconductor.   The display device according to claim 1, wherein the shield electrode is formed in the same layer as the source bus line.   The display device according to claim 1, wherein the shield electrode is formed between the source bus line and the pixel electrode.   The display device according to claim 1, wherein the shield electrode is formed on a surface of the pixel electrode opposite to a surface facing the source bus line.   The display device according to claim 1, wherein an entire surface of the shield electrode is surrounded by an insulator.   The display device according to claim 1, wherein the shield electrode is connected to a wiring other than the source bus line.   The display device according to claim 9, wherein the shield electrode is connected to the gate bus line.   The display device according to claim 9, wherein the shield electrode is connected to an auxiliary capacitance wiring.   9. The display device according to claim 8, wherein the shield electrode is in the same layer as the source bus line, and there is an auxiliary capacitance wiring below the shield electrode. A display including a plurality of source bus lines having meandering concave regions, an insulating film covering the plurality of source bus lines, and a plurality of pixel electrodes formed on the insulating films and at least partially disposed in the concave regions In the device
When attention is paid to one of the plurality of pixel electrodes,
A capacitor formed between the one pixel electrode and a first source bus line for applying a data signal to the one pixel electrode is Csd1,
The one pixel electrode and a second source disposed on the opposite side of the one pixel electrode to the first source bus line arrangement side, which is a source bus line adjacent to the first source bus line. When the capacitance formed between the bus lines is Csd2,
A display device, wherein Csd2 is smaller than Csd1. A plurality of source bus lines having meandering concave regions, an insulating film covering the plurality of source bus lines, and a plurality of pixel electrodes formed on the insulating film and at least partially disposed in the concave regions. In the display device,
When attention is paid to one of the plurality of pixel electrodes,
A source bus line adjacent to the first source bus line for applying a data signal to the one pixel electrode, and disposed on the side opposite to the first source bus line arrangement side of the one pixel electrode. When the length of the second source bus line in the direction parallel to the horizontal line of the portion where the second source bus line overlaps with the one pixel electrode is L2,
L2 is smaller than (source bus line width−distance between the two pixel electrodes) / 2.   15. The display device according to claim 1, wherein each of the plurality of source bus lines is dedicated to one color pixel.   The display device according to claim 1, wherein the source bus line supplies a data signal to a pixel electrode facing the convex region.

Images