JP2005064087A - Wiring board and electronic component using it - Google Patents
Wiring board and electronic component using it Download PDFInfo
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- JP2005064087A JP2005064087A JP2003289552A JP2003289552A JP2005064087A JP 2005064087 A JP2005064087 A JP 2005064087A JP 2003289552 A JP2003289552 A JP 2003289552A JP 2003289552 A JP2003289552 A JP 2003289552A JP 2005064087 A JP2005064087 A JP 2005064087A
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- 239000004020 conductor Substances 0.000 claims abstract description 39
- 229920005989 resin Polymers 0.000 claims abstract description 36
- 239000011347 resin Substances 0.000 claims abstract description 36
- 230000000149 penetrating effect Effects 0.000 claims abstract description 18
- 239000011248 coating agent Substances 0.000 claims abstract description 16
- 238000000576 coating method Methods 0.000 claims abstract description 16
- 238000007747 plating Methods 0.000 claims description 46
- 238000000034 method Methods 0.000 abstract description 25
- 238000007789 sealing Methods 0.000 abstract description 17
- 230000000903 blocking effect Effects 0.000 abstract description 5
- 238000001721 transfer moulding Methods 0.000 abstract description 3
- 239000000463 material Substances 0.000 description 22
- 239000000758 substrate Substances 0.000 description 15
- 230000000873 masking effect Effects 0.000 description 9
- 238000005476 soldering Methods 0.000 description 9
- 229910000679 solder Inorganic materials 0.000 description 8
- 239000002184 metal Substances 0.000 description 5
- 229910052751 metal Inorganic materials 0.000 description 5
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 4
- 238000005530 etching Methods 0.000 description 4
- 238000007650 screen-printing Methods 0.000 description 4
- 239000004065 semiconductor Substances 0.000 description 4
- 239000000853 adhesive Substances 0.000 description 3
- 230000001070 adhesive effect Effects 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 239000004593 Epoxy Substances 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 239000011889 copper foil Substances 0.000 description 2
- 238000005553 drilling Methods 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 229910018100 Ni-Sn Inorganic materials 0.000 description 1
- 229910018532 Ni—Sn Inorganic materials 0.000 description 1
- ISWSIDIOOBJBQZ-UHFFFAOYSA-N Phenol Chemical compound OC1=CC=CC=C1 ISWSIDIOOBJBQZ-UHFFFAOYSA-N 0.000 description 1
- 239000002390 adhesive tape Substances 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000007772 electroless plating Methods 0.000 description 1
- 238000009713 electroplating Methods 0.000 description 1
- 230000004907 flux Effects 0.000 description 1
- 238000013007 heat curing Methods 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 230000035515 penetration Effects 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 239000009719 polyimide resin Substances 0.000 description 1
- 239000003566 sealing material Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 229920003002 synthetic resin Polymers 0.000 description 1
- 239000000057 synthetic resin Substances 0.000 description 1
- 229920001187 thermosetting polymer Polymers 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
Landscapes
- Non-Metallic Protective Coatings For Printed Circuits (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
- Structure Of Printed Boards (AREA)
Abstract
Description
本発明は、電子部品または電子部品素子を搭載するための配線基板および配線基板を使用した端面電極を有するチップ型の電子部品に関する。 The present invention relates to a wiring substrate for mounting an electronic component or an electronic component element, and a chip-type electronic component having an end face electrode using the wiring substrate.
一般的には配線基板を貫通する貫通導通穴(スルーホール穴)を有する配線基板の場合には、配線基板に実装搭載した電子部品素子、電子部品などを保護するための被覆材料(モールド樹脂など)が配線基板の貫通導通穴を通じて配線基板の反対面側に流出し樹脂の漏れだし不良が発生する。
また、電子部品をマザ−ボ−ドに実装搭載する際のフラックス、半田、半田ペーストなどが電子部品内へ侵入したり、配線基板と実装搭載した電子部品素子、または電子部品との密着不良が発生する。
従って、樹脂漏れを防止するため配線基板の貫通導通穴内部に充填材料を充填した貫通導通穴は穴内部の全体に絶縁性の充填材料を充填するため、穴の内壁にある導体層が被覆され半田付が困難となり他の配線基板と接続するための端面電極とすることができない。
In general, in the case of a wiring board having a through-conduction hole (through-hole hole) penetrating the wiring board, a coating material (mold resin, etc.) for protecting electronic component elements and electronic components mounted and mounted on the wiring board ) Flows out to the opposite surface side of the wiring board through the through-conduction hole of the wiring board and the resin leaks and a defect occurs.
Also, flux, solder, solder paste, etc. when mounting and mounting electronic components on the motherboard may enter the electronic component, or there may be poor adhesion between the wiring board and the mounted or mounted electronic component element or electronic component. Occur.
Therefore, in order to prevent resin leakage, the through-conduction hole in which the filling material is filled in the through-conduction hole of the wiring board is filled with the insulating filling material in the entire inside of the hole, so that the conductor layer on the inner wall of the hole is covered. Soldering becomes difficult, and it cannot be used as an end face electrode for connecting to another wiring board.
ICフラットパッケージ、半導体回路素子、発光素子、受光素子などをマザ−ボ−ド等の他の配線基板と接続するための端面電極を有するチップ型の電子部品において、従来ではチップ部品を製造する過程で電子部品素子をワイヤ・ボンディング実装や表面面付実装した後、電子部品等を保護するためモールド樹脂などの被覆材で電子部品やボンディング・ワイヤを樹脂モールドしている。
この工程で、配線基板のスルーホール穴などの貫通導通穴を通じてモールド樹脂が電子部品の搭載面と反対側にある接続ランドや、半田付けの必要となるスルーホール穴内、または配線基板の外部へ接続するための端面電極などにモールド樹脂が付着して、半田接続不良が発生する。
従って、モールド樹脂などで被覆する工程の前に、配線基板のスルーホール穴などの貫通穴に耐熱性粘着テープやフィルム膜でマスキングする工程が必要となっている。
In a chip-type electronic component having an end face electrode for connecting an IC flat package, a semiconductor circuit element, a light emitting element, a light receiving element and the like to another wiring board such as a mother board, a process of manufacturing the chip part conventionally After the electronic component element is mounted by wire bonding or surface mounting, the electronic component or bonding wire is resin-molded with a coating material such as a mold resin in order to protect the electronic component or the like.
In this process, the mold resin is connected to the connection land on the side opposite to the mounting surface of the electronic component, the through hole hole that requires soldering, or the outside of the wiring board through the through hole such as the through hole hole of the wiring board. As a result, the mold resin adheres to the end face electrodes and the like, resulting in poor solder connection.
Therefore, before the step of covering with a mold resin or the like, a step of masking a through hole such as a through hole of the wiring board with a heat resistant adhesive tape or a film film is required.
特に、半導体回路素子、発光素子、受光素子などの電子部品用素子からなる電子部品を表面面付実装用のチップ型電子部品とするには、相手方の配線基板と接続するための電極が必要であり、この電極としてチップ型電子部品の端面に端面電極を設定することが多い。
前記の端面電極は、スルーホール穴を穴の中央付近で半分に切断する、いわゆる半導体素子を超精密に切断する方法であるダイシングカットで加工して端面電極を形成し、チップ部品のはんだ付け代にしている。
前記、端面電極とするためのスルーホール穴は、電子部品素子やボンディング・ワイヤをモールド樹脂で被覆した後、ダイシングカットし、スルーホール穴の壁面を半田付け代とするため、スルーホール穴内にモールド樹脂の漏れだしは防止しなければならない。
さらに、マザ−ボ−ド等の他の配線基板に半田付けする際、半田がマスキング材の下にしみ込み、電子部品素子などを搭載する配線基板と実装搭載した電子部品素子、または電子部品との密着不良が発生する。
In particular, in order to make an electronic component composed of an electronic component element such as a semiconductor circuit element, a light emitting element, and a light receiving element into a chip-type electronic component for mounting with a surface, an electrode for connecting to a counterpart wiring board is required. In many cases, an end face electrode is set on the end face of the chip-type electronic component as the electrode.
The end face electrode is formed by cutting the through-hole hole in half near the center of the hole, that is, a so-called semiconductor device that is cut by a dicing cut to form an end face electrode, and soldering charges for chip components. I have to.
The through-hole hole for the end face electrode is formed in the through-hole hole so that the electronic component element and the bonding wire are coated with a mold resin, then diced and cut, and the wall surface of the through-hole hole is used as a soldering allowance. Resin leakage must be prevented.
Furthermore, when soldering to another wiring board such as a motherboard, the solder penetrates under the masking material, and the wiring board on which the electronic component element is mounted and the mounted electronic component element or electronic component Inadequate adhesion occurs.
電子部品を搭載する配線基板の製造方法は、絶縁性基材、または両面銅張り積層板に穴あけをする工程、前記の基材や積層板の表面と、貫通孔の内壁に銅めっき層を形成する工程、次にシルクスクリーン印刷法や写真法でエッチングレジストを施してからエッチングして導体回路を形成する工程、その次に所定のスルーホール穴の片方の穴端面をフィルム膜で塞ぐマスキング工程、その次に露出している表面導体および非貫通導通穴にNi−AuめっきやNi−Agめっき等の表面めっきをする工程で配線基板を製造する。
ただし、AuめっきやAgめっきはシアン濃度が高く、めっき液温が高いため、特にAgめっきに耐えるフィルムレジストは無いため、Ni−Agめっきの後にフィルム膜で塞ぐマスキング工程としている。
その後、配線基板に電子部品を実装し搭載する工程、電子部品素子やボンディング・ワイヤを樹脂封止し硬化する工程、所定の非貫通導通穴の中央付近をダイシングカットする工程とで表面面付実装用のチップ型電子部品としている。
However, since Au plating and Ag plating have high cyan concentration and high plating solution temperature, there is no film resist that can particularly withstand Ag plating. Therefore, a masking process is performed in which a film film is closed after Ni-Ag plating.
Then, mounting with electronic components on the wiring board, mounting with electronic components, bonding and hardening the electronic component elements and bonding wires, and dicing cut near the center of the specified non-through hole Chip-type electronic parts for use.
AuめっきやAgめっき、特にAgめっきに耐える配線基板の両面の外層導体を貫通する貫貫通導通穴の片方の端面上をマスキングする絶縁性閉塞体を形成するものである。
また、配線基板に電子部品または電子部品素子を実装し、前記の電子部品素子などを実装した面を樹脂封止する際、樹脂封止における高圧のモールド樹脂の封止圧力と高温度に耐える配線基板の両面の外層導体を貫通する貫貫通導通穴の片方の端面上を塞ぐ絶縁性閉塞体を形成するものである。
It forms an insulating blocking body that masks one end face of a through-penetrating conduction hole that penetrates outer layer conductors on both sides of a wiring board that can withstand Au plating, Ag plating, and particularly Ag plating.
Also, when mounting electronic components or electronic component elements on a wiring board and sealing the surface on which the electronic component elements are mounted with resin, wiring that withstands the sealing pressure and high temperature of the high-pressure mold resin in resin sealing An insulating blocking body is formed that closes one end face of the through-penetrating conduction hole that penetrates the outer layer conductors on both sides of the substrate.
Ni−AuめっきやNi−Agめっき等の表面めっき層を形成する際、所定の貫通導通穴の片方の端面上をフィルム膜などで塞ぐマスキング工程の後に露出している表面導体および非貫通導通穴にNi−AuめっきやNi−Agめっきをする。前記めっき処理によって配線基板の非貫通導通穴の片方の穴端面上を塞いだフィルム膜などのマスキング材と配線基板との密着力が低下し、フィルム膜が剥がれたり浸みだしてモールド樹脂で実装した面を封止するモールド樹脂がフィルム膜が剥がれたりめっき液が浸みだして非貫通導通穴内にモールド樹脂が流出し樹脂の漏れだし不良が発生する。 Surface conductors and non-penetrating conducting holes exposed after a masking step of closing one end face of a predetermined penetrating conducting hole with a film film or the like when forming a surface plating layer such as Ni-Au plating or Ni-Ag plating Ni-Au plating or Ni-Ag plating is applied to the substrate. The adhesive strength between the wiring board and the masking material, such as a film film, that blocked the end surface of one of the non-through-conduction holes of the wiring board by the plating process decreased, and the film film was peeled off or soaked and mounted with mold resin. The mold resin that seals the surface peels off the film film or the plating solution begins to leak, and the mold resin flows into the non-penetrating conductive holes, causing a resin leak and failure.
また、チップ型電子部品はマザ−ボ−ド等の他の配線基板と接続する端面電極が必要であり、この端面電極とする面は半田付性のよい導体層で形成され、配線基板やチップ型電子部品の端面に露呈していることが条件となる。
つまり、所定の貫通導通穴の片方の端面上をマスキング材などの絶縁性閉塞体で塞ぐ非貫通導通穴において、絶縁膜状体はトランスファモ−ルド法の樹脂封止における高圧のモールド樹脂の封止圧力と高温度に耐えることと、穴端面に接する面の絶縁性閉塞体は穴内部に陥没しないことが端面電極とするためには重要である。従って、フィルム膜状体が非貫通導通穴の穴端面と平坦面で接するから良好である。
Further, the chip-type electronic component requires an end face electrode to be connected to another wiring board such as a mother board, and the surface to be used as the end face electrode is formed of a conductive layer having good solderability. It is a condition that it is exposed on the end face of the mold electronic component.
In other words, in a non-penetrating conduction hole in which one end face of a predetermined penetrating conduction hole is covered with an insulating plug such as a masking material, the insulating film-like body is sealed with a high-pressure mold resin in the transfer molding method resin sealing. In order to make the end face electrode, it is important to endure the stop pressure and the high temperature, and that the insulating blocker in contact with the end face of the hole does not sink into the hole. Therefore, the film film-like body is good because it is in contact with the hole end surface of the non-penetrating conduction hole at the flat surface.
上記課題を解決するため本発明の請求項1においては、電子部品、または電子部品素子を搭載する配線基板において、配線基板の両面の外層導体を貫通し、かつ導通している貫通導通穴上の片方の穴端面上を塞ぐフィルム膜状体と、このフィルム膜状体の上面を被覆する絶縁性塗布物の2層からなる絶縁性閉塞体で塞いだ非貫通導通穴を形成する配線基板である。
尚、本発明の配線基板は、片面基板や多層配線基板でもよく、前記の非貫通導通穴は部品搭載や電子部品を被覆する下部、および端面電極とする所定の箇所に設置することができる。
In order to solve the above-described problem, in the first aspect of the present invention, in the wiring board on which the electronic component or the electronic component element is mounted, the outer layer conductors on both sides of the wiring board are passed through and on the through conduction hole. It is a wiring board that forms a non-through-conductive hole that is closed with an insulating closing body composed of two layers of a film film-like body that covers one hole end surface and an insulating coating that covers the upper surface of the film film-like body. .
Note that the wiring board of the present invention may be a single-sided board or a multilayer wiring board, and the non-penetrating conduction holes can be installed at a predetermined place as a part mounting or a lower part covering an electronic part and an end face electrode.
また、本発明の請求項2においては、前記の請求項1の貫通導通穴の片方の穴端面上をフィルム膜状体と、このフィルム膜状体の上面を被覆する絶縁性塗布物の2層の絶縁性閉塞体で塞いで非貫通導通穴を形成した後、表面めっき層を形成する配線基板である。
前記の配線基板に電子部品または電子部品素子を実装し、前記の電子部品を実装した面をモールド樹脂で封止し硬化した後、前記の非貫通導通穴のほぼ中央部を分割切断して端面電極を形成する。
Moreover, in
An electronic component or an electronic component element is mounted on the wiring board, and the surface on which the electronic component is mounted is sealed with a mold resin and cured, and then the substantially end portion of the non-penetrating conduction hole is divided and cut. An electrode is formed.
さらに、本発明の請求項3においては、前記請求項1、請求項2の配線基板を使用し、この配線基板に電子部品または電子部品素子を実装し、前記の電子部品素子などを実装した面をモールド樹脂で封止した後、前記の非貫通導通穴のほぼ中央部を分割切断してなる端面電極を有する電子部品とするものである。
Further, in
(1)AuめっきやAgめっき処理をした非貫通導通穴を有する配線基板でもモールド樹脂などの封止工程で接着剤、封止材料などが配線基板の非貫通導通穴内へ流出することがなくなった。 (1) Even in a wiring board having a non-through-conduction hole subjected to Au plating or Ag plating, an adhesive, a sealing material, or the like does not flow out into the non-through-conduction hole of the wiring board in a sealing process such as a mold resin. .
(2)樹脂封止における高圧のモールド樹脂の封止圧力と高温度に耐える貫通導通穴上の片方の穴端面上を塞ぐ2層からなる絶縁性閉塞体で塞いだ非貫通導通穴を形成することにより配線基板の非貫通導通穴内へ流出することがなくなり半田接続不良が発生しなくなった。 (2) Forming a non-through-conduction hole closed with a two-layer insulating blocker covering one hole end surface on the through-conduction hole that can withstand the sealing pressure and high temperature of the high-pressure mold resin in resin sealing As a result, it does not flow into the non-through-conduction hole of the wiring board and solder connection failure does not occur.
(3)前記の配線基板を使用し、この配線基板に電子部品または電子部品素子を実装し、実装面をモールド樹脂で封止した後、前記の非貫通導通穴のほぼ中央部を分割切断してなる電子部品の端面電極をマザ−ボ−ド等の他の配線基板に半田付けする際、半田が絶縁性閉塞体の下にしみ込み、電子部品素子などを搭載する配線基板と実装搭載した電子部品素子、または電子部品との密着不良が発生することがなくなった。 (3) Using the above-mentioned wiring board, mounting an electronic component or electronic component element on this wiring board, sealing the mounting surface with a mold resin, and then dividing and cutting the substantially central portion of the non-through-conduction hole. When soldering the end face electrode of the electronic component to another wiring board such as a motherboard, the solder soaks under the insulating closure and is mounted on the wiring board on which the electronic component element is mounted. An adhesion failure with an electronic component element or electronic component no longer occurs.
配線基板となる絶縁性基材はガラスエポキシ基材、フェノール基材、合成樹脂基材、ポリイミド樹脂基材、BTレジン(ビスマレィミドートリアジン樹脂)基材、変性BTレジン基材またはセラミック等の絶縁性基材のいずれでもよい。
本発明を実施するため電子部品を搭載する配線基板の製造方法は、絶縁性基材、または両面銅張り積層板に穴あけをする工程、前記の基材や積層板の表面と、貫通孔の内壁に銅めっき層を形成する工程、次にシルクスクリーン印刷法や写真法でエッチングレジストを施してからエッチングして導体回路を形成する工程、ワイヤ・ボンディング性または良好な半田付性を有する異質の金属めっき層となるNi−AuめっきやNi−Agめっき等の表面めっき層を形成する工程、その次に所定の貫通導通穴の片方の穴端面上をフィルム膜で塞ぐマスキング工程、あるいわマスキング工程後に露出している表面導体および非貫通導通穴にNi−AuめっきやNi−Agめっき等の表面めっきをする工程などで配線基板を製造する。
The insulating base material used as the wiring board is an insulating material such as a glass epoxy base material, a phenol base material, a synthetic resin base material, a polyimide resin base material, a BT resin (bismaleimide-triazine resin) base material, a modified BT resin base material, or a ceramic. Any of the conductive substrates may be used.
In order to implement the present invention, a method of manufacturing a wiring board on which electronic components are mounted includes a step of drilling an insulating base material or a double-sided copper-clad laminate, the surface of the base material or the laminate, and the inner wall of the through hole. The process of forming a copper plating layer on the substrate, the process of forming a conductor circuit by applying an etching resist after silk screen printing or photographic method, and a foreign metal with wire bonding or good solderability After the step of forming a surface plating layer such as Ni-Au plating or Ni-Ag plating as a plating layer, and then the masking step of closing one end surface of a predetermined through-conduction hole with a film film, after the masking step A wiring board is manufactured by a process of performing surface plating such as Ni—Au plating or Ni—Ag plating on the exposed surface conductor and non-through hole.
その後、配線基板に電子部品を実装し搭載する工程、電子部品素子やボンディング・ワイヤを樹脂封止し硬化する工程、所定の非貫通導通穴の中央付近をダイシングカットする分割切断工程とで表面面付実装用のチップ型電子部品としている。 After that, the process of mounting and mounting the electronic component on the wiring board, the step of resin-sealing the electronic component element and the bonding wire, and the step of dicing cutting the vicinity of the center of the predetermined non-penetrating conduction hole It is a chip-type electronic component for mounting.
絶縁性基材としてガラス・エポキシ基材で18μmまたは35μmの銅箔で全体の厚さが0.2mmの基板材料を用い、ドリルまたはレ−ザ−光で所望の箇所に所定の貫通穴を穴あけする。
次に、銅張り積層板の両方の表面と貫通穴の内壁に無電解めっき、電解めっきにより導体層の厚みを10μm〜25μm形成する。
その次に、シルクスクリーン印刷法やフォト工法によって、所定の箇所に所望するパタ−ン形状のエッチングレジストを形成して不要な金属導体をエッチングして銅箔を溶解除去する。
その後エッチングレジスト膜を剥離除去して、所望する上部外層表面導体、下部外層表面導体、および絶縁性基材の両面の外層表面導体を電気的に導通させる貫通穴内部の導体層からなる貫通導通穴を形成する。
Use a glass / epoxy base material as the insulating base material and a substrate material with an overall thickness of 0.2 mm made of 18 μm or 35 μm copper foil, and drill a predetermined through-hole at a desired location with a drill or laser light. To do.
Next, 10 μm to 25 μm in thickness of the conductor layer is formed by electroless plating and electrolytic plating on both surfaces of the copper-clad laminate and the inner wall of the through hole.
Next, a desired pattern-shaped etching resist is formed at a predetermined location by a silk screen printing method or a photo method, and unnecessary metal conductors are etched to dissolve and remove the copper foil.
After that, the etching resist film is peeled and removed, and a through conduction hole comprising a conductor layer inside the through hole for electrically connecting the desired upper outer layer surface conductor, lower outer layer surface conductor, and outer layer surface conductors on both sides of the insulating base. Form.
つまり図4に示すように所望する絶縁性基材1の両面の外層表面導体である上部外層表面導体2、下部外層表面導体4、および絶縁性基材1の両面の外層表面導体を電気的に導通させる貫通穴の穴内部の導体層5からなる貫通導通穴3を形成する。
その次に所定の貫通導通穴の片方の穴端面上をフィルム膜状体と、このフィルム膜状体の上面を被覆する絶縁性塗布物の2層の絶縁性閉塞体で塞いで非貫通導通穴を形成した後、表面めっき層を形成する配線基板である。
In other words, as shown in FIG. 4, the upper
Next, a non-through-conduction hole is formed by closing one end of a predetermined through-conduction hole with a film film-like body and a two-layer insulating covering body covering the upper surface of the film film-like body. After forming, a wiring board on which a surface plating layer is formed.
図1に示す本発明の実施例1の配線基板について説明する。
まず、図4の通常の貫通導通穴3において、絶縁性基材1の両面の外層表面導体である上部外層表面導体2、下部外層表面導体4、および絶縁性基材1の両面の外層表面導体を電気的に導通させる貫通穴の穴内部の導体層5からなる貫通導通穴3を形成する。
次にワイヤ・ボンディング性または良好な半田付性を有する異質の金属めっき層となるNi−Agめっきの表面めっき層6を上部外層表面導体2、下部外層表面導体4、および貫通穴の穴内部の導体層5の上部に形成する。
その後、図1に示すように、所定の貫通導通穴3の片方の穴端面をこの貫通導通穴3の穴端面に接するフィルム膜11と、該フィルム膜11の上面を耐めっき性の良い絶縁膜状体で被覆する絶縁性塗布物12の2層の構成からなる絶縁性閉塞体15で塞いだ非貫通導通穴7を形成する配線基板である。
A wiring board according to
First, in the normal through-
Next, a
Thereafter, as shown in FIG. 1, a
つまりチップ部品を実装搭載する上部外層表面導体2と、貫通導通穴3の片方の穴端上面を塞ぐように穴端面に接するフィルム膜11を光硬化性の感光性フィルムSR−2300G(日立化成工業株式会社製、商品名)、PFR800AUS402(太陽インキ株式会社製、商品名)、DM5030(ニチゴ−モ−トン社製、商品名)などを真空ラミネーターで使用してラミネートし、露光し、現像、乾燥、後露光および100℃〜150℃で40分〜90分間加熱硬化して25μm〜75μmの厚さの耐熱性の良好な薄い絶縁性フィルム膜11と、このフィルム膜11の上面を被覆する耐めっき性の強い10μm〜40μmの厚さの絶縁性塗布物12とを形成することにより貫通導通穴3の片方の穴端面を2層の絶縁性閉塞体15で塞ぐ非貫通導通穴7を形成するものである。
That is, the upper outer
絶縁性塗布物12は柔軟な塗布膜として耐めっき性の強い被膜、および高圧のモールド樹脂の封止圧力と高温度に耐える被膜であることが必要となる。つまり、絶縁性塗布物12は液状レジスト、スクリ−ン印刷によるレジストインク、UVインク、熱硬化性インクでも良い。
The
次に、本発明の実施例2の配線基板について説明する。
図2に示すように、貫通導通穴3の穴端面に接するフィルム膜11と、該フィルム膜11の上面を耐めっき性の良い絶縁膜状体で被覆する絶縁性塗布物12の2層の構成からなる絶縁性閉塞体15で塞いだ非貫通導通穴7を形成した後に、電子部品素子や電子部品を配線基板にワイヤ・ボンディングする場合や半田付性の高品質などで必要な場合には、外層表面導体(上部外層表面導体2、下部外層表面導体4)および非貫通導通穴7の穴内部の導体層5の上面にNi−Auめっき、Ni−Agめっき、またはNi−Snめっき、あるいは半田めっきなどの通常の金属導体層とは異質の金属からなる表面めっき層6を形成するものである。
Next, a wiring board according to a second embodiment of the present invention will be described.
As shown in FIG. 2, a two-layer configuration of a
図3に基づいて、本発明による実施例3のチップ型電子部品を説明する。
前記の工程でできた配線基板に、電子部品素子40や電子部品を接着剤や半田ペ−ストで配線基板10の所定箇所に搭載固定し、電子部品素子40や電子部品と配線基板10の接続ランドをボンディング・ワイヤ41でワイヤ・ボンディングをして電気的に接続する。次に封止樹脂35で電子部品素子40の搭載面全体を樹脂封止する。なお、実装搭載電子部品素子40が面付部品の形状であるならばリフロー半田による面付実装をして配線基板10の接続ランドに電気的に接続することもできる。
また、電子部品素子40や電子部品を実装搭載する作業は個別に分割した配線基板10に実装搭載することは作業効率が悪るくなり、次の樹脂封止する工程で封止樹脂が流出しやすくなるため、配線基板の両面の外層導体を貫通し、かつ導通している貫通導通穴の片方の穴端面を該穴端面に接するフィルム膜と、該フィルム膜の上面を被覆する絶縁性塗布物の2層の絶縁性閉塞体15で塞いだ非貫通導通穴のほぼ中央部を分割切断して端面電極を形成するための配線基板である。図2の工程で形成される非貫通導通穴7で個別の配線基板10をマトリックス状に多数列、多数段に接続した集合配線基板として部品実装を施こすことが多い。
A chip-type electronic component according to a third embodiment of the present invention will be described with reference to FIG.
The
In addition, the work of mounting and mounting the
この後で、図3に示すような端面電極用の片方の穴端面を2層の絶縁性閉塞体15で閉塞した非貫通穴5のほぼ中央部を超精密に切断する方法であるダイシングカットで切断加工して端面電極として形成する。
片方の穴端面が貫通導通穴の穴端面に接するフィルム膜11と、該フィルム膜11の上面を耐めっき性の良い絶縁膜状体で被覆する絶縁性塗布物12の2層の構成からなる絶縁性閉塞体15で塞がれ閉口している半円筒形状やU字溝、長穴形溝などの導通溝を端面電極として形成して半田付け代にしている。
前記の切断する方法はダイシングカットに限定されるものではなくレーザー光切断でもよい。
Thereafter, as shown in FIG. 3, a dicing cut that is a method of ultra-precisely cutting a substantially central portion of the
Insulation composed of two layers: a
The method for cutting is not limited to dicing cut, but may be laser beam cutting.
本発明は、電子部品または電子部品素子を搭載するための配線基板および配線基板を使用した端面電極を有するチップ型の電子部品に関するものであるが特に、半導体回路素子、受発光素子などの電子部品用素子を表面面付するチップ型電子部品に端面電極を設定するものに利用できる。 The present invention relates to an electronic component or a wiring board for mounting an electronic component element, and a chip-type electronic component having an end face electrode using the wiring board. In particular, the electronic component such as a semiconductor circuit element and a light receiving / emitting element is provided. The present invention can be used to set an end face electrode on a chip-type electronic component having a surface for attaching a device element.
1…絶縁性基材、2…上部外層表面導体、3…貫通導通穴、4…下部外層表面導体、5…穴内部の導体層、6…表面めっき層、7…非貫通導通穴、
10…配線基板、11…フィルム膜、12…絶縁性塗布物、15…絶縁性閉塞体、30…チップ型部品、35…封止樹脂、40…電子部品素子、41…ボンディング・ワイヤ
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Cited By (4)
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JP2007134697A (en) * | 2005-10-14 | 2007-05-31 | Honeywell Internatl Inc | Method of fabricating vertically mountable ic package |
JP2007227462A (en) * | 2006-02-21 | 2007-09-06 | Sanyo Electric Co Ltd | Circuit board and semiconductor device |
JP2008166634A (en) * | 2006-12-29 | 2008-07-17 | Nippon Micron Kk | Package for electronic component |
JP2009188154A (en) * | 2008-02-06 | 2009-08-20 | Meiko:Kk | Printed circuit board and its production process |
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Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
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JP2007134697A (en) * | 2005-10-14 | 2007-05-31 | Honeywell Internatl Inc | Method of fabricating vertically mountable ic package |
JP2013065869A (en) * | 2005-10-14 | 2013-04-11 | Honeywell Internatl Inc | Method of fabricating vertically mountable ic package |
JP2007227462A (en) * | 2006-02-21 | 2007-09-06 | Sanyo Electric Co Ltd | Circuit board and semiconductor device |
JP2008166634A (en) * | 2006-12-29 | 2008-07-17 | Nippon Micron Kk | Package for electronic component |
JP2009188154A (en) * | 2008-02-06 | 2009-08-20 | Meiko:Kk | Printed circuit board and its production process |
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