JP2005051007A - Manufacturing method of semiconductor chip - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To dice a substrate safely without adhering foreign matters to a semiconductor device or reducing the number of semiconductor devices on the substrate when dicing the substrate into chips. <P>SOLUTION: When dicing a silicon substrate 1 wherein a plurality of semiconductor devices 2 are formed into chips 5, grooves 4 are formed at first on the silicon substrate 1 through dry etching. Thereafter, the silicon substrate 1 is cut along the grooves 4 whereby the silicon substrate 1 is diced into semiconductor devices 2. The silicon substrate can be optimally diced without employing a dicing saw as in a conventional case. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a method for manufacturing a semiconductor chip, and to a method for dividing a substrate on which a plurality of semiconductor devices are formed.

  A semiconductor device is divided by cutting a plurality of semiconductor devices formed on a substrate for each chip after forming various semiconductor devices on a semiconductor substrate such as a semiconductor wafer (hereinafter referred to as “wafer”), for example. The semiconductor chip is packaged by connecting a lead frame, TAB, or the like.

  Conventionally, dicing technology has been widely used as a chip forming method for dividing a plurality of semiconductor devices formed on a semiconductor substrate into individual semiconductor devices. For example, as shown in FIG. 5, the dicing technique is a technique in which a substrate 102 is cut by rotating a dicing saw 101 covered with diamond powder at a high speed.

  Here, in order to chip a MEMS (Micro-Electro-Mechanical-System) component having a minute movable structure, it is necessary to prevent the foreign matter 103 generated during dicing from adhering to the movable portion. Increasing the amount of cleaning water 104 at the time of dicing is effective in preventing foreign matter from adhering to the movable part, but the increase in the amount of cleaning water is due to the fact that the cleaning water gives physical external force to the movable part. There was a limit in the direction of causing damage to the moving parts.

  In this regard, the method of forming the movable part at the chip level after the semiconductor device is first formed into chips by dicing technology before forming the movable part is effective in preventing foreign matter adhesion to the movable part and damage to the movable part. For example, when 100 semiconductor devices are collectively formed on a silicon substrate, conventionally, 100 semiconductor devices can be collectively processed by processing one silicon substrate, whereas a movable portion is formed after chip formation. In the method, there is a problem in that it is necessary to individually process 100 semiconductor devices formed into chips, which causes a reduction in production capacity.

  In addition, after forming a protective film on the substrate surface before dicing to prevent foreign substances from adhering, dicing into chips, and removing the protective film in the final process is also possible. Although it is effective in preventing the above-mentioned problem, it is necessary to remove the protective film at the chip level.

With respect to the method of eliminating the above-mentioned conventional drawbacks and forming chips without adhering foreign matter or other foreign matter to the semiconductor device, after forming a V-shaped groove in the silicon substrate with an alkaline solution, the movable parts are collectively formed at the substrate level. A method of dividing a semiconductor device along a V-shaped groove in a final process and thereby forming a chip has been proposed (Patent Document 1).
However, this method requires a wide area for forming the V-shaped groove. For example, when forming a V-shaped groove having a depth of 300 μm on a silicon substrate having a thickness of 600 μm and a plane orientation <100>, an etching opening having a width of 420 μm is used. As a result, the number of semiconductor devices that can be formed on the substrate is reduced.

US Pat. No. 5,596,222

An object of the present invention is to eliminate the above-mentioned conventional drawbacks, and in making a semiconductor device into a chip,
・ Does not allow cuttings or other foreign matter to adhere to the moving parts.
・ Moving parts are not damaged by external force.
・ Does not reduce the number of semiconductor devices on the substrate ・ Does not increase the number of processes by utilizing the macro loading effect of dry etching,
・ Semiconductor devices can be easily chipped.
The present invention provides a method for manufacturing a semiconductor chip that provides excellent effects such as the above.

  According to the present invention, after forming an etching mask material on the surface of the substrate, the substrate is etched to a desired depth by dry etching to form a groove for chip formation, and then the movable part is collectively formed at the substrate level. In the final process, the semiconductor device is divided into chips along the groove.

  By dividing the groove with high accuracy by dry etching technology, the chip can be formed without attaching foreign matter to the movable part, and no cleaning water is required, so the movable part can be damaged. It becomes possible to make a chip without causing it. In addition, since the etching depth can be controlled with high accuracy, subsequent processes such as a movable part forming process can be collectively processed at the substrate level while maintaining a sufficient substrate strength.

  The groove can be formed simultaneously with the substrate processing step by etching. In this case, the depth of the groove can be controlled by the etching width for forming the groove by utilizing the microloading effect at the time of dry etching.

  The groove may be formed in a continuous straight line shape, or may be in the form of a broken line with an interval. Furthermore, the groove may be formed to face the front and back surfaces of the substrate. The groove is preferably V-shaped at the bottom.

  According to the semiconductor chip manufacturing method of the present invention, foreign matter such as swarf does not adhere to the movable part of the semiconductor device. In addition, the movable part is not damaged by the external force. In addition, the semiconductor device can be easily made into chips without reducing the number of semiconductor devices on the substrate.

  Hereinafter, preferred embodiments of the present invention will be described. FIG. 1 shows a cross section after each step when a semiconductor device formed on a silicon substrate 1 is made into a chip. The thickness of the silicon substrate 1 is 600 μm.

  FIG. 1A shows a state in which a semiconductor device 2 is formed on a silicon substrate 1. An etching mask material 3 is formed so as to cover the semiconductor device 2 for each chip. In the present embodiment, a photosensitive organic film is used for the etching mask material 3. Such an etching mask material 3 is formed. For example, it can be easily realized by using an existing photolithography technique.

After protecting the semiconductor device 2 with the etching mask material 3 as described above, a predetermined groove 4 for dividing is formed on the silicon substrate 1 by dry etching (FIG. 1B). In the present embodiment, SF ₆ is used as a reactive gas for dry etching. The depth of the groove 3 formed by the etching is 300 μm.

  Next, the etching mask material 3 is removed by, for example, ashing or other existing film removal technology (FIG. 1B). Finally, by dividing the silicon substrate 1 along the grooves 4, the silicon substrate 1 on which each semiconductor device 2 is mounted is divided for each chip 5. Therefore, the silicon substrate 1 can be easily divided into chips 5 without using a dicing saw as in the prior art. Therefore, foreign matter such as cutting residue does not adhere to the movable part. Moreover, since the groove width can be reduced, the number of semiconductor devices on the substrate is not reduced.

The reactive gas used for dry etching when forming the groove is SF ₆ which generates a large amount of fluorine radicals and has a high etching rate, but is not limited thereto, and XeF ₂ may be used. According to these gases, Si can be etched at a high speed. In particular, when XeF ₂ is used, the selectivity is also good.

  Still another embodiment will be described. FIG. 2 shows a cross-sectional view for each process of manufacturing a semiconductor acceleration sensor according to the present invention. A semiconductor acceleration sensor includes a step of forming a piezoresistor on the front surface, a step of forming electrode wiring, a step of forming a heavy cone pattern and a chip groove pattern on the back surface, a step of dry etching the back surface, and a buried oxide film. It has the process of removing with HF aqueous solution.

  First, as shown in FIG. 2A, an SOI (Silicon on Insulator) substrate 11 has a buried oxide film 13 and an active layer 14 formed on a support substrate 12. A piezoresistor 15 is formed on the surface of the SOI substrate 11 by ion implantation (FIG. 2B). Next, a silicon oxide film 16 is formed as an insulating film by, for example, a thermal oxidation method, and a sensor circuit 17 is formed by forming a contact hole and a metal wiring (FIG. 2C).

Next, as shown in FIG. 2D, a heavy cone pattern and a chip-forming groove pattern are formed on the back surface of the support substrate 12 with a photoresist 21 by photolithography. Then, by using SF ₆ gas as a reactive gas and etching using, for example, an RIE apparatus, a heavy cone 22 formed by cutting the support substrate 12 and a chip-forming groove 23 are formed simultaneously (see FIG. 2 (e)).

  Finally, as shown in FIG. 2 (f), the buried oxide film 13 exposed from the surface is removed by etching with HF, and then the substrate along the groove 23 as shown in FIG. 2 (g). Is completed, the acceleration sensor chip 24 is completed.

  In this embodiment, as shown in FIG. 3, formation of the chip-forming groove 23 is performed by utilizing a so-called “microloading effect” in which the etching rate is reduced in a narrow pattern portion compared to a wide pattern portion. Are formed simultaneously with the heavy cone 22 and the opening width for forming the heavy cone 22 is 100 μm, whereas the groove width d2 for chip formation is set to 5 μm. As a result, when dry etching with a depth of 600 μm corresponding to the thickness of the support substrate 12 is completed in a heavy cone forming portion with an opening width d1 of 100 μm, a chip-forming groove 23 with an opening width of 5 μm formed simultaneously. The etching depth can be easily controlled to 300 μm.

  The depth of the groove 23 for chip formation does not need to be half of the substrate thickness, and may be set shallow to facilitate handling at the substrate level, or set deep to facilitate chip separation. Alternatively, the groove 23 may be set to reach the buried oxide film 13. When the chip-forming groove 23 is set deep, the groove width d2 may be widened. For example, when the width is 10 μm, the depth of the groove 23 is 330 μm. On the other hand, when the chip-forming groove 23 is set shallow, the groove width d2 may be narrowed. For example, when the width is 3 μm, the groove depth is 280 μm.

  When it is desired to completely divide the substrate by dry etching, the substrate surface opposite to the chip-forming groove 23 to be etched when the heavy cone 22 is formed is positioned opposite to the chip-forming groove 23. The active layer 14 and the buried oxide film 23 can be etched and penetrated using a photosensitive organic film formed by photolithography as a mask.

  The shape of the bottom of the grooves 4 and 23 is preferably V-shaped. Explaining in the first embodiment, for example, as shown in FIG. 4A, an expanded tape 31 is bonded to the back surface of the silicon substrate 1 in which the grooves 4 are formed, and the expanded tape 31 is attached. When the silicon substrate 1 is divided along the groove 4 by stretching, stress concentrates on the very narrow corner 4a at the tip of the bottom of the groove 4, so that as shown in FIG. The silicon substrate 1 can be divided along one line connecting the portion 4 a and the back surface of the silicon substrate 1. Accordingly, it is possible to prevent the silicon substrate 1 from being cracked in a state where a part of the silicon substrate 1 remains on the expanded tape 31 or from being biased to one chip side.

  When the substrate is divided into chips along the groove after forming the groove, for example, the expanded tape is bonded to the substrate on which the groove is formed, and the substrate is divided by stretching the expanded tape. Then, the substrate can be safely divided without damaging the chip.

  In the above embodiment, the weight formation in the acceleration sensor is performed simultaneously with the groove formation process, but the present invention requires a deepening process on the back surface of the substrate in addition to the weight body formation. It can be applied to all devices. For example, a back surface etching (capacity formation) process in an RF device (filter), a back surface etching (capacity formation) process in a microphone, a back surface through etching process in a stencil mask (for EB), a back surface etching (capacity formation) process in a pressure sensor, optical An example is a process of forming a mirror surface of a device.

  INDUSTRIAL APPLICABILITY The present invention can be suitably used when a plurality of semiconductor devices formed on a substrate are cut and divided for each chip after various semiconductor devices are formed on the substrate in a semiconductor device manufacturing process. it can.

It is explanatory drawing which showed typically the process of chip-forming a semiconductor device based on embodiment. It is explanatory drawing which showed typically the process of chip-forming a semiconductor acceleration sensor based on other embodiment. It is a graph explaining a micro loading effect. It is explanatory drawing which shows a mode that the bottom part of a groove | channel is formed in a V shape and a silicon substrate is divided | segmented using an expanded tape. It is explanatory drawing which shows the mode of the division | segmentation of a board | substrate by the conventional dicing technique.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Silicon substrate 2 Semiconductor device 3 Etching mask material 4 Groove 5 Chip

Claims (12)

A method of dividing a substrate on which a plurality of semiconductor devices are formed into chips,
A method of manufacturing a semiconductor chip, comprising: forming a groove on the substrate by dry etching; and then dividing the substrate by dividing the substrate along the groove. Wherein as a reaction gas for dry etching, which comprises using the XeF ₂ or SF _6, the method of manufacturing a semiconductor chip according to claim 1. 2. The method of manufacturing a semiconductor chip according to claim 1, wherein the substrate is made of Si. 2. The method of manufacturing a semiconductor chip according to claim 1, wherein the groove depth is 50% to 99% of the thickness of the substrate. 2. The method of manufacturing a semiconductor chip according to claim 1, wherein the depth of the groove is the same as the thickness of the substrate. 2. The method of manufacturing a semiconductor chip according to claim 1, wherein the groove is formed in a broken line shape. 2. The method of manufacturing a semiconductor chip according to claim 1, wherein the groove is formed simultaneously with a substrate processing step by etching. 8. The method of manufacturing a semiconductor chip according to claim 7, wherein the depth of the groove is controlled by an etching width for forming the groove. 2. The method of manufacturing a semiconductor chip according to claim 1, wherein the substrate after the groove is formed is bonded to an expanding tape and the substrate is divided by stretching the expanding tape. 3. The method of manufacturing a semiconductor chip according to claim 1, wherein the groove has a width of 1 μm to 50 μm. 2. The method of manufacturing a semiconductor chip according to claim 1, wherein the substrate is divided by forming grooves on both surfaces of the substrate so as to face each other by dry etching and dividing the substrate along the grooves. 2. The method of manufacturing a semiconductor chip according to claim 1, wherein the bottom of the groove is formed in a V shape.

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