JP2004363517A - Method of chipping semiconductor wafer - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of chipping, a semiconductor wafer in which a thin part is formed by plasma etching and it is difficult to apply a dicing method for the chipping, wherein there is a low possibility that a wafer is damaged in handling, it is unnecessary to increase a production process and the number of semiconductor devices to be taken can be increased. <P>SOLUTION: In the same process as plasma etching for forming the thin part, a trench 11a for chipping is simultaneously formed in a region except for an outer peripheral part of a semiconductor wafer 1. The trench for chipping is not formed in the outer peripheral part of the wafer so as to ensure the strength of the wafer, to avoid damages of the wafer in handling and in particular damages from the outer peripheral part which are easy to occur. If the shape of the terminal of the trench for forming the chip is narrowed toward the terminal, an effect is increased further. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a manufacturing technique of a semiconductor sensor and a semiconductor actuator having a thin diaphragm and a beam formed by etching a part of a semiconductor wafer such as a silicon wafer. Related to chip technology.
[0002]
[Prior art]
2. Description of the Related Art Semiconductor devices using semiconductor wafers, especially silicon wafers, are becoming smaller and more accurate every day. Some of them use a diaphragm formed by etching a part of a semiconductor to make it thinner or leaving a thin film formed on the semiconductor. Such a structure is used for a pressure sensor, a gas sensor, a micro valve, and the like. There is also an acceleration sensor or the like that uses a semiconductor by processing it into a thin beam.
A semiconductor device having such a structure is manufactured as a wafer in which a large number of semiconductor devices are integrated by a wafer process, and is obtained by chipping the wafer in a final stage. However, since a thin diaphragm or the like is formed on the wafer, a dicing method used for a normal wafer cannot be used when the wafer is formed into chips. The reason is that the water blown at the time of dicing breaks the diaphragm and the like.
[0003]
As a method of chipping a semiconductor wafer having a thin portion such as a diaphragm without breaking it, a method using an ultrasonic cutter or an ultrasonic cutter in which an etching groove is formed in advance on a dividing line by dry etching or wet etching and used. A method is disclosed in US Pat. Patent Document 2 discloses a method of forming a chip forming groove at the same time as forming a thin portion by etching a part of a semiconductor wafer and forming a chip using the chip forming groove. I have. In the method disclosed in Patent Document 2, anisotropic etching, which is wet etching, is used.
[0004]
FIG. 3 shows a state in a step related to chipping in a wafer process in order to explain an example of such a chipping method. FIG. 3A is a cross section showing a silicon wafer 1 before processing. FIG. 4B is a cross-sectional view showing a state in which a silicon oxide film 2 serving as a thin-film diaphragm 21 has been formed, FIG. 4C is a cross-sectional view showing a state in which an aluminum film 3 serving as an etching mask has been formed, and FIG. 3 is a cross-sectional view showing a state in which patterning is performed, and FIG. 3E is a cross-sectional view showing a state in which plasma etching is performed.
On one side of the silicon wafer 1 [FIG. 3 (a)], a silicon oxide film 2 serving as a thin film diaphragm 21 is generated [FIG. 3 (b)], and on the opposite side, the silicon wafer 1 is selected by plasma etching. An aluminum film 3 serving as an etching mask for performing the etching is generated (FIG. 3C). The aluminum film 3 is patterned by photolithography to form a patterned aluminum film 3a in which portions of the aluminum film corresponding to the diaphragm pattern 31 and the chip forming groove pattern 32 have been removed (FIG. 3D). . Using the patterned aluminum film 3a as an etching mask, plasma etching is performed until silicon in the portion of the diaphragm pattern 31 having a large area is eliminated, and a thin film diaphragm 21 is formed in this portion. At the same time, the silicon in the portion of the chip forming groove pattern 32 is also etched. However, since the width of the pattern is small, the entire thickness of the silicon is not etched due to the size effect, and a part thereof remains, and A groove 11 is formed (FIG. 3E). The silicon remaining under the chip-forming groove 11 enables handling as a wafer, and the wafer is cleaved at the chip-forming groove 11 into chips.
[0005]
The balance between the ease of chip formation and the ease of handling as a wafer is determined by the original thickness of the wafer and the thickness of silicon remaining under the chip forming grooves 11 (remaining thickness). On the other hand, since the remaining thickness is determined by the relative relationship between the size of the diaphragm pattern 31 and the width of the chip forming groove pattern 32, the width of the chip forming groove pattern 32 is determined according to the optimum value of the remaining thickness.
However, such a method of forming a chip forming groove 11 by etching a conventional dicing line has a feature that a chip can be formed without using a dicing method, but the chip forming groove 11 is formed on an outer peripheral portion of a wafer. There is a problem that the wafer is easily damaged because the thin portion exists.
[0006]
On the other hand, although not a semiconductor wafer having a thin portion, in order to obtain a thin chip, the wafer is polished and thinned in the final step of the wafer process, and then a separation groove is formed in a region excluding the outer peripheral portion of the wafer. Patent Document 3 discloses a method of forming a chip by dicing. By not forming a groove on the outer peripheral portion of the wafer, the mechanical strength of the wafer is secured.
[0007]
[Patent Document 1]
JP-A-7-240392 [Patent Document 2]
JP-A-6-216244 [Patent Document 3]
JP-A-5-198671
[Problems to be solved by the invention]
An object of the present invention is to provide a method of chipping a semiconductor wafer in which a thin portion is formed by plasma etching and it is difficult to apply a dicing method to chipping. An object of the present invention is to provide a method capable of increasing the number of semiconductor devices that can be obtained without increasing the number of steps.
[0009]
[Means for Solving the Problems]
The invention according to claim 1 divides a semiconductor wafer, which is an aggregate of a plurality of semiconductor devices having a thin portion such as a thin film diaphragm formed by plasma etching, into individual semiconductor devices by using a chip forming groove. In the chip forming method, a chip forming groove is formed in a region excluding the outer peripheral portion of the wafer in the same step as the plasma etching.
In the same process as plasma etching for forming a thin portion such as a thin film diaphragm, a chip forming groove is formed in a region excluding an outer peripheral portion of a wafer at the same time, so a step for forming a chip forming groove needs to be added. And the outer peripheral portion of the wafer has the original thickness, so that the strength of the outer peripheral portion of the wafer that is likely to be damaged during handling can be secured, and a wafer that is difficult to be damaged can be obtained. Since microcracks are not generated in the processed portion by the plasma etching and the processed corners are curved and do not become sharply sharp, concentration of stress hardly occurs. Due to these effects, even if chip forming grooves having the same width and the same depth are formed in the same region of a semiconductor wafer, the chip forming grooves formed by plasma etching are more likely to be formed by the dicing method. Is less likely to be damaged in later handling than a wafer formed with.
[0010]
According to a second aspect of the present invention, in the first aspect of the present invention, the shape of the end portion of the chip forming groove is such that the width is reduced and the depth is reduced toward the end.
If the shape of the end portion of the chip forming groove is narrower and the depth is smaller as approaching the terminal end, the chip forming groove has the same width and the same depth up to the terminal portion. The strength of the wafer is larger than that of the above, and the wafer is harder to be damaged. In other words, if the strength of the wafer is the same, it is possible to make the end of the groove for chip formation closer to the outer edge, and it is possible to increase the number of semiconductor devices that can be obtained from one wafer. Become.
[0011]
According to a third aspect of the present invention, in the second aspect of the present invention, the shape in the width direction that becomes narrower as approaching the terminal end is an isosceles triangle having the terminal end as a vertex.
If the shape in the width direction that becomes narrower as it approaches the end is an isosceles triangle with the apex at the end, the end of the groove for chipping uniformly reduces its width as it approaches the end. As a result, the depth is also monotonically reduced, and the shape is most unlikely to cause stress concentration.
[0012]
BEST MODE FOR CARRYING OUT THE INVENTION
In the method of chipping a semiconductor wafer according to the present invention, a chip-forming groove is formed at the same time as a thin portion such as a diaphragm is formed by plasma etching, and the chip-forming groove is not formed on the outer peripheral portion of the semiconductor wafer. Thus, the strength of the outer peripheral portion of the semiconductor wafer is not reduced, and the semiconductor wafer after the formation of the chip forming groove is prevented from being easily damaged.
Hereinafter, embodiments of the method of forming a semiconductor wafer into chips according to the present invention will be described in more detail with reference to examples.
[0013]
[First embodiment]
1A and 1B show the appearance of a semiconductor wafer (hereinafter simply referred to as "wafer") 1 for explaining a first embodiment, wherein FIG. 1A is a plan view showing the entire wafer 1, and FIG. FIG. 3 is an enlarged plan view, and FIG.
As shown in FIG. 1A, the chip-forming groove 11a of this embodiment is not formed in the outer peripheral portion of 5 to 10 mm from the outer edge of the wafer 1.
Since the chip-forming groove 11a is formed in exactly the same step as the chip-forming groove 11 described with reference to FIG. 3 in the section of "Prior Art", the detailed description of the step is omitted, and the difference will be described. I will explain only.
[0014]
The difference between the chip forming groove 11a and the chip forming groove 11 is that the chip forming groove 11 of FIG. 3 is formed up to the outer edge of the wafer 1, whereas the chip forming groove 11a of FIG. As shown in FIG. 1, it is not formed on the outer peripheral portion of the wafer 1. That is, when patterning the aluminum film, the aluminum film is patterned using a mask in which a chip-forming groove pattern is not formed on the outer peripheral portion of the wafer 1.
When a semiconductor is etched by plasma etching, unlike a mechanical process such as dicing, a microcrack is not left in a processed portion, and furthermore, the processed corner portion is a curved surface and does not become sharp and sharp, so the material is not etched. The mechanical strength can be maintained, and it is hard to be damaged by handling.
[0015]
Based on the above method, a 2.5 mm square semiconductor sensor having a 0.5 mm thin film diaphragm in the center and a 25 μm wide chip forming groove were formed on a silicon wafer having a thickness of 100 mm and a thickness of 400 μm. When the semiconductor sensor was manufactured by arranging it in a region except for 8 mm, the wafer was not damaged.
According to this embodiment, since a chip-forming groove can be formed at the same time in the plasma etching process for forming the thin film diaphragm and the like, no additional process is required, and no additional man-hour is required.
[Second embodiment]
2A and 2B show the appearance of the wafer 1 for explaining the second embodiment, in which FIG. 2A is a plan view showing the whole wafer 1, FIG. 2B is an enlarged plan view showing an enlarged portion, and FIG. FIG. 2 is an AA cross-sectional view, which corresponds to FIG. 1 of the first embodiment.
[0016]
This embodiment is characterized by the shape of the terminal end of the groove for chip formation. That is, as shown in FIG. 2, the chip-forming groove 11b of this embodiment has an end portion 111b in the form of an isosceles triangle whose shape in the width direction has a vertex at the end. When the shape in the width direction is set in this manner, the depth of the groove also becomes shallower toward the end corresponding to the width. Comparing the chip forming groove 11b of this embodiment with the chip forming groove 11a of the first embodiment, the thickness of the semiconductor remaining under the end portion 111b of the chip forming groove 11b is larger than that of the chip forming groove 11b. Since it is thicker than in the case of 11a, the chipping groove 11b is larger in mechanical strength than the chipping groove 11a, and the breakage during handling is further reduced as compared with the first embodiment. This means that if the wafer has the same strength, the width of the outer peripheral portion where the chip-forming groove is not formed can be further reduced, so that the number of semiconductor devices removed from the wafer can be increased.
[0017]
In the above embodiments, the case of a semiconductor sensor having a thin-film diaphragm has been described. However, the present invention relates to a semiconductor sensor having a thin-film semiconductor as a diaphragm, a semiconductor sensor or a semiconductor actuator having a thin-film or a thin semiconductor beam. The present invention is applicable to all semiconductor devices made by etching a semiconductor by plasma etching.
[0018]
【The invention's effect】
According to the first aspect of the present invention, since the chip-forming groove is formed in a region excluding the outer peripheral portion of the wafer at the same time as the plasma etching for forming the thin portion such as the thin-film diaphragm, the chip-forming groove is formed. No additional process is required, and the outer peripheral portion of the wafer has the original thickness, so that the strength of the outer peripheral portion of the wafer, which is likely to be damaged in handling, can be secured, and the wafer that is hard to be damaged Can be obtained. Since microcracks are not generated in the processed portion by the plasma etching and the processed corners are curved and do not become sharply sharp, concentration of stress hardly occurs. Due to these effects, even if chip-forming grooves having the same width and the same depth are formed in the same region of the wafer, the chip-forming grooves formed by the plasma etching have the chip-forming grooves formed by the dicing method. The formed wafer is less likely to be damaged in later handling.
[0019]
Therefore, according to the present invention, as a method of chipping a semiconductor wafer in which a thin portion is formed by plasma etching and it is difficult to apply the dicing method to chipping, the possibility of damaging the wafer during wafer handling is low. In addition, it is possible to provide a method that does not require an increase in the number of manufacturing steps.
According to the second aspect of the present invention, the shape of the end portion of the chip forming groove is such that the width is reduced and the depth is reduced toward the end. If the shape of the end portion of the chip forming groove is narrower and the depth is smaller as approaching the terminal end, the chip forming groove has the same width and the same depth up to the terminal portion. The strength of the wafer is larger than that of the above, and the wafer is harder to be damaged. In other words, if the strength of the wafer is the same, it is possible to make the end of the groove for chip formation closer to the outer edge, and it is possible to increase the number of semiconductor devices that can be obtained from one wafer. Become.
[0020]
Therefore, according to the present invention, as a method of chipping a semiconductor wafer in which a thin portion is formed by plasma etching and it is difficult to apply the dicing method to chipping, the possibility of damaging the wafer during wafer handling is low. Thus, it is possible to provide a method that does not require an increase in the number of manufacturing steps and that can increase the number of semiconductor devices to be obtained.
In the invention according to claim 3, the shape in the width direction that becomes narrower toward the end is an isosceles triangle having the end as the vertex. If the shape of the end is an isosceles triangle with the end at the top, the width of the end of the groove for chip formation is reduced uniformly as it approaches the end, and the depth is monotonously reduced accordingly. Thus, a shape in which stress concentration hardly occurs is obtained. Therefore, according to the present invention, damage to the wafer is less likely to occur.
[Brief description of the drawings]
FIGS. 1A and 1B show a wafer appearance for explaining a first embodiment of a semiconductor wafer chip forming method according to the present invention, wherein FIG. 1A is a plan view showing the whole wafer, and FIG. FIG. 2C is a cross-sectional view of the wafer taken along the line AA. FIG. 2A is an external view of a wafer for explaining a second embodiment of the method of chipping a semiconductor wafer according to the present invention. FIG. FIG. 3B is an enlarged plan view showing an enlarged portion, FIG. 3C is a cross-sectional view taken along the line AA. FIG. 3 shows a part of a wafer state during a wafer process of a semiconductor sensor to which the present invention is applied. Sectional view showing a silicon wafer before processing, (b) is a sectional view showing a state in which a silicon oxide film is formed on the lower surface, (c) is a sectional view showing a state in which an aluminum film is formed on the upper side, and (d) is a sectional view showing aluminum. Sectional view showing the state in which the film was patterned, FIG. Sectional view showing a Zuma etching state EXPLANATION OF REFERENCE NUMERALS
DESCRIPTION OF SYMBOLS 1 Silicon wafer 11, 11a, 11b Chip formation groove 111a, 111b Chip formation groove end part 2 Silicon oxide film 21 Thin film diaphragm 3 Aluminum film 3a Patterned aluminum film 31 Diaphragm pattern 32 Chip formation groove pattern

Claims (3)

A method of forming a semiconductor wafer into chips by dividing a semiconductor wafer, which is an aggregate of a plurality of semiconductor devices having a thin portion such as a thin film diaphragm formed by plasma etching, into individual semiconductor devices using a chip forming groove. ,
In the same step as the plasma etching, at the same time, forming a chipping groove in a region except the outer peripheral portion of the semiconductor wafer,
A method of forming a semiconductor wafer into chips. As the shape of the terminal portion of the groove for chipping, the width is reduced and the depth is reduced as approaching the terminal,
The method for chipping a semiconductor wafer according to claim 1, wherein: The shape in the width direction to be narrower as approaching the terminal end is an isosceles triangle having the terminal end as a vertex,
3. The method according to claim 2, wherein the semiconductor wafer is chipped.

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