JP2003298070A - Method of manufacturing semiconductor device and semiconductor device manufactured thereby - Google Patents

Method of manufacturing semiconductor device and semiconductor device manufactured thereby

Info

Publication number
JP2003298070A
JP2003298070A JP2002103882A JP2002103882A JP2003298070A JP 2003298070 A JP2003298070 A JP 2003298070A JP 2002103882 A JP2002103882 A JP 2002103882A JP 2002103882 A JP2002103882 A JP 2002103882A JP 2003298070 A JP2003298070 A JP 2003298070A
Authority
JP
Japan
Prior art keywords
semiconductor device
semiconductor
thin portion
semiconductor substrate
manufacturing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2002103882A
Other languages
Japanese (ja)
Inventor
Hisakazu Miyajima
久和 宮島
Naomasa Oka
直正 岡
Atsushi Ogiwara
淳 荻原
Takashi Okuto
崇史 奥戸
Shigenari Takami
茂成 高見
Mitsuhiro Kani
充弘 可児
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Electric Works Co Ltd
Original Assignee
Matsushita Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Works Ltd filed Critical Matsushita Electric Works Ltd
Priority to JP2002103882A priority Critical patent/JP2003298070A/en
Publication of JP2003298070A publication Critical patent/JP2003298070A/en
Pending legal-status Critical Current

Links

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method by which a semiconductor device having a structure that has a possibility of becoming mechanically fragile such as a thin wall section can be formed without breaking the device. <P>SOLUTION: The semiconductor device manufactured by this method has thin wall sections 21 and thick wall sections 11 and 11 provided around the thin wall sections 21, both of which are formed by engraving a semiconductor substrate 1. The semiconductor substrate 1 is divided into individual elements by etching the prescribed positions of the thick wall sections 11 and 11 from both surfaces of the substrate 1. <P>COPYRIGHT: (C)2004,JPO

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明は、半導体装置の製造
方法に関し、例えば、半導体圧力センサのような、特に
薄肉部を有する半導体装置の製造方法に関するものであ
る。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of manufacturing a semiconductor device such as a semiconductor pressure sensor having a thin portion.

【0002】[0002]

【従来の技術】従来の半導体装置の製造方法として、半
導体圧力センサの製造方法を一例に図4に示す。このも
のは、シリコン(Si)からなる半導体基板101に、
略四角環状の枠部(厚肉部)102と、その内側に略四
角形状の薄肉部103を有したダイヤフラム104を形
成したセンサチップ100,100,…が複数形成され
ている。また、薄肉部103は作用する圧力により半導
体基板101の厚み方向に動くようになっている。
2. Description of the Related Art As a conventional method for manufacturing a semiconductor device, FIG. 4 shows an example of a method for manufacturing a semiconductor pressure sensor. This is a semiconductor substrate 101 made of silicon (Si),
A plurality of sensor chips 100, 100, ... Forming a diaphragm 104 having a substantially square frame portion (thick portion) 102 and a substantially square thin portion 103 inside are formed. Further, the thin portion 103 is adapted to move in the thickness direction of the semiconductor substrate 101 due to the acting pressure.

【0003】そして、この半導体圧力センサの製造の際
には、まず、ダイシング前の半導体基板101にダイシ
ング用の粘着シート106を貼り付ける。この際、半導
体基板101のダイヤフラム104を形成した面が粘着
シート106の貼り付け面と重なるように貼り付ける。
When manufacturing this semiconductor pressure sensor, first, an adhesive sheet 106 for dicing is attached to the semiconductor substrate 101 before dicing. At this time, the semiconductor substrate 101 is attached so that the surface of the semiconductor substrate 101 on which the diaphragm 104 is formed overlaps the attachment surface of the adhesive sheet 106.

【0004】次いで、半導体基板101をダイシング装
置(図示せず)にセットし、ダイシングブレード107
が枠部102を裁断するようにダイシングすることによ
り、センサチップ100,100,…を個別に分割する
ことができるのである。
Next, the semiconductor substrate 101 is set in a dicing device (not shown), and the dicing blade 107 is set.
The sensor chips 100, 100, ... Can be individually divided by dicing so as to cut the frame portion 102.

【0005】また、特開平9−320996で開示され
ている半導体装置の製造方法を図5に示す。
FIG. 5 shows a method of manufacturing a semiconductor device disclosed in Japanese Patent Laid-Open No. 9-320996.

【0006】このものは、同じく略四角環状の枠部(厚
肉部)202と、その内側に略四角形状の薄肉部203
を有したダイヤフラム204とを形成したセンサチップ
200を複数備えたシリコンからなる半導体基板201
において、ダイヤフラム204形成面側の枠部202の
所定の位置に沿って異方性エッチングを施し、断面視に
おいて側壁の所定の一部を半導体基板201の厚み方向
に対して傾斜させた溝205を形成している。
This is also a substantially square annular frame portion (thick portion) 202 and a substantially square thin portion 203 inside thereof.
A semiconductor substrate 201 made of silicon and provided with a plurality of sensor chips 200 each having a diaphragm 204 having
In FIG. 3, anisotropic etching is performed along a predetermined position of the frame portion 202 on the side where the diaphragm 204 is formed, and a groove 205 in which a predetermined part of the side wall is inclined with respect to the thickness direction of the semiconductor substrate 201 in a sectional view is formed. Is forming.

【0007】そして、この溝205を形成した半導体基
板201の一面とダイシングシート206とを貼り付
け、溝205の斜状面205a,205aをダイシング
ブレード207の側面が裁断するように半導体基板20
1をダイシングしてセンサチップ200を個別に分割し
ている。
Then, one surface of the semiconductor substrate 201 in which the groove 205 is formed and the dicing sheet 206 are attached, and the semiconductor substrate 20 is cut so that the side surfaces of the dicing blade 207 cut the oblique surfaces 205a and 205a of the groove 205.
1 is diced to divide the sensor chip 200 individually.

【0008】[0008]

【発明が解決しようとする課題】上記の従来技術は、薄
肉部103が比較的厚い、例えば、約10μm以上の厚
みを持つ場合には、素子の分割が比較的容易に行えるた
め、分割工法として非常に有効であるが、高感度化や小
型化等により薄肉部103の厚さが薄くなるに伴ってそ
の機械的な強度が非常に小さくなるため、ダイシング時
の洗浄冷却水やダイシングブレード107の振動等によ
り、薄肉部103が破損してしまうという問題が生じる
恐れがある。
The above-mentioned conventional technique is a dividing method because the element can be divided relatively easily when the thin portion 103 has a relatively large thickness, for example, a thickness of about 10 μm or more. Although very effective, the mechanical strength of the thin portion 103 becomes extremely small as the thickness of the thin portion 103 becomes thin due to high sensitivity, downsizing, and the like. Therefore, cleaning cooling water during dicing and dicing blade 107 There is a possibility that the thin portion 103 may be damaged due to vibration or the like.

【0009】また、特開平9−320996で示される
従来方法では、ダイシング端部のクラックや欠けを低減
できるものの、ダイシング時の洗浄冷却水やダイシング
ブレード207の振動等により、薄肉部203が破損し
てしまうという問題が依然として生じる恐れがある。
In the conventional method disclosed in Japanese Patent Laid-Open No. 9-320996, cracks and chips at the dicing end can be reduced, but the thin portion 203 is damaged by cleaning cooling water during dicing or vibration of the dicing blade 207. There is still the risk of problems.

【0010】本発明は、上記の点を鑑みてなしたのであ
り、その目的とするところは、脆弱になる恐れのある薄
肉部のような構造体を有する半導体装置を破損しにくく
して形成する半導体装置の製造方法及び半導体装置を提
供することにある。
The present invention has been made in view of the above points, and it is an object of the present invention to form a semiconductor device having a structure such as a thin portion which is likely to be fragile so as not to be easily damaged. A semiconductor device manufacturing method and a semiconductor device are provided.

【0011】[0011]

【課題を解決するための手段】上記目的を達成するため
に、本発明の半導体装置は、半導体基板に堀込加工を施
すことにより、薄肉部と、薄肉部に周設された厚肉部と
を有した半導体装置の製造方法において、前記厚肉部の
所定の位置を半導体基板の両面からエッチングして個々
の素子に分割したことを特徴としている。
In order to achieve the above object, a semiconductor device of the present invention has a thin portion and a thick portion provided around the thin portion by performing a digging process on a semiconductor substrate. In the method of manufacturing a semiconductor device having the above, a predetermined position of the thick portion is etched from both sides of the semiconductor substrate to divide into individual elements.

【0012】請求項2に係る発明の半導体装置は、請求
項1記載の製造方法において、前記半導体基板は、薄肉
部の直下に埋め込み酸化膜層を備えたSOI基板であっ
て、埋め込み酸化膜層までエッチングすることとしてい
る。
According to a second aspect of the semiconductor device of the present invention, in the manufacturing method according to the first aspect, the semiconductor substrate is an SOI substrate having a buried oxide film layer immediately below a thin portion, and the buried oxide film layer. It is supposed to be etched.

【0013】請求項3に係る発明の半導体装置は、半導
体基板に堀込加工を施すことにより、薄肉部と、薄肉部
に周設された厚肉部とを有した半導体装置であって、前
記厚肉部の所定の位置を半導体基板の両面からエッチン
グして個々の素子に分割することにより形成したことを
特徴としている。
A semiconductor device according to a third aspect of the present invention is a semiconductor device having a thin portion and a thick portion provided around the thin portion by subjecting a semiconductor substrate to a digging process. It is characterized in that a predetermined portion of the meat portion is formed by etching from both sides of the semiconductor substrate and dividing into individual elements.

【0014】[0014]

【発明の実施の形態】以下、本発明を図示例に基づいて
説明する。また、半導体装置においては、半導体圧力セ
ンサに具体化する。
BEST MODE FOR CARRYING OUT THE INVENTION The present invention will be described below based on illustrated examples. Further, the semiconductor device is embodied as a semiconductor pressure sensor.

【0015】[第1の実施形態]図1は、本実施形態に
係る半導体圧力センサを示す斜視図であり、図2は、本
実施形態に係る半導体圧力センサの製造方法を示す工程
図である。
[First Embodiment] FIG. 1 is a perspective view showing a semiconductor pressure sensor according to this embodiment, and FIG. 2 is a process drawing showing a method for manufacturing a semiconductor pressure sensor according to this embodiment. .

【0016】半導体圧力センサは、このものに作用した
圧力を電気信号に変換して出力するものであり、例え
ば、単結晶のシリコンからなるn型半導体基板1にて形
成されている。その構成は、平面視において略四角環状
をなした枠部(厚肉部)11,11と、その内方に薄肉
部21を有するダイヤフラム2とを備えている。
The semiconductor pressure sensor converts the pressure applied to this into an electric signal and outputs it, and is formed of, for example, an n-type semiconductor substrate 1 made of single crystal silicon. The configuration includes frame portions (thick portions) 11 having a substantially rectangular ring shape in plan view, and a diaphragm 2 having a thin portion 21 inside thereof.

【0017】また、枠部11,11の外方の側壁は、断
面視においてn型半導体基板1の略中央部が突き出すよ
うに斜状面15,15によって構成されている。
The outer side walls of the frame portions 11, 11 are formed by slanted surfaces 15, 15 so that the substantially central portion of the n-type semiconductor substrate 1 projects in a sectional view.

【0018】また、薄肉部21の上面(図1の上側)及
び枠部11,11と薄肉部21との境界位置には、半導
体圧力センサに作用した圧力にて生じる薄肉部21の歪
みにより抵抗値が変化するピエゾ抵抗素子12,12,
…が、薄肉部21の中央付近と薄肉部21と枠部11,
11との境界上にそれぞれ2個ずつ形成されており、合
計4個のピエゾ抵抗素子12,12,…でブリッジ回路
を構成するように拡散配線13,13,…にて相互接続
されている。そして、検出した圧力信号は電極14,1
4を介して出力される。
Further, the upper surface of the thin portion 21 (upper side in FIG. 1) and the boundary position between the frame portions 11 and 11 and the thin portion 21 are resisted by the strain of the thin portion 21 caused by the pressure acting on the semiconductor pressure sensor. Piezoresistive elements 12, 12, whose values change
... is near the center of the thin portion 21, the thin portion 21, the frame portion 11,
Two pieces each are formed on the boundary with 11, and are interconnected by diffusion wirings 13, 13, so that a total of four piezoresistive elements 12, 12, ... Form a bridge circuit. Then, the detected pressure signal is applied to the electrodes 14 and 1.
4 is output.

【0019】次に、このように構成した半導体圧力セン
サの製造工程を説明する。まず、n型半導体基板1の表
面(図1の上側)の薄肉部21及び枠部11,11と薄
肉部21との境界位置に所定の領域にボロンイオン(B
+)を拡散させ、ピエゾ抵抗素子12,12,…及び拡
散配線13,13,…を形成する。
Next, a manufacturing process of the semiconductor pressure sensor thus constructed will be described. First, a boron ion (B) is formed in a predetermined area at a boundary position between the thin portion 21 and the frame portions 11 and 11 on the surface of the n-type semiconductor substrate 1 (upper side in FIG. 1).
+) Is diffused to form piezoresistive elements 12, 12, ... And diffusion wirings 13, 13 ,.

【0020】次いで、アルミニウム(Al)をスパッタ
し、所定の部分をエッチングにより除去して電極14,
14を形成後、CVD法を用いて保護膜(図示せず)を
形成する。
Next, aluminum (Al) is sputtered and a predetermined portion is removed by etching to remove the electrodes 14,
After forming 14, a protective film (not shown) is formed by the CVD method.

【0021】次いで、n型半導体基板1の裏面(図1の
下側)にエッチングマスクとしての窒化膜(Si3N
4)3を形成し、ダイヤフラム2を形成する位置と半導
体基板1表裏面の枠部11,11における分割位置の窒
化膜3をエッチングにより除去する(図2(a))。
Then, on the back surface of the n-type semiconductor substrate 1 (lower side in FIG. 1), a nitride film (Si3N) as an etching mask is formed.
4) 3 is formed, and the nitride film 3 is removed by etching at the position where the diaphragm 2 is to be formed and the dividing positions in the frame portions 11, 11 on the front and back surfaces of the semiconductor substrate 1 (FIG. 2A).

【0022】そして、例えば、90℃に加熱したTMA
H(水酸化テトラメチルアンモニウム)の11%水溶液
を用い、所定の厚さの薄肉部21が形成されるまでn型
半導体基板1のダイヤフラム2を形成する位置及び枠部
11,11の分割位置を異方性エッチングして薄肉部2
1の形成と素子の分割を行う。このときのエッチングレ
ートは約0.8μm/分である(図2(b))。
Then, for example, TMA heated to 90 ° C.
Using a 11% aqueous solution of H (tetramethylammonium hydroxide), the position where the diaphragm 2 of the n-type semiconductor substrate 1 is formed and the position where the frame parts 11 and 11 are divided are formed until a thin part 21 having a predetermined thickness is formed. Thin part 2 by anisotropic etching
1 is formed and elements are divided. The etching rate at this time is about 0.8 μm / min (FIG. 2B).

【0023】このとき、枠部11,11の分割位置のエ
ッチング深さは、ダイヤフラム2のエッチング深さより
浅いので、薄肉部21が形成される前に枠部11,11
のエッチングは完了し、素子は個々に分割される。
At this time, since the etching depth of the dividing positions of the frame portions 11, 11 is shallower than the etching depth of the diaphragm 2, the frame portions 11, 11 are formed before the thin portion 21 is formed.
Etching is completed, and the device is divided into individual pieces.

【0024】以上説明した実施形態の半導体圧力センサ
によると、枠部11,11の所定の位置をn型半導体基
板1の両面からエッチングを施して素子を個々に分割す
るので、物理的な手段、例えば、ダイシングブレード等
を用いて分割する場合と比較して半導体圧力センサに与
える振動等を大幅に低減でき、脆弱になる恐れのある薄
肉部21のような構造体の破損を低減させ、歩留まりを
向上させることができる。
According to the semiconductor pressure sensor of the embodiment described above, since the predetermined positions of the frame portions 11, 11 are etched from both sides of the n-type semiconductor substrate 1 to divide the element into individual elements, a physical means, For example, compared with the case of using a dicing blade or the like for division, vibrations or the like given to the semiconductor pressure sensor can be significantly reduced, damage to a structure such as the thin portion 21 that may become fragile can be reduced, and yield can be improved. Can be improved.

【0025】[第2の実施形態]図3は、本実施形態に
係る半導体圧力センサの製造方法を示す工程図である。
この半導体圧力センサは、それを形成する半導体基板が
第1の実施形態と異なるもので、他の構成要素及びダイ
ヤフラム2の形成以前の工程は第1の実施形態と実質的
に同一であるので説明を省略する。また、同一部材にお
いては、第1の実施形態と同一の番号を付す。
[Second Embodiment] FIG. 3 is a process diagram showing a method for manufacturing a semiconductor pressure sensor according to the present embodiment.
In this semiconductor pressure sensor, the semiconductor substrate forming the semiconductor pressure sensor is different from that of the first embodiment, and the steps before the formation of the other components and the diaphragm 2 are substantially the same as those of the first embodiment. Is omitted. Further, the same members are given the same numbers as in the first embodiment.

【0026】半導体基板は、薄肉部21の直下に埋め込
み酸化膜層41を備えたシリコンからなるSOI基板4
である。
The semiconductor substrate is an SOI substrate 4 made of silicon having a buried oxide film layer 41 immediately below the thin portion 21.
Is.

【0027】その製造方法は、まず、SOI基板4の表
裏面(図1の上下側)にエッチングマスクとしての窒化
膜3を形成し、ダイヤフラム2を形成する位置とSOI
基板4表裏面の枠部11,11における分割位置の窒化
膜3をエッチングにより除去する(図3(a))。
In the manufacturing method, first, the nitride film 3 as an etching mask is formed on the front and back surfaces (upper and lower sides in FIG. 1) of the SOI substrate 4, and the position where the diaphragm 2 is formed and the SOI.
The nitride film 3 at the divided positions in the frame portions 11, 11 on the front and back surfaces of the substrate 4 is removed by etching (FIG. 3A).

【0028】次いで、例えば、90℃に加熱したTMA
H(水酸化テトラメチルアンモニウム)の11%水溶液
を用い、埋め込み酸化膜層41までSOI基板4のダイ
ヤフラム2を形成する位置及び枠部11,11の分割位
置を異方性エッチングする。このときのエッチングレー
トは約0.8μm/分である。また、異方性エッチング
は、埋め込み酸化膜層41により自動的に停止する(図
3(b))。
Then, for example, TMA heated to 90 ° C.
An 11% aqueous solution of H (tetramethylammonium hydroxide) is used to anisotropically etch the position where the diaphragm 2 of the SOI substrate 4 is formed and the dividing positions of the frame portions 11 and 11 up to the buried oxide film layer 41. The etching rate at this time is about 0.8 μm / min. Moreover, the anisotropic etching is automatically stopped by the buried oxide film layer 41 (FIG. 3B).

【0029】次いで、ダイヤフラム2内及び枠部11,
11の分割位置に露出した埋め込み酸化膜層41を、C
HF3ガスを用いたプラズマエッチングにより除去する
ことにより半導体圧力センサを個別に分割して完成する
(図3(c))。
Next, inside the diaphragm 2 and the frame portion 11,
The buried oxide film layer 41 exposed at the divided positions of 11 is C
The semiconductor pressure sensor is individually divided and completed by removing it by plasma etching using HF3 gas (FIG. 3C).

【0030】以上説明した実施形態の半導体圧力センサ
によると、半導体基板にSOI基板4を用いるととも
に、枠部11,11の所定の位置をSOI基板4の両面
から薄肉部21の直下に形成された埋め込み酸化膜層4
1まで異方性エッチングを施して素子を個々に分割する
ので、物理的な手段、例えば、ダイシングブレード等を
用いて分離する場合と比較して半導体圧力センサに与え
る振動等を大幅に低減でき、脆弱になる恐れのある薄肉
部21のような構造体の破損を低減させ、歩留まりを向
上させることができる。さらに、埋め込み酸化膜層41
によりエッチングが自動的に停止するので、加工精度の
よい半導体圧力センサを形成することができる。
According to the semiconductor pressure sensor of the above-described embodiment, the SOI substrate 4 is used as the semiconductor substrate, and the predetermined positions of the frame portions 11, 11 are formed on both sides of the SOI substrate 4 immediately below the thin portion 21. Buried oxide film layer 4
Since the elements are individually divided by performing anisotropic etching up to 1, vibrations or the like given to the semiconductor pressure sensor can be significantly reduced as compared with the case where the elements are separated by a physical means such as a dicing blade. It is possible to reduce the damage of the structure such as the thin portion 21 that may become fragile and improve the yield. Further, the buried oxide film layer 41
As a result, the etching is automatically stopped, so that a semiconductor pressure sensor with high processing accuracy can be formed.

【0031】以上、2つの実施形態について半導体装置
を半導体圧力センサにして説明してきたが、この半導体
装置は半導体圧力センサに限定されるものではなく、薄
肉部を有するもの、例えば、半導体加速度センサや半導
体アクチュエータについても適用されるものである。
Although the semiconductor device has been described as the semiconductor pressure sensor in the two embodiments, the semiconductor device is not limited to the semiconductor pressure sensor, but may have a thin portion, such as a semiconductor acceleration sensor or a semiconductor acceleration sensor. It is also applied to a semiconductor actuator.

【0032】[0032]

【発明の効果】請求項1に係る発明の半導体装置の製造
方法は、厚肉部の所定の位置を半導体基板の両面からエ
ッチングして素子分離するので、半導体装置に与える振
動等を大幅に低減でき、脆弱な構造体の破損を低減させ
ることができる。
In the method for manufacturing a semiconductor device according to the first aspect of the present invention, the predetermined position of the thick portion is etched from both sides of the semiconductor substrate to separate the elements, so that the vibration or the like applied to the semiconductor device is significantly reduced. It is possible to reduce damage to the fragile structure.

【0033】請求項2に係る発明の半導体装置の製造方
法は、請求項1の効果に加えて、薄肉部の直下に埋め込
み酸化膜層を備えたSOI基板を用いているので、素子
分離の際、エッチングはその埋め込み酸化膜層にて自動
的に停止させることができ、加工精度のよい半導体装置
を形成することができる
In addition to the effect of the first aspect, the method for manufacturing a semiconductor device according to the second aspect of the present invention uses the SOI substrate having the buried oxide film layer immediately below the thin portion, and therefore, in the case of element isolation. The etching can be automatically stopped at the buried oxide film layer, and a semiconductor device with high processing accuracy can be formed.

【0034】請求項3に係る発明の半導体装置は、厚肉
部の所定の位置を半導体基板の両面からエッチングして
個々の素子に分割して形成しているので、脆弱になる恐
れのある構造体の破損が低減して、歩留まりの向上した
半導体装置を提供できる。
In the semiconductor device according to the third aspect of the present invention, since the predetermined position of the thick portion is formed by dividing it into individual elements by etching from both sides of the semiconductor substrate, there is a risk of becoming fragile. A semiconductor device with reduced body damage and improved yield can be provided.

【図面の簡単な説明】[Brief description of drawings]

【図1】 本発明の第1の実施形態に係る半導体圧力セ
ンサを示す断面斜視図である。
FIG. 1 is a sectional perspective view showing a semiconductor pressure sensor according to a first embodiment of the present invention.

【図2】 本発明の第1の実施形態に係る半導体圧力セ
ンサの製造工程を示す断面図である。
FIG. 2 is a cross-sectional view showing the manufacturing process of the semiconductor pressure sensor according to the first embodiment of the invention.

【図3】 本発明の第2の実施形態に係る半導体圧力セ
ンサの製造工程を示す断面図である。
FIG. 3 is a cross-sectional view showing the manufacturing process of the semiconductor pressure sensor according to the second embodiment of the invention.

【図4】 従来の半導体圧力センサの製造方法を示す断
面図である。
FIG. 4 is a cross-sectional view showing a method for manufacturing a conventional semiconductor pressure sensor.

【図5】 従来の別の半導体圧力センサを示す断面図で
ある。
FIG. 5 is a cross-sectional view showing another conventional semiconductor pressure sensor.

【符号の説明】[Explanation of symbols]

1 半導体基板 11 枠部(厚肉部) 21 薄肉部 4 SOI基板 41 埋め込み酸化膜層 1 Semiconductor substrate 11 Frame part (thick part) 21 Thin part 4 SOI substrate 41 buried oxide film layer

───────────────────────────────────────────────────── フロントページの続き (72)発明者 荻原 淳 大阪府門真市大字門真1048番地松下電工株 式会社内 (72)発明者 奥戸 崇史 大阪府門真市大字門真1048番地松下電工株 式会社内 (72)発明者 高見 茂成 大阪府門真市大字門真1048番地松下電工株 式会社内 (72)発明者 可児 充弘 大阪府門真市大字門真1048番地松下電工株 式会社内 Fターム(参考) 2F055 AA40 BB20 CC02 DD05 EE13 FF43 FF49 GG01 4M112 AA01 BA01 CA01 CA03 CA07 DA03 DA04 DA06 DA09 DA12 EA03 EA07 EA10 EA11 FA20   ─────────────────────────────────────────────────── ─── Continued front page    (72) Inventor Atsushi Ogihara             1048, Kadoma, Kadoma-shi, Osaka Matsushita Electric Works Co., Ltd.             Inside the company (72) Inventor Takashi Okudo             1048, Kadoma, Kadoma-shi, Osaka Matsushita Electric Works Co., Ltd.             Inside the company (72) Inventor Shigenari Takami             1048, Kadoma, Kadoma-shi, Osaka Matsushita Electric Works Co., Ltd.             Inside the company (72) Inventor Mitsuhiro Kani             1048, Kadoma, Kadoma-shi, Osaka Matsushita Electric Works Co., Ltd.             Inside the company F term (reference) 2F055 AA40 BB20 CC02 DD05 EE13                       FF43 FF49 GG01                 4M112 AA01 BA01 CA01 CA03 CA07                       DA03 DA04 DA06 DA09 DA12                       EA03 EA07 EA10 EA11 FA20

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 半導体基板に堀込加工を施すことによ
り、薄肉部と、薄肉部に周設された厚肉部とを有した半
導体装置の製造方法において、 前記厚肉部の所定の位置を半導体基板の両面からエッチ
ングして個々の素子に分割したことを特徴とする半導体
装置の製造方法。
1. A method of manufacturing a semiconductor device having a thin portion and a thick portion provided around the thin portion by performing a digging process on a semiconductor substrate, wherein a predetermined position of the thick portion is a semiconductor. A method for manufacturing a semiconductor device, characterized in that the substrate is etched from both sides and divided into individual elements.
【請求項2】 前記半導体基板は、薄肉部の直下に埋め
込み酸化膜層を備えたSOI基板であって、埋め込み酸
化膜層までエッチングする請求項1記載の半導体装置の
製造方法。
2. The method of manufacturing a semiconductor device according to claim 1, wherein the semiconductor substrate is an SOI substrate having a buried oxide film layer immediately below a thin portion, and the buried oxide film layer is also etched.
【請求項3】 半導体基板に堀込加工を施すことによ
り、薄肉部と、薄肉部に周設された厚肉部とを有した半
導体装置であって、 前記厚肉部の所定の位置を半導体基板の両面からエッチ
ングして個々の素子に分割することにより形成された半
導体装置。
3. A semiconductor device having a thin portion and a thick portion provided around the thin portion by performing a digging process on the semiconductor substrate, wherein a predetermined position of the thick portion is a semiconductor substrate. A semiconductor device formed by etching from both sides and dividing into individual elements.
JP2002103882A 2002-04-05 2002-04-05 Method of manufacturing semiconductor device and semiconductor device manufactured thereby Pending JP2003298070A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2002103882A JP2003298070A (en) 2002-04-05 2002-04-05 Method of manufacturing semiconductor device and semiconductor device manufactured thereby

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2002103882A JP2003298070A (en) 2002-04-05 2002-04-05 Method of manufacturing semiconductor device and semiconductor device manufactured thereby

Publications (1)

Publication Number Publication Date
JP2003298070A true JP2003298070A (en) 2003-10-17

Family

ID=29389440

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2002103882A Pending JP2003298070A (en) 2002-04-05 2002-04-05 Method of manufacturing semiconductor device and semiconductor device manufactured thereby

Country Status (1)

Country Link
JP (1) JP2003298070A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009246940A (en) * 2008-03-13 2009-10-22 Epson Toyocom Corp Piezoelectric vibration piece, piezoelectric device, and manufacturing method of piezoelectric vibration piece

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009246940A (en) * 2008-03-13 2009-10-22 Epson Toyocom Corp Piezoelectric vibration piece, piezoelectric device, and manufacturing method of piezoelectric vibration piece
JP2013138512A (en) * 2008-03-13 2013-07-11 Seiko Epson Corp Method of manufacturing vibration piece

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