JP2005039261A5 - - Google Patents
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- Publication number
- JP2005039261A5 JP2005039261A5 JP2004192542A JP2004192542A JP2005039261A5 JP 2005039261 A5 JP2005039261 A5 JP 2005039261A5 JP 2004192542 A JP2004192542 A JP 2004192542A JP 2004192542 A JP2004192542 A JP 2004192542A JP 2005039261 A5 JP2005039261 A5 JP 2005039261A5
- Authority
- JP
- Japan
- Prior art keywords
- opening
- insulating film
- manufacturing
- semiconductor device
- conductive layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2004192542A JP4619050B2 (ja) | 2003-06-30 | 2004-06-30 | 表示装置の作製方法 |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2003186144 | 2003-06-30 | ||
| JP2004192542A JP4619050B2 (ja) | 2003-06-30 | 2004-06-30 | 表示装置の作製方法 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2005039261A JP2005039261A (ja) | 2005-02-10 |
| JP2005039261A5 true JP2005039261A5 (https=) | 2007-07-05 |
| JP4619050B2 JP4619050B2 (ja) | 2011-01-26 |
Family
ID=34220428
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2004192542A Expired - Fee Related JP4619050B2 (ja) | 2003-06-30 | 2004-06-30 | 表示装置の作製方法 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP4619050B2 (https=) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1920459A4 (en) * | 2005-08-12 | 2012-07-25 | Semiconductor Energy Lab | METHOD OF MANUFACTURING A SEMICONDUCTOR ARRANGEMENT |
| JP5014749B2 (ja) * | 2006-11-27 | 2012-08-29 | 三菱電機株式会社 | 炭化珪素半導体装置の製造方法 |
| WO2011046025A1 (en) | 2009-10-16 | 2011-04-21 | Semiconductor Energy Laboratory Co., Ltd. | Logic circuit and semiconductor device |
Family Cites Families (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01215043A (ja) * | 1988-02-24 | 1989-08-29 | Hitachi Ltd | 層間膜への透孔加工方法 |
| JP3248234B2 (ja) * | 1992-04-21 | 2002-01-21 | ソニー株式会社 | 埋め込みプラグの形成方法 |
| JPH05335424A (ja) * | 1992-05-28 | 1993-12-17 | Alps Electric Co Ltd | 絶縁層を介した上部電極と下部電極の導通方法及びその構造 |
| JP3317095B2 (ja) * | 1995-06-30 | 2002-08-19 | 株式会社村田製作所 | 圧電共振子及びこの圧電共振子を用いた圧電部品 |
| JPH10270442A (ja) * | 1997-03-27 | 1998-10-09 | Seiko Epson Corp | 半導体集積装置の製造方法、および半導体集積装置 |
| JPH1197392A (ja) * | 1997-09-16 | 1999-04-09 | Ebara Corp | 微細窪みの充填方法及び装置 |
| JP4202454B2 (ja) * | 1997-11-27 | 2008-12-24 | 株式会社半導体エネルギー研究所 | 半導体装置およびその作製方法 |
| TW486824B (en) * | 1999-03-30 | 2002-05-11 | Seiko Epson Corp | Method of manufacturing thin-film transistor |
| JP4954380B2 (ja) * | 2000-03-27 | 2012-06-13 | 株式会社半導体エネルギー研究所 | 発光装置、半導体装置 |
| JP3896770B2 (ja) * | 2000-07-07 | 2007-03-22 | セイコーエプソン株式会社 | 配線間接続孔の形成方法 |
| JP2003149831A (ja) * | 2001-11-09 | 2003-05-21 | Seiko Epson Corp | 単分子層のパターン形成方法、パターン化単分子層を利用した導電膜パターンの形成方法、及び電気光学装置 |
| JP2003243327A (ja) * | 2002-02-20 | 2003-08-29 | Seiko Epson Corp | 電子デバイス、配線形成方法および配線形成装置 |
-
2004
- 2004-06-30 JP JP2004192542A patent/JP4619050B2/ja not_active Expired - Fee Related
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